mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
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131 lines
3.8 KiB
C
131 lines
3.8 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMDYNAMICTXPOWER_H__
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#define __PHYDMDYNAMICTXPOWER_H__
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#ifdef CONFIG_DYNAMIC_TX_TWR
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/* @============================================================
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* Definition
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* ============================================================
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*/
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/* 2019.2.12, refine code structure and set macid 127 only for 22C*/
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#define DYNAMIC_TXPWR_VERSION "1.8"
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
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#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
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#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
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#endif
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 255
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 74
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 60
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#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 90
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 85
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 80
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 90
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 85
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#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 80
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#endif
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#define tx_high_pwr_level_normal 0
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#define tx_high_pwr_level_level1 1
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#define tx_high_pwr_level_level2 2
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#define tx_high_pwr_level_level3 3
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#define tx_high_pwr_level_unchange 4
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/* @============================================================
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* enumrate
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* ============================================================
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*/
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enum phydm_dtp_power_offset {
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PHYDM_OFFSET_ZERO = 0,
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PHYDM_OFFSET_MINUS_3DB = 1,
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PHYDM_OFFSET_MINUS_7DB = 2,
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PHYDM_OFFSET_MINUS_11DB = 3,
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PHYDM_OFFSET_ADD_3DB = 4,
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PHYDM_OFFSET_ADD_6DB = 5
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};
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enum phydm_dtp_power_offset_2nd {
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PHYDM_2ND_OFFSET_ZERO = 0,
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PHYDM_2ND_OFFSET_MINUS_3DB = 1,
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PHYDM_2ND_OFFSET_MINUS_7DB = 2,
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PHYDM_2ND_OFFSET_MINUS_11DB = 3
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};
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enum phydm_dtp_power_offset_bbram {
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/*@ HW min use 1dB*/
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PHYDM_BBRAM_OFFSET_ZERO = 0,
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PHYDM_BBRAM_OFFSET_MINUS_3DB = -3,
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PHYDM_BBRAM_OFFSET_MINUS_7DB = -7,
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PHYDM_BBRAM_OFFSET_MINUS_11DB = -11
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};
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enum phydm_dtp_power_pkt_type {
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RAM_PWR_OFST0 = 0,
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RAM_PWR_OFST1 = 1,
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REG_PWR_OFST0 = 2,
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REG_PWR_OFST1 = 3
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};
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/* @============================================================
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* structure
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* ============================================================
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*/
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/* @============================================================
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* Function Prototype
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* ============================================================
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*/
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extern void
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odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 mac_id);
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void phydm_dynamic_tx_power(void *dm_void);
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void phydm_dynamic_tx_power_init(void *dm_void);
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void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output,
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u32 *_out_len);
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void odm_dynamic_tx_power_win(void *dm_void);
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#endif
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#endif
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#endif
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