mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
synced 2024-11-10 01:02:50 +00:00
191 lines
5.1 KiB
C
191 lines
5.1 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDM_DFS_H__
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#define __PHYDM_DFS_H__
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#define DFS_VERSION "1.1"
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/*@
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* ============================================================
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* Definition
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* ============================================================
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*/
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/*@
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* ============================================================
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* 1 structure
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* ============================================================
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*/
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struct _DFS_STATISTICS {
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u8 mask_idx;
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u8 igi_cur;
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u8 igi_pre;
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u8 st_l2h_cur;
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u16 fa_count_pre;
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u16 fa_inc_hist[5];
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u16 vht_crc_ok_cnt_pre;
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u16 ht_crc_ok_cnt_pre;
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u16 leg_crc_ok_cnt_pre;
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u16 short_pulse_cnt_pre;
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u16 long_pulse_cnt_pre;
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u8 pwdb_th;
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u8 pwdb_th_cur;
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u8 pwdb_scalar_factor;
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u8 peak_th;
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u8 short_pulse_cnt_th;
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u8 long_pulse_cnt_th;
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u8 peak_window;
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u8 three_peak_opt;
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u8 three_peak_th2;
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u8 fa_mask_th;
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u8 det_flag_offset;
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u8 st_l2h_max;
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u8 st_l2h_min;
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u8 mask_hist_checked;
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boolean pulse_flag_hist[5];
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boolean pulse_type_hist[5];
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boolean radar_det_mask_hist[5];
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boolean idle_mode;
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boolean force_TP_mode;
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boolean dbg_mode;
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boolean sw_trigger_mode;
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boolean det_print;
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boolean det_print2;
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boolean radar_type;
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/*@dfs histogram*/
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boolean print_hist_rpt;
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boolean hist_cond_on;
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boolean pri_cond1;
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boolean pri_cond2;
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boolean pri_cond3;
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boolean pri_cond4;
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boolean pri_cond5;
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boolean pw_cond1;
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boolean pw_cond2;
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boolean pw_cond3;
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boolean pri_type3_4_cond1; /*@for ETSI*/
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boolean pri_type3_4_cond2; /*@for ETSI*/
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boolean pw_long_cond1; /*@for long radar*/
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boolean pw_long_cond2; /*@for long radar*/
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boolean pri_long_cond1; /*@for long radar*/
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boolean pw_flag;
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boolean pri_flag;
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boolean pri_type3_4_flag; /*@for ETSI*/
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boolean long_radar_flag;
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u16 pri_hold_sum[6];
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u16 pw_hold_sum[6];
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u16 pri_long_hold_sum[6];
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u16 pw_long_hold_sum[6];
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u8 hist_idx;
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u8 hist_long_idx;
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u8 pw_hold[4][6];
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u8 pri_hold[4][6];
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u8 pw_long_hold[300][6];
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u8 pri_long_hold[300][6];
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u16 pw_std; /*@The std(var) of reasonable num of pw group*/
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u16 pri_std;/*@The std(var) of reasonable num of pri group*/
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/*@dfs histogram threshold*/
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u8 pri_hist_th;
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u8 pri_sum_g1_th;
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u8 pri_sum_g5_th;
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u8 pri_sum_g1_fcc_th;
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u8 pri_sum_g3_fcc_th;
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u8 pri_sum_safe_fcc_th;
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u8 pri_sum_type4_th;
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u8 pri_sum_type6_th;
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u8 pri_sum_safe_th;
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u8 pri_sum_g5_under_g1_th;
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u8 pri_pw_diff_th;
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u8 pri_pw_diff_fcc_th;
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u8 pri_pw_diff_fcc_idle_th;
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u8 pri_pw_diff_w53_th;
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u8 pri_type1_low_fcc_th;
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u8 pri_type1_upp_fcc_th;
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u8 pri_type1_cen_fcc_th;
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u8 pw_g0_th;
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u8 pw_long_lower_20m_th;
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u8 pw_long_lower_th;
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u8 pri_long_upper_th;
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u8 pw_long_sum_upper_th;
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u8 pw_std_th;
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u8 pw_std_idle_th;
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u8 pri_std_th;
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u8 pri_std_idle_th;
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u8 type4_pw_max_cnt;
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u8 type4_safe_pri_sum_th;
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};
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/*@
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* ============================================================
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* enumeration
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* ============================================================
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*/
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enum phydm_dfs_region_domain {
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PHYDM_DFS_DOMAIN_UNKNOWN = 0,
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PHYDM_DFS_DOMAIN_FCC = 1,
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PHYDM_DFS_DOMAIN_MKK = 2,
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PHYDM_DFS_DOMAIN_ETSI = 3,
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};
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/*@
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* ============================================================
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* function prototype
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* ============================================================
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*/
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#if defined(CONFIG_PHYDM_DFS_MASTER)
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void phydm_radar_detect_reset(void *dm_void);
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void phydm_radar_detect_disable(void *dm_void);
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void phydm_radar_detect_enable(void *dm_void);
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boolean phydm_radar_detect(void *dm_void);
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void phydm_dfs_histogram_radar_distinguish(void *dm_void);
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boolean phydm_dfs_hist_log(void *dm_void, u8 index);
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void phydm_dfs_parameter_init(void *dm_void);
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void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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u8 phydm_dfs_polling_time(void *dm_void);
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#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */
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boolean
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phydm_dfs_is_meteorology_channel(void *dm_void);
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boolean
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phydm_is_dfs_band(void *dm_void);
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boolean
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phydm_dfs_master_enabled(void *dm_void);
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
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void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void);
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#endif
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#endif
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#endif /*@#ifndef __PHYDM_DFS_H__ */
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