mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
synced 2024-11-14 03:02:50 +00:00
297 lines
8.0 KiB
C
297 lines
8.0 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALRF_KFREE_H__
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#define __HALRF_KFREE_H__
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#define KFREE_VERSION "1.0"
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#define KFREE_BAND_NUM 9
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#define KFREE_CH_NUM 3
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
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#define BB_GAIN_NUM 6
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#endif
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#define KFREE_FLAG_ON BIT(0)
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#define KFREE_FLAG_THERMAL_K_ON BIT(1)
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#define KFREE_FLAG_ON_2G BIT(2)
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#define KFREE_FLAG_ON_5G BIT(3)
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#define PA_BIAS_FLAG_ON BIT(4)
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#define TSSI_TRIM_FLAG_ON BIT(5)
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#define LNA_FLAG_ON BIT(6)
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#define PPG_THERMAL_OFFSET_98F 0x50
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#define PPG_2GM_TXAB_98F 0x51
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#define PPG_2GM_TXCD_98F 0x52
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#define PPG_2GL_TXAB_98F 0x53
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#define PPG_2GL_TXCD_98F 0x54
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#define PPG_2GH_TXAB_98F 0x55
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#define PPG_2GH_TXCD_98F 0x56
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#define PPG_PABIAS_2GAB_98F 0x57
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#define PPG_PABIAS_2GCD_98F 0x58
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#define PPG_LNA_2GA_98F 0x59
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#define PPG_LNA_2GB_98F 0x5a
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#define PPG_LNA_2GC_98F 0x5b
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#define PPG_LNA_2GD_98F 0x5c
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#define PPG_THERMAL_OFFSET_21C 0x1EF
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#define PPG_2G_TXAB_21C 0x1EE
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#define PPG_5GL1_TXA_21C 0x1EC
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#define PPG_5GL2_TXA_21C 0x1E8
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#define PPG_5GM1_TXA_21C 0x1E4
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#define PPG_5GM2_TXA_21C 0x1E0
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#define PPG_5GH1_TXA_21C 0x1DC
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#define PPG_THERMAL_OFFSET_22B 0x3EF
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#define PPG_2G_TXAB_22B 0x3EE
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#define PPG_2G_TXCD_22B 0x3ED
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#define PPG_5GL1_TXA_22B 0x3EC
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#define PPG_5GL1_TXB_22B 0x3EB
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#define PPG_5GL1_TXC_22B 0x3EA
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#define PPG_5GL1_TXD_22B 0x3E9
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#define PPG_5GL2_TXA_22B 0x3E8
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#define PPG_5GL2_TXB_22B 0x3E7
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#define PPG_5GL2_TXC_22B 0x3E6
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#define PPG_5GL2_TXD_22B 0x3E5
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#define PPG_5GM1_TXA_22B 0x3E4
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#define PPG_5GM1_TXB_22B 0x3E3
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#define PPG_5GM1_TXC_22B 0x3E2
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#define PPG_5GM1_TXD_22B 0x3E1
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#define PPG_5GM2_TXA_22B 0x3E0
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#define PPG_5GM2_TXB_22B 0x3DF
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#define PPG_5GM2_TXC_22B 0x3DE
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#define PPG_5GM2_TXD_22B 0x3DD
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#define PPG_5GH1_TXA_22B 0x3DC
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#define PPG_5GH1_TXB_22B 0x3DB
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#define PPG_5GH1_TXC_22B 0x3DA
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#define PPG_5GH1_TXD_22B 0x3D9
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#define PPG_PABIAS_2GA_22B 0x3D5
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#define PPG_PABIAS_2GB_22B 0x3D6
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#define PPG_THERMAL_A_OFFSET_22C 0x1ef
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#define PPG_THERMAL_B_OFFSET_22C 0x1b0
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#define PPG_2GL_TXAB_22C 0x1d4
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#define PPG_2GM_TXAB_22C 0x1ee
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#define PPG_2GH_TXAB_22C 0x1d2
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#define PPG_5GL1_TXA_22C 0x1ec
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#define PPG_5GL1_TXB_22C 0x1eb
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#define PPG_5GL2_TXA_22C 0x1e8
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#define PPG_5GL2_TXB_22C 0x1e7
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#define PPG_5GM1_TXA_22C 0x1e4
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#define PPG_5GM1_TXB_22C 0x1e3
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#define PPG_5GM2_TXA_22C 0x1e0
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#define PPG_5GM2_TXB_22C 0x1df
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#define PPG_5GH1_TXA_22C 0x1dc
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#define PPG_5GH1_TXB_22C 0x1db
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#define PPG_PABIAS_2GA_22C 0x1d6
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#define PPG_PABIAS_2GB_22C 0x1d5
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#define PPG_PABIAS_5GA_22C 0x1d8
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#define PPG_PABIAS_5GB_22C 0x1d7
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#define TSSI_2GM_TXA_22C 0x1c0
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#define TSSI_2GM_TXB_22C 0x1bf
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#define TSSI_2GH_TXA_22C 0x1be
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#define TSSI_2GH_TXB_22C 0x1bd
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#define TSSI_5GL1_TXA_22C 0x1bc
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#define TSSI_5GL1_TXB_22C 0x1bb
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#define TSSI_5GL2_TXA_22C 0x1ba
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#define TSSI_5GL2_TXB_22C 0x1b9
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#define TSSI_5GM1_TXA_22C 0x1b8
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#define TSSI_5GM1_TXB_22C 0x1b7
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#define TSSI_5GM2_TXA_22C 0x1b6
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#define TSSI_5GM2_TXB_22C 0x1b5
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#define TSSI_5GH1_TXA_22C 0x1b4
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#define TSSI_5GH1_TXB_22C 0x1b3
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#define TSSI_5GH2_TXA_22C 0x1b2
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#define TSSI_5GH2_TXB_22C 0x1b1
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/*8195B*/
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#define PPG_THERMAL_OFFSET_95B 0x1ef
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#define PPG_2GL_TXA_95B 0x1d4
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#define PPG_2GM_TXA_95B 0x1ee
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#define PPG_2GH_TXA_95B 0x1d2
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#define PPG_5GL1_TXA_95B 0x1ec
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#define PPG_5GL2_TXA_95B 0x1e8
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#define PPG_5GM1_TXA_95B 0x1e4
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#define PPG_5GM2_TXA_95B 0x1e0
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#define PPG_5GH1_TXA_95B 0x1dc
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#define PPG_PABIAS_2GA_95B 0x1d6
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#define PPG_PABIAS_5GA_95B 0x1d8
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/*8721D*/
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/*#define KFREE_BAND_NUM_8721D 6*/
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#define PPG_THERMAL_OFFSET_8721D 0x1EF
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#define PPG_2G_TXA_8721D 0x1EE
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#define PPG_5GL1_TXA_8721D 0x1ED
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#define PPG_5GL2_TXA_8721D 0x1EC
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#define PPG_5GM1_TXA_8721D 0x1EB
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#define PPG_5GM2_TXA_8721D 0x1EA
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#define PPG_5GH1_TXA_8721D 0x1E9
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/*8197G*/
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#define PPG_THERMAL_A_OFFSET_97G 0x50
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#define PPG_THERMAL_B_OFFSET_97G 0x27
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#define PPG_2GM_TXAB_97G 0x51
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#define PPG_2GL_TXAB_97G 0x53
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#define PPG_2GH_TXAB_97G 0x55
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#define TSSI_2GL_TXA_97G 0x1c
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#define TSSI_2GL_TXB_97G 0x1d
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#define TSSI_2GH_TXA_97G 0x1e
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#define TSSI_2GH_TXB_97G 0x1f
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#define PPG_PABIAS_2GAB_97G 0x57
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#define PPG_LNA_2GA_97G 0x21
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#define PPG_LNA_2GB_97G 0x22
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/*8710C Ameba Z2*/
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#define PPG_THERMAL_OFFSET_10C 0x1EF
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#define PPG_2GL_TX_10C 0x1D4
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#define PPG_2GM_TX_10C 0x1EE
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#define PPG_2GH_TX_10C 0x1D2
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#define PPG_PABIAS_10C 0x1D6
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#define PPG_LNA_10C 0x1D0
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/*8814B*/
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#define PPG_2GL_TXAB_14B 0x3ee
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#define PPG_2GL_TXCD_14B 0x3ed
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#define PPG_5GL1_TXA_14B 0x3ec
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#define PPG_5GL1_TXB_14B 0x3eb
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#define PPG_5GL1_TXC_14B 0x3ea
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#define PPG_5GL1_TXD_14B 0x3e9
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#define PPG_5GL2_TXA_14B 0x3e8
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#define PPG_5GL2_TXB_14B 0x3e7
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#define PPG_5GL2_TXC_14B 0x3e6
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#define PPG_5GL2_TXD_14B 0x3e5
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#define PPG_5GM1_TXA_14B 0x3e4
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#define PPG_5GM1_TXB_14B 0x3e3
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#define PPG_5GM1_TXC_14B 0x3e2
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#define PPG_5GM1_TXD_14B 0x3e1
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#define PPG_5GM2_TXA_14B 0x3e0
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#define PPG_5GM2_TXB_14B 0x3df
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#define PPG_5GM2_TXC_14B 0x3de
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#define PPG_5GM2_TXD_14B 0x3dd
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#define PPG_5GH1_TXA_14B 0x3dc
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#define PPG_5GH1_TXB_14B 0x3db
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#define PPG_5GH1_TXC_14B 0x3da
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#define PPG_5GH1_TXD_14B 0x3d9
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#define PPG_PABIAS_5GAC_14B 0x3d8
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#define PPG_PABIAS_5GBD_14B 0x3d7
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#define PPG_PABIAS_2GAC_14B 0x3d6
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#define PPG_PABIAS_2GBD_14B 0x3d5
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#define PPG_THERMAL_A_OFFSET_14B 0x3D4
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#define PPG_THERMAL_B_OFFSET_14B 0x3D3
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#define PPG_THERMAL_C_OFFSET_14B 0x3D2
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#define PPG_THERMAL_D_OFFSET_14B 0x3D1
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#define TSSI_2GM_TXA_14B 0x3c0
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#define TSSI_2GM_TXB_14B 0x3bf
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#define TSSI_2GM_TXC_14B 0x3be
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#define TSSI_2GM_TXD_14B 0x3bd
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#define TSSI_2GH_TXA_14B 0x3bc
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#define TSSI_2GH_TXB_14B 0x3bb
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#define TSSI_2GH_TXC_14B 0x3ba
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#define TSSI_2GH_TXD_14B 0x3b9
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#define TSSI_5GL1_TXA_14B 0x3b8
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#define TSSI_5GL1_TXB_14B 0x3b7
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#define TSSI_5GL1_TXC_14B 0x3b6
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#define TSSI_5GL1_TXD_14B 0x3b5
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#define TSSI_5GL2_TXA_14B 0x3b4
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#define TSSI_5GL2_TXB_14B 0x3b3
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#define TSSI_5GL2_TXC_14B 0x3b2
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#define TSSI_5GL2_TXD_14B 0x3b1
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#define TSSI_5GM1_TXA_14B 0x3b0
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#define TSSI_5GM1_TXB_14B 0x3af
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#define TSSI_5GM1_TXC_14B 0x3ae
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#define TSSI_5GM1_TXD_14B 0x3ad
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#define TSSI_5GM2_TXA_14B 0x3ac
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#define TSSI_5GM2_TXB_14B 0x3ab
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#define TSSI_5GM2_TXC_14B 0x3aa
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#define TSSI_5GM2_TXD_14B 0x3a9
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#define TSSI_5GH1_TXA_14B 0x3a8
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#define TSSI_5GH1_TXB_14B 0x3a7
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#define TSSI_5GH1_TXC_14B 0x3a6
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#define TSSI_5GH1_TXD_14B 0x3a5
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#define TSSI_5GH2_TXA_14B 0x3a4
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#define TSSI_5GH2_TXB_14B 0x3a3
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#define TSSI_5GH2_TXC_14B 0x3a2
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#define TSSI_5GH2_TXD_14B 0x3a1
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struct odm_power_trim_data {
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u8 flag;
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u8 pa_bias_flag;
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u8 lna_flag;
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s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
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s8 tssi_trim[KFREE_BAND_NUM][MAX_RF_PATH];
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s8 pa_bias_trim[KFREE_BAND_NUM][MAX_RF_PATH];
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s8 lna_trim[MAX_RF_PATH];
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s8 thermal;
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s8 multi_thermal[MAX_RF_PATH];
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};
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enum phydm_kfree_channeltosw {
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PHYDM_2G = 0,
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PHYDM_5GLB1 = 1,
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PHYDM_5GLB2 = 2,
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PHYDM_5GMB1 = 3,
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PHYDM_5GMB2 = 4,
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PHYDM_5GHB = 5,
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};
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void phydm_get_thermal_trim_offset(void *dm_void);
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void phydm_get_power_trim_offset(void *dm_void);
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void phydm_get_pa_bias_offset(void *dm_void);
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s8 phydm_get_thermal_offset(void *dm_void);
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s8 phydm_get_multi_thermal_offset(void *dm_void, u8 path);
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void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
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void phydm_config_new_kfree(void *dm_void);
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s8 phydm_get_tssi_trim_de(void *dm_void, u8 path);
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void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
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void phydm_set_lna_trim_offset (void *dm_void, u8 path, u8 cg_cs, u8 enable);
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#endif /*__HALRF_KFREE_H__*/
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