mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
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135 lines
3.0 KiB
C
135 lines
3.0 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMDYNAMICTXPOWER_H__
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#define __PHYDMDYNAMICTXPOWER_H__
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/*#define DYNAMIC_TXPWR_VERSION "1.0"*/
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/*#define DYNAMIC_TXPWR_VERSION "1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/
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#define DYNAMIC_TXPWR_VERSION "1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
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#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
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#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
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#endif
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#define tx_high_pwr_level_normal 0
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#define tx_high_pwr_level_level1 1
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#define tx_high_pwr_level_level2 2
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#define tx_high_pwr_level_bt1 3
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#define tx_high_pwr_level_bt2 4
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#define tx_high_pwr_level_15 5
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#define tx_high_pwr_level_35 6
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#define tx_high_pwr_level_50 7
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#define tx_high_pwr_level_70 8
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#define tx_high_pwr_level_100 9
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enum phydm_dtp_power_offset {
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PHYDM_OFFSET_ZERO = 0,
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PHYDM_OFFSET_MINUS_3DB = 1,
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PHYDM_OFFSET_MINUS_7DB = 2,
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PHYDM_OFFSET_MINUS_11DB = 3,
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PHYDM_OFFSET_ADD_3DB = 4,
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PHYDM_OFFSET_ADD_6DB = 5
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};
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void
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phydm_pow_train_init(
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void *dm_void
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);
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void
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phydm_dynamic_tx_power(
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void *dm_void
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);
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void
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odm_dynamic_tx_power_restore_power_index(
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void *dm_void
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);
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void
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odm_dynamic_tx_power_nic(
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void *dm_void
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);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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void
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odm_dynamic_tx_power_save_power_index(
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void *dm_void
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);
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void
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odm_dynamic_tx_power_write_power_index(
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void *dm_void,
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u8 value);
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void
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odm_dynamic_tx_power_8821(
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void *dm_void,
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u8 *desc,
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u8 mac_id
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);
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void
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odm_dynamic_tx_power_8814a(
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void *dm_void
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);
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void
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odm_set_tx_power_level8814(
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void *adapter,
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u8 channel,
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u8 pwr_lvl
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);
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#endif
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#endif
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void
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odm_dynamic_tx_power(
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void *dm_void
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);
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void
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phydm_dynamic_tx_power(
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void *dm_void
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);
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void
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phydm_dynamic_tx_power_init(
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void *dm_void
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);
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#endif
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