mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
synced 2024-12-26 10:01:33 +00:00
731 lines
24 KiB
C
731 lines
24 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#ifdef PHYDM_PRIMARY_CCA
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void
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phydm_write_dynamic_cca(
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void *dm_void,
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u8 curr_mf_state
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca;
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if (primary_cca->mf_state == curr_mf_state)
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return;
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if (dm->support_ic_type & ODM_IC_11N_SERIES) {
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if (curr_mf_state == MF_USC_LSC) {
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), MF_USC_LSC);
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odm_set_bb_reg(dm, 0xc84, 0xf0000000, primary_cca->cca_th_40m_bkp); /*40M OFDM MF CCA threshold*/
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} else {
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), curr_mf_state);
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odm_set_bb_reg(dm, 0xc84, 0xf0000000, 0); /*40M OFDM MF CCA threshold*/
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}
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}
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primary_cca->mf_state = curr_mf_state;
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PHYDM_DBG(dm, DBG_PRI_CCA,
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"Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n", ((curr_mf_state == MF_USC_LSC)?"D":((curr_mf_state == MF_LSC)?"L":"U")), curr_mf_state);
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}
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void
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phydm_primary_cca_reset(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca;
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PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Reset\n");
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primary_cca->mf_state = 0xff;
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primary_cca->pre_bw = (enum channel_width)0xff;
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phydm_write_dynamic_cca(dm, MF_USC_LSC);
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}
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void
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phydm_primary_cca_11n(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca;
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enum channel_width curr_bw = (enum channel_width)*dm->band_width;
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if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
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return;
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if (!dm->is_linked) { /* is_linked==False */
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PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][No Link!!!]\n");
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if (primary_cca->pri_cca_is_become_linked == true) {
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phydm_primary_cca_reset(dm);
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primary_cca->pri_cca_is_become_linked = dm->is_linked;
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}
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return;
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} else {
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if (primary_cca->pri_cca_is_become_linked == false) {
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PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][Linked !!!]\n");
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primary_cca->pri_cca_is_become_linked = dm->is_linked;
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}
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}
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if (curr_bw != primary_cca->pre_bw) {
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PHYDM_DBG(dm, DBG_PRI_CCA, "[Primary CCA] start ==>\n");
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primary_cca->pre_bw = curr_bw;
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if (curr_bw == CHANNEL_WIDTH_40) {
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if (*dm->sec_ch_offset == SECOND_CH_AT_LSB) {/* Primary CH @ upper sideband*/
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PHYDM_DBG(dm, DBG_PRI_CCA, "BW40M, Primary CH at USB\n");
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phydm_write_dynamic_cca(dm, MF_USC);
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} else { /*Primary CH @ lower sideband*/
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PHYDM_DBG(dm, DBG_PRI_CCA, "BW40M, Primary CH at LSB\n");
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phydm_write_dynamic_cca(dm, MF_LSC);
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}
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} else {
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PHYDM_DBG(dm, DBG_PRI_CCA, "Not BW40M, USB + LSB\n");
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phydm_primary_cca_reset(dm);
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}
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}
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}
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#if 0
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#if (RTL8188E_SUPPORT == 1)
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void
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odm_dynamic_primary_cca_8188e(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct sta_info *entry;
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struct cmn_sta_info *sta;
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struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT);
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struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca);
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boolean client_40mhz = false, client_tmp = false; /* connected client BW */
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boolean is_connected = false; /* connected or not */
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u8 client_40mhz_pre = 0;
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u32 counter = 0;
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u8 delay = 1;
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u64 cur_tx_ok_cnt;
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u64 cur_rx_ok_cnt;
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u8 sec_ch_offset = *(dm->sec_ch_offset);
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u8 i;
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if (!dm->is_linked)
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return;
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if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
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return;
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if (*(dm->band_width) == CHANNEL_WIDTH_20) { /*curr bw*/
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0);
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return;
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}
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE)
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sec_ch_offset = sec_ch_offset % 2 + 1; /* NIC's definition is reverse to AP 1:secondary below, 2: secondary above */
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#endif
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PHYDM_DBG(dm, DBG_PRI_CCA, "Second CH Offset = %d\n", sec_ch_offset);
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/* 3 Check Current WLAN Traffic */
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cur_tx_ok_cnt = dm->tx_tp;
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cur_rx_ok_cnt = dm->rx_tp;
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/* ==================Debug Message==================== */
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PHYDM_DBG(dm, DBG_PRI_CCA, "TP = %llu\n", cur_tx_ok_cnt + cur_rx_ok_cnt);
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PHYDM_DBG(dm, DBG_PRI_CCA, "is_BW40 = %d\n", *(dm->band_width));
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PHYDM_DBG(dm, DBG_PRI_CCA, "BW_LSC = %d\n", false_alm_cnt->cnt_bw_lsc);
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PHYDM_DBG(dm, DBG_PRI_CCA, "BW_USC = %d\n", false_alm_cnt->cnt_bw_usc);
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PHYDM_DBG(dm, DBG_PRI_CCA, "CCA OFDM = %d\n", false_alm_cnt->cnt_ofdm_cca);
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PHYDM_DBG(dm, DBG_PRI_CCA, "CCA CCK = %d\n", false_alm_cnt->cnt_cck_cca);
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PHYDM_DBG(dm, DBG_PRI_CCA, "OFDM FA = %d\n", false_alm_cnt->cnt_ofdm_fail);
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PHYDM_DBG(dm, DBG_PRI_CCA, "CCK FA = %d\n", false_alm_cnt->cnt_cck_fail);
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/* ================================================ */
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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if (ACTING_AS_AP(dm->adapter)) /* primary cca process only do at AP mode */
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#endif
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{
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PHYDM_DBG(dm, DBG_PRI_CCA, "ACTING as AP mode=%d\n", ACTING_AS_AP(dm->adapter));
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/* 3 To get entry's connection and BW infomation status. */
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for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
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if (IsAPModeExist(dm->adapter) && GetFirstExtAdapter(dm->adapter) != NULL)
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entry = AsocEntry_EnumStation(GetFirstExtAdapter(dm->adapter), i);
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else
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entry = AsocEntry_EnumStation(GetDefaultAdapter(dm->adapter), i);
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if (entry != NULL) {
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client_tmp = entry->BandWidth; /* client BW */
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PHYDM_DBG(dm, DBG_PRI_CCA, "Client_BW=%d\n", client_tmp);
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if (client_tmp > client_40mhz)
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client_40mhz = client_tmp; /* 40M/20M coexist => 40M priority is High */
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if (entry->bAssociated) {
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is_connected = true; /* client is connected or not */
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break;
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}
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} else
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break;
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}
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#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
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/* 3 To get entry's connection and BW infomation status. */
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for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
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sta = dm->phydm_sta_info[i];
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if (is_sta_active(sta)) {
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client_tmp = sta->bw_mode;
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if (client_tmp > client_40mhz)
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client_40mhz = client_tmp; /* 40M/20M coexist => 40M priority is High */
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is_connected = true;
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}
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}
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#endif
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PHYDM_DBG(dm, DBG_PRI_CCA, "is_connected=%d\n", is_connected);
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PHYDM_DBG(dm, DBG_PRI_CCA, "Is Client 40MHz=%d\n", client_40mhz);
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/* 1 Monitor whether the interference exists or not */
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if (primary_cca->monitor_flag == 1) {
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if (sec_ch_offset == 1) { /* secondary channel is below the primary channel */
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if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_lsc > false_alm_cnt->cnt_bw_usc + 500)) {
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) {
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primary_cca->intf_type = 1;
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primary_cca->pri_cca_flag = 1;
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT7, 2); /* USC MF */
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if (primary_cca->dup_rts_flag == 1)
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primary_cca->dup_rts_flag = 0;
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} else {
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primary_cca->intf_type = 2;
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if (primary_cca->dup_rts_flag == 0)
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primary_cca->dup_rts_flag = 1;
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}
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} else { /* interferecne disappear */
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primary_cca->dup_rts_flag = 0;
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primary_cca->intf_flag = 0;
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primary_cca->intf_type = 0;
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}
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} else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */
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if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_usc > false_alm_cnt->cnt_bw_lsc + 500)) {
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) {
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primary_cca->intf_type = 1;
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primary_cca->pri_cca_flag = 1;
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT7, 1); /* LSC MF */
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if (primary_cca->dup_rts_flag == 1)
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primary_cca->dup_rts_flag = 0;
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} else {
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primary_cca->intf_type = 2;
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if (primary_cca->dup_rts_flag == 0)
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primary_cca->dup_rts_flag = 1;
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}
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} else { /* interferecne disappear */
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primary_cca->dup_rts_flag = 0;
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primary_cca->intf_flag = 0;
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primary_cca->intf_type = 0;
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}
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}
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primary_cca->monitor_flag = 0;
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}
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/* 1 Dynamic Primary CCA Main Function */
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if (primary_cca->monitor_flag == 0) {
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if (*(dm->band_width) == CHANNEL_WIDTH_40) { /* if RFBW==40M mode which require to process primary cca */
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/* 2 STA is NOT Connected */
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if (!is_connected) {
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PHYDM_DBG(dm, DBG_PRI_CCA, "STA NOT Connected!!!!\n");
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if (primary_cca->pri_cca_flag == 1) { /* reset primary cca when STA is disconnected */
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primary_cca->pri_cca_flag = 0;
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0);
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}
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if (primary_cca->dup_rts_flag == 1) /* reset Duplicate RTS when STA is disconnected */
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primary_cca->dup_rts_flag = 0;
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if (sec_ch_offset == 1) { /* secondary channel is below the primary channel */
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if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) {
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primary_cca->intf_flag = 1; /* secondary channel interference is detected!!! */
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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} else {
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primary_cca->intf_flag = 0;
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primary_cca->intf_type = 0;
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}
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} else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */
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if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) {
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primary_cca->intf_flag = 1; /* secondary channel interference is detected!!! */
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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} else {
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primary_cca->intf_flag = 0;
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primary_cca->intf_type = 0;
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}
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}
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PHYDM_DBG(dm, DBG_PRI_CCA, "primary_cca=%d\n", primary_cca->pri_cca_flag);
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PHYDM_DBG(dm, DBG_PRI_CCA, "Intf_Type=%d\n", primary_cca->intf_type);
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}
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/* 2 STA is Connected */
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else {
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if (client_40mhz == 0) /* 3 */ { /* client BW = 20MHz */
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if (primary_cca->pri_cca_flag == 0) {
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primary_cca->pri_cca_flag = 1;
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if (sec_ch_offset == 1)
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 2);
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else if (sec_ch_offset == 2)
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 1);
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}
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PHYDM_DBG(dm, DBG_PRI_CCA, "STA Connected 20M!!! primary_cca=%d\n", primary_cca->pri_cca_flag);
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} else /* 3 */ { /* client BW = 40MHz */
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if (primary_cca->intf_flag == 1) { /* interference is detected!! */
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if (primary_cca->intf_type == 1) {
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if (primary_cca->pri_cca_flag != 1) {
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primary_cca->pri_cca_flag = 1;
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if (sec_ch_offset == 1)
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 2);
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else if (sec_ch_offset == 2)
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 1);
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}
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} else if (primary_cca->intf_type == 2) {
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if (primary_cca->dup_rts_flag != 1)
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primary_cca->dup_rts_flag = 1;
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}
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} else { /* if intf_flag==0 */
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if ((cur_tx_ok_cnt + cur_rx_ok_cnt) < 1) { /* idle mode or TP traffic is very low */
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if (sec_ch_offset == 1) {
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if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) {
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primary_cca->intf_flag = 1;
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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}
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} else if (sec_ch_offset == 2) {
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if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) {
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primary_cca->intf_flag = 1;
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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}
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}
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} else { /* TP Traffic is High */
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if (sec_ch_offset == 1) {
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if (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + 500)) {
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if (delay == 0) { /* add delay to avoid interference occurring abruptly, jump one time */
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primary_cca->intf_flag = 1;
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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delay = 1;
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} else
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delay = 0;
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}
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} else if (sec_ch_offset == 2) {
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if (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + 500)) {
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if (delay == 0) { /* add delay to avoid interference occurring abruptly */
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primary_cca->intf_flag = 1;
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if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
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primary_cca->intf_type = 1; /* interference is shift */
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else
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primary_cca->intf_type = 2; /* interference is in-band */
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delay = 1;
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} else
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delay = 0;
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}
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}
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}
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}
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PHYDM_DBG(dm, DBG_PRI_CCA, "Primary CCA=%d\n", primary_cca->pri_cca_flag);
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PHYDM_DBG(dm, DBG_PRI_CCA, "Duplicate RTS=%d\n", primary_cca->dup_rts_flag);
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}
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} /* end of connected */
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}
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}
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/* 1 Dynamic Primary CCA Monitor counter */
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if ((primary_cca->pri_cca_flag == 1) || (primary_cca->dup_rts_flag == 1)) {
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if (client_40mhz == 0) { /* client=20M no need to monitor primary cca flag */
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client_40mhz_pre = client_40mhz;
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return;
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}
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counter++;
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PHYDM_DBG(dm, DBG_PRI_CCA, "counter=%d\n", counter);
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if ((counter == 30) || ((client_40mhz - client_40mhz_pre) == 1)) { /* Every 60 sec to monitor one time */
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primary_cca->monitor_flag = 1; /* monitor flag is triggered!!!!! */
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if (primary_cca->pri_cca_flag == 1) {
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primary_cca->pri_cca_flag = 0;
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odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0);
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}
|
|
counter = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
client_40mhz_pre = client_40mhz;
|
|
}
|
|
#endif
|
|
|
|
#if (RTL8192E_SUPPORT == 1)
|
|
|
|
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
|
|
void
|
|
odm_dynamic_primary_cca_mp_8192e(
|
|
void *dm_void
|
|
)
|
|
{
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
PADAPTER adapter = (PADAPTER)dm->adapter;
|
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
|
struct phydm_fa_struct *false_alm_cnt = &(dm->false_alm_cnt);
|
|
struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca);
|
|
u64 OFDM_CCA, OFDM_FA, bw_usc_cnt, bw_lsc_cnt;
|
|
u8 sec_ch_offset;
|
|
static u8 count_down = PRI_CCA_MONITOR_TIME;
|
|
|
|
if (!dm->is_linked)
|
|
return;
|
|
|
|
if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
|
|
return;
|
|
|
|
OFDM_CCA = false_alm_cnt->cnt_ofdm_cca;
|
|
OFDM_FA = false_alm_cnt->cnt_ofdm_fail;
|
|
bw_usc_cnt = false_alm_cnt->cnt_bw_usc;
|
|
bw_lsc_cnt = false_alm_cnt->cnt_bw_lsc;
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: OFDM CCA=%d\n", OFDM_CCA);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: OFDM FA=%d\n", OFDM_FA);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: BW_USC=%d\n", bw_usc_cnt);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: BW_LSC=%d\n", bw_lsc_cnt);
|
|
sec_ch_offset = *(dm->sec_ch_offset); /* NIC: 2: sec is below, 1: sec is above */
|
|
|
|
|
|
if (IsAPModeExist(adapter)) {
|
|
phydm_write_dynamic_cca(dm, MF_USC_LSC);
|
|
return;
|
|
}
|
|
|
|
if (*(dm->band_width) != CHANNEL_WIDTH_40)
|
|
return;
|
|
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Cont Down= %d\n", count_down);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Primary_CCA_flag=%d\n", primary_cca->pri_cca_flag);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Intf_Type=%d\n", primary_cca->intf_type);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Intf_flag=%d\n", primary_cca->intf_flag);
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Duplicate RTS Flag=%d\n", primary_cca->dup_rts_flag);
|
|
|
|
if (primary_cca->pri_cca_flag == 0) {
|
|
if (sec_ch_offset == SECOND_CH_AT_LSB) { /* Primary channel is above NOTE: duplicate CTS can remove this condition */
|
|
|
|
if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias))
|
|
&& (OFDM_FA > (OFDM_CCA >> 1))) {
|
|
primary_cca->intf_type = 1;
|
|
primary_cca->intf_flag = 1;
|
|
phydm_write_dynamic_cca(dm, MF_USC);
|
|
primary_cca->pri_cca_flag = 1;
|
|
} else if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias))
|
|
&& (OFDM_FA < (OFDM_CCA >> 1))) {
|
|
primary_cca->intf_type = 2;
|
|
primary_cca->intf_flag = 1;
|
|
phydm_write_dynamic_cca(dm, MF_USC);
|
|
primary_cca->pri_cca_flag = 1;
|
|
primary_cca->dup_rts_flag = 1;
|
|
hal_data->RTSEN = 1;
|
|
} else {
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->intf_flag = 0;
|
|
phydm_write_dynamic_cca(dm, MF_USC_LSC);
|
|
hal_data->RTSEN = 0;
|
|
primary_cca->dup_rts_flag = 0;
|
|
}
|
|
|
|
} else if (sec_ch_offset == SECOND_CH_AT_USB) {
|
|
if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias))
|
|
&& (OFDM_FA > (OFDM_CCA >> 1))) {
|
|
primary_cca->intf_type = 1;
|
|
primary_cca->intf_flag = 1;
|
|
phydm_write_dynamic_cca(dm, MF_LSC);
|
|
primary_cca->pri_cca_flag = 1;
|
|
} else if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias))
|
|
&& (OFDM_FA < (OFDM_CCA >> 1))) {
|
|
primary_cca->intf_type = 2;
|
|
primary_cca->intf_flag = 1;
|
|
phydm_write_dynamic_cca(dm, MF_LSC);
|
|
primary_cca->pri_cca_flag = 1;
|
|
primary_cca->dup_rts_flag = 1;
|
|
hal_data->RTSEN = 1;
|
|
} else {
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->intf_flag = 0;
|
|
phydm_write_dynamic_cca(dm, MF_USC_LSC);
|
|
hal_data->RTSEN = 0;
|
|
primary_cca->dup_rts_flag = 0;
|
|
}
|
|
|
|
}
|
|
|
|
} else { /* primary_cca->pri_cca_flag==1 */
|
|
|
|
count_down--;
|
|
if (count_down == 0) {
|
|
count_down = PRI_CCA_MONITOR_TIME;
|
|
primary_cca->pri_cca_flag = 0;
|
|
phydm_write_dynamic_cca(dm, MF_USC_LSC); /* default */
|
|
hal_data->RTSEN = 0;
|
|
primary_cca->dup_rts_flag = 0;
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->intf_flag = 0;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
|
|
|
void
|
|
odm_intf_detection(
|
|
void *dm_void
|
|
)
|
|
{
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
struct phydm_fa_struct *false_alm_cnt = &(dm->false_alm_cnt);
|
|
struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca);
|
|
|
|
if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH)
|
|
&& (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + bw_ind_bias))) {
|
|
primary_cca->intf_flag = 1;
|
|
primary_cca->ch_offset = 1; /* 1:LSC, 2:USC */
|
|
if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1))
|
|
primary_cca->intf_type = 1;
|
|
else
|
|
primary_cca->intf_type = 2;
|
|
} else if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH)
|
|
&& (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + bw_ind_bias))) {
|
|
primary_cca->intf_flag = 1;
|
|
primary_cca->ch_offset = 2; /* 1:LSC, 2:USC */
|
|
if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1))
|
|
primary_cca->intf_type = 1;
|
|
else
|
|
primary_cca->intf_type = 2;
|
|
} else {
|
|
primary_cca->intf_flag = 0;
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->ch_offset = 0;
|
|
}
|
|
|
|
}
|
|
|
|
void
|
|
odm_dynamic_primary_cca_ap_8192e(
|
|
void *dm_void
|
|
)
|
|
{
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca);
|
|
u8 i;
|
|
static u32 count_down = PRI_CCA_MONITOR_TIME;
|
|
u8 STA_BW = false, STA_BW_pre = false, STA_BW_TMP = false;
|
|
boolean is_connected = false;
|
|
u8 sec_ch_offset;
|
|
u8 cur_mf_state;
|
|
struct cmn_sta_info *entry;
|
|
|
|
if (!dm->is_linked)
|
|
return;
|
|
|
|
if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
|
|
return;
|
|
|
|
sec_ch_offset = *(dm->sec_ch_offset); /* AP: 1: sec is below, 2: sec is above */
|
|
|
|
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
|
|
entry = dm->phydm_sta_info[i];
|
|
if (is_sta_active(entry)) {
|
|
STA_BW_TMP = entry->bw_mode;
|
|
if (STA_BW_TMP > STA_BW)
|
|
STA_BW = STA_BW_TMP;
|
|
is_connected = true;
|
|
}
|
|
}
|
|
|
|
if (*(dm->band_width) == CHANNEL_WIDTH_40) {
|
|
|
|
if (primary_cca->pri_cca_flag == 0) {
|
|
if (is_connected) {
|
|
if (STA_BW == CHANNEL_WIDTH_20) { /* 2 STA BW=20M */
|
|
primary_cca->pri_cca_flag = 1;
|
|
if (sec_ch_offset == 1) {
|
|
cur_mf_state = MF_USC;
|
|
phydm_write_dynamic_cca(dm, cur_mf_state);
|
|
} else if (sec_ch_offset == 2) {
|
|
cur_mf_state = MF_USC;
|
|
phydm_write_dynamic_cca(dm, cur_mf_state);
|
|
}
|
|
} else { /* 2 STA BW=40M */
|
|
if (primary_cca->intf_flag == 0)
|
|
odm_intf_detection(dm);
|
|
else { /* intf_flag = 1 */
|
|
if (primary_cca->intf_type == 1) {
|
|
if (primary_cca->ch_offset == 1) {
|
|
cur_mf_state = MF_USC;
|
|
if (sec_ch_offset == 1) /* AP, 1: primary is above 2: primary is below */
|
|
phydm_write_dynamic_cca(dm, cur_mf_state);
|
|
} else if (primary_cca->ch_offset == 2) {
|
|
cur_mf_state = MF_LSC;
|
|
if (sec_ch_offset == 2)
|
|
phydm_write_dynamic_cca(dm, cur_mf_state);
|
|
}
|
|
} else if (primary_cca->intf_type == 2)
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "92E: primary_cca->intf_type = 2\n");
|
|
}
|
|
}
|
|
|
|
} else /* disconnected interference detection */
|
|
odm_intf_detection(dm); /* end of disconnected */
|
|
|
|
|
|
} else { /* primary_cca->pri_cca_flag == 1 */
|
|
|
|
if (STA_BW == 0) {
|
|
STA_BW_pre = STA_BW;
|
|
return;
|
|
}
|
|
|
|
count_down--;
|
|
if ((count_down == 0) || ((STA_BW & STA_BW_pre) != 1)) {
|
|
count_down = PRI_CCA_MONITOR_TIME;
|
|
primary_cca->pri_cca_flag = 0;
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->intf_flag = 0;
|
|
cur_mf_state = MF_USC_LSC;
|
|
phydm_write_dynamic_cca(dm, cur_mf_state); /* default */
|
|
}
|
|
}
|
|
STA_BW_pre = STA_BW;
|
|
|
|
} else {
|
|
/* 2 Reset */
|
|
phydm_primary_cca_init(dm);
|
|
cur_mf_state = MF_USC_LSC;
|
|
phydm_write_dynamic_cca(dm, cur_mf_state);
|
|
count_down = PRI_CCA_MONITOR_TIME;
|
|
}
|
|
|
|
}
|
|
#endif
|
|
|
|
|
|
#endif /* RTL8192E_SUPPORT == 1 */
|
|
#endif
|
|
|
|
|
|
#endif
|
|
|
|
boolean
|
|
odm_dynamic_primary_cca_dup_rts(
|
|
void *dm_void
|
|
)
|
|
{
|
|
#ifdef PHYDM_PRIMARY_CCA
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca;
|
|
|
|
return primary_cca->dup_rts_flag;
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
void
|
|
phydm_primary_cca_init(
|
|
void *dm_void
|
|
)
|
|
{
|
|
#ifdef PHYDM_PRIMARY_CCA
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca;
|
|
|
|
if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
|
|
return;
|
|
|
|
PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Init ==>\n");
|
|
#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1)
|
|
primary_cca->dup_rts_flag = 0;
|
|
primary_cca->intf_flag = 0;
|
|
primary_cca->intf_type = 0;
|
|
primary_cca->monitor_flag = 0;
|
|
primary_cca->pri_cca_flag = 0;
|
|
primary_cca->ch_offset = 0;
|
|
#endif
|
|
primary_cca->mf_state = 0xff;
|
|
primary_cca->pre_bw = (enum channel_width)0xff;
|
|
|
|
if (dm->support_ic_type & ODM_IC_11N_SERIES)
|
|
primary_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(dm, 0xc84, 0xf0000000);
|
|
#endif
|
|
}
|
|
|
|
void
|
|
phydm_primary_cca(
|
|
void *dm_void
|
|
)
|
|
{
|
|
#ifdef PHYDM_PRIMARY_CCA
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
|
|
|
if (!(dm->support_ic_type & ODM_IC_11N_SERIES))
|
|
return;
|
|
|
|
if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
|
|
return;
|
|
|
|
phydm_primary_cca_11n(dm);
|
|
|
|
#endif
|
|
}
|
|
|
|
|