mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
synced 2024-11-10 01:02:50 +00:00
351 lines
10 KiB
C
351 lines
10 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __HAL_COM_PHYCFG_H__
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#define __HAL_COM_PHYCFG_H__
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#ifndef DBG_TX_POWER_IDX
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#define DBG_TX_POWER_IDX 0
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#endif
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#define PathA 0x0 /* Useless */
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#define PathB 0x1
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#define PathC 0x2
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#define PathD 0x3
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typedef enum _RF_TX_NUM {
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RF_1TX = 0,
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RF_2TX,
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RF_3TX,
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RF_4TX,
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RF_MAX_TX_NUM,
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RF_TX_NUM_NONIMPLEMENT,
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} RF_TX_NUM;
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enum txpwr_pg_mode {
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TXPWR_PG_WITH_PWR_IDX,
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TXPWR_PG_WITH_TSSI_OFFSET,
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TXPWR_PG_UNKNOWN, /* keep last */
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};
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/*------------------------------Define structure----------------------------*/
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typedef struct _BB_REGISTER_DEFINITION {
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u32 rfintfs; /* set software control: */
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/* 0x870~0x877[8 bytes] */
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u32 rfintfo; /* output data: */
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/* 0x860~0x86f [16 bytes] */
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u32 rfintfe; /* output enable: */
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/* 0x860~0x86f [16 bytes] */
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u32 rf3wireOffset; /* LSSI data: */
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/* 0x840~0x84f [16 bytes] */
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u32 rfHSSIPara2; /* wire parameter control2 : */
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/* 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] */
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u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */
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/* 0x8a0~0x8af [16 bytes] */
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u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for Path A and B */
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} BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
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/* ---------------------------------------------------------------------- */
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extern const char *const _txpwr_pg_mode_str[];
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#define txpwr_pg_mode_str(_mode) (((_mode) >= TXPWR_PG_UNKNOWN) ? _txpwr_pg_mode_str[TXPWR_PG_UNKNOWN] : _txpwr_pg_mode_str[(_mode)])
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u8 phy_get_target_txpwr(
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PADAPTER Adapter,
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u8 Band,
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u8 RfPath,
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RATE_SECTION RateSection
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);
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void
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PHY_GetRateValuesOfTxPowerByRate(
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PADAPTER pAdapter,
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u32 RegAddr,
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u32 BitMask,
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u32 Value,
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u8 *Rate,
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s8 *PwrByRateVal,
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u8 *RateNum
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);
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u8
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PHY_GetRateIndexOfTxPowerByRate(
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u8 Rate
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);
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void
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phy_set_tx_power_index_by_rate_section(
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PADAPTER pAdapter,
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enum rf_path RFPath,
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u8 Channel,
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u8 RateSection
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);
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s8
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_PHY_GetTxPowerByRate(
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PADAPTER pAdapter,
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u8 Band,
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enum rf_path RFPath,
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u8 RateIndex
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);
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s8
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PHY_GetTxPowerByRate(
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PADAPTER pAdapter,
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u8 Band,
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enum rf_path RFPath,
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RATE_SECTION rs,
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enum MGN_RATE rate
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);
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void
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PHY_SetTxPowerByRate(
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PADAPTER pAdapter,
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u8 Band,
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enum rf_path RFPath,
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u8 Rate,
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s8 Value
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);
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void
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phy_set_tx_power_level_by_path(
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PADAPTER Adapter,
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u8 channel,
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u8 path
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);
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void
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PHY_InitTxPowerByRate(
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PADAPTER pAdapter
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);
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void
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phy_store_tx_power_by_rate(
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PADAPTER pAdapter,
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u32 Band,
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u32 RfPath,
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u32 TxNum,
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u32 RegAddr,
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u32 BitMask,
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u32 Data
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);
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void
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PHY_TxPowerByRateConfiguration(
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PADAPTER pAdapter
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);
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bool phy_chk_ch_setting_consistency(_adapter *adapter, u8 ch);
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#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
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u8 phy_get_pg_txpwr_idx(_adapter *pAdapter
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, enum rf_path RFPath, RATE_SECTION rs, u8 ntx_idx
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, enum channel_width BandWidth, u8 band, u8 Channel);
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#endif
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#if CONFIG_TXPWR_LIMIT
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s8 phy_get_txpwr_lmt(_adapter *adapter
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, const char *regd_name
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, BAND_TYPE band, enum channel_width bw
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, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock
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);
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s8 phy_get_txpwr_lmt_diff(_adapter *adapter
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, const char *regd_name
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, BAND_TYPE band, enum channel_width bw
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, u8 rfpath, u8 rs, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock
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);
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s8 phy_get_txpwr_lmt_sub_chs(_adapter *adapter
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, const char *regd_name
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, BAND_TYPE band, enum channel_width bw
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, u8 rfpath, u8 rate, u8 ntx_idx, u8 cch, u8 opch
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);
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#else
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#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
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#define phy_get_txpwr_lmt_diff(adapter, regd_name, band, bw, rfpath, rs, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
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#define phy_get_txpwr_lmt_sub_chs(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch, opch) (GET_HAL_SPEC(adapter)->txgi_max)
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#endif /* CONFIG_TXPWR_LIMIT */
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s8 phy_get_txpwr_target(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx
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, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch, struct txpwr_idx_comp *tic);
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s8 phy_get_txpwr_amends(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx
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, enum channel_width bw, BAND_TYPE band, u8 cch, struct txpwr_idx_comp *tic);
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#ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET
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s8 phy_get_tssi_txpwr_by_rate_ref(_adapter *adapter, enum rf_path path
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, enum channel_width bw, u8 cch, u8 opch);
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#endif
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u8 hal_com_get_txpwr_idx(_adapter *adapter, enum rf_path rfpath
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, RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch
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, struct txpwr_idx_comp *tic);
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s16 phy_get_txpwr_single_mbm(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate
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, enum channel_width bw, u8 cch, u8 opch, struct txpwr_idx_comp *tic);
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s16 phy_get_txpwr_total_mbm(_adapter *adapter, RATE_SECTION rs, u8 rate
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, enum channel_width bw, u8 cch, u8 opch, struct txpwr_idx_comp *tic);
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s16 phy_get_txpwr_single_max_mbm(_adapter *adapter, u8 rfpath
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, enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht);
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s16 phy_get_txpwr_total_max_mbm(_adapter *adapter
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, enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht);
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s8
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phy_get_tx_power_final_absolute_value(_adapter *adapter, u8 rfpath, u8 rate,
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enum channel_width bw, u8 channel);
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s8
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PHY_GetTxPowerTrackingOffset(
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PADAPTER pAdapter,
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enum rf_path RFPath,
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u8 Rate
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);
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struct txpwr_idx_comp {
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u8 ntx_idx;
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s8 target;
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s8 base;
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/* for target */
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s8 by_rate;
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s8 btc;
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s8 extra;
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s8 utarget;
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s8 limit;
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s8 ulimit;
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/* for amends */
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s8 tpt;
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s8 dpd;
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};
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u8 phy_get_tx_power_index_ex(_adapter *adapter
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, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate
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, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch);
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u8
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phy_get_tx_power_index(
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PADAPTER pAdapter,
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enum rf_path RFPath,
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u8 Rate,
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enum channel_width BandWidth,
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u8 Channel
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);
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void
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PHY_SetTxPowerIndex(
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PADAPTER pAdapter,
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u32 PowerIndex,
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enum rf_path RFPath,
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u8 Rate
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);
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bool phy_is_txpwr_user_mbm_valid(_adapter *adapter, s16 mbm);
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bool phy_is_txpwr_user_target_specified(_adapter *adapter);
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void dump_tx_power_index_inline(void *sel, _adapter *adapter, u8 rfpath
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, enum channel_width bw, u8 cch, enum MGN_RATE rate, u8 pwr_idx, struct txpwr_idx_comp *tic);
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void dump_tx_power_idx_title(void *sel, _adapter *adapter
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, enum channel_width bw, u8 cch, u8 opch);
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void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath
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, RATE_SECTION rs, enum channel_width bw, u8 cch, u8 opch);
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void dump_tx_power_idx(void *sel, _adapter *adapter
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, enum channel_width bw, u8 cch, u8 opch);
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void dump_txpwr_total_dbm_title(void *sel, _adapter *adapter
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, enum channel_width bw, u8 cch, u8 opch);
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void dump_txpwr_total_dbm_by_rs(void *sel, _adapter *adapter, u8 rs
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, enum channel_width bw, u8 cch, u8 opch);
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void dump_txpwr_total_dbm(void *sel, _adapter *adapter
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, enum channel_width bw, u8 cch, u8 opch);
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bool phy_is_tx_power_limit_needed(_adapter *adapter);
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bool phy_is_tx_power_by_rate_needed(_adapter *adapter);
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int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file);
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#if CONFIG_TXPWR_LIMIT
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int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file);
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#endif
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void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file);
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void phy_reload_tx_power_ext_info(_adapter *adapter);
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void phy_reload_default_tx_power_ext_info(_adapter *adapter);
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const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter);
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#ifdef CONFIG_EFUSE_CONFIG_FILE
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int check_phy_efuse_tx_power_info_valid(_adapter *adapter);
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#endif
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#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
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void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
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void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
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void hal_load_txpwr_info(_adapter *adapter);
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#endif
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void dump_tx_power_ext_info(void *sel, _adapter *adapter);
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void dump_target_tx_power(void *sel, _adapter *adapter);
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void dump_tx_power_by_rate(void *sel, _adapter *adapter);
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int rtw_get_phy_file_path(_adapter *adapter, const char *file_name);
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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#define MAC_FILE_FW_NIC "FW_NIC.bin"
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#define MAC_FILE_FW_WW_IMG "FW_WoWLAN.bin"
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#define PHY_FILE_MAC_REG "MAC_REG.txt"
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#define PHY_FILE_AGC_TAB "AGC_TAB.txt"
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#define PHY_FILE_PHY_REG "PHY_REG.txt"
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#define PHY_FILE_PHY_REG_MP "PHY_REG_MP.txt"
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#define PHY_FILE_PHY_REG_PG "PHY_REG_PG.txt"
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#define PHY_FILE_RADIO_A "RadioA.txt"
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#define PHY_FILE_RADIO_B "RadioB.txt"
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#define PHY_FILE_RADIO_C "RadioC.txt"
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#define PHY_FILE_RADIO_D "RadioD.txt"
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#define PHY_FILE_TXPWR_TRACK "TxPowerTrack.txt"
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#define PHY_FILE_TXPWR_LMT "TXPWR_LMT.txt"
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#define PHY_FILE_WIFI_ANT_ISOLATION "wifi_ant_isolation.txt"
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#define MAX_PARA_FILE_BUF_LEN 32768 /* 32k */
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#define LOAD_MAC_PARA_FILE BIT0
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#define LOAD_BB_PARA_FILE BIT1
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#define LOAD_BB_PG_PARA_FILE BIT2
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#define LOAD_BB_MP_PARA_FILE BIT3
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#define LOAD_RF_PARA_FILE BIT4
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#define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5
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#define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6
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int phy_ConfigMACWithParaFile(PADAPTER Adapter, char *pFileName);
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int phy_ConfigBBWithParaFile(PADAPTER Adapter, char *pFileName, u32 ConfigType);
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int phy_ConfigBBWithPgParaFile(PADAPTER Adapter, const char *pFileName);
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int phy_ConfigBBWithMpParaFile(PADAPTER Adapter, char *pFileName);
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int PHY_ConfigRFWithParaFile(PADAPTER Adapter, char *pFileName, enum rf_path eRFPath);
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int PHY_ConfigRFWithTxPwrTrackParaFile(PADAPTER Adapter, char *pFileName);
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#if CONFIG_TXPWR_LIMIT
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int PHY_ConfigRFWithPowerLimitTableParaFile(PADAPTER Adapter, const char *pFileName);
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#endif
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void phy_free_filebuf_mask(_adapter *padapter, u8 mask);
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void phy_free_filebuf(_adapter *padapter);
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#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
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u8 phy_check_under_survey_ch(_adapter *adapter);
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#endif /* __HAL_COMMON_H__ */
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