RinCat/RTL88x2BU-Linux-Driver
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Update to 5.8.7.1

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Rin Cat
2020-08-02 05:12:24 -04:00
parent 314b662331
commit e3b09b28f7
449 changed files with 106089 additions and 83748 deletions
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303
hal/phydm/halrf/halphyrf_ap.c
View File

@@ -37,6 +37,28 @@
_offset = _size-1;\
} while (0)
void odm_clear_txpowertracking_state(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct rtl8192cd_priv *priv = dm->priv;
u8 i;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>%s\n", __func__);
for (i = 0; i < MAX_RF_PATH; i++) {
cali_info->absolute_ofdm_swing_idx[i] = 0;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->absolute_ofdm_swing_idx[%d]=%d\n",
i, cali_info->absolute_ofdm_swing_idx[i]);
}
dm->rf_calibrate_info.thermal_value = 0;
dm->rf_calibrate_info.thermal_value_lck = 0;
dm->rf_calibrate_info.thermal_value_iqk = 0;
}
void configure_txpower_track(
void *dm_void,
@@ -84,6 +106,21 @@ void configure_txpower_track(
configure_txpower_track_8198f(config);
#endif
#if RTL8814B_SUPPORT
if (dm->support_ic_type == ODM_RTL8814B)
configure_txpower_track_8814b(config);
#endif
#if RTL8812F_SUPPORT
if (dm->support_ic_type == ODM_RTL8812F)
configure_txpower_track_8812f(config);
#endif
#if RTL8197G_SUPPORT
if (dm->support_ic_type == ODM_RTL8197G)
configure_txpower_track_8197g(config);
#endif
}
#if (RTL8192E_SUPPORT == 1)
@@ -318,7 +355,263 @@ odm_txpowertracking_callback_thermal_meter_92e(
}
#endif
#if (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series4(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
struct rtl8192cd_priv *priv = dm->priv;
struct txpwrtrack_cfg c;
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0};
u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p;
u8 thermal_value_avg_count[MAX_RF_PATH] = {0};
u32 thermal_value_avg[MAX_RF_PATH] = {0};
s8 thermal_value_temp[MAX_RF_PATH] = {0};
u8 *pwrtrk_tab_up_a = NULL;
u8 *pwrtrk_tab_down_a = NULL;
u8 *pwrtrk_tab_up_b = NULL;
u8 *pwrtrk_tab_down_b = NULL;
u8 *pwrtrk_tab_up_c = NULL;
u8 *pwrtrk_tab_down_c = NULL;
u8 *pwrtrk_tab_up_d = NULL;
u8 *pwrtrk_tab_down_d = NULL;
u8 tracking_method = MIX_MODE;
configure_txpower_track(dm, &c);
(*c.get_delta_swing_table)(dm,
(u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a,
(u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b);
if (GET_CHIP_VER(priv) == VERSION_8814B) {
(*c.get_delta_swing_table8814only)(dm,
(u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c,
(u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d);
}
cali_info->txpowertracking_callback_cnt++;
cali_info->is_txpowertracking_init = true;
/* Initialize */
if (!dm->rf_calibrate_info.thermal_value)
dm->rf_calibrate_info.thermal_value =
priv->pmib->dot11RFEntry.thermal[RF_PATH_A];
if (!dm->rf_calibrate_info.thermal_value_lck)
dm->rf_calibrate_info.thermal_value_lck =
priv->pmib->dot11RFEntry.thermal[RF_PATH_A];
if (!dm->rf_calibrate_info.thermal_value_iqk)
dm->rf_calibrate_info.thermal_value_iqk =
priv->pmib->dot11RFEntry.thermal[RF_PATH_A];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base_path[RF_PATH_A], cali_info->default_ofdm_index);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d\n", cali_info->txpowertrack_control);
for (i = 0; i < c.rf_path_count; i++) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"PGthermal[%d]=0x%x(%d)\n", i,
priv->pmib->dot11RFEntry.thermal[i],
priv->pmib->dot11RFEntry.thermal[i]);
if (priv->pmib->dot11RFEntry.thermal[i] == 0xff ||
priv->pmib->dot11RFEntry.thermal[i] == 0x0)
return;
}
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
for (i = 0; i < c.rf_path_count; i++)
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/
} else {
for (i = 0; i < c.rf_path_count; i++) {
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
if (thermal_value_temp[i] > 63)
thermal_value[i] = 63;
else if (thermal_value_temp[i] < 0)
thermal_value[i] = 0;
else
thermal_value[i] = thermal_value_temp[i];
}
}
for (j = 0; j < c.rf_path_count; j++) {
cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j];
cali_info->thermal_value_avg_index_path[j]++;
if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index_path[j] = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg_path[j][i]) {
thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i];
thermal_value_avg_count[j]++;
}
}
if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */
thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"PGthermal[%d] = 0x%x(%d), AVG Thermal Meter = 0x%x(%d)\n", j,
priv->pmib->dot11RFEntry.thermal[j],
priv->pmib->dot11RFEntry.thermal[j],
thermal_value[j],
thermal_value[j]);
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta[j] = RTL_ABS(thermal_value[j], priv->pmib->dot11RFEntry.thermal[j]);
delta_LCK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_lck);
delta_IQK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_iqk);
}
/*4 6. If necessary, do LCK.*/
for (i = 0; i < c.rf_path_count; i++)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value[RF_PATH_A];
/*Use RTLCK, so close power tracking driver LCK*/
if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
if (c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
} else
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n");
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
#ifdef _TRACKING_TABLE_FILE
for (i = 0; i < c.rf_path_count; i++) {
if (i == RF_PATH_B) {
odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_b, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_b, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_C) {
odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_c, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_c, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_D) {
odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_d, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_d, DELTA_SWINGIDX_SIZE);
} else {
odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_a, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_a, DELTA_SWINGIDX_SIZE);
}
cali_info->delta_power_index_last_path[i] = cali_info->delta_power_index_path[i]; /*recording poer index offset*/
delta[i] = thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i] ? (thermal_value[i] - priv->pmib->dot11RFEntry.thermal[i]) : (priv->pmib->dot11RFEntry.thermal[i] - thermal_value[i]);
if (delta[i] >= TXPWR_TRACK_TABLE_SIZE)
delta[i] = TXPWR_TRACK_TABLE_SIZE - 1;
if (thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i]) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i);
cali_info->delta_power_index_path[i] = delta_swing_table_idx_tup[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i);
cali_info->delta_power_index_path[i] = -1 * delta_swing_table_idx_tdown[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
}
}
#endif
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
if (cali_info->delta_power_index_path[p] == cali_info->delta_power_index_last_path[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset_path[p] = 0;
else
cali_info->power_index_offset_path[p] = cali_info->delta_power_index_path[p] - cali_info->delta_power_index_last_path[p]; /*Power index diff between 2 times Power Tracking*/
}
#if 0
if (dm->support_ic_type == ODM_RTL8814B) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
}
#else
if (*dm->mp_mode == 1) {
if (cali_info->txpowertrack_control == 1) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (cali_info->txpowertrack_control == 3) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
} else {
if (dm->priv->pmib->dot11RFEntry.tssi_enable == 0) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (dm->priv->pmib->dot11RFEntry.tssi_enable == 1) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
}
if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8812F ||
dm->support_ic_type == ODM_RTL8814B || dm->support_ic_type == ODM_RTL8197G)
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0);
#endif
/* Wait sacn to do IQK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/
/*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n");*/
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_tssi_dck)(dm, true);*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n");
}
}
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__);
cali_info->tx_powercount = 0;
}
#endif
#if (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
@@ -1034,6 +1327,13 @@ odm_txpowertracking_callback_thermal_meter(
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
#if (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8822C | ODM_RTL8197G)) {
odm_txpowertracking_callback_thermal_meter_jaguar_series4(dm);
return;
}
#endif
#if (RTL8197F_SUPPORT == 1 ||RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
if (dm->support_ic_type == ODM_RTL8197F || dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8822B
|| dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8198F) {
@@ -1351,8 +1651,9 @@ void phydm_rf_init(void *dm_void)
void phydm_rf_watchdog(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_txpowertracking_check(dm);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
if (dm->support_ic_type & ODM_IC_11AC_SERIES)
odm_iq_calibrate(dm);
#endif

34
hal/phydm/halrf/halphyrf_ap.h
View File

@@ -43,20 +43,37 @@
#include "halrf/rtl8198f/halrf_dpk_8198f.h"
#endif
#if (RTL8812F_SUPPORT == 1)
#include "halrf/rtl8812f/halrf_iqk_8812f.h"
#include "halrf/rtl8812f/halrf_dpk_8812f.h"
#include "halrf/rtl8812f/halrf_tssi_8812f.h"
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#endif
#if (RTL8197G_SUPPORT == 1)
#include "halrf/rtl8197g/halrf_iqk_8197g.h"
#include "halrf/rtl8197g/halrf_dpk_8197g.h"
#include "halrf/rtl8197g/halrf_tssi_8197g.h"
#endif
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_tssi_dck)(void *, u8);
/* refine by YuChen for 8814A */
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
@@ -74,12 +91,18 @@ struct txpwrtrack_cfg {
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_all_swing get_delta_all_swing_table;
func_all_swing_ex get_delta_all_swing_table_ex;
};
void
odm_clear_txpowertracking_state(
void *dm_void
);
void
configure_txpower_track(
void *dm_void,
@@ -111,12 +134,19 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
void *dm_void
);
#elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
#elif (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series3(
void *dm_void
);
#elif (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series4(
void *dm_void
);
#endif
#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M)

242
hal/phydm/halrf/halphyrf_ce.c
View File

@@ -104,6 +104,18 @@ void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config)
if (dm->support_ic_type == ODM_RTL8192F)
configure_txpower_track_8192f(config);
#endif
#if RTL8822C_SUPPORT
if (dm->support_ic_type == ODM_RTL8822C)
configure_txpower_track_8822c(config);
#endif
#if RTL8814B_SUPPORT
if (dm->support_ic_type == ODM_RTL8814B)
configure_txpower_track_8814b(config);
#endif
}
/*@ **********************************************************************
@@ -828,6 +840,235 @@ void odm_txpowertracking_callback_thermal_meter(void *adapter)
cali_info->tx_powercount = 0;
}
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void
odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0};
u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p;
u8 thermal_value_avg_count[MAX_RF_PATH] = {0};
u32 thermal_value_avg[MAX_RF_PATH] = {0};
s8 thermal_value_temp[MAX_RF_PATH] = {0};
u8 tracking_method = MIX_MODE;
struct txpwrtrack_cfg c;
u8 *delta_swing_table_idx_tup_a = NULL;
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
u8 *delta_swing_table_idx_tup_c = NULL;
u8 *delta_swing_table_idx_tdown_c = NULL;
u8 *delta_swing_table_idx_tup_d = NULL;
u8 *delta_swing_table_idx_tdown_d = NULL;
configure_txpower_track(dm, &c);
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
if (dm->support_ic_type == ODM_RTL8814B) {
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
}
cali_info->txpowertracking_callback_cnt++;
cali_info->is_txpowertracking_init = true;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n",
cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]);
if (dm->support_ic_type == ODM_RTL8822C) {
for (i = 0; i < c.rf_path_count; i++)
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/
} else {
for (i = 0; i < c.rf_path_count; i++) {
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10]*/
thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
if (thermal_value_temp[i] > 63)
thermal_value[i] = 63;
else if (thermal_value_temp[i] < 0)
thermal_value[i] = 0;
else
thermal_value[i] = thermal_value_temp[i];
}
}
if ((tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff) &&
cali_info->txpowertrack_control != 3) {
for (i = 0; i < c.rf_path_count; i++)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[%d] = 0x%x\n",
i, tssi->thermal[i]);
return;
}
for (j = 0; j < c.rf_path_count; j++) {
cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j];
cali_info->thermal_value_avg_index_path[j]++;
if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index_path[j] = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg_path[j][i]) {
thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i];
thermal_value_avg_count[j]++;
}
}
if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */
thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, tssi->thermal[%d] = 0x%x\n",
thermal_value[j], j, tssi->thermal[j]);
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]);
delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]);
delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]);
}
/*4 6. If necessary, do LCK.*/
for (i = 0; i < c.rf_path_count; i++)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value[RF_PATH_A];
/*Use RTLCK, so close power tracking driver LCK*/
if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
if (c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
} else
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n");
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
for (i = 0; i < c.rf_path_count; i++) {
if (i == RF_PATH_B) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_C) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_D) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE);
} else {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE);
}
cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/
delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]);
if (delta[i] >= TXPWR_TRACK_TABLE_SIZE)
delta[i] = TXPWR_TRACK_TABLE_SIZE - 1;
if (thermal_value[i] > tssi->thermal[i]) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i);
cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i);
cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
}
}
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset[p] = 0;
else
cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/
}
#if 0
if (dm->support_ic_type == ODM_RTL8822C) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
}
#endif
if (*dm->mp_mode == 1) {
if (cali_info->txpowertrack_control == 1) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (cali_info->txpowertrack_control == 3) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
} else {
if (rf->power_track_type >= 0 && rf->power_track_type <= 3) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (rf->power_track_type >= 4 && rf->power_track_type <= 7) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
}
if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8814B)
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0);
/* Wait sacn to do IQK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n");
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_tssi_dck)(dm, true);*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n");
}
}
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__);
cali_info->tx_powercount = 0;
}
#endif
/*@3============================================================
* 3 IQ Calibration
* 3============================================================
@@ -910,6 +1151,7 @@ void phydm_rf_init(void *dm_void)
void phydm_rf_watchdog(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_txpowertracking_check(dm);
#if 0

12
hal/phydm/halrf/halphyrf_ce.h
View File

@@ -47,7 +47,8 @@
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#endif
#include "halrf/halrf_powertracking_ce.h"
@@ -63,12 +64,14 @@ enum pwrtrack_method {
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void (*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_tssi_dck)(void *, u8);
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
@@ -85,6 +88,7 @@ struct txpwrtrack_cfg {
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
@@ -103,6 +107,10 @@ void odm_txpowertracking_callback_thermal_meter(void *dm);
void odm_txpowertracking_callback_thermal_meter(void *adapter);
#endif
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void odm_txpowertracking_new_callback_thermal_meter(void *dm_void);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void odm_reset_iqk_result(void *dm_void);

164
hal/phydm/halrf/halphyrf_iot.c
View File

@@ -49,7 +49,10 @@ void configure_txpower_track(
if (dm->support_ic_type == ODM_RTL8195B)
configure_txpower_track_8195b(config);
#endif
#if RTL8710C_SUPPORT
if (dm->support_ic_type == ODM_RTL8710C)
configure_txpower_track_8710c(config);
#endif
#if RTL8721D_SUPPORT
if (dm->support_ic_type == ODM_RTL8721D)
configure_txpower_track_8721d(config);
@@ -130,19 +133,33 @@ odm_txpowertracking_callback_thermal_meter(
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
#if (RTL8721D_SUPPORT == 1)
u8 *delta_swing_table_idx_tup_a_cck = NULL;
u8 *delta_swing_table_idx_tdown_a_cck = NULL;
u8 *delta_swing_table_idx_tup_b_cck = NULL;
u8 *delta_swing_table_idx_tdown_b_cck = NULL;
#endif
/*for Xtal Offset by James.Tung*/
s8 *delta_swing_table_xtal_up = NULL;
s8 *delta_swing_table_xtal_down = NULL;
/* 4 2. Initialization ( 7 steps in total ) */
indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel);
configure_txpower_track(dm, &c);
#if (RTL8721D_SUPPORT == 1)
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b,
(u8 **)&delta_swing_table_idx_tup_a_cck, (u8 **)&delta_swing_table_idx_tdown_a_cck,
(u8 **)&delta_swing_table_idx_tup_b_cck, (u8 **)&delta_swing_table_idx_tdown_b_cck);
#else
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
#endif
/*for Xtal Offset*/
if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8721D))
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
dm->support_ic_type == ODM_RTL8710C)
(*c.get_delta_swing_xtal_table)(dm,
(s8 **)&delta_swing_table_xtal_up,
(s8 **)&delta_swing_table_xtal_down);
@@ -160,7 +177,8 @@ odm_txpowertracking_callback_thermal_meter(
"cali_info->txpowertrack_control = %d, hal_data->eeprom_thermal_meter %d\n",
cali_info->txpowertrack_control, rf->eeprom_thermal);
if (dm->support_ic_type == ODM_RTL8721D)
if (dm->support_ic_type == ODM_RTL8721D
|| dm->support_ic_type == ODM_RTL8710C)
thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A,
c.thermal_reg_addr, 0x7e0);
/* 0x42: RF Reg[10:5] 8721D */
@@ -252,7 +270,16 @@ odm_txpowertracking_callback_thermal_meter(
case RF_PATH_B:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_b_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_b_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n",
cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] =
delta_swing_table_idx_tup_b
[delta];
@@ -267,7 +294,15 @@ odm_txpowertracking_callback_thermal_meter(
default:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_a_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_a_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
cali_info->absolute_ofdm_swing_idx[p] =
delta_swing_table_idx_tup_a[delta];
@@ -279,8 +314,9 @@ odm_txpowertracking_callback_thermal_meter(
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type &
(ODM_RTL8195B | ODM_RTL8721D)) {
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
dm->support_ic_type == ODM_RTL8710C) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -297,6 +333,15 @@ odm_txpowertracking_callback_thermal_meter(
case RF_PATH_B:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_b_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -306,6 +351,15 @@ odm_txpowertracking_callback_thermal_meter(
default:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_a_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -315,8 +369,9 @@ odm_txpowertracking_callback_thermal_meter(
}
/* JJ ADD 20161014 */
if (dm->support_ic_type &
(ODM_RTL8195B | ODM_RTL8721D)) {
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
dm->support_ic_type == ODM_RTL8710C) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -386,6 +441,38 @@ odm_txpowertracking_callback_thermal_meter(
cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
}
#endif
#if (RTL8721D_SUPPORT == 1)
if (thermal_value != cali_info->thermal_value) {
if (thermal_value > rf->eeprom_thermal)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n",
thermal_value, rf->eeprom_thermal);
else if (thermal_value < rf->eeprom_thermal)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n",
thermal_value, rf->eeprom_thermal);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p,
indexforchannel);
/*Record last time Power Tracking result as base.*/
cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->bb_swing_idx_ofdm_base[p] =
cali_info->bb_swing_idx_ofdm[p];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->thermal_value = %d thermal_value= %d\n",
cali_info->thermal_value, thermal_value);
/*Record last Power Tracking Thermal value*/
cali_info->thermal_value = thermal_value;
}
#else
if (thermal_value > rf->eeprom_thermal) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
@@ -404,7 +491,7 @@ odm_txpowertracking_callback_thermal_meter(
dm->support_ic_type == ODM_RTL8710B ||
dm->support_ic_type == ODM_RTL8192F ||
dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D){
dm->support_ic_type == ODM_RTL8710C){
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
@@ -431,7 +518,7 @@ odm_txpowertracking_callback_thermal_meter(
dm->support_ic_type == ODM_RTL8710B ||
dm->support_ic_type == ODM_RTL8192F ||
dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D) {
dm->support_ic_type == ODM_RTL8710C) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
@@ -450,9 +537,11 @@ odm_txpowertracking_callback_thermal_meter(
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
}
#endif
/* JJ ADD 20161014 */
if (dm->support_ic_type == (ODM_RTL8195B | ODM_RTL8721D)) {
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
dm->support_ic_type == ODM_RTL8710C) {
if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
@@ -468,7 +557,7 @@ odm_txpowertracking_callback_thermal_meter(
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
}
}
#if (!RTL8721D_SUPPORT)
/* Wait sacn to do IQK by RF Jenyu*/
if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
@@ -479,7 +568,7 @@ odm_txpowertracking_callback_thermal_meter(
(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
}
}
#endif
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
cali_info->tx_powercount = 0;
@@ -498,17 +587,49 @@ odm_reset_iqk_result(
return;
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140,
149, 151, 153, 155, 157, 159, 161, 163, 165};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place - 13;
}
}
return 0;
}
#endif
void
odm_iq_calibrate(
struct dm_struct *dm
)
odm_rf_calibrate(struct dm_struct *dm)
{
#if (RTL8721D_SUPPORT == 1)
struct dm_iqk_info *iqk_info = &dm->IQK_info;
if (dm->is_linked && !iqk_info->rfk_forbidden) {
if ((*dm->channel != dm->pre_channel) &&
(!*dm->is_scan_in_process)) {
dm->pre_channel = *dm->channel;
dm->linked_interval = 0;
}
if (dm->linked_interval < 3)
dm->linked_interval++;
if (dm->linked_interval == 2)
halrf_rf_k_connect_trigger(dm, 0, SEGMENT_FREE);
} else {
dm->linked_interval = 0;
}
#endif
}
void phydm_rf_init(void *dm_void)
@@ -525,4 +646,7 @@ void phydm_rf_watchdog(void *dm_void)
struct dm_struct *dm = (struct dm_struct *)dm_void;
odm_txpowertracking_check(dm);
#if (RTL8721D_SUPPORT == 1)
odm_rf_calibrate(dm);
#endif
}

17
hal/phydm/halrf/halphyrf_iot.h
View File

@@ -39,6 +39,13 @@
#include "halrf/rtl8195b/halrf_dpk_8195b.h"
#endif
#if (RTL8710C_SUPPORT == 1)
// #include "halrf/rtl8710c/halrf.h"
#include "halrf/rtl8710c/halrf_iqk_8710c.h"
// #include "halrf/rtl8710c/halrf_txgapk_8710c.h"
// #include "halrf/rtl8710c/halrf_dpk_8710c.h"
#endif
#include "halrf/halrf_powertracking_iot.h"
@@ -53,13 +60,19 @@ enum pwrtrack_method {
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
#if (RTL8721D_SUPPORT == 1)
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **,
u8 **, u8 **, u8 **, u8 **);
#else
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
#endif
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing_xtal)(void *, s8 **, s8 **);
typedef void(*func_set_xtal)(void *);

262
hal/phydm/halrf/halphyrf_win.c
View File

@@ -104,6 +104,12 @@ void configure_txpower_track(
configure_txpower_track_8822c(config);
#endif
#if RTL8814B_SUPPORT
if (dm->support_ic_type == ODM_RTL8814B)
configure_txpower_track_8814b(config);
#endif
}
/* **********************************************************************
@@ -171,8 +177,9 @@ odm_txpowertracking_callback_thermal_meter(
#endif
#endif
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
struct _hal_rf_ *rf = &(dm->rf_table);
u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
s8 diff_DPK[4] = {0};
u8 thermal_value_avg_count = 0;
@@ -207,7 +214,7 @@ odm_txpowertracking_callback_thermal_meter(
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/
if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) /*for 8814 path C & D*/
(*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
/* JJ ADD 20161014 */
@@ -559,7 +566,10 @@ odm_txpowertracking_callback_thermal_meter(
cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
}
if ((dm->support_ic_type & ODM_RTL8814A)) {
if (dm->support_ic_type & ODM_RTL8814B)
power_tracking_type = TSSI_MODE;
if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type);
if (power_tracking_type == 0) {
@@ -743,7 +753,233 @@ odm_txpowertracking_callback_thermal_meter(
cali_info->tx_powercount = 0;
}
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void
odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0};
u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0};
u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p;
u8 thermal_value_avg_count[MAX_RF_PATH] = {0};
u32 thermal_value_avg[MAX_RF_PATH] = {0};
s8 thermal_value_temp[MAX_RF_PATH] = {0};
u8 tracking_method = MIX_MODE;
struct txpwrtrack_cfg c;
u8 *delta_swing_table_idx_tup_a = NULL;
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
u8 *delta_swing_table_idx_tup_c = NULL;
u8 *delta_swing_table_idx_tdown_c = NULL;
u8 *delta_swing_table_idx_tup_d = NULL;
u8 *delta_swing_table_idx_tdown_d = NULL;
configure_txpower_track(dm, &c);
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
if (dm->support_ic_type == ODM_RTL8814B) {
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
}
cali_info->txpowertracking_callback_cnt++;
cali_info->is_txpowertracking_init = true;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n",
cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]);
if (dm->support_ic_type == ODM_RTL8822C) {
for (i = 0; i < c.rf_path_count; i++)
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/
} else {
for (i = 0; i < c.rf_path_count; i++) {
thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10]*/
thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
if (thermal_value_temp[i] > 63)
thermal_value[i] = 63;
else if (thermal_value_temp[i] < 0)
thermal_value[i] = 0;
else
thermal_value[i] = thermal_value_temp[i];
}
}
if ((tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff)) {
for (i = 0; i < c.rf_path_count; i++)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[%d] = 0x%x\n",
i, tssi->thermal[i]);
return;
}
for (j = 0; j < c.rf_path_count; j++) {
cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j];
cali_info->thermal_value_avg_index_path[j]++;
if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index_path[j] = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg_path[j][i]) {
thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i];
thermal_value_avg_count[j]++;
}
}
if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */
thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, tssi->thermal[%d] = 0x%x\n",
thermal_value[j], j, tssi->thermal[j]);
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]);
delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]);
delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]);
}
/*4 6. If necessary, do LCK.*/
for (i = 0; i < c.rf_path_count; i++)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value[RF_PATH_A];
/*Use RTLCK, so close power tracking driver LCK*/
if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
if (c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
} else
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n");
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
for (i = 0; i < c.rf_path_count; i++) {
if (i == RF_PATH_B) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_C) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE);
} else if (i == RF_PATH_D) {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE);
} else {
odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE);
odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE);
}
cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/
delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]);
if (delta[i] >= TXPWR_TRACK_TABLE_SIZE)
delta[i] = TXPWR_TRACK_TABLE_SIZE - 1;
if (thermal_value[i] > tssi->thermal[i]) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i);
cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i);
cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]];
cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i);
}
}
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset[p] = 0;
else
cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/
}
#if 0
if (dm->support_ic_type == ODM_RTL8822C) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
}
#endif
if (*dm->mp_mode == 1) {
if (cali_info->txpowertrack_control == 1) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (cali_info->txpowertrack_control == 3) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
} else {
if (rf->power_track_type >= 0 && rf->power_track_type <= 3) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
tracking_method = MIX_MODE;
} else if (rf->power_track_type >= 4 && rf->power_track_type <= 7) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n");
tracking_method = TSSI_MODE;
}
}
if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8814B)
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0);
/* Wait sacn to do IQK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n");
/*if (!cali_info->is_iqk_in_progress)*/
/* (*c.do_tssi_dck)(dm, true);*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n");
}
}
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__);
cali_info->tx_powercount = 0;
}
#endif
/* 3============================================================
* 3 IQ Calibration
@@ -830,12 +1066,20 @@ void phydm_rf_init(struct dm_struct *dm)
}
void phydm_rf_watchdog(struct dm_struct *dm)
void phydm_rf_watchdog(struct dm_struct *dm)
{
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
FunctionIn(COMP_MLME);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_txpowertracking_check(dm);
if (dm->support_ic_type & ODM_IC_11AC_SERIES)
odm_iq_calibrate(dm);
if (*dm->mp_mode == 1) {
#if (MP_DRIVER == 1)
odm_txpowertracking_check(dm);
#endif
} else {
odm_txpowertracking_check(dm);
if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES))
odm_iq_calibrate(dm);
}
#endif
}

12
hal/phydm/halrf/halphyrf_win.h
View File

@@ -53,12 +53,14 @@ enum pwrtrack_method {
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void(*func_lck)(void *);
typedef void(*func_tssi_dck)(void *, u8);
typedef void(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
@@ -75,7 +77,8 @@ struct txpwrtrack_cfg {
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
@@ -104,7 +107,10 @@ odm_txpowertracking_callback_thermal_meter(
#endif
);
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void
odm_txpowertracking_new_callback_thermal_meter(void *dm_void);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59

1714
hal/phydm/halrf/halrf.c
View File

File diff suppressed because it is too large Load Diff

224
hal/phydm/halrf/halrf.h
View File

@@ -41,14 +41,22 @@
#endif
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#if (RTL8197G_SUPPORT == 1)
#include "halrf/rtl8197g/halrf_rfk_init_8197g.h"
#endif
#if (RTL8198F_SUPPORT == 1)
#include "halrf/rtl8198f/halrf_rfk_init_8198f.h"
#endif
#if (RTL8812F_SUPPORT == 1)
#include "halrf/rtl8812f/halrf_rfk_init_8812f.h"
#endif
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_rfk_init_8814b.h"
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#endif
/*@============================================================*/
@@ -90,11 +98,14 @@
#define IQK_VER_8703B "0x05"
#define IQK_VER_8710B "0x01"
#define IQK_VER_8723D "0x02"
#define IQK_VER_8822B "0x2f"
#define IQK_VER_8822C "0x03"
#define IQK_VER_8822B "0x32"
#define IQK_VER_8822C "0x0c"
#define IQK_VER_8821C "0x23"
#define IQK_VER_8198F "0x09"
#define IQK_VER_8814B "0x06"
#define IQK_VER_8198F "0x0a"
#define IQK_VER_8814B "0x0e"
#define IQK_VER_8812F "0x08"
#define IQK_VER_8710C "0x05"
#define IQK_VER_8197G "0x02"
/*LCK version*/
#define LCK_VER_8188E "0x01"
@@ -112,8 +123,10 @@
#define LCK_VER_8822B "0x02"
#define LCK_VER_8822C "0x00"
#define LCK_VER_8821C "0x02"
#define LCK_VER_8814B "0x00"
#define LCK_VER_8814B "0x01"
#define LCK_VER_8195B "0x02"
#define LCK_VER_8710C "0x01"
#define LCK_VER_8197G "0x00"
/*power tracking version*/
#define PWRTRK_VER_8188E "0x01"
@@ -132,6 +145,7 @@
#define PWRTRK_VER_8822C "0x00"
#define PWRTRK_VER_8821C "0x01"
#define PWRTRK_VER_8814B "0x00"
#define PWRTRK_VER_8197G "0x00"
/*DPK version*/
#define DPK_VER_8188E "NONE"
@@ -146,22 +160,27 @@
#define DPK_VER_8710B "NONE"
#define DPK_VER_8723D "NONE"
#define DPK_VER_8822B "NONE"
#define DPK_VER_8822C "0x04"
#define DPK_VER_8822C "0x19"
#define DPK_VER_8821C "NONE"
#define DPK_VER_8192F "0x0c"
#define DPK_VER_8198F "0x0a"
#define DPK_VER_8814B "0x00"
#define DPK_VER_8195B "0x06"
#define DPK_VER_8192F "0x0d"
#define DPK_VER_8198F "0x0e"
#define DPK_VER_8814B "0x08"
#define DPK_VER_8195B "0x0b"
#define DPK_VER_8812F "0x06"
#define DPK_VER_8197G "0x04"
/*RFK_INIT version*/
#define RFK_INIT_VER_8822B "0x8"
#define RFK_INIT_VER_8822C "0x3"
#define RFK_INIT_VER_8822C "0x7"
#define RFK_INIT_VER_8195B "0x1"
#define RFK_INIT_VER_8198F "0x5"
#define RFK_INIT_VER_8814B "0x5"
#define RFK_INIT_VER_8198F "0x8"
#define RFK_INIT_VER_8814B "0xa"
#define RFK_INIT_VER_8812F "0x3"
#define RFK_INIT_VER_8197G "0x3"
/*DACK version*/
#define DACK_VER_8822C "0x3"
#define DACK_VER_8822C "0x6"
#define DACK_VER_8814B "0x3"
/*Kfree tracking version*/
#define KFREE_VER_8188E \
@@ -196,6 +215,14 @@
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8814B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8197G \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define TSSI_VER_8812F "0x1"
#define TSSI_VER_8822C "0x1"
#define TSSI_VER_8821C "0x1"
#define TSSI_VER_8814B "0x1"
#define TSSI_VER_8197G "0x1"
/*PA Bias Calibration version*/
#define PABIASK_VER_8188E \
@@ -230,6 +257,8 @@
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8814B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8197G \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define HALRF_IQK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \
@@ -247,7 +276,9 @@
(dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \
(dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown"
#define HALRF_LCK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \
@@ -265,8 +296,9 @@
(dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \
(dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown"
#define HALRF_POWRTRACKING_VER \
(dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \
@@ -283,7 +315,7 @@
(dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? PWRTRK_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown"
#define HALRF_DPK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \
@@ -302,7 +334,8 @@
(dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown"
#define HALRF_KFREE_VER \
(dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \
@@ -320,7 +353,15 @@
(dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown"
#define HALRF_TSSI_VER \
(dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \
(dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : "unknown"
#define HALRF_PABIASK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \
@@ -338,21 +379,31 @@
(dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown"
#define HALRF_RFK_INIT_VER \
(dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \
(dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \
(dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : "unknown"
(dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown"
#define HALRF_DACK_VER \
(dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : "unknown"
(dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown"
#define IQK_THRESHOLD 8
#define DPK_THRESHOLD 4
#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a))
#define SN 100
#define CCK_TSSI_NUM 6
#define OFDM_2G_TSSI_NUM 5
#define OFDM_5G_TSSI_NUM 14
/*@===========================================================*/
/*AGC RX High Power mode*/
/*@===========================================================*/
@@ -365,12 +416,13 @@
/*@============================================================*/
enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/
RF00_PWR_TRK = 0,
RF01_IQK = 1,
RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/
RF01_IQK = 1, /*LOK, IQK*/
RF02_LCK = 2,
RF03_DPK = 3,
RF04_TXGAPK = 4,
RF05_DACK = 5,
RF06_DPK_TRK = 6,
RF07_2GBAND_SHIFT = 7
};
@@ -381,6 +433,7 @@ enum halrf_ability {
HAL_RF_DPK = BIT(RF03_DPK),
HAL_RF_TXGAPK = BIT(RF04_TXGAPK),
HAL_RF_DACK = BIT(RF05_DACK),
HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK),
HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT)
};
@@ -413,14 +466,16 @@ enum halrf_cmninfo_init {
HALRF_CMNINFO_MP_PSD_POINT,
HALRF_CMNINFO_MP_PSD_START_POINT,
HALRF_CMNINFO_MP_PSD_STOP_POINT,
HALRF_CMNINFO_MP_PSD_AVERAGE
HALRF_CMNINFO_MP_PSD_AVERAGE,
HALRF_CMNINFO_IQK_TIMES
};
enum halrf_cmninfo_hook {
HALRF_CMNINFO_CON_TX,
HALRF_CMNINFO_SINGLE_TONE,
HALRF_CMNINFO_CARRIER_SUPPRESSION,
HALRF_CMNINFO_MP_RATE_INDEX
HALRF_CMNINFO_MP_RATE_INDEX,
HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY
};
enum halrf_lna_set {
@@ -428,6 +483,41 @@ enum halrf_lna_set {
HALRF_LNA_ENABLE = 1,
};
enum halrf_k_segment_time {
SEGMENT_FREE = 0,
SEGMENT_10MS = 10, /*10ms*/
SEGMENT_30MS = 30, /*30ms*/
SEGMENT_50MS = 50, /*50ms*/
};
#define POWER_INDEX_DIFF 4
#define TSSI_TXAGC_DIFF 2
#define TSSI_CODE_NUM 84
#define TSSI_SLOPE_2G 8
#define TSSI_SLOPE_5G 5
#define TSSI_EFUSE_NUM 25
#define TSSI_EFUSE_KFREE_NUM 4
struct _halrf_tssi_data {
s32 cck_offset_patha;
s32 cck_offset_pathb;
s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH];
s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH];
s16 txagc_codeword[TSSI_CODE_NUM];
u16 tssi_codeword[TSSI_CODE_NUM];
s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM];
s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM];
u8 thermal[PHYDM_MAX_RF_PATH];
u32 index[PHYDM_MAX_RF_PATH][14];
u8 do_tssi;
u8 get_thermal;
u8 tssi_finish_bit[PHYDM_MAX_RF_PATH];
u8 thermal_trigger;
};
/*@============================================================*/
/*@ structure */
/*@============================================================*/
@@ -439,25 +529,34 @@ struct _hal_rf_ {
/*update*/
u32 rf_supportability;
u8 rf_shift_band;
/*u32 halrf_tssi_data;*/
u8 eeprom_thermal;
u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/
boolean dpk_done;
u64 dpk_progressing_time;
u64 iqk_progressing_time;
u32 fw_ver;
boolean *is_con_tx;
boolean *is_single_tone;
boolean *is_carrier_suppresion;
boolean is_dpk_in_progress;
boolean is_tssi_in_progress;
boolean is_bt_iqk_timeout;
boolean aac_checked;
u8 *mp_rate_index;
u32 *manual_rf_supportability;
u32 p_rate_index;
u8 pwt_type;
u32 rf_dbg_comp;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
struct _halrf_psd_data halrf_psd_data;
struct _halrf_tssi_data halrf_tssi_data;
#endif
u8 power_track_type;
u8 pre_band_type;
};
/*@============================================================*/
@@ -466,7 +565,9 @@ struct _hal_rf_ {
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\
RTL8197G_SUPPORT == 1)
void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output,
u32 *_out_len);
@@ -477,9 +578,10 @@ u8 halrf_match_iqk_version(void *dm_void);
void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
#ifdef CONFIG_2G_BAND_SHIFT
void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
#endif
void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info,
u32 value);
@@ -498,6 +600,11 @@ void halrf_init(void *dm_void);
void halrf_iqk_trigger(void *dm_void, boolean is_recovery);
void halrf_rfk_handshake(void *dm_void, boolean is_before_k);
void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery,
enum halrf_k_segment_time seg_time);
void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
boolean segment_iqk);
@@ -528,6 +635,8 @@ void halrf_dpk_track(void *dm_void);
void halrf_dpk_reload(void *dm_void);
void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);
/*Global function*/
void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num);
@@ -558,16 +667,65 @@ halrf_config_rfk_with_header_file(void *dm_void, u32 config_type);
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\
RTL8197G_SUPPORT == 1)
void halrf_iqk_dbg(void *dm_void);
#endif
void halrf_tssi_init(void *dm_void);
void halrf_tssi_get_efuse(void *dm_void);
void halrf_do_tssi(void *dm_void);
void halrf_set_tssi_value(void *dm_void, u32 tssi_value);
void halrf_do_thermal(void *dm_void);
u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value);
void halrf_set_tssi_power(void *dm_void, s8 power);
void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path);
u32 halrf_query_tssi_value(void *dm_void);
void halrf_tssi_cck(void *dm_void);
void halrf_thermal_cck(void *dm_void);
void halrf_tssi_set_de(void *dm_void);
void halrf_tssi_dck(void *dm_void, u8 direct_do);
void halrf_calculate_tssi_codeword(void *dm_void);
void halrf_set_tssi_codeword(void *dm_void);
u8 halrf_get_tssi_codeword_for_txindex(void *dm_void);
u32 halrf_tssi_get_de(void *dm_void, u8 path);
void halrf_tssi_trigger(void *dm_void);
void halrf_set_dpk_track(void *dm_void, u8 enable);
void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch);
void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable);
boolean halrf_get_dpkbychannel(void *dm_void);
boolean halrf_get_dpkenable(void *dm_void);
void _iqk_check_if_reload(void *dm_void);
void halrf_do_rxbb_dck(void *dm_void);
void config_halrf_path_adda_setting_trigger(void *dm_void);
void halrf_reload_iqk(void *dm_void, boolean reset);
void halrf_dack_dbg(void *dm_void);
void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);
void halrf_set_rfsupportability(void *dm_void);
#endif /*__HALRF_H__*/

87
hal/phydm/halrf/halrf_debug.c
View File

@@ -37,6 +37,78 @@ void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
struct dm_struct *dm = (struct dm_struct *)dm_void;
u32 used = *_used;
u32 out_len = *_out_len;
u32 rf_release_ver = 0;
switch (dm->support_ic_type) {
#if (RTL8814A_SUPPORT)
case ODM_RTL8814A:
rf_release_ver = RF_RELEASE_VERSION_8814A;
break;
#endif
#if (RTL8821C_SUPPORT)
case ODM_RTL8821C:
rf_release_ver = RF_RELEASE_VERSION_8821C;
break;
#endif
#if (RTL8822B_SUPPORT)
case ODM_RTL8822B:
rf_release_ver = RF_RELEASE_VERSION_8822B;
break;
#endif
#if (RTL8822C_SUPPORT)
case ODM_RTL8822C:
rf_release_ver = RF_RELEASE_VERSION_8822C;
break;
#endif
#if (RTL8814B_SUPPORT)
case ODM_RTL8814B:
rf_release_ver = RF_RELEASE_VERSION_8814B;
break;
#endif
#if (RTL8812F_SUPPORT)
case ODM_RTL8812F:
rf_release_ver = RF_RELEASE_VERSION_8812F;
break;
#endif
#if (RTL8198F_SUPPORT)
case ODM_RTL8198F:
rf_release_ver = RF_RELEASE_VERSION_8198F;
break;
#endif
#if (RTL8197F_SUPPORT)
case ODM_RTL8197F:
rf_release_ver = RF_RELEASE_VERSION_8197F;
break;
#endif
#if (RTL8192F_SUPPORT)
case ODM_RTL8197F:
rf_release_ver = RF_RELEASE_VERSION_8192F;
break;
#endif
#if (RTL8710B_SUPPORT)
case ODM_RTL8710B:
rf_release_ver = RF_RELEASE_VERSION_8710B;
break;
#endif
#if (RTL8195B_SUPPORT)
case ODM_RTL8195B:
rf_release_ver = RF_RELEASE_VERSION_8195B;
break;
#endif
}
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
"RF Para Release Ver", rf_release_ver);
/* HAL RF version List */
PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
@@ -53,6 +125,8 @@ void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
"LCK", HALRF_LCK_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"DPK", HALRF_DPK_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"TSSI", HALRF_TSSI_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"KFREE", HALRF_KFREE_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
@@ -139,7 +213,10 @@ enum halrf_CMD_ID {
HALRF_IQK_INFO,
HALRF_IQK,
HALRF_IQK_DEBUG,
HALRF_DPK,
#ifdef CONFIG_2G_BAND_SHIFT
HAL_BAND_SHIFT,
#endif
};
struct halrf_command halrf_cmd_ary[] = {
@@ -149,8 +226,11 @@ struct halrf_command halrf_cmd_ary[] = {
{"profile", HALRF_PROFILE},
{"iqk_info", HALRF_IQK_INFO},
{"iqk", HALRF_IQK},
{"dpk", HALRF_DPK},
{"iqk_dbg", HALRF_IQK_DEBUG},
#ifdef CONFIG_2G_BAND_SHIFT
{"band_shift", HAL_BAND_SHIFT},
#endif
};
void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
@@ -194,10 +274,12 @@ void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
halrf_support_ability_debug(dm, &input[0], &used, output,
&out_len);
break;
#ifdef CONFIG_2G_BAND_SHIFT
case HAL_BAND_SHIFT:
halrf_support_band_shift_debug(dm, &input[0], &used, output,
&out_len);
break;
#endif
case HALRF_DBG_COMP:
halrf_debug_trace(dm, &input[0], &used, output, &out_len);
break;
@@ -235,6 +317,11 @@ void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
#endif
}
break;
case HALRF_DPK:
PDM_SNPF(out_len, used, output + used, out_len - used,
"DPK Trigger\n");
halrf_dpk_trigger(dm);
break;
default:
break;
}

57
hal/phydm/halrf/halrf_dpk.h
View File

@@ -30,9 +30,11 @@
#define GAIN_LOSS 1
#define DO_DPK 2
#define DPK_ON 3
#define GAIN_LOSS_PULSE 4
#define DPK_PAS 5
#define DPK_LMS 6
#define DPK_LOK 4
#define DPK_TXK 5
#define DAGC 4
#define LOSS_CHK 0
#define GAIN_CHK 1
@@ -48,28 +50,64 @@ struct dm_dpk_info {
boolean is_dpk_enable;
boolean is_dpk_pwr_on;
boolean is_dpk_by_channel;
boolean is_tssi_mode;
boolean is_reload;
u16 dpk_path_ok;
/*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/
/*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/
u8 thermal_dpk;
u8 thermal_dpk_avg[AVG_THERMAL_NUM_DPK];
u8 thermal_dpk[4]; /*path*/
u8 thermal_dpk_avg[4][AVG_THERMAL_NUM_DPK]; /*path*/
u8 pre_pwsf[4];
u8 thermal_dpk_avg_index;
u32 gnt_control;
u32 gnt_value;
u8 dpk_ch;
u8 dpk_band;
u8 dpk_bw;
#if (RTL8822C_SUPPORT == 1)
u8 result[2][1]; /*path/group*/
u8 tx_agc[2][1]; /*path/group*/
u32 coef[2][1][20]; /*path/group/MDPD coefficient*/
#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1)
u8 result[2]; /*path*/
u8 dpk_txagc[2]; /*path*/
u32 coef[2][20]; /*path/MDPD coefficient*/
u16 dpk_gs[2]; /*MDPD coef gs*/
u8 thermal_dpk_delta[2]; /*path*/
#endif
#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
/*2G DPK data*/
u8 dpk_result[4][3]; /*path/group*/
u8 pwsf_2g[4][3]; /*path/group*/
u8 pwsf_2g[4][3]; /*path/group*/
u32 lut_2g_even[4][3][64]; /*path/group/LUT data*/
u32 lut_2g_odd[4][3][64]; /*path/group/LUT data*/
s16 tmp_pas_i[32]; /*PAScan I data*/
s16 tmp_pas_q[32]; /*PAScan Q data*/
/*5G DPK data*/
u8 dpk_5g_result[4][6]; /*path/group*/
u8 pwsf_5g[4][6]; /*path/group*/
u32 lut_5g[4][6][64]; /*path/group/LUT data*/
u32 lut_2g[4][3][64]; /*path/group/LUT data*/
/*8814B*/
u8 rxbb[4]; /*path/group*/
u8 txbb[4]; /*path/group*/
u8 tx_gain;
#endif
#if (RTL8195B_SUPPORT == 1)
/*2G DPK data*/
u8 dpk_2g_result[1][3]; /*path/group*/
u8 pwsf_2g[1][3]; /*path/group*/
u32 lut_2g_even[1][3][16]; /*path/group/LUT data*/
u32 lut_2g_odd[1][3][16]; /*path/group/LUT data*/
/*5G DPK data*/
u8 dpk_5g_result[1][13]; /*path/group*/
u8 pwsf_5g[1][13]; /*path/group*/
u32 lut_5g_even[1][13][16]; /*path/group/LUT data*/
u32 lut_5g_odd[1][13][16]; /*path/group/LUT data*/
#endif
#if (RTL8721D_SUPPORT == 1)
u8 dpk_txagc;
/*2G DPK data*/
u8 dpk_2g_result[1][3]; /*path/group*/
u8 pwsf_2g[1][3]; /*path/group*/
@@ -81,6 +119,7 @@ struct dm_dpk_info {
u32 lut_5g_even[1][6][16]; /*path/group/LUT data*/
u32 lut_5g_odd[1][6][16]; /*path/group/LUT data*/
#endif
};
#endif /*__HALRF_DPK_H__*/

25
hal/phydm/halrf/halrf_iqk.h
View File

@@ -36,7 +36,7 @@
#define RXIQK2 2
#define kcount_limit_80m 2
#define kcount_limit_others 4
#define rxiqk_gs_limit 10
#define rxiqk_gs_limit 6
#define TXWBIQK_EN 1
#define RXWBIQK_EN 1
#define NUM 4
@@ -47,6 +47,8 @@ struct dm_dack_info {
u32 qc_a;
u32 ic_b;
u32 qc_b;
boolean dack_en;
u16 msbk_d[2][2][15];
};
struct dm_iqk_info {
@@ -61,21 +63,37 @@ struct dm_iqk_info {
u8 rxiqk_step;
u8 tmp1bcc;
u8 txgain;
u32 txgain56;
u8 kcount;
u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/
boolean rfk_forbidden;
u8 rxbb;
u32 rf_reg58;
boolean segment_iqk;
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\
RTL8710C_SUPPORT == 1)
u32 iqk_channel[2];
boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
/*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
/*channel index = 2 is just for debug*/
#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
u16 iqk_cfir_real[3][2][2][17];
/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
/*channel index = 2 is just for debug*/
u16 iqk_cfir_imag[3][2][2][17];
u32 rx_cfir_real[2][2][17];
u32 rx_cfir_imag[2][2][17];
u32 rx_cfir[2][2];
/*times/path*/
#else
u32 iqk_cfir_real[3][4][2][8];
/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
/*channel index = 2 is just for debug*/
u32 iqk_cfir_imag[3][4][2][8];
#endif
u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
/* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
@@ -88,7 +106,6 @@ struct dm_iqk_info {
boolean is_btg;
boolean isbnd;
boolean is_reload;
boolean segment_iqk;
boolean is_hwtx;
boolean xym_read;
boolean trximr_enable;
@@ -97,6 +114,8 @@ struct dm_iqk_info {
u32 gs1_xym[2][6];
u32 gs2_xym[2][6];
u32 rxk1_xym[2][6];
u32 txxy[2][2];
u32 rxxy[2][2];
#endif
};

1530
hal/phydm/halrf/halrf_kfree.c
View File

File diff suppressed because it is too large Load Diff

104
hal/phydm/halrf/halrf_kfree.h
View File

@@ -28,7 +28,7 @@
#define KFREE_VERSION "1.0"
#define KFREE_BAND_NUM 6
#define KFREE_BAND_NUM 9
#define KFREE_CH_NUM 3
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
@@ -45,13 +45,26 @@
#define PA_BIAS_FLAG_ON BIT(4)
#define TSSI_TRIM_FLAG_ON BIT(5)
#define LNA_FLAG_ON BIT(6)
#define PPG_THERMAL_OFFSET_98F 0x50
#define PPG_2GM_TXAB_98F 0x51
#define PPG_2GM_TXCD_98F 0x52
#define PPG_2GL_TXAB_98F 0x53
#define PPG_2GL_TXCD_98F 0x54
#define PPG_5GH_TXAB_98F 0x55
#define PPG_5GH_TXCD_98F 0x56
#define PPG_2GH_TXAB_98F 0x55
#define PPG_2GH_TXCD_98F 0x56
#define PPG_PABIAS_2GAB_98F 0x57
#define PPG_PABIAS_2GCD_98F 0x58
#define PPG_LNA_2GA_98F 0x59
#define PPG_LNA_2GB_98F 0x5a
#define PPG_LNA_2GC_98F 0x5b
#define PPG_LNA_2GD_98F 0x5c
#define PPG_THERMAL_OFFSET_21C 0x1EF
#define PPG_2G_TXAB_21C 0x1EE
@@ -88,10 +101,91 @@
#define PPG_PABIAS_2GA_22B 0x3D5
#define PPG_PABIAS_2GB_22B 0x3D6
#define PPG_THERMAL_A_OFFSET_22C 0x1ef
#define PPG_THERMAL_B_OFFSET_22C 0x1b0
#define PPG_2GL_TXAB_22C 0x1d4
#define PPG_2GM_TXAB_22C 0x1ee
#define PPG_2GH_TXAB_22C 0x1d2
#define PPG_5GL1_TXA_22C 0x1ec
#define PPG_5GL1_TXB_22C 0x1eb
#define PPG_5GL2_TXA_22C 0x1e8
#define PPG_5GL2_TXB_22C 0x1e7
#define PPG_5GM1_TXA_22C 0x1e4
#define PPG_5GM1_TXB_22C 0x1e3
#define PPG_5GM2_TXA_22C 0x1e0
#define PPG_5GM2_TXB_22C 0x1df
#define PPG_5GH1_TXA_22C 0x1dc
#define PPG_5GH1_TXB_22C 0x1db
#define PPG_PABIAS_2GA_22C 0x1d6
#define PPG_PABIAS_2GB_22C 0x1d5
#define PPG_PABIAS_5GA_22C 0x1d8
#define PPG_PABIAS_5GB_22C 0x1d7
#define TSSI_2GM_TXA_22C 0x1c0
#define TSSI_2GM_TXB_22C 0x1bf
#define TSSI_2GH_TXA_22C 0x1be
#define TSSI_2GH_TXB_22C 0x1bd
#define TSSI_5GL1_TXA_22C 0x1bc
#define TSSI_5GL1_TXB_22C 0x1bb
#define TSSI_5GL2_TXA_22C 0x1ba
#define TSSI_5GL2_TXB_22C 0x1b9
#define TSSI_5GM1_TXA_22C 0x1b8
#define TSSI_5GM1_TXB_22C 0x1b7
#define TSSI_5GM2_TXA_22C 0x1b6
#define TSSI_5GM2_TXB_22C 0x1b5
#define TSSI_5GH1_TXA_22C 0x1b4
#define TSSI_5GH1_TXB_22C 0x1b3
#define TSSI_5GH2_TXA_22C 0x1b2
#define TSSI_5GH2_TXB_22C 0x1b1
/*8195B*/
#define PPG_THERMAL_OFFSET_95B 0x1ef
#define PPG_2GL_TXA_95B 0x1d4
#define PPG_2GM_TXA_95B 0x1ee
#define PPG_2GH_TXA_95B 0x1d2
#define PPG_5GL1_TXA_95B 0x1ec
#define PPG_5GL2_TXA_95B 0x1e8
#define PPG_5GM1_TXA_95B 0x1e4
#define PPG_5GM2_TXA_95B 0x1e0
#define PPG_5GH1_TXA_95B 0x1dc
#define PPG_PABIAS_2GA_95B 0x1d6
#define PPG_PABIAS_5GA_95B 0x1d8
/*8721D*/
/*#define KFREE_BAND_NUM_8721D 6*/
#define PPG_THERMAL_OFFSET_8721D 0x1EF
#define PPG_2G_TXA_8721D 0x1EE
#define PPG_5GL1_TXA_8721D 0x1ED
#define PPG_5GL2_TXA_8721D 0x1EC
#define PPG_5GM1_TXA_8721D 0x1EB
#define PPG_5GM2_TXA_8721D 0x1EA
#define PPG_5GH1_TXA_8721D 0x1E9
/*8197G*/
#define PPG_THERMAL_OFFSET_97G 0x50
#define PPG_2GM_TXAB_97G 0x51
#define PPG_2GL_TXAB_97G 0x53
#define PPG_2GH_TXAB_97G 0x55
#define PPG_PABIAS_2GAB_97G 0x57
#define PPG_LNA_2GA_97G 0x21
#define PPG_LNA_2GB_97G 0x22
/*8710C Ameba Z2*/
#define PPG_THERMAL_OFFSET_10C 0x1EF
#define PPG_2GL_TX_10C 0x1D4
#define PPG_2GM_TX_10C 0x1EE
#define PPG_2GH_TX_10C 0x1D2
#define PPG_PABIAS_10C 0x1D6
#define PPG_LNA_10C 0x1D0
struct odm_power_trim_data {
u8 flag;
u8 pa_bias_flag;
u8 lna_flag;
s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
s8 tssi_trim[KFREE_BAND_NUM][MAX_RF_PATH];
s8 thermal;
};
@@ -114,6 +208,10 @@ s8 phydm_get_thermal_offset(void *dm_void);
void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
void phydm_config_new_kfree(void *dm_void);
s8 phydm_get_tssi_trim_de(void *dm_void, u8 path);
void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
#endif /*__HALRF_KFREE_H__*/

25
hal/phydm/halrf/halrf_powertracking.c
View File

@@ -150,3 +150,28 @@ void halrf_update_init_rate_work_item_callback(
}
}
#endif
void halrf_set_pwr_track(void *dm_void, u8 enable)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &(dm->rf_table);
struct txpwrtrack_cfg c;
u8 i;
configure_txpower_track(dm, &c);
if (enable) {
rf->rf_supportability = rf->rf_supportability | HAL_RF_TX_PWR_TRACK;
if (cali_info->txpowertrack_control == 1 || cali_info->txpowertrack_control == 3)
halrf_do_tssi(dm);
} else {
rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TX_PWR_TRACK;
odm_clear_txpowertracking_state(dm);
halrf_do_tssi(dm);
halrf_calculate_tssi_codeword(dm);
halrf_set_tssi_codeword(dm);
for (i = 0; i < c.rf_path_count; i++)
(*c.odm_tx_pwr_track_set_pwr)(dm, CLEAN_MODE, i, 0);
}
}

2
hal/phydm/halrf/halrf_powertracking.h
View File

@@ -38,4 +38,6 @@ void halrf_update_init_rate_work_item_callback(
void *context);
#endif
void halrf_set_pwr_track(void *dm_void, u8 enable);
#endif /*#ifndef __HALRF_POWERTRACKING_H__*/

42
hal/phydm/halrf/halrf_powertracking_ap.c
View File

@@ -1120,7 +1120,6 @@ odm_txpowertracking_check(
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
@@ -1204,16 +1203,41 @@ odm_txpowertracking_check_ap(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
struct rtl8192cd_priv *priv = dm->priv;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1))
if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F))
#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1))
if (!dm->rf_calibrate_info.tm_trigger) {
if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F)) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, (BIT(17) | BIT(16)), 0x3);
} else if (dm->support_ic_type & ODM_RTL8812F) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else if (dm->support_ic_type & ODM_RTL8814B) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
}
if (dm->support_ic_type & ODM_RTL8814B) {
ODM_delay_us(300);
odm_txpowertracking_callback_thermal_meter(dm);
tssi->thermal_trigger = 1;
}
dm->rf_calibrate_info.tm_trigger = 1;
} else {
odm_txpowertracking_callback_thermal_meter(dm);
else
#endif
{
if (dm->support_ic_type & ODM_RTL8814B)
tssi->thermal_trigger = 0;
dm->rf_calibrate_info.tm_trigger = 0;
}
#endif

10
hal/phydm/halrf/halrf_powertracking_ap.h
View File

@@ -79,6 +79,7 @@
#define ODM_OFDM_TABLE_SIZE 37
#define ODM_CCK_TABLE_SIZE 33
#define TXPWR_TRACK_TABLE_SIZE 30
/* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
@@ -139,12 +140,16 @@ struct dm_rf_calibration_struct {
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
s8 power_index_offset_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
@@ -161,7 +166,9 @@ struct dm_rf_calibration_struct {
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset;
s8 delta_power_index;
s8 delta_power_index_path[MAX_RF_PATH];
s8 delta_power_index_last;
s8 delta_power_index_last_path[MAX_RF_PATH];
boolean is_tx_power_changed;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
@@ -213,6 +220,7 @@ struct dm_rf_calibration_struct {
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
u8 bb_swing_idx_ofdm_base_path[MAX_RF_PATH];
#endif
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;

113
hal/phydm/halrf/halrf_powertracking_ce.c
View File

@@ -605,15 +605,10 @@ u8 get_swing_index(void *dm_void)
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
ODM_RTL8188F | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8710B | ODM_RTL8821)) {
#if (RTL8821A_SUPPORT == 1)
bb_swing =
phy_get_tx_bb_swing_8812a(adapter,
hal_data->current_band_type,
RF_PATH_A);
#else
ODM_RTL8710B)) {
bb_swing = odm_get_bb_reg(dm, R_0xc80, 0xFFC00000);
#endif
for (i = 0; i < OFDM_TABLE_SIZE; i++) {
table_value = ofdm_swing_table_new[i];
@@ -623,7 +618,7 @@ u8 get_swing_index(void *dm_void)
break;
}
} else {
#if (RTL8812A_SUPPORT == 1)
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
bb_swing =
phy_get_tx_bb_swing_8812a(adapter,
hal_data->current_band_type,
@@ -672,11 +667,13 @@ u8 get_cck_swing_index(void *dm_void)
void odm_txpowertracking_thermal_meter_init(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
u8 swing_idx = get_swing_index(dm);
u8 cckswing_idx = get_cck_swing_index(dm);
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &dm->rf_table;
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
@@ -699,6 +696,24 @@ void odm_txpowertracking_thermal_meter_init(void *dm_void)
cali_info->thermal_value_iqk = rf->eeprom_thermal;
cali_info->thermal_value_lck = rf->eeprom_thermal;
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
if (dm->support_ic_type == ODM_RTL8822C) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
if (dm->support_ic_type == ODM_RTL8814B) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C];
cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
#endif
if (!cali_info->default_bb_swing_index_flag) {
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
@@ -785,11 +800,20 @@ void odm_txpowertracking_check_ce(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if ((rf->power_track_type & 0xf0) >> 4 != 0) {
if (dm->support_ic_type & ODM_RTL8822C) {
/*halrf_tssi_cck(dm);*/
/*halrf_thermal_cck(dm);*/
return;
}
}
if (!dm->rf_calibrate_info.tm_trigger) {
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
@@ -799,24 +823,48 @@ void odm_txpowertracking_check_ce(void *dm_void)
ODM_RTL8192F))
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW,
(BIT(17) | BIT(16)), 0x03);
else
else if (dm->support_ic_type & ODM_RTL8822C) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else if (dm->support_ic_type & ODM_RTL8814B) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
} else
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD,
RFREGOFFSETMASK, 0x60);
#if (RTL8814B_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8814B) {
ODM_delay_us(300);
odm_txpowertracking_new_callback_thermal_meter(dm);
tssi->thermal_trigger = 1;
}
#endif
dm->rf_calibrate_info.tm_trigger = 1;
return;
}
if (dm->support_ic_type &
(ODM_RTL8822C | ODM_RTL8814B))
return;
odm_txpowertracking_callback_thermal_meter(dm);
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
if (dm->support_ic_type & ODM_RTL8814B)
tssi->thermal_trigger = 0;
#endif
} else
odm_txpowertracking_callback_thermal_meter(dm);
dm->rf_calibrate_info.tm_trigger = 0;
#endif
}
void odm_txpowertracking_direct_ce(void *dm_void)
void
odm_txpowertracking_direct_ce(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
@@ -825,22 +873,41 @@ void odm_txpowertracking_direct_ce(void *dm_void)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if (dm->support_ic_type & ODM_RTL8822C) {
/*halrf_tssi_cck(dm);*/
/*halrf_thermal_cck(dm);*/
return;
}
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
ODM_RTL8192F))
ODM_RTL8192F | ODM_RTL8814B))
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
else
else if (dm->support_ic_type & ODM_RTL8822C) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
odm_txpowertracking_callback_thermal_meter(dm);
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
#endif
} else
odm_txpowertracking_callback_thermal_meter(dm);
#endif
}
void odm_txpowertracking_check_mp(void *dm_void)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)

3
hal/phydm/halrf/halrf_powertracking_ce.h
View File

@@ -109,12 +109,15 @@ struct dm_rf_calibration_struct {
/* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_meter[2];
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;

273
hal/phydm/halrf/halrf_powertracking_iot.c
View File

@@ -515,6 +515,220 @@ u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = {
0x7FF,
};
u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C] = {
0x143, /*0 , -4dB*/
0x14C, /*1 , -3.75dB*/
0x156, /*2 , -3.5dB*/
0x160,
0x16A,
0x175,
0x17F,
0x18B,
0x196,
0x1A2,
0x1AE,
0x1BB,
0x1C8,
0x1D5,
0x1E3,
0x1F1,
0x200,
0x20F,
0x21E,
0x22F,
0x23F,
0x250,
0x261,
0x273,
0x285,
0x298,
0x2AB,
0x2BF,
0x2D6,
0x2E9,
0x2FF,
0x315,
0x32C,
0x344,
0x35C,
0x375,
0x390,
0x3AA,
0x3C5,
0x3E1,
0x402, /*40 , +6dB default*/
0x41C,
0x43B,
0x45A,
0x47C,
0x49C,
0x4BF,
0x4E2,
0x510,
0x52C,
0x553,
0x57B,
0x5A5,
0x5CE,
0x5F9,
0x626,
0x655,
0x683,
0x6B5,
0x6E6,
0x71E,
0x74E,
0x786,
0x7BD,
0x7F9,
0x832,
0x871,
0x8AF,
0x8F2,
0x932,
0x977,
0x9BE,
0xA0E,
0xA52,
0xAA1,
0xAEE,
0xB54,
0xB95,
0xBEB,
0xC43,
0xCA3 /*80 , +16dB*/
};
u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C] = {
0xE4, /*0 , -7dB*/
0xEB, /*1 , -6.75dB*/
0xF2, /*2 , -6.5dB*/
0xF9,
0x100,
0x108,
0x110,
0x118,
0x11F,
0x128,
0x131,
0x13A,
0x143,
0x14C,
0x156,
0x160,
0x16A,
0x175,
0x180,
0x18B,
0x196,
0x1A2,
0x1AE,
0x1BB,
0x1C8,
0x1D5,
0x1E3,
0x1F1,
0x200,
0x20F,
0x21F,
0x22F,
0x23F,
0x250,
0x261,
0x273,
0x286,
0x298,
0x2AB,
0x2BF,
0x2D6, /*40 , +3dB default*/
0x2E9,
0x2FF,
0x315,
0x32C,
0x344,
0x35C,
0x375,
0x390,
0x3AA,
0x3C5,
0x3E1,
0x3FF,
0x41C,
0x43B,
0x45A,
0x47B,
0x49C,
0x4BF,
0x4E2,
0x507,
0x52C,
0x553,
0x57B,
0x5A4,
0x5CE,
0x5F9,
0x626,
0x654,
0x683,
0x6B4,
0x6E6,
0x71B,
0x74E,
0x785,
0x7BD,
0x7F7,
0x832,
0x870,
0x8AF,
0x8F0 /*80 , +13dB*/
};
u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
0x081, /* 0, -12.0dB*/
0x088, /* 1, -11.5dB*/
@@ -570,25 +784,35 @@ get_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_swing;
u32 swing_table_size;
u32 *swing_table;
u8 i = 0;
u32 bb_swing;
u32 swing_table_size;
u32 *swing_table;
u32 table_value;
if (dm->support_ic_type == ODM_RTL8710C) {
bb_swing = odm_get_bb_reg(dm, R_0xcc8, 0x000007ff);
for (i = 0; i < OFDM_03DB_TABLE_SIZE_8710C; i++) {
if (bb_swing == ofdm_swing_table_03DB_8710c[i])
break;
}
}
if (dm->support_ic_type == ODM_RTL8195B) {
bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000);
swing_table = tx_scaling_table_jaguar;
swing_table_size = TXSCALE_TABLE_SIZE;
}
for (i = 0; i < swing_table_size; i++) {
u32 table_value = swing_table[i];
for (i = 0; i < swing_table_size; i++) {
table_value = swing_table[i];
table_value = table_value;
if (bb_swing == table_value)
break;
table_value = table_value;
if (bb_swing == table_value)
break;
}
}
return i;
@@ -599,10 +823,10 @@ get_cck_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_cck_swing;
u8 i = 0;
u32 bb_cck_swing;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E) {
@@ -619,6 +843,16 @@ get_cck_swing_index(
if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
break;
}
} else if (dm->support_ic_type == ODM_RTL8710C) {
bb_cck_swing = odm_get_bb_reg(dm, R_0xab4, 0x7ff);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"bb_cck_swing = 0x%x\n", bb_cck_swing);
for (i = 0; i < CCK_03DB_TABLE_SIZE_8710C; i++) {
if (bb_cck_swing == cck_swing_table_03db_ch1_ch14_8710c[i])
break;
}
}
return i;
@@ -630,7 +864,7 @@ odm_txpowertracking_thermal_meter_init(
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 default_swing_index = get_swing_index(dm);
u8 default_swing_index;
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &dm->rf_table;
@@ -649,11 +883,15 @@ odm_txpowertracking_thermal_meter_init(
if (!cali_info->default_bb_swing_index_flag) {
if (dm->support_ic_type == ODM_RTL8195B) {
default_swing_index = get_swing_index(dm);
cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
cali_info->default_cck_index = 24;
} else if (dm->support_ic_type == ODM_RTL8721D) {
cali_info->default_ofdm_index = 30; /*OFDM: 0dB*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else if (dm->support_ic_type == ODM_RTL8710C) {
cali_info->default_ofdm_index = get_swing_index(dm);
cali_info->default_cck_index = get_cck_swing_index(dm);
}
cali_info->default_bb_swing_index_flag = true;
}
@@ -697,7 +935,8 @@ odm_txpowertracking_check_iot(
if (!dm->rf_calibrate_info.tm_trigger) {
if (dm->support_ic_type == ODM_RTL8195B)
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
else if (dm->support_ic_type == ODM_RTL8721D)
else if (dm->support_ic_type == ODM_RTL8721D ||
dm->support_ic_type == ODM_RTL8710C)
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW,
(BIT(12) | BIT(11)), 0x03);

22
hal/phydm/halrf/halrf_powertracking_iot.h
View File

@@ -37,6 +37,9 @@
#define CCK_TABLE_SIZE_8710B 41
#define CCK_TABLE_SIZE_8192F 41
#define CCK_TABLE_SIZE_8721D 41
#define CCK_TABLE_SIZE_8710C 41
#define CCK_03DB_TABLE_SIZE_8710C 81
#define OFDM_03DB_TABLE_SIZE_8710C 81
#define TXPWR_TRACK_TABLE_SIZE 30
@@ -74,6 +77,9 @@ extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
extern u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D];
extern u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C];
extern u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C];
extern u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C];
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
@@ -143,33 +149,46 @@ struct dm_rf_calibration_struct {
s8 xtal_offset;
s8 xtal_offset_last;
#if (RTL8710B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
#endif
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
#endif
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
#endif
#if (RTL8195B_SUPPORT == 1)
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
#endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
#endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
@@ -182,6 +201,7 @@ struct dm_rf_calibration_struct {
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
#endif
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
@@ -240,12 +260,14 @@ struct dm_rf_calibration_struct {
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
#endif
/* JJ ADD 20161014 */
u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/

62
hal/phydm/halrf/halrf_powertracking_win.c
View File

@@ -598,6 +598,8 @@ odm_txpowertracking_thermal_meter_init(
u8 default_swing_index = get_swing_index(dm);
u8 default_cck_swing_index = get_cck_swing_index(dm);
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
@@ -656,10 +658,28 @@ odm_txpowertracking_thermal_meter_init(
cali_info->txpowertrack_control = true;
#endif
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter;
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
if (dm->support_ic_type == ODM_RTL8822C) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
if (dm->support_ic_type == ODM_RTL8814B) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C];
cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
#endif
if (cali_info->default_bb_swing_index_flag != true) {
/*The index of "0 dB" in SwingTable.*/
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
@@ -818,7 +838,12 @@ odm_txpowertracking_direct_call(
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
odm_txpowertracking_callback_thermal_meter(adapter);
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
#endif
} else
odm_txpowertracking_callback_thermal_meter(adapter);
}
void
@@ -830,6 +855,7 @@ odm_txpowertracking_thermal_meter_check(
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &(pHalData->DM_OutSrc);
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
@@ -840,20 +866,42 @@ odm_txpowertracking_thermal_meter_check(
if (!tm_trigger) {
if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter)
||IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
|| IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter))/* JJ ADD 20161014 */
|| IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter)
)/* JJ ADD 20161014 */
PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
else
else if (IS_HARDWARE_TYPE_8822C(adapter)) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else if (IS_HARDWARE_TYPE_8814B(adapter)) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
} else
PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
if (dm->support_ic_type & ODM_RTL8814B) {
ODM_delay_us(300);
odm_txpowertracking_direct_call(adapter);
tssi->thermal_trigger = 1;
}
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
tm_trigger = 1;
return;
} else if (IS_HARDWARE_TYPE_8822C(adapter) || IS_HARDWARE_TYPE_8814B(adapter))
return;
else {
} else {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
odm_txpowertracking_direct_call(adapter);
if (dm->support_ic_type & ODM_RTL8814B)
tssi->thermal_trigger = 0;
tm_trigger = 0;
}
}

7
hal/phydm/halrf/halrf_powertracking_win.h
View File

@@ -130,12 +130,15 @@ struct dm_rf_calibration_struct {
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
u8 thermal_value_dpk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;

199
hal/phydm/halrf/halrf_psd.c
View File

@@ -20,15 +20,13 @@
#include "mp_precomp.h"
#include "phydm_precomp.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
u64 _sqrt(u64 x)
{
u64 i = 0;
u64 j = x / 2 + 1;
u64 j = (x >> 1) + 1;
while (i <= j) {
u64 mid = (i + j) / 2;
u64 mid = (i + j) >> 1;
u64 sq = mid * mid;
@@ -49,7 +47,7 @@ u32 halrf_get_psd_data(
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time;
u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time = 0;
#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
@@ -128,10 +126,10 @@ void halrf_psd(
mode = average >> 16;
if (mode == 1)
average_tmp = average & 0xffff;
else if (mode == 2)
if (mode == 2)
average_tmp = 1;
else
average_tmp = average & 0xffff;
if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
psd_reg = R_0x910;
@@ -193,7 +191,7 @@ void halrf_psd(
/*dbg_print("\n");*/
#endif
data_tatal = ((data_tatal * 100) / average_tmp);
data_tatal = phydm_division64((data_tatal * 100), average_tmp);
psd->psd_data[j] = (u32)_sqrt(data_tatal);
i++;
@@ -216,22 +214,75 @@ void halrf_psd(
odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org);
}
void backup_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
{
u32 i ;
for (i = 0; i < counter; i++)
bb_backup[i] = odm_get_bb_reg(dm, backup_bb_reg[i], MASKDWORD);
}
void restore_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
{
u32 i ;
for (i = 0; i < counter; i++)
odm_set_bb_reg(dm, backup_bb_reg[i], MASKDWORD, bb_backup[i]);
}
void _halrf_psd_iqk_init(struct dm_struct *dm)
{
odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80);
odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3);
odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1);
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00040008);
if (dm->support_ic_type & ODM_RTL8198F)
odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00000000);
if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
odm_set_bb_reg(dm, 0x1b24, MASKDWORD, 0x00030000);
odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x00000000);
odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x00180018);
odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x20000000);
/*odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000);*/
/*odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000);*/
}
odm_set_bb_reg(dm, 0x1b1c, 0xfff, 0xd21);
odm_set_bb_reg(dm, 0x1b1c, 0xfff00000, 0x821);
odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f);
}
u32 halrf_get_iqk_psd_data(
struct dm_struct *dm,
u32 point)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time;
u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time = 0;
#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
delay_time = 0;
if (dm->support_ic_type & ODM_RTL8822C)
delay_time = 1000;
else
delay_time = 0;
}
#endif
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if (dm->support_interface == ODM_ITRF_PCIE) {
delay_time = 150;
if (dm->support_ic_type & ODM_RTL8822C)
delay_time = 1000;
else
delay_time = 150;
}
#endif
psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD);
@@ -244,24 +295,44 @@ u32 halrf_get_iqk_psd_data(
odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point);
odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x1);
odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x1);
odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x0);
for (i = 0; i < delay_time; i++)
ODM_delay_us(1);
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001a0001);
else
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = (psd_val1 & 0x07FF0000) >> 16;
psd_val1 = (psd_val1 & 0x001f0000) >> 16;
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001b0001);
else
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val = (psd_val1 << 21) + (psd_val2 >> 11);
psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
} else {
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = (psd_val1 & 0x07FF0000) >> 16;
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val = (psd_val1 << 21) + (psd_val2 >> 11);
}
return psd_val;
}
@@ -277,22 +348,42 @@ void halrf_iqk_psd(
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 i = 0, j = 0, k = 0;
u32 psd_reg, avg_org, point_temp, average_tmp, mode;
u32 psd_reg, avg_org, point_temp, average_tmp = 32, mode, reg_tmp = 5;
u64 data_tatal = 0, data_temp[64] = {0};
s32 point_8814B;
s32 s_point_tmp;
psd->buf_size = 256;
mode = average >> 16;
if (mode == 1)
average_tmp = average & 0xffff;
else if (mode == 2) {
if (dm->support_ic_type & ODM_RTL8814B)
average_tmp = average & 0xffff;
else
if (mode == 2) {
if (dm->support_ic_type & ODM_RTL8822C)
average_tmp = 1;
else {
reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
if (reg_tmp == 0)
average_tmp = 1;
else if (reg_tmp == 3)
average_tmp = 8;
else if (reg_tmp == 4)
average_tmp = 16;
else if (reg_tmp == 5)
average_tmp = 32;
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
}
} else {
reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
if (reg_tmp == 0)
average_tmp = 1;
else if (reg_tmp == 3)
average_tmp = 8;
else if (reg_tmp == 4)
average_tmp = 16;
else if (reg_tmp == 5)
average_tmp = 32;
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
}
#if 0
DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n",
point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
@@ -311,8 +402,8 @@ void halrf_iqk_psd(
{
if (dm->support_ic_type & ODM_RTL8814B)
{
point_8814B = i -point -1;
point_temp = point_8814B & 0xfff;
s_point_tmp = i - point - 1;
point_temp = s_point_tmp & 0xfff;
}
else
point_temp = i;
@@ -331,15 +422,16 @@ void halrf_iqk_psd(
#endif
}
/*data_tatal = ((data_tatal * 100) / average_tmp);*/
/*psd->psd_data[j] = (u32)_sqrt(data_tatal);*/
psd->psd_data[j] = (u32)((data_tatal * 10) / average_tmp);
data_tatal = phydm_division64((data_tatal * 10), average_tmp);
psd->psd_data[j] = (u32)data_tatal;
i++;
j++;
}
if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G))
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp);
#if 0
DbgPrint("\n [iqk psd]psd result:\n");
@@ -354,49 +446,61 @@ void halrf_iqk_psd(
}
enum rt_status
u32
halrf_psd_init(
struct dm_struct *dm)
void *dm_void)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
#if 0
u32 bb_backup[12];
u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18,
0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34,
0x1bd4, 0x1bfc};
#endif
if (psd->psd_progress) {
ret_status = RT_STATUS_PENDING;
} else {
psd->psd_progress = 1;
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B))
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) {
/*backup_bb_register(dm, bb_backup, backup_bb_reg, 12);*/
_halrf_psd_iqk_init(dm);
halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
else
/*restore_bb_register(dm, bb_backup, backup_bb_reg, 12);*/
} else
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
psd->psd_progress = 0;
}
return ret_status;
}
enum rt_status
u32
halrf_psd_query(
struct dm_struct *dm,
void *dm_void,
u32 *outbuf,
u32 buf_size)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
if (psd->psd_progress)
ret_status = RT_STATUS_PENDING;
else
PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
odm_move_memory(dm, outbuf, psd->psd_data,
sizeof(u32) * psd->buf_size);
return ret_status;
}
enum rt_status
u32
halrf_psd_init_query(
struct dm_struct *dm,
void *dm_void,
u32 *outbuf,
u32 point,
u32 start_point,
@@ -405,6 +509,7 @@ halrf_psd_init_query(
u32 buf_size)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
@@ -418,11 +523,9 @@ halrf_psd_init_query(
} else {
psd->psd_progress = 1;
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
odm_move_memory(dm, outbuf, psd->psd_data, 0x400);
psd->psd_progress = 0;
}
return ret_status;
}
#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/

14
hal/phydm/halrf/halrf_psd.h
View File

@@ -16,7 +16,6 @@
#ifndef __HALRF_PSD_H__
#define __HALRF_PSD_H__
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
struct _halrf_psd_data {
u32 point;
@@ -28,19 +27,19 @@ struct _halrf_psd_data {
u32 psd_progress;
};
enum rt_status
u32
halrf_psd_init(
struct dm_struct *dm);
void *dm_void);
enum rt_status
u32
halrf_psd_query(
struct dm_struct *dm,
void *dm_void,
u32 *outbuf,
u32 buf_size);
enum rt_status
u32
halrf_psd_init_query(
struct dm_struct *dm,
void *dm_void,
u32 *outbuf,
u32 point,
u32 start_point,
@@ -48,5 +47,4 @@ halrf_psd_init_query(
u32 average,
u32 buf_size);
#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/
#endif /*#__HALRF_PSD_H__*/

19934
hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.c Normal file
View File

File diff suppressed because it is too large Load Diff

466
hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.h Normal file
View File

@@ -0,0 +1,466 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*Image2HeaderVersion: R3 1.5.10*/
#if (RTL8822B_SUPPORT == 1)
#ifndef __INC_MP_RF_HW_IMG_8822B_H
#define __INC_MP_RF_HW_IMG_8822B_H
/* Please add following compiler flags definition (#define CONFIG_XXX_DRV_DIS)
* into driver source code to reduce code size if necessary.
* #define CONFIG_8822B_DRV_DIS
* #define CONFIG_8822B_TYPE0_DRV_DIS
* #define CONFIG_8822B_TYPE1_DRV_DIS
* #define CONFIG_8822B_TYPE10_DRV_DIS
* #define CONFIG_8822B_TYPE11_DRV_DIS
* #define CONFIG_8822B_TYPE12_DRV_DIS
* #define CONFIG_8822B_TYPE13_DRV_DIS
* #define CONFIG_8822B_TYPE14_DRV_DIS
* #define CONFIG_8822B_TYPE15_DRV_DIS
* #define CONFIG_8822B_TYPE16_DRV_DIS
* #define CONFIG_8822B_TYPE17_DRV_DIS
* #define CONFIG_8822B_TYPE18_DRV_DIS
* #define CONFIG_8822B_TYPE19_DRV_DIS
* #define CONFIG_8822B_TYPE2_DRV_DIS
* #define CONFIG_8822B_TYPE3_TYPE5_DRV_DIS
* #define CONFIG_8822B_TYPE4_DRV_DIS
* #define CONFIG_8822B_TYPE6_DRV_DIS
* #define CONFIG_8822B_TYPE7_DRV_DIS
* #define CONFIG_8822B_TYPE8_DRV_DIS
* #define CONFIG_8822B_TYPE9_DRV_DIS
* #define CONFIG_8822B_TYPE3_DRV_DIS
* #define CONFIG_8822B_TYPE5_DRV_DIS
*/
#define CONFIG_8822B
#ifdef CONFIG_8822B_DRV_DIS
#undef CONFIG_8822B
#endif
#define CONFIG_8822B_TYPE0
#ifdef CONFIG_8822B_TYPE0_DRV_DIS
#undef CONFIG_8822B_TYPE0
#endif
#define CONFIG_8822B_TYPE1
#ifdef CONFIG_8822B_TYPE1_DRV_DIS
#undef CONFIG_8822B_TYPE1
#endif
#define CONFIG_8822B_TYPE10
#ifdef CONFIG_8822B_TYPE10_DRV_DIS
#undef CONFIG_8822B_TYPE10
#endif
#define CONFIG_8822B_TYPE11
#ifdef CONFIG_8822B_TYPE11_DRV_DIS
#undef CONFIG_8822B_TYPE11
#endif
#define CONFIG_8822B_TYPE12
#ifdef CONFIG_8822B_TYPE12_DRV_DIS
#undef CONFIG_8822B_TYPE12
#endif
#define CONFIG_8822B_TYPE13
#ifdef CONFIG_8822B_TYPE13_DRV_DIS
#undef CONFIG_8822B_TYPE13
#endif
#define CONFIG_8822B_TYPE14
#ifdef CONFIG_8822B_TYPE14_DRV_DIS
#undef CONFIG_8822B_TYPE14
#endif
#define CONFIG_8822B_TYPE15
#ifdef CONFIG_8822B_TYPE15_DRV_DIS
#undef CONFIG_8822B_TYPE15
#endif
#define CONFIG_8822B_TYPE16
#ifdef CONFIG_8822B_TYPE16_DRV_DIS
#undef CONFIG_8822B_TYPE16
#endif
#define CONFIG_8822B_TYPE17
#ifdef CONFIG_8822B_TYPE17_DRV_DIS
#undef CONFIG_8822B_TYPE17
#endif
#define CONFIG_8822B_TYPE18
#ifdef CONFIG_8822B_TYPE18_DRV_DIS
#undef CONFIG_8822B_TYPE18
#endif
#define CONFIG_8822B_TYPE19
#ifdef CONFIG_8822B_TYPE19_DRV_DIS
#undef CONFIG_8822B_TYPE19
#endif
#define CONFIG_8822B_TYPE2
#ifdef CONFIG_8822B_TYPE2_DRV_DIS
#undef CONFIG_8822B_TYPE2
#endif
#define CONFIG_8822B_TYPE3_TYPE5
#ifdef CONFIG_8822B_TYPE3_TYPE5_DRV_DIS
#undef CONFIG_8822B_TYPE3_TYPE5
#endif
#define CONFIG_8822B_TYPE4
#ifdef CONFIG_8822B_TYPE4_DRV_DIS
#undef CONFIG_8822B_TYPE4
#endif
#define CONFIG_8822B_TYPE6
#ifdef CONFIG_8822B_TYPE6_DRV_DIS
#undef CONFIG_8822B_TYPE6
#endif
#define CONFIG_8822B_TYPE7
#ifdef CONFIG_8822B_TYPE7_DRV_DIS
#undef CONFIG_8822B_TYPE7
#endif
#define CONFIG_8822B_TYPE8
#ifdef CONFIG_8822B_TYPE8_DRV_DIS
#undef CONFIG_8822B_TYPE8
#endif
#define CONFIG_8822B_TYPE9
#ifdef CONFIG_8822B_TYPE9_DRV_DIS
#undef CONFIG_8822B_TYPE9
#endif
#define CONFIG_8822B_TYPE3
#ifdef CONFIG_8822B_TYPE3_DRV_DIS
#undef CONFIG_8822B_TYPE3
#endif
#define CONFIG_8822B_TYPE5
#ifdef CONFIG_8822B_TYPE5_DRV_DIS
#undef CONFIG_8822B_TYPE5
#endif
/******************************************************************************
* radioa.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_radioa(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_radioa(void);
/******************************************************************************
* radiob.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_radiob(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_radiob(void);
/******************************************************************************
* txpowertrack.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack(void);
/******************************************************************************
* txpowertrack_type0.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type0(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type0(void);
/******************************************************************************
* txpowertrack_type1.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type1(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type1(void);
/******************************************************************************
* txpowertrack_type10.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type10(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type10(void);
/******************************************************************************
* txpowertrack_type11.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type11(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type11(void);
/******************************************************************************
* txpowertrack_type12.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type12(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type12(void);
/******************************************************************************
* txpowertrack_type13.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type13(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type13(void);
/******************************************************************************
* txpowertrack_type14.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type14(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type14(void);
/******************************************************************************
* txpowertrack_type15.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type15(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type15(void);
/******************************************************************************
* txpowertrack_type16.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type16(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type16(void);
/******************************************************************************
* txpowertrack_type17.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type17(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type17(void);
/******************************************************************************
* txpowertrack_type18.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type18(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type18(void);
/******************************************************************************
* txpowertrack_type19.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type19(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type19(void);
/******************************************************************************
* txpowertrack_type2.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type2(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type2(void);
/******************************************************************************
* txpowertrack_type3_type5.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type3_type5(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type3_type5(void);
/******************************************************************************
* txpowertrack_type4.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type4(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type4(void);
/******************************************************************************
* txpowertrack_type6.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type6(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type6(void);
/******************************************************************************
* txpowertrack_type7.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type7(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type7(void);
/******************************************************************************
* txpowertrack_type8.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type8(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type8(void);
/******************************************************************************
* txpowertrack_type9.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type9(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type9(void);
/******************************************************************************
* txpwr_lmt.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt(void);
/******************************************************************************
* txpwr_lmt_type12.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type12(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type12(void);
/******************************************************************************
* txpwr_lmt_type15.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type15(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type15(void);
/******************************************************************************
* txpwr_lmt_type16.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type16(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type16(void);
/******************************************************************************
* txpwr_lmt_type17.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type17(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type17(void);
/******************************************************************************
* txpwr_lmt_type18.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type18(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type18(void);
/******************************************************************************
* txpwr_lmt_type19.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type19(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type19(void);
/******************************************************************************
* txpwr_lmt_type2.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type2(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type2(void);
/******************************************************************************
* txpwr_lmt_type3.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type3(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type3(void);
/******************************************************************************
* txpwr_lmt_type4.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type4(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type4(void);
/******************************************************************************
* txpwr_lmt_type5.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type5(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type5(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

21
hal/phydm/halrf/rtl8822b/halrf_8822b.c
View File

@@ -424,18 +424,17 @@ void get_delta_swing_table_8822b(void *dm_void,
void aac_check_8822b(struct dm_struct *dm)
{
struct _hal_rf_ *rf = &dm->rf_table;
u32 temp;
static boolean firstrun = true;
if (firstrun) {
if (!rf->aac_checked) {
RF_DBG(dm, DBG_RF_LCK, "[LCK]AAC check for 8822b\n");
temp = odm_get_rf_reg(dm, RF_PATH_A, 0xc9, 0xf8);
if (temp < 4 || temp > 7) {
odm_set_rf_reg(dm, RF_PATH_A, 0xca, BIT(19), 0x0);
odm_set_rf_reg(dm, RF_PATH_A, 0xb2, 0x7c000, 0x6);
}
firstrun = false;
rf->aac_checked = true;
}
}
@@ -538,16 +537,18 @@ void phy_set_rf_path_switch_8822b(void *adapter, boolean is_main)
odm_set_bb_reg(dm, R_0x1704, MASKDWORD, 0x0000ff00);
odm_set_bb_reg(dm, R_0x1700, MASKDWORD, 0xc00f0038);
if (is_main) {
if (dm->rfe_type != 0x12) {
if (is_main) {
#if 0
/*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x2); WiFi*/
/*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x2); WiFi*/
#endif
odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x2); /*WiFi*/
} else {
odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x2); /*WiFi*/
} else {
#if 0
/*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x1); BT*/
/*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x1); BT*/
#endif
odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x1); /*BT*/
odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x1); /*BT*/
}
}
}

305
hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.c
View File

@@ -80,6 +80,59 @@ void do_iqk_8822b(void *dm_void, u8 delta_thermal_index, u8 thermal_value,
}
#endif
u32 _iqk_ltec_read_8822b(struct dm_struct *dm, u16 reg_addr)
{
u32 j = 0;
/*wait for ready bit before access 0x1700*/
odm_write_4byte(dm, 0x1700, 0x800f0000 | reg_addr);
do {
j++;
} while (((odm_read_1byte(dm, 0x1703) & BIT(5)) == 0) && (j < 30000));
return odm_read_4byte(dm, 0x1708); /*get read data*/
}
void _iqk_ltec_write_8822b(struct dm_struct *dm, u16 reg_addr, u32 bit_mask,
u32 reg_value)
{
u32 val, i = 0, j = 0, bitpos = 0;
if (bit_mask == 0x0)
return;
if (bit_mask == 0xffffffff) {
odm_write_4byte(dm, 0x1704, reg_value); /*put write data*/
/*wait for ready bit before access 0x1700*/
do {
j++;
} while (((odm_read_1byte(dm, 0x1703) & BIT(5)) == 0) && (j < 30000));
odm_write_4byte(dm, 0x1700, 0xc00f0000 | reg_addr);
} else {
for (i = 0; i <= 31; i++) {
if (((bit_mask >> i) & 0x1) == 0x1) {
bitpos = i;
break;
}
}
/*read back register value before write*/
val = _iqk_ltec_read_8822b(dm, reg_addr);
val = (val & (~bit_mask)) | (reg_value << bitpos);
odm_write_4byte(dm, 0x1704, val); /*put write data*/
/*wait for ready bit before access 0x1700*/
do {
j++;
} while (((odm_read_1byte(dm, 0x1703) & BIT(5)) == 0) && (j < 30000));
odm_write_4byte(dm, 0x1700, 0xc00f0000 | reg_addr);
}
}
void _iqk_rf_set_check_8822b(struct dm_struct *dm, u8 path, u16 add, u32 data)
{
u32 i;
@@ -103,6 +156,19 @@ void _iqk_rf0xb0_workaround_8822b(struct dm_struct *dm)
odm_set_rf_reg(dm, (enum rf_path)0x0, RF_0xb8, MASK20BITS, 0x80a00);
}
void _iqk_0xc94_workaround_8822b(struct dm_struct *dm)
{
if (odm_get_bb_reg(dm, R_0xc94, BIT(0)) == 0x1) {
odm_set_bb_reg(dm, R_0xc94, BIT(0), 0x0);
odm_set_bb_reg(dm, R_0xc94, BIT(0), 0x1);
}
if (odm_get_bb_reg(dm, R_0xe94, BIT(0)) == 0x1) {
odm_set_bb_reg(dm, R_0xe94, BIT(0), 0x0);
odm_set_bb_reg(dm, R_0xe94, BIT(0), 0x1);
}
}
void _iqk_fill_iqk_report_8822b(void *dm_void, u8 ch)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
@@ -280,12 +346,6 @@ void _iqk_afe_setting_8822b(struct dm_struct *dm, boolean do_iqk)
odm_write_4byte(dm, 0xc60, 0x70038040);
odm_write_4byte(dm, 0xe60, 0x50000000);
odm_write_4byte(dm, 0xe60, 0x70038040);
odm_write_4byte(dm, 0xc58, 0xd8020402);
odm_write_4byte(dm, 0xc5c, 0xde000120);
odm_write_4byte(dm, 0xc6c, 0x0000122a);
odm_write_4byte(dm, 0xe58, 0xd8020402);
odm_write_4byte(dm, 0xe5c, 0xde000120);
odm_write_4byte(dm, 0xe6c, 0x0000122a);
#if 0
/* RF_DBG(dm, DBG_RF_IQK, "[IQK]AFE setting for Normal mode!!!!\n"); */
#endif
@@ -801,10 +861,12 @@ _iqk_rxk_gsearch_fail_8822b(struct dm_struct *dm, u8 path, u8 step)
IQK_CMD = 0xf8000208 | (1 << (path + 4));
RF_DBG(dm, DBG_RF_IQK, "[IQK]S%d GS%d_Trigger = 0x%x\n", path,
step, IQK_CMD);
_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
odm_write_4byte(dm, 0x1b00, IQK_CMD);
odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
ODM_delay_ms(GS_delay_8822B);
fail = _iqk_check_cal_8822b(dm, path, 0x1);
_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);
} else if (step == RXIQK2) {
for (idx = 0; idx < 4; idx++) {
if (iqk->tmp1bcc == IQMUX[idx])
@@ -816,10 +878,13 @@ _iqk_rxk_gsearch_fail_8822b(struct dm_struct *dm, u8 path, u8 step)
IQK_CMD = 0xf8000308 | (1 << (path + 4));
RF_DBG(dm, DBG_RF_IQK, "[IQK]S%d GS%d_Trigger = 0x%x\n", path,
step, IQK_CMD);
_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
odm_write_4byte(dm, 0x1b00, IQK_CMD);
odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
ODM_delay_ms(GS_delay_8822B);
fail = _iqk_check_cal_8822b(dm, path, 0x1);
_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);
rf_reg0 = odm_get_rf_reg(dm, (enum rf_path)path,
RF_0x0, MASK20BITS);
@@ -879,12 +944,16 @@ _lok_one_shot_8822b(void *dm_void, u8 path)
RF_DBG(dm, DBG_RF_IQK, "[IQK]==========S%d LOK ==========\n", path);
IQK_CMD = 0xf8000008 | (1 << (4 + path));
RF_DBG(dm, DBG_RF_IQK, "[IQK]LOK_Trigger = 0x%x\n", IQK_CMD);
_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
odm_write_4byte(dm, 0x1b00, IQK_CMD);
odm_write_4byte(dm, 0x1b00, IQK_CMD + 1);
/*LOK: CMD ID = 0 {0xf8000018, 0xf8000028}*/
/*LOK: CMD ID = 0 {0xf8000019, 0xf8000029}*/
ODM_delay_ms(LOK_delay_8822B);
LOK_notready = _iqk_check_cal_8822b(dm, path, 0x0);
_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);
if (!LOK_notready)
_iqk_backup_iqk_8822b(dm, 0x1, path);
if (DBG_RF_IQK) {
@@ -951,10 +1020,12 @@ _iqk_one_shot_8822b(void *dm_void, u8 path, u8 idx)
((iqk->lna_idx & 0x7) << 10);
odm_write_4byte(dm, 0x1b24, tmp);
}
_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
odm_write_4byte(dm, 0x1b00, IQK_CMD);
odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
ODM_delay_ms(WBIQK_delay_8822B);
fail = _iqk_check_cal_8822b(dm, path, 0x1);
_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);
if (dm->debug_components & DBG_RF_IQK) {
odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1);
@@ -1722,9 +1793,12 @@ void _phy_iq_calibrate_8822b(struct dm_struct *dm, boolean reset,
u32 MAC_backup[MAC_REG_NUM_8822B], BB_backup[BB_REG_NUM_8822B];
u32 RF_backup[RF_REG_NUM_8822B][SS_8822B];
u32 backup_mac_reg[MAC_REG_NUM_8822B] = {0x520, 0x550};
u32 backup_bb_reg[BB_REG_NUM_8822B] = {
0x808, 0x90c, 0xc00, 0xcb0, 0xcb4, 0xcbc, 0xe00, 0xeb0, 0xeb4,
0xebc, 0x1990, 0x9a4, 0xa04, 0xb00, 0x838};
u32 backup_bb_reg[BB_REG_NUM_8822B] = {0x808, 0x90c, 0xc00, 0xcb0,
0xcb4, 0xcbc, 0xe00, 0xeb0,
0xeb4, 0xebc, 0x1990, 0x9a4,
0xa04, 0xb00, 0x838, 0xc58,
0xc5c, 0xc6c, 0xe58, 0xe5c,
0xe6c};
u32 backup_rf_reg[RF_REG_NUM_8822B] = {0xdf, 0x8f, 0x65, 0x0, 0x1};
boolean is_mp = false;
@@ -1751,6 +1825,7 @@ void _phy_iq_calibrate_8822b(struct dm_struct *dm, boolean reset,
dm->rf_calibrate_info.iqk_step = 1;
iqk->rxiqk_step = 1;
iqk->tmp_gntwl = _iqk_ltec_read_8822b(dm, 0x38);
_iqk_backup_iqk_8822b(dm, 0x0, 0x0);
_iqk_backup_mac_bb_8822b(dm, MAC_backup, BB_backup,
backup_mac_reg, backup_bb_reg);
@@ -1831,6 +1906,7 @@ void phy_iq_calibrate_8822b(void *dm_void, boolean clear, boolean segment_iqk)
_iq_calibrate_8822b_init(dm);
_phy_iq_calibrate_8822b(dm, clear, segment_iqk);
}
_iqk_0xc94_workaround_8822b(dm);
_iqk_fail_count_8822b(dm);
if (*dm->mp_mode)
halrf_iqk_hwtx_check(dm, false);
@@ -1845,9 +1921,12 @@ void _phy_imr_measure_8822b(struct dm_struct *dm)
u32 MAC_backup[MAC_REG_NUM_8822B], BB_backup[BB_REG_NUM_8822B];
u32 RF_backup[RF_REG_NUM_8822B][SS_8822B];
u32 backup_mac_reg[MAC_REG_NUM_8822B] = {0x520, 0x550};
u32 backup_bb_reg[BB_REG_NUM_8822B] = {
0x808, 0x90c, 0xc00, 0xcb0, 0xcb4, 0xcbc, 0xe00, 0xeb0, 0xeb4,
0xebc, 0x1990, 0x9a4, 0xa04, 0xb00};
u32 backup_bb_reg[BB_REG_NUM_8822B] = {0x808, 0x90c, 0xc00, 0xcb0,
0xcb4, 0xcbc, 0xe00, 0xeb0,
0xeb4, 0xebc, 0x1990, 0x9a4,
0xa04, 0xb00, 0x838, 0xc58,
0xc5c, 0xc6c, 0xe58, 0xe5c,
0xe6c};
u32 backup_rf_reg[RF_REG_NUM_8822B] = {0xdf, 0x8f, 0x65, 0x0, 0x1};
_iqk_backup_iqk_8822b(dm, 0x0, 0x0);
@@ -1878,4 +1957,206 @@ void do_imr_test_8822b(void *dm_void)
RF_DBG(dm, DBG_RF_IQK,
"[IQK] **********End IMR Test *******************\n");
}
void phy_get_iqk_cfir_8822b(void *dm_void, u8 idx, u8 path, boolean debug)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 i, ch;
u32 tmp;
u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
if (debug)
ch = 2;
else
ch = 0;
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0xf8000008 | path << 1);
if (idx == 0)
odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x3);
else
odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x1);
odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10);
for (i = 0; i < 8; i++) {
odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
iqk_info->iqk_cfir_real[ch][path][idx][i] =
(tmp & 0x0fff0000) >> 16;
iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0xfff;
}
odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x0);
}
void phy_iqk_dbg_cfir_backup_8822b(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 path, idx, i;
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");
for (path = 0; path < 2; path++)
for (idx = 0; idx < 2; idx++)
phydm_get_iqk_cfir(dm, idx, path, true);
for (path = 0; path < 2; path++) {
for (idx = 0; idx < 2; idx++) {
for (i = 0; i < 8; i++) {
RF_DBG(dm, DBG_RF_IQK,
"[IQK]%-7s %-3s CFIR_real: %-2d: 0x%x\n",
(path == 0) ? "PATH A" : "PATH B",
(idx == 0) ? "TX" : "RX", i,
iqk_info->iqk_cfir_real[2][path][idx][i])
;
}
for (i = 0; i < 8; i++) {
RF_DBG(dm, DBG_RF_IQK,
"[IQK]%-7s %-3s CFIR_img:%-2d: 0x%x\n",
(path == 0) ? "PATH A" : "PATH B",
(idx == 0) ? "TX" : "RX", i,
iqk_info->iqk_cfir_imag[2][path][idx][i])
;
}
}
}
}
void phy_iqk_dbg_cfir_backup_update_8822b(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk = &dm->IQK_info;
u8 i, path, idx;
u32 bmask13_12 = BIT(13) | BIT(12);
u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
u32 data;
if (iqk->iqk_cfir_real[2][0][0][0] == 0) {
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
return;
}
for (path = 0; path < 2; path++) {
for (idx = 0; idx < 2; idx++) {
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
0xf8000008 | path << 1);
odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7);
odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000);
odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000);
odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000);
if (idx == 0)
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3);
else
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1);
odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10);
for (i = 0; i < 8; i++) {
data = ((0xc0000000 >> idx) + 0x3) + (i * 4) +
(iqk->iqk_cfir_real[2][path][idx][i]
<< 9);
odm_write_4byte(dm, 0x1bd8, data);
data = ((0xc0000000 >> idx) + 0x1) + (i * 4) +
(iqk->iqk_cfir_imag[2][path][idx][i]
<< 9);
odm_write_4byte(dm, 0x1bd8, data);
#if 0
/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[2][path][idx][i]);*/
/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[2][path][idx][i]);*/
#endif
}
}
odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0);
}
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "update new CFIR");
}
void phy_iqk_dbg_cfir_reload_8822b(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk = &dm->IQK_info;
u8 i, path, idx;
u32 bmask13_12 = BIT(13) | BIT(12);
u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
u32 data;
if (iqk->iqk_cfir_real[0][0][0][0] == 0) {
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
return;
}
for (path = 0; path < 2; path++) {
for (idx = 0; idx < 2; idx++) {
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
0xf8000008 | path << 1);
odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7);
odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000);
odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000);
odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000);
if (idx == 0)
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3);
else
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1);
odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10);
for (i = 0; i < 8; i++) {
#if 0
/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[0][path][idx][i]);*/
/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[0][path][idx][i]);*/
#endif
data = ((0xc0000000 >> idx) + 0x3) + (i * 4) +
(iqk->iqk_cfir_real[0][path][idx][i]
<< 9);
odm_write_4byte(dm, 0x1bd8, data);
data = ((0xc0000000 >> idx) + 0x1) + (i * 4) +
(iqk->iqk_cfir_imag[0][path][idx][i]
<< 9);
odm_write_4byte(dm, 0x1bd8, data);
}
}
odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0);
}
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "write CFIR with default value");
}
void phy_iqk_dbg_cfir_write_8822b(void *dm_void, u8 type, u32 path, u32 idx,
u32 i, u32 data)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
if (type == 0)
iqk_info->iqk_cfir_real[2][path][idx][i] = (u16)data;
else
iqk_info->iqk_cfir_imag[2][path][idx][i] = (u16)data;
}
void phy_iqk_dbg_cfir_backup_show_8822b(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 path, idx, i;
RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");
for (path = 0; path < 2; path++) {
for (idx = 0; idx < 2; idx++) {
for (i = 0; i < 8; i++) {
RF_DBG(dm, DBG_RF_IQK,
"[IQK]%-10s %-3s CFIR_real:%-2d: 0x%x\n",
(path == 0) ? "PATH A" : "PATH B",
(idx == 0) ? "TX" : "RX", i,
iqk_info->iqk_cfir_real[2][path][idx][i])
;
}
for (i = 0; i < 8; i++) {
RF_DBG(dm, DBG_RF_IQK,
"[IQK]%-10s %-3s CFIR_img:%-2d: 0x%x\n",
(path == 0) ? "PATH A" : "PATH B",
(idx == 0) ? "TX" : "RX", i,
iqk_info->iqk_cfir_imag[2][path][idx][i])
;
}
}
}
}
#endif

17
hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.h
View File

@@ -29,7 +29,7 @@
#if (RTL8822B_SUPPORT == 1)
/*@--------------------------Define Parameters-------------------------------*/
#define MAC_REG_NUM_8822B 2
#define BB_REG_NUM_8822B 15
#define BB_REG_NUM_8822B 21
#define RF_REG_NUM_8822B 5
#define LOK_delay_8822B 2
#define GS_delay_8822B 2
@@ -51,6 +51,21 @@ void phy_iq_calibrate_8822b(void *dm_void, boolean clear, boolean segment_iqk);
void do_imr_test_8822b(void *dm_void);
void phy_get_iqk_cfir_8822b(void *dm_void, u8 idx, u8 path, boolean debug);
void phy_iqk_dbg_cfir_backup_8822b(void *dm_void);
void phy_iqk_dbg_cfir_backup_update_8822b(void *dm_void);
void phy_iqk_dbg_cfir_reload_8822b(void *dm_void);
void phy_iqk_dbg_cfir_write_8822b(void *dm_void, u8 type, u32 path, u32 idx, u32 i, u32 data);
void phy_iqk_dbg_cfir_backup_show_8822b(void *dm_void);
#else /* (RTL8822B_SUPPORT == 0)*/
#define phy_iq_calibrate_8822b(_pdm_void, clear, segment_iqk)

26
hal/phydm/halrf/rtl8822b/version_rtl8822b_rf.h Normal file
View File

@@ -0,0 +1,26 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*RTL8822B RF Parameters*/
#define RF_RELEASE_VERSION_8822B 1