RinCat/RTL88x2BU-Linux-Driver
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Update to 5.8.7.1

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This commit is contained in:
Rin Cat
2020-08-02 05:12:24 -04:00
parent 314b662331
commit e3b09b28f7
449 changed files with 106089 additions and 83748 deletions
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6
hal/halmac/halmac_2_platform.h
View File

@@ -73,6 +73,12 @@
*/
#define HALMAC_MSG_LEVEL HALMAC_MSG_LEVEL_TRACE
#ifdef DBG_IO
#define HALMAC_DBG_MONITOR_IO 1
#else
#define HALMAC_DBG_MONITOR_IO 0
#endif /*DBG_IO*/
/*[Driver] define the Rx FIFO expanding mode packet size unit for 8821C and 8822B */
/*Should be 8 Byte alignment*/
#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE 80 /*Bytes*/

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

205
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -460,6 +460,15 @@ static enum halmac_ret_status
chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
static enum halmac_ret_status
pinmux_switch_8822b(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func);
static enum halmac_ret_status
pinmux_record_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val);
/**
* pinmux_get_func_8822b() -get current gpio status
* @adapter : the adapter of halmac
@@ -559,12 +568,12 @@ pinmux_set_func_8822b(struct halmac_adapter *adapter,
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_switch_88xx(adapter, list, list_size, gpio_id,
gpio_func);
status = pinmux_switch_8822b(adapter, list, list_size, gpio_id,
gpio_func);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_record_88xx(adapter, gpio_func, 1);
status = pinmux_record_8822b(adapter, gpio_func, 1);
if (status != HALMAC_RET_SUCCESS)
return status;
@@ -646,6 +655,13 @@ pinmux_free_func_8822b(struct halmac_adapter *adapter,
case HALMAC_GPIO_FUNC_SW_IO_15:
info->sw_io_15 = 0;
break;
case HALMAC_GPIO_FUNC_S0_PAPE:
case HALMAC_GPIO_FUNC_S0_TRSW:
case HALMAC_GPIO_FUNC_S0_TRSWB:
case HALMAC_GPIO_FUNC_S1_PAPE:
case HALMAC_GPIO_FUNC_S1_TRSW:
case HALMAC_GPIO_FUNC_S1_TRSWB:
return HALMAC_RET_PINMUX_NOT_SUPPORT;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
@@ -747,6 +763,13 @@ get_pinmux_list_8822b(struct halmac_adapter *adapter,
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO15_8822B);
*gpio_id = HALMAC_GPIO15;
break;
case HALMAC_GPIO_FUNC_S0_PAPE:
case HALMAC_GPIO_FUNC_S0_TRSW:
case HALMAC_GPIO_FUNC_S0_TRSWB:
case HALMAC_GPIO_FUNC_S1_PAPE:
case HALMAC_GPIO_FUNC_S1_TRSW:
case HALMAC_GPIO_FUNC_S1_TRSWB:
return HALMAC_RET_PINMUX_NOT_SUPPORT;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
@@ -842,6 +865,13 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
if (info->sw_io_15 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_S0_PAPE:
case HALMAC_GPIO_FUNC_S0_TRSW:
case HALMAC_GPIO_FUNC_S0_TRSWB:
case HALMAC_GPIO_FUNC_S1_PAPE:
case HALMAC_GPIO_FUNC_S1_TRSW:
case HALMAC_GPIO_FUNC_S1_TRSWB:
return HALMAC_RET_PINMUX_NOT_SUPPORT;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
@@ -852,4 +882,171 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
return status;
}
static enum halmac_ret_status
pinmux_switch_8822b(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func)
{
u32 i;
u8 value8;
u16 switch_func;
const struct halmac_gpio_pimux_list *cur_list = list;
enum halmac_gpio_cfg_state *state;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
state = &adapter->halmac_state.gpio_cfg_state;
if (*state == HALMAC_GPIO_CFG_STATE_BUSY)
return HALMAC_RET_BUSY_STATE;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
switch_func = HALMAC_WL_LED;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
switch_func = HALMAC_SDIO_INT;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
switch_func = HALMAC_GPIO13_14_WL_CTRL_EN;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
case HALMAC_GPIO_FUNC_SW_IO_3:
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SW_IO_5:
case HALMAC_GPIO_FUNC_SW_IO_6:
case HALMAC_GPIO_FUNC_SW_IO_7:
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_SW_IO_9:
case HALMAC_GPIO_FUNC_SW_IO_10:
case HALMAC_GPIO_FUNC_SW_IO_11:
case HALMAC_GPIO_FUNC_SW_IO_12:
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_SW_IO_15:
switch_func = HALMAC_SW_IO;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
for (i = 0; i < size; i++) {
if (gpio_id != cur_list->id) {
PLTFM_MSG_ERR("[ERR]offset:%X, value:%X, func:%X\n",
cur_list->offset, cur_list->value,
cur_list->func);
PLTFM_MSG_ERR("[ERR]id1 : %X, id2 : %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
if (switch_func == cur_list->func)
break;
cur_list++;
}
if (i == size) {
PLTFM_MSG_ERR("[ERR]gpio func error:%X %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
*state = HALMAC_GPIO_CFG_STATE_BUSY;
cur_list = list;
for (i = 0; i < size; i++) {
value8 = HALMAC_REG_R8(cur_list->offset);
value8 &= ~(cur_list->msk);
if (switch_func == cur_list->func) {
value8 |= (cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
break;
}
value8 |= (~cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
cur_list++;
}
*state = HALMAC_GPIO_CFG_STATE_IDLE;
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
pinmux_record_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val)
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
adapter->pinmux_info.wl_led = val;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
adapter->pinmux_info.sdio_int = val;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
adapter->pinmux_info.bt_host_wake = val;
break;
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
adapter->pinmux_info.bt_dev_wake = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
adapter->pinmux_info.sw_io_0 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
adapter->pinmux_info.sw_io_1 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
adapter->pinmux_info.sw_io_2 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
adapter->pinmux_info.sw_io_3 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
adapter->pinmux_info.sw_io_4 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
adapter->pinmux_info.sw_io_5 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
adapter->pinmux_info.sw_io_6 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
adapter->pinmux_info.sw_io_7 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
adapter->pinmux_info.sw_io_8 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
adapter->pinmux_info.sw_io_9 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
adapter->pinmux_info.sw_io_10 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
adapter->pinmux_info.sw_io_11 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
adapter->pinmux_info.sw_io_12 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
adapter->pinmux_info.sw_io_13 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
adapter->pinmux_info.sw_io_14 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
adapter->pinmux_info.sw_io_15 = val;
break;
default:
return HALMAC_RET_GET_PINMUX_ERR;
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

26
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -359,6 +359,8 @@ mount_api_8822b(struct halmac_adapter *adapter)
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
#if HALMAC_SDIO_SUPPORT
api->halmac_init_interface_cfg = init_sdio_cfg_8822b;
api->halmac_init_sdio_cfg = init_sdio_cfg_8822b;
api->halmac_mac_power_switch = mac_pwr_switch_sdio_8822b;
api->halmac_phy_cfg = phy_cfg_sdio_8822b;
api->halmac_pcie_switch = pcie_switch_sdio_8822b;
@@ -417,6 +419,8 @@ init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
u8 en_fwff;
u16 value16;
adapter->trx_mode = mode;
@@ -428,10 +432,22 @@ init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
return status;
}
en_fwff = HALMAC_REG_R8(REG_WMAC_FWPKT_CR) & BIT_FWEN;
if (en_fwff) {
HALMAC_REG_W8_CLR(REG_WMAC_FWPKT_CR, BIT_FWEN);
if (fwff_is_empty_88xx(adapter) != HALMAC_RET_SUCCESS)
PLTFM_MSG_ERR("[ERR]fwff is not empty\n");
}
value8 = 0;
HALMAC_REG_W8(REG_CR, value8);
value16 = HALMAC_REG_R16(REG_FWFF_PKT_INFO);
HALMAC_REG_W16(REG_FWFF_CTRL, value16);
value8 = MAC_TRX_ENABLE;
HALMAC_REG_W8(REG_CR, value8);
if (en_fwff)
HALMAC_REG_W8_SET(REG_WMAC_FWPKT_CR, BIT_FWEN);
HALMAC_REG_W32(REG_H2CQ_CSR, BIT(31));
status = priority_queue_cfg_8822b(adapter, mode);
@@ -701,13 +717,15 @@ init_system_cfg_8822b(struct halmac_adapter *adapter)
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 tmp = 0;
u32 value32;
u8 value8;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value32 = HALMAC_REG_R32(REG_CPU_DMEM_CON) | BIT_WL_PLATFORM_RST;
HALMAC_REG_W32(REG_CPU_DMEM_CON, value32);
HALMAC_REG_W8(REG_SYS_FUNC_EN + 1, SYS_FUNC_EN);
value8 = HALMAC_REG_R8(REG_SYS_FUNC_EN + 1) | SYS_FUNC_EN;
HALMAC_REG_W8(REG_SYS_FUNC_EN + 1, value8);
/*disable boot-from-flash for driver's DL FW*/
tmp = HALMAC_REG_R32(REG_MCUFW_CTRL);
@@ -890,6 +908,10 @@ init_wmac_cfg_8822b(struct halmac_adapter *adapter)
HALMAC_REG_W8(REG_TCR + 2, WLAN_TX_FUNC_CFG2);
HALMAC_REG_W8(REG_TCR + 1, WLAN_TX_FUNC_CFG1);
HALMAC_REG_W8_SET(REG_WMAC_TRXPTCL_CTL + 4, BIT(1));
HALMAC_REG_W8_SET(REG_SND_PTCL_CTRL, BIT_R_DISABLE_CHECK_VHTSIGB_CRC);
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2);
if (adapter->hw_cfg_info.trx_mode == HALMAC_TRNSFER_NORMAL)

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

56
hal/halmac/halmac_88xx/halmac_8822b/halmac_phy_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -42,7 +42,7 @@ struct halmac_intf_phy_para usb2_phy_param_8822b[] = {
{0xFFFF, 0x00,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
};
struct halmac_intf_phy_para usb3_phy_param_8822b[] = {
@@ -50,11 +50,11 @@ struct halmac_intf_phy_para usb3_phy_param_8822b[] = {
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_D,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
};
struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[] = {
@@ -62,47 +62,51 @@ struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[] = {
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0008, 0x3596,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x001B, 0xE029,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ASUS},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x002A, 0x1840,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
};
struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[] = {
@@ -110,47 +114,47 @@ struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[] = {
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0008, 0x3597,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0x002A, 0x3040,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
HALMAC_INTF_PHY_PLATFORM_FOR_ALL},
};
#endif /* HALMAC_8822B_SUPPORT */

34
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -58,6 +58,16 @@ static struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0xFF0A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFF0B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
@@ -440,16 +450,6 @@ static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0xFF0A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFF0B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
@@ -690,32 +690,32 @@ static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDE},
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDC},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x9B},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x8},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xA},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x8},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,

4
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -21,7 +21,7 @@
#if HALMAC_8822B_SUPPORT
#define HALMAC_8822B_PWR_SEQ_VER "V30"
#define HALMAC_8822B_PWR_SEQ_VER "V31"
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[];

4
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -38,7 +38,7 @@ mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
PLTFM_MSG_TRACE("[TRACE]%s\n", __func__);
PLTFM_MSG_TRACE("[TRACE]%x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8821C pwr seq ver = %s\n",
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(0xFE58);

2
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_88xx_cfg.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_bb_rf_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_88xx/halmac_bb_rf_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

6
hal/halmac/halmac_88xx/halmac_cfg_wmac_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -588,10 +588,10 @@ cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw)
switch (bw) {
case HALMAC_BW_80:
value32 |= BIT(8);
value32 = value32 | BIT(8);
break;
case HALMAC_BW_40:
value32 |= BIT(7);
value32 = value32 | BIT(7);
break;
case HALMAC_BW_20:
case HALMAC_BW_10:

2
hal/halmac/halmac_88xx/halmac_cfg_wmac_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

503
hal/halmac/halmac_88xx/halmac_common_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -90,6 +90,9 @@ get_c2h_dbg_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
static enum halmac_ret_status
get_h2c_ack_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
static enum halmac_ret_status
get_scan_ch_notify_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
static enum halmac_ret_status
get_scan_rpt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
@@ -99,6 +102,14 @@ get_h2c_ack_cfg_param_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
static enum halmac_ret_status
get_h2c_ack_update_pkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
static enum halmac_ret_status
get_h2c_ack_send_scan_pkt_88xx(struct halmac_adapter *adapter, u8 *buf,
u32 size);
static enum halmac_ret_status
get_h2c_ack_drop_scan_pkt_88xx(struct halmac_adapter *adapter, u8 *buf,
u32 size);
static enum halmac_ret_status
get_h2c_ack_update_datapkt_88xx(struct halmac_adapter *adapter, u8 *buf,
u32 size);
@@ -138,6 +149,14 @@ static enum halmac_ret_status
send_h2c_update_packet_88xx(struct halmac_adapter *adapter,
enum halmac_packet_id pkt_id, u8 *pkt, u32 size);
static enum halmac_ret_status
send_h2c_send_scan_packet_88xx(struct halmac_adapter *adapter,
u8 index, u8 *pkt, u32 size);
static enum halmac_ret_status
send_h2c_drop_scan_packet_88xx(struct halmac_adapter *adapter,
struct halmac_drop_pkt_option *option);
static enum halmac_ret_status
send_bt_coex_cmd_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 ack);
@@ -172,6 +191,14 @@ static enum halmac_ret_status
get_update_packet_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
static enum halmac_ret_status
get_send_scan_packet_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
static enum halmac_ret_status
get_drop_scan_packet_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
static enum halmac_ret_status
pwr_sub_seq_parser_88xx(struct halmac_adapter *adapter, u8 cut, u8 intf,
struct halmac_wlan_pwr_cfg *cmd);
@@ -216,6 +243,9 @@ static enum halmac_packet_id
get_real_pkt_id_88xx(struct halmac_adapter *adapter,
enum halmac_packet_id pkt_id);
static u32
get_update_packet_page_size(struct halmac_adapter *adapter, u32 size);
/**
* ofld_func_cfg_88xx() - config offload function
* @adapter : the adapter of halmac
@@ -535,6 +565,40 @@ set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
case HALMAC_HW_TXFIFO_LIFETIME:
cfg_txfifo_lt_88xx(adapter,
(struct halmac_txfifo_lifetime_cfg *)value);
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* get_watcher_88xx() -get watcher value
* @adapter : the adapter of halmac
* @sel : id for driver to config
* @value : value, reference table to get data type
* Author :
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_watcher_88xx(struct halmac_adapter *adapter, enum halmac_watcher_sel sel,
void *value)
{
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]null ptr-set hw value\n");
return HALMAC_RET_NULL_POINTER;
}
switch (sel) {
case HALMAC_WATCHER_SDIO_RN_FOOL_PROOFING:
*(u32 *)value = adapter->watcher.get_watcher.sdio_rn_not_align;
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
@@ -694,6 +758,9 @@ parse_c2h_pkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
case C2H_SUB_CMD_ID_EFUSE_DATA:
status = get_efuse_data_88xx(adapter, c2h_pkt, c2h_size);
break;
case C2H_SUB_CMD_ID_SCAN_CH_NOTIFY:
status = get_scan_ch_notify_88xx(adapter, c2h_pkt, c2h_size);
break;
default:
PLTFM_MSG_WARN("[WARN]Sub cmd id!!\n");
status = HALMAC_RET_C2H_NOT_HANDLED;
@@ -800,6 +867,12 @@ get_h2c_ack_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
case H2C_SUB_CMD_ID_UPDATE_PKT_ACK:
status = get_h2c_ack_update_pkt_88xx(adapter, buf, size);
break;
case H2C_SUB_CMD_ID_SEND_SCAN_PKT_ACK:
status = get_h2c_ack_send_scan_pkt_88xx(adapter, buf, size);
break;
case H2C_SUB_CMD_ID_DROP_SCAN_PKT_ACK:
status = get_h2c_ack_drop_scan_pkt_88xx(adapter, buf, size);
break;
case H2C_SUB_CMD_ID_UPDATE_DATAPACK_ACK:
status = get_h2c_ack_update_datapkt_88xx(adapter, buf, size);
break;
@@ -828,11 +901,56 @@ get_h2c_ack_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
return status;
}
static enum halmac_ret_status
get_scan_ch_notify_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
struct halmac_scan_rpt_info *scan_rpt_info = &adapter->scan_rpt_info;
PLTFM_MSG_TRACE("[TRACE]scan mode:%d\n", adapter->ch_sw_info.scan_mode);
if (adapter->ch_sw_info.scan_mode == 1) {
if (scan_rpt_info->avl_buf_size < 12) {
PLTFM_MSG_ERR("[ERR]ch_notify buffer full!!\n");
return HALMAC_RET_CH_SW_NO_BUF;
}
SCAN_CH_NOTIFY_SET_CH_NUM(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_CH_NUM(buf));
SCAN_CH_NOTIFY_SET_NOTIFY_ID(scan_rpt_info->buf_wptr,
SCAN_CH_NOTIFY_GET_NOTIFY_ID(buf));
SCAN_CH_NOTIFY_SET_STATUS(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_STATUS(buf));
SCAN_CH_NOTIFY_SET_TSF_0(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_0(buf));
SCAN_CH_NOTIFY_SET_TSF_1(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_1(buf));
SCAN_CH_NOTIFY_SET_TSF_2(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_2(buf));
SCAN_CH_NOTIFY_SET_TSF_3(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_3(buf));
SCAN_CH_NOTIFY_SET_TSF_4(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_4(buf));
SCAN_CH_NOTIFY_SET_TSF_5(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_5(buf));
SCAN_CH_NOTIFY_SET_TSF_6(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_6(buf));
SCAN_CH_NOTIFY_SET_TSF_7(scan_rpt_info->buf_wptr,
(u8)SCAN_CH_NOTIFY_GET_TSF_7(buf));
scan_rpt_info->avl_buf_size = scan_rpt_info->avl_buf_size - 12;
scan_rpt_info->total_size = scan_rpt_info->total_size + 12;
scan_rpt_info->buf_wptr = scan_rpt_info->buf_wptr + 12;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_scan_rpt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 fw_rc;
enum halmac_cmd_process_status proc_status;
struct halmac_scan_rpt_info *scan_rpt_info = &adapter->scan_rpt_info;
fw_rc = (u8)SCAN_STATUS_RPT_GET_H2C_RETURN_CODE(buf);
proc_status = (HALMAC_H2C_RETURN_SUCCESS ==
@@ -843,6 +961,19 @@ get_scan_rpt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
adapter->halmac_state.scan_state.proc_status = proc_status;
if (adapter->ch_sw_info.scan_mode == 1) {
scan_rpt_info->rpt_tsf_low =
((SCAN_STATUS_RPT_GET_TSF_3(buf) << 24) |
(SCAN_STATUS_RPT_GET_TSF_2(buf) << 16) |
(SCAN_STATUS_RPT_GET_TSF_1(buf) << 8) |
(SCAN_STATUS_RPT_GET_TSF_0(buf)));
scan_rpt_info->rpt_tsf_high =
((SCAN_STATUS_RPT_GET_TSF_7(buf) << 24) |
(SCAN_STATUS_RPT_GET_TSF_6(buf) << 16) |
(SCAN_STATUS_RPT_GET_TSF_5(buf) << 8) |
(SCAN_STATUS_RPT_GET_TSF_4(buf)));
}
PLTFM_MSG_TRACE("[TRACE]scan : %X\n", proc_status);
return HALMAC_RET_SUCCESS;
@@ -946,24 +1077,13 @@ get_h2c_ack_update_pkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
}
static enum halmac_ret_status
get_h2c_ack_update_datapkt_88xx(struct halmac_adapter *adapter, u8 *buf,
u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
static enum halmac_ret_status
get_h2c_ack_run_datapkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
static enum halmac_ret_status
get_h2c_ack_ch_switch_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
get_h2c_ack_send_scan_pkt_88xx(struct halmac_adapter *adapter,
u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_scan_state *state = &adapter->halmac_state.scan_state;
struct halmac_scan_pkt_state *state =
&adapter->halmac_state.scan_pkt_state;
enum halmac_cmd_process_status proc_status;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
@@ -983,6 +1103,115 @@ get_h2c_ack_ch_switch_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if (HALMAC_H2C_RETURN_SUCCESS == (enum halmac_h2c_return_code)fw_rc) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_SEND_SCAN_PACKET, proc_status,
NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_SEND_SCAN_PACKET, proc_status,
&state->fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_h2c_ack_drop_scan_pkt_88xx(struct halmac_adapter *adapter,
u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_drop_pkt_state *state =
&adapter->halmac_state.drop_pkt_state;
enum halmac_cmd_process_status proc_status;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if (HALMAC_H2C_RETURN_SUCCESS == (enum halmac_h2c_return_code)fw_rc) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_DROP_SCAN_PACKET, proc_status,
NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_DROP_SCAN_PACKET, proc_status,
&state->fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_h2c_ack_update_datapkt_88xx(struct halmac_adapter *adapter, u8 *buf,
u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
static enum halmac_ret_status
get_h2c_ack_run_datapkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
static enum halmac_ret_status
get_h2c_ack_ch_switch_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_scan_state *state = &adapter->halmac_state.scan_state;
struct halmac_scan_rpt_info *scan_rpt_info = &adapter->scan_rpt_info;
enum halmac_cmd_process_status proc_status;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if (adapter->ch_sw_info.scan_mode == 1) {
scan_rpt_info->ack_tsf_low =
((CH_SWITCH_ACK_GET_TSF_3(buf) << 24) |
(CH_SWITCH_ACK_GET_TSF_2(buf) << 16) |
(CH_SWITCH_ACK_GET_TSF_1(buf) << 8) |
(CH_SWITCH_ACK_GET_TSF_0(buf)));
scan_rpt_info->ack_tsf_high =
((CH_SWITCH_ACK_GET_TSF_7(buf) << 24) |
(CH_SWITCH_ACK_GET_TSF_6(buf) << 16) |
(CH_SWITCH_ACK_GET_TSF_5(buf) << 8) |
(CH_SWITCH_ACK_GET_TSF_4(buf)));
}
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_RCVD;
state->proc_status = proc_status;
@@ -1442,6 +1671,7 @@ update_packet_88xx(struct halmac_adapter *adapter, enum halmac_packet_id pkt_id,
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status =
&adapter->halmac_state.update_pkt_state.proc_status;
u8 *used_page = &adapter->halmac_state.update_pkt_state.used_page;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
@@ -1468,6 +1698,8 @@ update_packet_88xx(struct halmac_adapter *adapter, enum halmac_packet_id pkt_id,
return status;
}
*used_page = (u8)get_update_packet_page_size(adapter, size);
if (packet_in_nlo_88xx(adapter, pkt_id)) {
*proc_status = HALMAC_CMD_PROCESS_DONE;
adapter->nlo_flag = 1;
@@ -1503,7 +1735,7 @@ send_h2c_update_packet_88xx(struct halmac_adapter *adapter,
UPDATE_PKT_SET_LOC(h2c_buf, pg_offset);
hdr_info.sub_cmd_id = SUB_CMD_ID_UPDATE_PKT;
hdr_info.content_size = 8;
hdr_info.content_size = 4;
if (packet_in_nlo_88xx(adapter, pkt_id))
hdr_info.ack = 0;
else
@@ -1522,6 +1754,147 @@ send_h2c_update_packet_88xx(struct halmac_adapter *adapter,
return status;
}
enum halmac_ret_status
send_scan_packet_88xx(struct halmac_adapter *adapter, u8 index,
u8 *pkt, u32 size)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status =
&adapter->halmac_state.scan_pkt_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
if (adapter->fw_ver.h2c_version < 13)
return HALMAC_RET_FW_NO_SUPPORT;
if (size > UPDATE_PKT_RSVDPG_SIZE)
return HALMAC_RET_RSVD_PG_OVERFLOW_FAIL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(send_scan)\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
status = send_h2c_send_scan_packet_88xx(adapter, index, pkt, size);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
send_h2c_send_scan_packet_88xx(struct halmac_adapter *adapter,
u8 index, u8 *pkt, u32 size)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
u16 pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
u16 pg_offset;
struct halmac_h2c_header_info hdr_info;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
status = dl_rsvd_page_88xx(adapter, pg_addr, pkt, size);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dl rsvd pg!!\n");
return status;
}
pg_offset = pg_addr - adapter->txff_alloc.rsvd_boundary;
SEND_SCAN_PKT_SET_SIZE(h2c_buf, size +
adapter->hw_cfg_info.txdesc_size);
SEND_SCAN_PKT_SET_INDEX(h2c_buf, index);
SEND_SCAN_PKT_SET_LOC(h2c_buf, pg_offset);
hdr_info.sub_cmd_id = SUB_CMD_ID_SEND_SCAN_PKT;
hdr_info.content_size = 8;
hdr_info.ack = 1;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.scan_pkt_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c!!\n");
reset_ofld_feature_88xx(adapter,
HALMAC_FEATURE_SEND_SCAN_PACKET);
return status;
}
return status;
}
enum halmac_ret_status
drop_scan_packet_88xx(struct halmac_adapter *adapter,
struct halmac_drop_pkt_option *option)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status =
&adapter->halmac_state.drop_pkt_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
if (adapter->fw_ver.h2c_version < 13)
return HALMAC_RET_FW_NO_SUPPORT;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(drop_scan)\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
status = send_h2c_drop_scan_packet_88xx(adapter, option);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
send_h2c_drop_scan_packet_88xx(struct halmac_adapter *adapter,
struct halmac_drop_pkt_option *option)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
struct halmac_h2c_header_info hdr_info;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s\n", __func__);
DROP_SCAN_PKT_SET_DROP_ALL(h2c_buf, option->drop_all);
DROP_SCAN_PKT_SET_DROP_SINGLE(h2c_buf, option->drop_single);
DROP_SCAN_PKT_SET_DROP_IDX(h2c_buf, option->drop_index);
hdr_info.sub_cmd_id = SUB_CMD_ID_DROP_SCAN_PKT;
hdr_info.content_size = 8;
hdr_info.ack = 1;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.drop_pkt_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c!!\n");
reset_ofld_feature_88xx(adapter,
HALMAC_FEATURE_DROP_SCAN_PACKET);
return status;
}
return status;
}
enum halmac_ret_status
bcn_ie_filter_88xx(struct halmac_adapter *adapter,
struct halmac_bcn_ie_info *info)
@@ -1954,6 +2327,12 @@ ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
if (adapter->fw_ver.h2c_version < 4)
return HALMAC_RET_FW_NO_SUPPORT;
if (adapter->ch_sw_info.total_size +
(adapter->halmac_state.update_pkt_state.used_page <<
TX_PAGE_SIZE_SHIFT_88XX) >
(u32)adapter->txff_alloc.rsvd_pg_num << TX_PAGE_SIZE_SHIFT_88XX)
return HALMAC_RET_RSVD_PG_OVERFLOW_FAIL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (opt->switch_en == 0)
@@ -1997,6 +2376,7 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
u16 seq_num = 0;
u16 pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
struct halmac_h2c_header_info hdr_info;
struct halmac_scan_rpt_info *scan_rpt_info = &adapter->scan_rpt_info;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status;
@@ -2004,7 +2384,8 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (opt->nlo_en == 1 && adapter->nlo_flag != 1)
if (adapter->halmac_state.update_pkt_state.used_page > 0 &&
opt->nlo_en == 1 && adapter->nlo_flag != 1)
PLTFM_MSG_WARN("[WARN]probe req is NOT nlo pkt!!\n");
if (cnv_scan_state_88xx(adapter, HALMAC_CMD_CNSTR_H2C_SENT) !=
@@ -2014,6 +2395,7 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
*proc_status = HALMAC_CMD_PROCESS_SENDING;
if (opt->switch_en != 0) {
pg_addr += adapter->halmac_state.update_pkt_state.used_page;
status = dl_rsvd_page_88xx(adapter, pg_addr,
adapter->ch_sw_info.buf,
adapter->ch_sw_info.total_size);
@@ -2021,6 +2403,7 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
PLTFM_MSG_ERR("[ERR]dl rsvd pg!!\n");
return status;
}
adapter->halmac_state.update_pkt_state.used_page = 0;
}
CH_SWITCH_SET_START(h2c_buf, opt->switch_en);
@@ -2038,6 +2421,7 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
CH_SWITCH_SET_SLOW_PERIOD(h2c_buf, opt->phase_2_period);
CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_buf, opt->normal_period_sel);
CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_buf, opt->phase_2_period_sel);
CH_SWITCH_SET_SCAN_MODE(h2c_buf, opt->scan_mode_en);
CH_SWITCH_SET_INFO_SIZE(h2c_buf, adapter->ch_sw_info.total_size);
hdr_info.sub_cmd_id = SUB_CMD_ID_CH_SWITCH;
@@ -2046,6 +2430,36 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
hdr_info.ack = 0;
else
hdr_info.ack = 1;
if (opt->scan_mode_en == 1) {
adapter->ch_sw_info.scan_mode = 1;
if (!scan_rpt_info->buf) {
scan_rpt_info->buf =
(u8 *)PLTFM_MALLOC(SCAN_INFO_RSVDPG_SIZE);
if (!scan_rpt_info->buf)
return HALMAC_RET_NULL_POINTER;
} else {
PLTFM_MEMSET(scan_rpt_info->buf, 0,
SCAN_INFO_RSVDPG_SIZE);
}
scan_rpt_info->buf_wptr = scan_rpt_info->buf;
scan_rpt_info->buf_size = SCAN_INFO_RSVDPG_SIZE;
scan_rpt_info->avl_buf_size = SCAN_INFO_RSVDPG_SIZE;
scan_rpt_info->total_size = 0;
scan_rpt_info->ack_tsf_high = 0;
scan_rpt_info->ack_tsf_low = 0;
scan_rpt_info->rpt_tsf_high = 0;
scan_rpt_info->rpt_tsf_low = 0;
} else {
adapter->ch_sw_info.scan_mode = 0;
if (!scan_rpt_info->buf)
PLTFM_FREE(scan_rpt_info->buf, scan_rpt_info->buf_size);
scan_rpt_info->buf_wptr = NULL;
scan_rpt_info->buf_size = 0;
scan_rpt_info->avl_buf_size = 0;
scan_rpt_info->total_size = 0;
}
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.scan_state.seq_num = seq_num;
@@ -2121,6 +2535,7 @@ enum halmac_ret_status
chk_txdesc_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u32 mac_clk = 0;
u8 value8;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
@@ -2146,6 +2561,14 @@ chk_txdesc_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
status = HALMAC_RET_TXDESC_SET_FAIL;
}
if (GET_TX_DESC_USE_MAX_TIME_EN(buf) == 1) {
value8 = (u8)GET_TX_DESC_AMPDU_MAX_TIME(buf);
if (value8 > HALMAC_REG_R8(REG_AMPDU_MAX_TIME_V1)) {
PLTFM_MSG_ERR("[ERR]txdesc - ampdu_max_time\n");
status = HALMAC_RET_TXDESC_SET_FAIL;
}
}
switch (BIT_GET_MAC_CLK_SEL(HALMAC_REG_R32(REG_AFE_CTRL1))) {
case 0x0:
mac_clk = 80;
@@ -2401,12 +2824,23 @@ query_status_88xx(struct halmac_adapter *adapter,
status = get_dump_log_efuse_status_88xx(adapter, proc_status,
data, size);
break;
case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK:
status = get_dump_log_efuse_mask_status_88xx(adapter,
proc_status,
data, size);
break;
case HALMAC_FEATURE_CHANNEL_SWITCH:
status = get_ch_switch_status_88xx(adapter, proc_status);
break;
case HALMAC_FEATURE_UPDATE_PACKET:
status = get_update_packet_status_88xx(adapter, proc_status);
break;
case HALMAC_FEATURE_SEND_SCAN_PACKET:
status = get_send_scan_packet_status_88xx(adapter, proc_status);
break;
case HALMAC_FEATURE_DROP_SCAN_PACKET:
status = get_drop_scan_packet_status_88xx(adapter, proc_status);
break;
case HALMAC_FEATURE_IQK:
status = get_iqk_status_88xx(adapter, proc_status);
break;
@@ -2453,6 +2887,24 @@ get_update_packet_status_88xx(struct halmac_adapter *adapter,
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_send_scan_packet_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.scan_pkt_state.proc_status;
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_drop_scan_packet_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.drop_pkt_state.proc_status;
return HALMAC_RET_SUCCESS;
}
/**
* cfg_drv_rsvd_pg_num_88xx() -config reserved page number for driver
* @adapter : the adapter of halmac
@@ -2963,4 +3415,19 @@ get_real_pkt_id_88xx(struct halmac_adapter *adapter,
return real_pkt_id;
}
static u32
get_update_packet_page_size(struct halmac_adapter *adapter, u32 size)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 txdesc_size;
u32 total;
api->halmac_get_hw_value(adapter, HALMAC_HW_TX_DESC_SIZE, &txdesc_size);
total = size + txdesc_size;
return (total & 0x7f) > 0 ?
(total >> TX_PAGE_SIZE_SHIFT_88XX) + 1 :
total >> TX_PAGE_SIZE_SHIFT_88XX;
}
#endif /* HALMAC_88XX_SUPPORT */

14
hal/halmac/halmac_88xx/halmac_common_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -42,6 +42,10 @@ enum halmac_ret_status
set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value);
enum halmac_ret_status
get_watcher_88xx(struct halmac_adapter *adapter, enum halmac_watcher_sel sel,
void *value);
enum halmac_ret_status
set_h2c_pkt_hdr_88xx(struct halmac_adapter *adapter, u8 *hdr,
struct halmac_h2c_header_info *info, u16 *seq_num);
@@ -66,6 +70,14 @@ enum halmac_ret_status
update_packet_88xx(struct halmac_adapter *adapter, enum halmac_packet_id pkt_id,
u8 *pkt, u32 size);
enum halmac_ret_status
send_scan_packet_88xx(struct halmac_adapter *adapter, u8 index,
u8 *pkt, u32 size);
enum halmac_ret_status
drop_scan_packet_88xx(struct halmac_adapter *adapter,
struct halmac_drop_pkt_option *option);
enum halmac_ret_status
bcn_ie_filter_88xx(struct halmac_adapter *adapter,
struct halmac_bcn_ie_info *info);

350
hal/halmac/halmac_88xx/halmac_efuse_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -24,6 +24,7 @@
#define RSVD_CS_EFUSE_SIZE 24
#define FEATURE_DUMP_PHY_EFUSE HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE
#define FEATURE_DUMP_LOG_EFUSE HALMAC_FEATURE_DUMP_LOGICAL_EFUSE
#define FEATURE_DUMP_LOG_EFUSE_MASK HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK
static enum halmac_cmd_construct_state
efuse_cmd_cnstr_state_88xx(struct halmac_adapter *adapter);
@@ -533,6 +534,84 @@ dump_log_efuse_map_88xx(struct halmac_adapter *adapter,
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
dump_log_efuse_mask_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg)
{
u8 *map = NULL;
u32 size = adapter->hw_cfg_info.eeprom_size;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.efuse_state.proc_status;
if (cfg == HALMAC_EFUSE_R_FW &&
halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]cfg = %d\n", cfg);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_WARN("[WARN]Wait event(efuse)\n");
return HALMAC_RET_BUSY_STATE;
}
if (efuse_cmd_cnstr_state_88xx(adapter) != HALMAC_CMD_CNSTR_IDLE) {
PLTFM_MSG_WARN("[WARN]Not idle(efuse)\n");
return HALMAC_RET_ERROR_STATE;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF)
PLTFM_MSG_ERR("[ERR]Dump efuse in suspend\n");
*proc_status = HALMAC_CMD_PROCESS_IDLE;
adapter->evnt.log_efuse_mask = 1;
status = switch_efuse_bank_88xx(adapter, HALMAC_EFUSE_BANK_WIFI);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]switch efuse bank\n");
return status;
}
status = proc_dump_efuse_88xx(adapter, cfg);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dump efuse\n");
return status;
}
if (adapter->efuse_map_valid == 1) {
*proc_status = HALMAC_CMD_PROCESS_DONE;
map = (u8 *)PLTFM_MALLOC(size);
if (!map) {
PLTFM_MSG_ERR("[ERR]malloc map\n");
return HALMAC_RET_MALLOC_FAIL;
}
PLTFM_MEMSET(map, 0xFF, size);
if (eeprom_mask_parser_88xx(adapter, adapter->efuse_map, map) !=
HALMAC_RET_SUCCESS) {
PLTFM_FREE(map, size);
return HALMAC_RET_EEPROM_PARSING_FAIL;
}
PLTFM_EVENT_SIG(HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK,
*proc_status, map, size);
adapter->evnt.log_efuse_mask = 0;
PLTFM_FREE(map, size);
}
if (cnv_efuse_state_88xx(adapter, HALMAC_CMD_CNSTR_IDLE) !=
HALMAC_RET_SUCCESS)
return HALMAC_RET_ERROR_STATE;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* read_logical_efuse_88xx() - read logical efuse map 1 byte
* @adapter : the adapter of halmac
@@ -1075,6 +1154,92 @@ eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
eeprom_mask_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map,
u8 *log_mask)
{
u8 i;
u8 value8;
u8 blk_idx;
u8 word_en;
u8 valid;
u8 hdr;
u8 hdr2 = 0;
u32 eeprom_idx;
u32 efuse_idx = 0;
u32 prtct_efuse_size = adapter->hw_cfg_info.prtct_efuse_size;
struct halmac_hw_cfg_info *hw_info = &adapter->hw_cfg_info;
PLTFM_MEMSET(log_mask, 0xFF, hw_info->eeprom_size);
do {
value8 = *(phy_map + efuse_idx);
hdr = value8;
if ((hdr & 0x1f) == 0x0f) {
efuse_idx++;
value8 = *(phy_map + efuse_idx);
hdr2 = value8;
if (hdr2 == 0xff)
break;
blk_idx = ((hdr2 & 0xF0) >> 1) | ((hdr >> 5) & 0x07);
word_en = hdr2 & 0x0F;
} else {
blk_idx = (hdr & 0xF0) >> 4;
word_en = hdr & 0x0F;
}
if (hdr == 0xff)
break;
efuse_idx++;
if (efuse_idx >= hw_info->efuse_size - prtct_efuse_size - 1)
return HALMAC_RET_EEPROM_PARSING_FAIL;
for (i = 0; i < 4; i++) {
valid = (u8)((~(word_en >> i)) & BIT(0));
if (valid == 1) {
eeprom_idx = (blk_idx << 3) + (i << 1);
if ((eeprom_idx + 1) > hw_info->eeprom_size) {
PLTFM_MSG_ERR("[ERR]efuse idx:0x%X\n",
efuse_idx - 1);
PLTFM_MSG_ERR("[ERR]read hdr:0x%X\n",
hdr);
PLTFM_MSG_ERR("[ERR]read hdr2:0x%X\n",
hdr2);
return HALMAC_RET_EEPROM_PARSING_FAIL;
}
*(log_mask + eeprom_idx) = 0x00;
eeprom_idx++;
efuse_idx++;
if (efuse_idx > hw_info->efuse_size -
prtct_efuse_size - 1)
return HALMAC_RET_EEPROM_PARSING_FAIL;
*(log_mask + eeprom_idx) = 0x00;
efuse_idx++;
if (efuse_idx > hw_info->efuse_size -
prtct_efuse_size)
return HALMAC_RET_EEPROM_PARSING_FAIL;
}
}
} while (1);
adapter->efuse_end = efuse_idx;
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
read_log_efuse_map_88xx(struct halmac_adapter *adapter, u8 *map)
{
@@ -1755,6 +1920,19 @@ get_efuse_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
map, eeprom_size);
adapter->evnt.log_efuse_map = 0;
}
if (adapter->evnt.log_efuse_mask == 1) {
if (eeprom_mask_parser_88xx(adapter, adapter->efuse_map,
map)
!= HALMAC_RET_SUCCESS) {
PLTFM_FREE(map, eeprom_size);
return HALMAC_RET_EEPROM_PARSING_FAIL;
}
PLTFM_EVENT_SIG(FEATURE_DUMP_LOG_EFUSE_MASK,
proc_status, map, eeprom_size);
adapter->evnt.log_efuse_mask = 0;
}
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
@@ -1770,6 +1948,12 @@ get_efuse_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
&state->fw_rc, 1);
adapter->evnt.log_efuse_map = 0;
}
if (adapter->evnt.log_efuse_mask == 1) {
PLTFM_EVENT_SIG(FEATURE_DUMP_LOG_EFUSE_MASK,
proc_status, &state->fw_rc, 1);
adapter->evnt.log_efuse_mask = 0;
}
}
PLTFM_FREE(map, eeprom_size);
@@ -1810,6 +1994,9 @@ get_dump_phy_efuse_status_88xx(struct halmac_adapter *adapter,
}
PLTFM_MEMSET(map, 0xFF, efuse_size);
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
#if HALMAC_PLATFORM_WINDOWS
PLTFM_MEMCPY(map, adapter->efuse_map, efuse_size);
#else
PLTFM_MEMCPY(map, adapter->efuse_map,
efuse_size - prtct_efuse_size);
PLTFM_MEMCPY(map + efuse_size - prtct_efuse_size +
@@ -1818,6 +2005,7 @@ get_dump_phy_efuse_status_88xx(struct halmac_adapter *adapter,
prtct_efuse_size + RSVD_CS_EFUSE_SIZE,
prtct_efuse_size - RSVD_EFUSE_SIZE -
RSVD_CS_EFUSE_SIZE);
#endif
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
PLTFM_MEMCPY(data, map, *size);
@@ -1874,6 +2062,52 @@ get_dump_log_efuse_status_88xx(struct halmac_adapter *adapter,
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_dump_log_efuse_mask_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status,
u8 *data, u32 *size)
{
u8 *map = NULL;
u32 eeprom_size = adapter->hw_cfg_info.eeprom_size;
struct halmac_efuse_state *state = &adapter->halmac_state.efuse_state;
*proc_status = state->proc_status;
if (!data)
return HALMAC_RET_NULL_POINTER;
if (!size)
return HALMAC_RET_NULL_POINTER;
if (*proc_status == HALMAC_CMD_PROCESS_DONE) {
if (*size < eeprom_size) {
*size = eeprom_size;
return HALMAC_RET_BUFFER_TOO_SMALL;
}
*size = eeprom_size;
map = (u8 *)PLTFM_MALLOC(eeprom_size);
if (!map) {
PLTFM_MSG_ERR("[ERR]malloc map\n");
return HALMAC_RET_MALLOC_FAIL;
}
PLTFM_MEMSET(map, 0xFF, eeprom_size);
if (eeprom_mask_parser_88xx(adapter, adapter->efuse_map, map) !=
HALMAC_RET_SUCCESS) {
PLTFM_FREE(map, eeprom_size);
return HALMAC_RET_EEPROM_PARSING_FAIL;
}
PLTFM_MEMCPY(data, map, *size);
PLTFM_FREE(map, eeprom_size);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_h2c_ack_phy_efuse_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
@@ -1907,4 +2141,118 @@ get_rsvd_efuse_size_88xx(struct halmac_adapter *adapter)
return adapter->hw_cfg_info.prtct_efuse_size;
}
/**
* write_wifi_phy_efuse_88xx() - write wifi physical efuse
* @adapter : the adapter of halmac
* @offset : the efuse offset to be written
* @value : the value to be written
* Author : Yong-Ching Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
write_wifi_phy_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.efuse_state.proc_status;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (offset >= adapter->hw_cfg_info.efuse_size) {
PLTFM_MSG_ERR("[ERR]Offset is too large\n");
return HALMAC_RET_EFUSE_SIZE_INCORRECT;
}
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_WARN("[WARN]Wait event(efuse)\n");
return HALMAC_RET_BUSY_STATE;
}
if (efuse_cmd_cnstr_state_88xx(adapter) != HALMAC_CMD_CNSTR_IDLE) {
PLTFM_MSG_WARN("[WARN]Not idle(efuse)\n");
return HALMAC_RET_ERROR_STATE;
}
status = switch_efuse_bank_88xx(adapter, HALMAC_EFUSE_BANK_WIFI);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]switch efuse bank\n");
return status;
}
status = write_hw_efuse_88xx(adapter, offset, value);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]write physical efuse\n");
return status;
}
if (cnv_efuse_state_88xx(adapter, HALMAC_CMD_CNSTR_IDLE) !=
HALMAC_RET_SUCCESS)
return HALMAC_RET_ERROR_STATE;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* read_wifi_phy_efuse_88xx() - read wifi physical efuse
* @adapter : the adapter of halmac
* @offset : the efuse offset to be read
* @size : the length to be read
* @value : pointer to the pre-allocated space where
the efuse content is to be copied
* Author : Yong-Ching Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
read_wifi_phy_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.efuse_state.proc_status;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (offset >= adapter->hw_cfg_info.efuse_size ||
offset + size >= adapter->hw_cfg_info.efuse_size) {
PLTFM_MSG_ERR("[ERR] Wrong efuse index\n");
return HALMAC_RET_EFUSE_SIZE_INCORRECT;
}
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_WARN("[WARN]Wait event(efuse)\n");
return HALMAC_RET_BUSY_STATE;
}
if (efuse_cmd_cnstr_state_88xx(adapter) != HALMAC_CMD_CNSTR_IDLE) {
PLTFM_MSG_WARN("[WARN]Not idle(efuse)\n");
return HALMAC_RET_ERROR_STATE;
}
status = switch_efuse_bank_88xx(adapter, HALMAC_EFUSE_BANK_WIFI);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]switch efuse bank\n");
return status;
}
status = read_hw_efuse_88xx(adapter, offset, size, value);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]read hw efuse\n");
return status;
}
if (cnv_efuse_state_88xx(adapter, HALMAC_CMD_CNSTR_IDLE) !=
HALMAC_RET_SUCCESS)
return HALMAC_RET_ERROR_STATE;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

21
hal/halmac/halmac_88xx/halmac_efuse_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -27,6 +27,10 @@ dump_efuse_map_88xx(struct halmac_adapter *adapter,
enum halmac_ret_status
eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map);
enum halmac_ret_status
eeprom_mask_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map,
u8 *log_mask);
enum halmac_ret_status
dump_efuse_map_bt_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_bank bank, u32 size, u8 *map);
@@ -54,6 +58,9 @@ get_log_efuse_size_88xx(struct halmac_adapter *adapter, u32 *size);
enum halmac_ret_status
dump_log_efuse_map_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
dump_log_efuse_mask_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
read_logical_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 *value);
@@ -97,12 +104,24 @@ get_dump_log_efuse_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status,
u8 *data, u32 *size);
enum halmac_ret_status
get_dump_log_efuse_mask_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status,
u8 *data, u32 *size);
enum halmac_ret_status
get_h2c_ack_phy_efuse_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
u32
get_rsvd_efuse_size_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
write_wifi_phy_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
enum halmac_ret_status
read_wifi_phy_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_EFUSE_88XX_H_ */

51
hal/halmac/halmac_88xx/halmac_flash_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -43,6 +43,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u16 h2c_info_offset;
u32 pkt_size;
u32 mem_offset;
u32 cnt;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
@@ -105,12 +106,14 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
mem_offset += pkt_size;
size -= pkt_size;
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0)
cnt = 1000;
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0) {
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]dl flash!!\n");
return HALMAC_RET_DLFW_FAIL;
}
cnt--;
PLTFM_DELAY_US(1000);
if (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0) {
PLTFM_MSG_ERR("[ERR]dl flash!!\n");
return HALMAC_RET_DLFW_FAIL;
}
}
@@ -131,7 +134,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length)
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length, u8 *data)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status;
@@ -140,8 +143,10 @@ read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length)
u8 restore[3];
u8 h2c_buf[H2C_PKT_SIZE_88XX] = {0};
u16 seq_num = 0;
u16 h2c_info_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
u16 h2c_pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
u16 rsvd_pg_addr = adapter->txff_alloc.rsvd_boundary;
u16 h2c_info_addr;
u32 cnt;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
@@ -160,14 +165,14 @@ read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length)
value8 = (u8)(value8 & ~(BIT(6)));
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, value8);
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, h2c_info_addr);
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, h2c_pg_addr);
value8 = HALMAC_REG_R8(REG_MCUTST_I);
value8 |= BIT(0);
HALMAC_REG_W8(REG_MCUTST_I, value8);
/* Construct H2C Content */
DOWNLOAD_FLASH_SET_SPI_CMD(h2c_buf, 0x03);
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, h2c_info_addr - rsvd_pg_addr);
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, h2c_pg_addr - rsvd_pg_addr);
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, length);
DOWNLOAD_FLASH_SET_START_ADDR(h2c_buf, addr);
@@ -185,14 +190,30 @@ read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length)
return status;
}
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0)
cnt = 5000;
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0) {
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]read flash!!\n");
return HALMAC_RET_FAIL;
}
cnt--;
PLTFM_DELAY_US(1000);
}
HALMAC_REG_W8_CLR(REG_MCUTST_I, BIT(0));
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, rsvd_pg_addr);
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, restore[2]);
HALMAC_REG_W8(REG_BCN_CTRL, restore[1]);
HALMAC_REG_W8(REG_CR + 1, restore[0]);
h2c_info_addr = h2c_pg_addr << TX_PAGE_SIZE_SHIFT_88XX;
status = dump_fifo_88xx(adapter, HAL_FIFO_SEL_TX, h2c_info_addr,
length, data);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dump fifo!!\n");
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
@@ -274,9 +295,12 @@ check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 pkt_size;
u32 start_page;
u32 cnt;
u8 *data;
pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
data = (u8 *)PLTFM_MALLOC(4096);
while (size != 0) {
start_page = ((pg_addr << 7) >> 12) + 0x780;
residue = (pg_addr << 7) & (4096 - 1);
@@ -286,7 +310,7 @@ check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
else
pkt_size = size;
read_flash_88xx(adapter, addr, 4096);
read_flash_88xx(adapter, addr, 4096, data);
cnt = 0;
while (cnt < pkt_size) {
@@ -295,6 +319,7 @@ check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
value8 = HALMAC_REG_R8(i);
if (*fw_bin != value8) {
PLTFM_MSG_ERR("[ERR]check flash!!\n");
PLTFM_FREE(data, 4096);
return HALMAC_RET_FAIL;
}
@@ -310,6 +335,8 @@ check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
size -= pkt_size;
}
PLTFM_FREE(data, 4096);
return HALMAC_RET_SUCCESS;
}

4
hal/halmac/halmac_88xx/halmac_flash_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -25,7 +25,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 rom_addr);
enum halmac_ret_status
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length);
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length, u8 *data);
enum halmac_ret_status
erase_flash_88xx(struct halmac_adapter *adapter, u8 erase_cmd, u32 addr);

50
hal/halmac/halmac_88xx/halmac_fw_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -475,13 +475,24 @@ DL_FREE_FW_END:
enum halmac_ret_status
reset_wifi_fw_88xx(struct halmac_adapter *adapter)
{
enum halmac_ret_status status;
u32 lte_coex_backup = 0;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = ltecoex_reg_read_88xx(adapter, 0x38, &lte_coex_backup);
if (status != HALMAC_RET_SUCCESS)
return status;
wlan_cpu_en_88xx(adapter, 0);
pltfm_reset_88xx(adapter);
init_ofld_feature_state_machine_88xx(adapter);
wlan_cpu_en_88xx(adapter, 1);
status = ltecoex_reg_write_88xx(adapter, 0x38, lte_coex_backup);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
@@ -1015,6 +1026,7 @@ get_cpu_mode_88xx(struct halmac_adapter *adapter,
if (HALMAC_REG_R8(REG_MCU_TST_CFG) == ID_CHECK_ENETR_CPU_SLEEP) {
*mode = HALMAC_WLCPU_SLEEP;
*cur_mode = HALMAC_WLCPU_SLEEP;
HALMAC_REG_W8(REG_MCU_TST_CFG, 0);
} else {
*mode = HALMAC_WLCPU_ENTER_SLEEP;
@@ -1038,6 +1050,7 @@ send_general_info_88xx(struct halmac_adapter *adapter,
u8 h2cq_ele[4] = {0};
u32 h2cq_addr;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
u8 cnt;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
@@ -1045,6 +1058,9 @@ send_general_info_88xx(struct halmac_adapter *adapter,
if (adapter->fw_ver.h2c_version < 4)
return HALMAC_RET_FW_NO_SUPPORT;
if (adapter->fw_ver.h2c_version < 14)
PLTFM_MSG_WARN("[WARN]the H2C ver. does not match halmac\n");
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (adapter->halmac_state.dlfw_state == HALMAC_DLFW_NONE) {
@@ -1066,17 +1082,26 @@ send_general_info_88xx(struct halmac_adapter *adapter,
h2cq_addr = adapter->txff_alloc.rsvd_h2cq_addr;
h2cq_addr <<= TX_PAGE_SIZE_SHIFT_88XX;
status = dump_fifo_88xx(adapter, HAL_FIFO_SEL_TX,
h2cq_addr, 4, h2cq_ele);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dump h2cq!!\n");
return status;
}
if ((h2cq_ele[0] & 0x7F) != 0x01 || h2cq_ele[1] != 0xFF) {
PLTFM_MSG_ERR("[ERR]h2cq compare!!\n");
return HALMAC_RET_SEND_H2C_FAIL;
}
cnt = 100;
do {
status = dump_fifo_88xx(adapter, HAL_FIFO_SEL_TX,
h2cq_addr, 4, h2cq_ele);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dump h2cq!!\n");
return status;
}
if ((h2cq_ele[0] & 0x7F) == 0x01 && h2cq_ele[1] == 0xFF)
break;
cnt--;
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]h2cq compare!!\n");
return HALMAC_RET_SEND_H2C_FAIL;
}
PLTFM_DELAY_US(5);
} while (1);
if (adapter->halmac_state.dlfw_state == HALMAC_DLFW_DONE)
adapter->halmac_state.dlfw_state = HALMAC_GEN_INFO_SENT;
@@ -1130,6 +1155,9 @@ proc_send_phydm_info_88xx(struct halmac_adapter *adapter,
PHYDM_INFO_SET_CUT_VER(h2c_buf, adapter->chip_ver);
PHYDM_INFO_SET_RX_ANT_STATUS(h2c_buf, info->rx_ant_status);
PHYDM_INFO_SET_TX_ANT_STATUS(h2c_buf, info->tx_ant_status);
PHYDM_INFO_SET_EXT_PA(h2c_buf, info->ext_pa);
PHYDM_INFO_SET_PACKAGE_TYPE(h2c_buf, info->package_type);
PHYDM_INFO_SET_MP_MODE(h2c_buf, info->mp_mode);
hdr_info.sub_cmd_id = SUB_CMD_ID_PHYDM_INFO;
hdr_info.content_size = 8;

2
hal/halmac/halmac_88xx/halmac_fw_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

170
hal/halmac/halmac_88xx/halmac_gpio_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -249,173 +249,5 @@ pinmux_parser_88xx(struct halmac_adapter *adapter,
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
pinmux_switch_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func)
{
u32 i;
u8 value8;
u16 switch_func;
const struct halmac_gpio_pimux_list *cur_list = list;
enum halmac_gpio_cfg_state *state;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
state = &adapter->halmac_state.gpio_cfg_state;
if (*state == HALMAC_GPIO_CFG_STATE_BUSY)
return HALMAC_RET_BUSY_STATE;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
switch_func = HALMAC_WL_LED;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
switch_func = HALMAC_SDIO_INT;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
switch_func = HALMAC_GPIO13_14_WL_CTRL_EN;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
case HALMAC_GPIO_FUNC_SW_IO_3:
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SW_IO_5:
case HALMAC_GPIO_FUNC_SW_IO_6:
case HALMAC_GPIO_FUNC_SW_IO_7:
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_SW_IO_9:
case HALMAC_GPIO_FUNC_SW_IO_10:
case HALMAC_GPIO_FUNC_SW_IO_11:
case HALMAC_GPIO_FUNC_SW_IO_12:
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_SW_IO_15:
switch_func = HALMAC_SW_IO;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
for (i = 0; i < size; i++) {
if (gpio_id != cur_list->id) {
PLTFM_MSG_ERR("[ERR]offset:%X, value:%X, func:%X\n",
cur_list->offset, cur_list->value,
cur_list->func);
PLTFM_MSG_ERR("[ERR]id1 : %X, id2 : %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
if (switch_func == cur_list->func)
break;
cur_list++;
}
if (i == size) {
PLTFM_MSG_ERR("[ERR]gpio func error:%X %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
*state = HALMAC_GPIO_CFG_STATE_BUSY;
cur_list = list;
for (i = 0; i < size; i++) {
value8 = HALMAC_REG_R8(cur_list->offset);
value8 &= ~(cur_list->msk);
if (switch_func == cur_list->func) {
value8 |= (cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
break;
}
value8 |= (~cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
cur_list++;
}
*state = HALMAC_GPIO_CFG_STATE_IDLE;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
pinmux_record_88xx(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val)
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
adapter->pinmux_info.wl_led = val;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
adapter->pinmux_info.sdio_int = val;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
adapter->pinmux_info.bt_host_wake = val;
break;
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
adapter->pinmux_info.bt_dev_wake = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
adapter->pinmux_info.sw_io_0 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
adapter->pinmux_info.sw_io_1 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
adapter->pinmux_info.sw_io_2 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
adapter->pinmux_info.sw_io_3 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
adapter->pinmux_info.sw_io_4 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
adapter->pinmux_info.sw_io_5 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
adapter->pinmux_info.sw_io_6 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
adapter->pinmux_info.sw_io_7 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
adapter->pinmux_info.sw_io_8 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
adapter->pinmux_info.sw_io_9 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
adapter->pinmux_info.sw_io_10 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
adapter->pinmux_info.sw_io_11 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
adapter->pinmux_info.sw_io_12 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
adapter->pinmux_info.sw_io_13 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
adapter->pinmux_info.sw_io_14 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
adapter->pinmux_info.sw_io_15 = val;
break;
default:
return HALMAC_RET_GET_PINMUX_ERR;
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

11
hal/halmac/halmac_88xx/halmac_gpio_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -45,15 +45,6 @@ pinmux_parser_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, u32 *cur_func);
enum halmac_ret_status
pinmux_switch_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func);
enum halmac_ret_status
pinmux_record_88xx(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_GPIO_88XX_H_ */

48
hal/halmac/halmac_88xx/halmac_init_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -132,13 +132,16 @@ init_adapter_param_88xx(struct halmac_adapter *adapter)
adapter->sdio_cmd53_4byte = HALMAC_SDIO_CMD53_4BYTE_MODE_DISABLE;
adapter->sdio_hw_info.io_hi_speed_flag = 0;
adapter->sdio_hw_info.io_indir_flag = 0;
adapter->sdio_hw_info.io_indir_flag = 1;
adapter->sdio_hw_info.io_warn_flag = 0;
adapter->sdio_hw_info.spec_ver = HALMAC_SDIO_SPEC_VER_2_00;
adapter->sdio_hw_info.clock_speed = 50;
adapter->sdio_hw_info.block_size = 512;
adapter->sdio_hw_info.tx_seq = 1;
adapter->sdio_fs.macid_map = (u8 *)NULL;
adapter->watcher.get_watcher.sdio_rn_not_align = 0;
adapter->pinmux_info.wl_led = 0;
adapter->pinmux_info.sdio_int = 0;
adapter->pinmux_info.sw_io_0 = 0;
@@ -218,6 +221,7 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_read_efuse_bt = read_efuse_bt_88xx;
api->halmac_cfg_efuse_auto_check = cfg_efuse_auto_check_88xx;
api->halmac_dump_logical_efuse_map = dump_log_efuse_map_88xx;
api->halmac_dump_logical_efuse_mask = dump_log_efuse_mask_88xx;
api->halmac_pg_efuse_by_map = pg_efuse_by_map_88xx;
api->halmac_mask_logical_efuse = mask_log_efuse_88xx;
api->halmac_get_efuse_size = get_efuse_size_88xx;
@@ -229,6 +233,9 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_write_logical_efuse = write_log_efuse_88xx;
api->halmac_read_logical_efuse = read_logical_efuse_88xx;
api->halmac_write_wifi_phy_efuse = write_wifi_phy_efuse_88xx;
api->halmac_read_wifi_phy_efuse = read_wifi_phy_efuse_88xx;
api->halmac_ofld_func_cfg = ofld_func_cfg_88xx;
api->halmac_h2c_lb = h2c_lb_88xx;
api->halmac_debug = mac_debug_88xx;
@@ -258,6 +265,8 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_p2pps = p2pps_88xx;
api->halmac_clear_ch_info = clear_ch_info_88xx;
api->halmac_send_general_info = send_general_info_88xx;
api->halmac_send_scan_packet = send_scan_packet_88xx;
api->halmac_drop_scan_packet = drop_scan_packet_88xx;
api->halmac_start_iqk = start_iqk_88xx;
api->halmac_ctrl_pwr_tracking = ctrl_pwr_tracking_88xx;
@@ -307,13 +316,12 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_enter_cpu_sleep_mode = enter_cpu_sleep_mode_88xx;
api->halmac_get_cpu_mode = get_cpu_mode_88xx;
api->halmac_drv_fwctrl = drv_fwctrl_88xx;
api->halmac_get_watcher = get_watcher_88xx;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
#if HALMAC_SDIO_SUPPORT
api->halmac_init_sdio_cfg = init_sdio_cfg_88xx;
api->halmac_deinit_sdio_cfg = deinit_sdio_cfg_88xx;
api->halmac_cfg_rx_aggregation = cfg_sdio_rx_agg_88xx;
api->halmac_init_interface_cfg = init_sdio_cfg_88xx;
api->halmac_deinit_interface_cfg = deinit_sdio_cfg_88xx;
api->halmac_cfg_tx_agg_align = cfg_txagg_sdio_align_88xx;
api->halmac_set_bulkout_num = set_sdio_bulkout_num_88xx;
@@ -322,6 +330,7 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_reg_sdio_cmd53_read_n = sdio_reg_rn_88xx;
api->halmac_sdio_cmd53_4byte = sdio_cmd53_4byte_88xx;
api->halmac_sdio_hw_info = sdio_hw_info_88xx;
api->halmac_en_ref_autok_pcie = en_ref_autok_sdio_88xx;
#endif
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
@@ -344,6 +353,7 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_reg_write_32 = reg_w32_usb_88xx;
api->halmac_reg_read_indirect_32 = usb_indirect_reg_r32_88xx;
api->halmac_reg_sdio_cmd53_read_n = usb_reg_rn_88xx;
api->halmac_en_ref_autok_pcie = en_ref_autok_usb_88xx;
#endif
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
#if HALMAC_PCIE_SUPPORT
@@ -365,7 +375,7 @@ mount_api_88xx(struct halmac_adapter *adapter)
api->halmac_reg_write_32 = reg_w32_pcie_88xx;
api->halmac_reg_read_indirect_32 = pcie_indirect_reg_r32_88xx;
api->halmac_reg_sdio_cmd53_read_n = pcie_reg_rn_88xx;
api->halmac_en_ref_autok_pcie = en_ref_autok_88xx;
api->halmac_en_ref_autok_pcie = en_ref_autok_pcie_88xx;
#endif
} else {
PLTFM_MSG_ERR("[ERR]Set halmac io function Error!!\n");
@@ -548,6 +558,7 @@ reset_ofld_feature_88xx(struct halmac_adapter *adapter,
break;
case HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE:
case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE:
case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK:
state->efuse_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->efuse_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
break;
@@ -558,6 +569,12 @@ reset_ofld_feature_88xx(struct halmac_adapter *adapter,
case HALMAC_FEATURE_UPDATE_PACKET:
state->update_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
break;
case HALMAC_FEATURE_SEND_SCAN_PACKET:
state->scan_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
break;
case HALMAC_FEATURE_DROP_SCAN_PACKET:
state->drop_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
break;
case HALMAC_FEATURE_IQK:
state->iqk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
break;
@@ -579,6 +596,8 @@ reset_ofld_feature_88xx(struct halmac_adapter *adapter,
state->scan_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->scan_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
state->update_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->scan_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->drop_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->iqk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->pwr_trk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
state->psd_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
@@ -867,4 +886,23 @@ rqpn_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
fwff_is_empty_88xx(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 cnt;
cnt = 5000;
while (HALMAC_REG_R16(REG_FWFF_CTRL) !=
HALMAC_REG_R16(REG_FWFF_PKT_INFO)) {
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]polling fwff empty fail\n");
return HALMAC_RET_FWFF_NO_EMPTY;
}
cnt--;
PLTFM_DELAY_US(50);
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

5
hal/halmac/halmac_88xx/halmac_init_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -57,6 +57,9 @@ rqpn_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
void
init_ofld_feature_state_machine_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
fwff_is_empty_88xx(struct halmac_adapter *adapter);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_INIT_88XX_H_ */

28
hal/halmac/halmac_88xx/halmac_mimo_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -22,7 +22,7 @@
#define TXBF_CTRL_CFG (BIT_R_ENABLE_NDPA | BIT_USE_NDPA_PARAMETER | \
BIT_R_EN_NDPA_INT | BIT_DIS_NDP_BFEN)
#define CSI_RATE_MAP 0x292911
#define CSI_RATE_MAP 0x55
static void
cfg_mu_bfee_88xx(struct halmac_adapter *adapter,
@@ -63,8 +63,10 @@ cfg_txbf_88xx(struct halmac_adapter *adapter, u8 userid, enum halmac_bw bw,
switch (bw) {
case HALMAC_BW_80:
tmp42c |= BIT_R_TXBF0_80M;
/* fall through */
case HALMAC_BW_40:
tmp42c |= BIT_R_TXBF0_40M;
/* fall through */
case HALMAC_BW_20:
tmp42c |= BIT_R_TXBF0_20M;
break;
@@ -234,7 +236,7 @@ cfg_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role,
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 tmp6dc = 0;
u8 csi_rsc = 0x1;
u8 csi_rsc = 0x0;
/*use ndpa rx rate to decide csi rate*/
tmp6dc = HALMAC_REG_R32(REG_BBPSF_CTRL) | BIT_WMAC_USE_NDPARATE
@@ -244,13 +246,12 @@ cfg_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role,
case HAL_BFER:
HALMAC_REG_W32_SET(REG_TXBF_CTRL, TXBF_CTRL_CFG);
HALMAC_REG_W8(REG_NDPA_RATE, rate);
HALMAC_REG_W8_CLR(REG_NDPA_OPT_CTRL, BIT(0) | BIT(1));
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 1, 0x2 | BIT(7));
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 2, 0x2);
break;
case HAL_BFEE:
HALMAC_REG_W8(REG_SND_PTCL_CTRL, 0xDB);
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 3, 0x26);
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 3, 0x3A);
HALMAC_REG_W8_CLR(REG_RXFLTMAP1, BIT(4));
HALMAC_REG_W8_CLR(REG_RXFLTMAP4, BIT(4));
#if (HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
@@ -619,14 +620,15 @@ mu_bfer_entry_del_88xx(struct halmac_adapter *adapter)
*/
enum halmac_ret_status
cfg_csi_rate_88xx(struct halmac_adapter *adapter, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate)
u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54)
{
u32 csi_cfg;
u16 cur_rrsr;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
*bmp_ofdm54 = 0xFF;
#if HALMAC_8821C_SUPPORT
if (adapter->chip_id == HALMAC_CHIP_ID_8821C && fixrate_en) {
csi_cfg = HALMAC_REG_R32(REG_BBPSF_CTRL) & ~BITS_WMAC_CSI_RATE;
@@ -643,22 +645,24 @@ cfg_csi_rate_88xx(struct halmac_adapter *adapter, u8 rssi, u8 cur_rate,
csi_cfg = HALMAC_REG_R32(REG_BBPSF_CTRL) & ~BITS_WMAC_CSI_RATE;
#endif
cur_rrsr = HALMAC_REG_R16(REG_RRSR);
#if (HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
if (adapter->chip_id == HALMAC_CHIP_ID_8822C ||
adapter->chip_id == HALMAC_CHIP_ID_8812F)
HALMAC_REG_W32_SET(REG_BBPSF_CTRL, BIT(15));
#endif
if (rssi >= 40) {
if (cur_rate != HALMAC_OFDM54) {
cur_rrsr |= BIT(HALMAC_OFDM54);
csi_cfg |= BIT_WMAC_CSI_RATE(HALMAC_OFDM54);
HALMAC_REG_W16(REG_RRSR, cur_rrsr);
HALMAC_REG_W32(REG_BBPSF_CTRL, csi_cfg);
*bmp_ofdm54 = 1;
}
*new_rate = HALMAC_OFDM54;
} else {
if (cur_rate != HALMAC_OFDM24) {
cur_rrsr &= ~(BIT(HALMAC_OFDM54));
csi_cfg |= BIT_WMAC_CSI_RATE(HALMAC_OFDM24);
HALMAC_REG_W16(REG_RRSR, cur_rrsr);
HALMAC_REG_W32(REG_BBPSF_CTRL, csi_cfg);
*bmp_ofdm54 = 0;
}
*new_rate = HALMAC_OFDM24;
}

4
hal/halmac/halmac_88xx/halmac_mimo_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -64,7 +64,7 @@ mu_bfer_entry_del_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_csi_rate_88xx(struct halmac_adapter *adapter, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate);
u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54);
enum halmac_ret_status
fw_snding_88xx(struct halmac_adapter *adapter,

7
hal/halmac/halmac_88xx/halmac_usb_88xx.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -517,4 +517,9 @@ usbphy_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
return value;
}
enum halmac_ret_status
en_ref_autok_usb_88xx(struct halmac_adapter *adapter, u8 en)
{
return HALMAC_RET_NOT_SUPPORT;
}
#endif /* HALMAC_88XX_SUPPORT */

5
hal/halmac/halmac_88xx/halmac_usb_88xx.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -82,6 +82,9 @@ usbphy_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed);
u16
usbphy_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed);
enum halmac_ret_status
en_ref_autok_usb_88xx(struct halmac_adapter *adapter, u8 en);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_API_88XX_USB_H_ */

30
hal/halmac/halmac_api.c
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -34,6 +34,10 @@
#include "halmac_88xx/halmac_init_win8822c.h"
#endif
#if HALMAC_8812F_SUPPORT
#include "halmac_88xx/halmac_init_win8812f.h"
#endif
#else
#if HALMAC_88XX_SUPPORT
@@ -126,10 +130,10 @@ halmac_init_adapter(void *drv_adapter, struct halmac_platform_api *pltfm_api,
pltfm_api->MSG_PRINT(drv_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS,
HALMAC_SVN_VER "\n"
"HALMAC_MAJOR_VER = %x\n"
"HALMAC_PROTOTYPE_VER = %x\n"
"HALMAC_MINOR_VER = %x\n"
"HALMAC_PATCH_VER = %x\n",
"HALMAC_MAJOR_VER = %d\n"
"HALMAC_PROTOTYPE_VER = %d\n"
"HALMAC_MINOR_VER = %d\n"
"HALMAC_PATCH_VER = %s\n",
HALMAC_MAJOR_VER, HALMAC_PROTOTYPE_VER,
HALMAC_MINOR_VER, HALMAC_PATCH_VER);
@@ -234,6 +238,9 @@ halmac_init_adapter(void *drv_adapter, struct halmac_platform_api *pltfm_api,
#endif
*halmac_api = (struct halmac_api *)adapter->halmac_api;
#if HALMAC_DBG_MONITOR_IO
mount_api_dbg(adapter);
#endif
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return status;
@@ -449,7 +456,18 @@ chk_pltfm_api(void *drv_adapter, enum halmac_interface intf,
HALMAC_DBG_ERR, "[ERR]event-indication\n");
return HALMAC_RET_PLATFORM_API_NULL;
}
#if HALMAC_DBG_MONITOR_IO
if (!pltfm_api->READ_MONITOR) {
pltfm_api->MSG_PRINT(drv_adapter, HALMAC_MSG_INIT,
HALMAC_DBG_ERR, "[ERR]read-monitor\n");
return HALMAC_RET_PLATFORM_API_NULL;
}
if (!pltfm_api->WRITE_MONITOR) {
pltfm_api->MSG_PRINT(drv_adapter, HALMAC_MSG_INIT,
HALMAC_DBG_ERR, "[ERR]write-monitor\n");
return HALMAC_RET_PLATFORM_API_NULL;
}
#endif
return HALMAC_RET_SUCCESS;
}

18
hal/halmac/halmac_api.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -18,10 +18,10 @@
#define HALMAC_SVN_VER "11692M"
#define HALMAC_MAJOR_VER 0x0001
#define HALMAC_PROTOTYPE_VER 0x0005
#define HALMAC_MINOR_VER 0x0014
#define HALMAC_PATCH_VER 0x0015
#define HALMAC_MAJOR_VER 1
#define HALMAC_PROTOTYPE_VER 6
#define HALMAC_MINOR_VER 5
#define HALMAC_PATCH_VER "6*"
#define HALMAC_88XX_SUPPORT (HALMAC_8821C_SUPPORT || \
HALMAC_8822B_SUPPORT || \
@@ -71,6 +71,11 @@
#include "halmac_bit_8822c.h"
#endif
#if HALMAC_8812F_SUPPORT
#include "halmac_reg_8812f.h"
#include "halmac_bit_8812f.h"
#endif
#if (HALMAC_PLATFORM_WINDOWS || HALMAC_PLATFORM_LINUX)
#include "halmac_tx_desc_nic.h"
#include "halmac_tx_desc_buffer_nic.h"
@@ -97,6 +102,9 @@
#include "halmac_original_h2c_ap.h"
#endif
#if HALMAC_DBG_MONITOR_IO
#include "halmac_dbg.h"
#endif
#include "halmac_tx_desc_chip.h"
#include "halmac_rx_desc_chip.h"
#include "halmac_tx_desc_buffer_chip.h"

756
hal/halmac/halmac_bit2.h
View File

File diff suppressed because it is too large Load Diff

2
hal/halmac/halmac_bit_8197f.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

22057
hal/halmac/halmac_bit_8812f.h Normal file
View File

File diff suppressed because it is too large Load Diff

4
hal/halmac/halmac_bit_8814b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -14517,6 +14517,7 @@
/* 2 REG_LIFETIME_EN_8814B */
#define BIT_BT_INT_CPU_8814B BIT(7)
#define BIT_BT_INT_PTA_8814B BIT(6)
#define BIT_BA_PARSER_EN_8814B BIT(5)
#define BIT_EN_CTRL_RTYBIT_8814B BIT(4)
#define BIT_LIFETIME_BK_EN_8814B BIT(3)
#define BIT_LIFETIME_BE_EN_8814B BIT(2)
@@ -25467,6 +25468,7 @@
BIT_R_WMAC_RX_FIL_LEN_2_8814B(v))
/* 2 REG_RX_FILTER_FUNCTION_8814B */
#define BIT_RXHANG_EN_8814B BIT(15)
#define BIT_R_WMAC_MHRDDY_LATCH_8814B BIT(14)
#define BIT_R_WMAC_MHRDDY_CLR_8814B BIT(13)
#define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8814B BIT(12)

2
hal/halmac/halmac_bit_8821c.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_bit_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

61
hal/halmac/halmac_bit_8822c.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -177,11 +177,11 @@
/* 2 REG_NOT_VALID_8822C */
/* 2 REG_NOT_VALID_8822C */
#define BIT_R_SYM_CTRL_SPS_PWMFREQ_8822C BIT(10)
#define BIT_HW_AUTO_CTRL_EXT_SWR_8822C BIT(9)
#define BIT_USE_INTERNAL_SWR_AND_LDO_8822C BIT(8)
#define BIT_MAC_ID_EN_8822C BIT(7)
/* 2 REG_NOT_VALID_8822C */
#define BIT_OPTION_DIS_XTAL_BG_8822C BIT(2)
/* 2 REG_SYS_SWR_CTRL2_8822C */
@@ -255,9 +255,9 @@
#define BIT_WLOCK_ALL_8822C BIT(0)
/* 2 REG_RF_CTRL_8822C */
#define BIT_RF_SDMRSTB_8822C BIT(2)
#define BIT_RF_RSTB_8822C BIT(1)
#define BIT_RF_EN_8822C BIT(0)
#define BIT_S0_RFC_WO_0_8822C BIT(7)
#define BIT_S0_RFC_WT_0_8822C BIT(6)
#define BIT_S0_RFC_RSTB_8822C BIT(1)
/* 2 REG_AFE_LDO_CTRL_8822C */
#define BIT_R_SYM_WLPON_EMEM1_EN_8822C BIT(31)
@@ -2047,18 +2047,9 @@
(BIT_CLEAR_PCIE_MIO_DATA_8822C(x) | BIT_PCIE_MIO_DATA_8822C(v))
/* 2 REG_WLRF1_8822C */
#define BIT_SHIFT_WLRF1_CTRL_8822C 24
#define BIT_MASK_WLRF1_CTRL_8822C 0xff
#define BIT_WLRF1_CTRL_8822C(x) \
(((x) & BIT_MASK_WLRF1_CTRL_8822C) << BIT_SHIFT_WLRF1_CTRL_8822C)
#define BITS_WLRF1_CTRL_8822C \
(BIT_MASK_WLRF1_CTRL_8822C << BIT_SHIFT_WLRF1_CTRL_8822C)
#define BIT_CLEAR_WLRF1_CTRL_8822C(x) ((x) & (~BITS_WLRF1_CTRL_8822C))
#define BIT_GET_WLRF1_CTRL_8822C(x) \
(((x) >> BIT_SHIFT_WLRF1_CTRL_8822C) & BIT_MASK_WLRF1_CTRL_8822C)
#define BIT_SET_WLRF1_CTRL_8822C(x, v) \
(BIT_CLEAR_WLRF1_CTRL_8822C(x) | BIT_WLRF1_CTRL_8822C(v))
#define BIT_S1_RFC_WO_0_8822C BIT(31)
#define BIT_S1_RFC_WT_0_8822C BIT(30)
#define BIT_S1_RFC_RSTB_8822C BIT(25)
/* 2 REG_SYS_CFG1_8822C */
@@ -3252,7 +3243,36 @@
/* 2 REG_NOT_VALID_8822C */
/* 2 REG_XTAL_AAC_OUTPUT_8822C */
/* 2 REG_NOT_VALID_8822C */
#define BIT_XTAL_PEAKDET_OUT_8822C BIT(9)
#define BIT_XAAC_BUSY_8822C BIT(8)
#define BIT_XAAC_READY_V1_8822C BIT(7)
#define BIT_SHIFT_XAAC_PK_SEL_8822C 5
#define BIT_MASK_XAAC_PK_SEL_8822C 0x3
#define BIT_XAAC_PK_SEL_8822C(x) \
(((x) & BIT_MASK_XAAC_PK_SEL_8822C) << BIT_SHIFT_XAAC_PK_SEL_8822C)
#define BITS_XAAC_PK_SEL_8822C \
(BIT_MASK_XAAC_PK_SEL_8822C << BIT_SHIFT_XAAC_PK_SEL_8822C)
#define BIT_CLEAR_XAAC_PK_SEL_8822C(x) ((x) & (~BITS_XAAC_PK_SEL_8822C))
#define BIT_GET_XAAC_PK_SEL_8822C(x) \
(((x) >> BIT_SHIFT_XAAC_PK_SEL_8822C) & BIT_MASK_XAAC_PK_SEL_8822C)
#define BIT_SET_XAAC_PK_SEL_8822C(x, v) \
(BIT_CLEAR_XAAC_PK_SEL_8822C(x) | BIT_XAAC_PK_SEL_8822C(v))
#define BIT_SHIFT_XTAL_GM_OUT_8822C 0
#define BIT_MASK_XTAL_GM_OUT_8822C 0x1f
#define BIT_XTAL_GM_OUT_8822C(x) \
(((x) & BIT_MASK_XTAL_GM_OUT_8822C) << BIT_SHIFT_XTAL_GM_OUT_8822C)
#define BITS_XTAL_GM_OUT_8822C \
(BIT_MASK_XTAL_GM_OUT_8822C << BIT_SHIFT_XTAL_GM_OUT_8822C)
#define BIT_CLEAR_XTAL_GM_OUT_8822C(x) ((x) & (~BITS_XTAL_GM_OUT_8822C))
#define BIT_GET_XTAL_GM_OUT_8822C(x) \
(((x) >> BIT_SHIFT_XTAL_GM_OUT_8822C) & BIT_MASK_XTAL_GM_OUT_8822C)
#define BIT_SET_XTAL_GM_OUT_8822C(x, v) \
(BIT_CLEAR_XTAL_GM_OUT_8822C(x) | BIT_XTAL_GM_OUT_8822C(v))
/* 2 REG_ANAPAR_XTAL_MODE_DECODER_8822C */
@@ -10134,6 +10154,7 @@
/* 2 REG_LIFETIME_EN_8822C */
#define BIT_BT_INT_CPU_8822C BIT(7)
#define BIT_BT_INT_PTA_8822C BIT(6)
#define BIT_BA_PARSER_EN_8822C BIT(5)
#define BIT_EN_CTRL_RTYBIT_8822C BIT(4)
#define BIT_LIFETIME_BK_EN_8822C BIT(3)
#define BIT_LIFETIME_BE_EN_8822C BIT(2)
@@ -10603,7 +10624,7 @@
(BIT_CLEAR_R_NDPA_RATE_V1_8822C(x) | BIT_R_NDPA_RATE_V1_8822C(v))
/* 2 REG_TX_HANG_CTRL_8822C */
#define BIT_R_EN_GNT_BT_AWAKE_8822C BIT(3)
#define BIT_EN_GNT_BT_AWAKE_8822C BIT(3)
#define BIT_EN_EOF_V1_8822C BIT(2)
#define BIT_DIS_OQT_BLOCK_8822C BIT(1)
#define BIT_SEARCH_QUEUE_EN_8822C BIT(0)
@@ -21419,6 +21440,7 @@
#define BIT_SDIO_CPWM1_MSK_8822C BIT(18)
#define BIT_SDIO_C2HCMD_INT_MSK_8822C BIT(17)
#define BIT_SDIO_BCNERLY_INT_MSK_8822C BIT(16)
#define BIT_BT_INT_MASK_8822C BIT(8)
#define BIT_SDIO_TXBCNERR_MSK_8822C BIT(7)
#define BIT_SDIO_TXBCNOK_MSK_8822C BIT(6)
#define BIT_SDIO_RXFOVW_MSK_8822C BIT(5)
@@ -21445,6 +21467,7 @@
#define BIT_SDIO_CPWM1_8822C BIT(18)
#define BIT_SDIO_C2HCMD_INT_8822C BIT(17)
#define BIT_SDIO_BCNERLY_INT_8822C BIT(16)
#define BIT_BT_INT_8822C BIT(8)
#define BIT_SDIO_TXBCNERR_8822C BIT(7)
#define BIT_SDIO_TXBCNOK_8822C BIT(6)
#define BIT_SDIO_RXFOVW_8822C BIT(5)

132
hal/halmac/halmac_dbg.c Normal file
View File

@@ -0,0 +1,132 @@
/******************************************************************************
*
* Copyright(c) 2018 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_dbg.h"
#if HALMAC_DBG_MONITOR_IO
static u8
monitor_reg_read_8(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
static u16
monitor_reg_read_16(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
static u32
monitor_reg_read_32(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
static enum halmac_ret_status
monitor_reg_sdio_cmd53_read_n(struct halmac_adapter *adapter,
u32 offset, u32 size, u8 *value,
const char *func, const u32 line);
static enum halmac_ret_status
monitor_reg_write_8(struct halmac_adapter *adapter, u32 offset,
u8 value, const char *func, const u32 line);
static enum halmac_ret_status
monitor_reg_write_16(struct halmac_adapter *adapter, u32 offset,
u16 value, const char *func, const u32 line);
static enum halmac_ret_status
monitor_reg_write_32(struct halmac_adapter *adapter, u32 offset,
u32 value, const char *func, const u32 line);
enum halmac_ret_status
mount_api_dbg(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
api->halmac_mon_reg_read_8 = monitor_reg_read_8;
api->halmac_mon_reg_read_16 = monitor_reg_read_16;
api->halmac_mon_reg_read_32 = monitor_reg_read_32;
api->halmac_mon_reg_sdio_cmd53_read_n = monitor_reg_sdio_cmd53_read_n;
api->halmac_mon_reg_write_8 = monitor_reg_write_8;
api->halmac_mon_reg_write_16 = monitor_reg_write_16;
api->halmac_mon_reg_write_32 = monitor_reg_write_32;
return HALMAC_RET_SUCCESS;
}
u8
monitor_reg_read_8(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 val;
val = api->halmac_reg_read_8(adapter, offset);
PLTFM_MONITOR_READ(offset, 1, val, func, line);
return val;
}
u16
monitor_reg_read_16(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u16 val;
val = api->halmac_reg_read_16(adapter, offset);
PLTFM_MONITOR_READ(offset, 2, val, func, line);
return val;
}
u32
monitor_reg_read_32(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 val;
val = api->halmac_reg_read_32(adapter, offset);
PLTFM_MONITOR_READ(offset, 4, val, func, line);
return val;
}
enum halmac_ret_status
monitor_reg_sdio_cmd53_read_n(struct halmac_adapter *adapter,
u32 offset, u32 size, u8 *value,
const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MONITOR_READ(offset, size, 0, func, line);
return api->halmac_reg_sdio_cmd53_read_n(adapter, offset, size, value);
}
enum halmac_ret_status
monitor_reg_write_8(struct halmac_adapter *adapter, u32 offset,
u8 value, const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MONITOR_WRITE(offset, 1, value, func, line);
return api->halmac_reg_write_8(adapter, offset, value);
}
enum halmac_ret_status
monitor_reg_write_16(struct halmac_adapter *adapter, u32 offset,
u16 value, const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MONITOR_WRITE(offset, 2, value, func, line);
return api->halmac_reg_write_16(adapter, offset, value);
}
enum halmac_ret_status
monitor_reg_write_32(struct halmac_adapter *adapter, u32 offset,
u32 value, const char *func, const u32 line)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MONITOR_WRITE(offset, 4, value, func, line);
return api->halmac_reg_write_32(adapter, offset, value);
}
#endif

26
hal/halmac/halmac_dbg.h Normal file
View File

@@ -0,0 +1,26 @@
/******************************************************************************
*
* Copyright(c) 2018 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_DBG_H_
#define _HALMAC_DBG_H_
#include "halmac_api.h"
#if HALMAC_DBG_MONITOR_IO
enum halmac_ret_status
mount_api_dbg(struct halmac_adapter *adapter);
#endif
#endif

84
hal/halmac/halmac_fw_info.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -16,39 +16,42 @@
#ifndef _HALMAC_FW_INFO_H_
#define _HALMAC_FW_INFO_H_
#define H2C_FORMAT_VERSION 12
#define H2C_FORMAT_VERSION 15
/* FW bin information */
#define WLAN_FW_HDR_SIZE 64
#define WLAN_FW_HDR_CHKSUM_SIZE 8
#define WLAN_FW_HDR_SIZE 64
#define WLAN_FW_HDR_CHKSUM_SIZE 8
#define WLAN_FW_HDR_VERSION 4
#define WLAN_FW_HDR_SUBVERSION 6
#define WLAN_FW_HDR_SUBINDEX 7
#define WLAN_FW_HDR_MONTH 16
#define WLAN_FW_HDR_DATE 17
#define WLAN_FW_HDR_HOUR 18
#define WLAN_FW_HDR_MIN 19
#define WLAN_FW_HDR_YEAR 20
#define WLAN_FW_HDR_MEM_USAGE 24
#define WLAN_FW_HDR_H2C_FMT_VER 28
#define WLAN_FW_HDR_DMEM_ADDR 32
#define WLAN_FW_HDR_DMEM_SIZE 36
#define WLAN_FW_HDR_IMEM_SIZE 48
#define WLAN_FW_HDR_EMEM_SIZE 52
#define WLAN_FW_HDR_EMEM_ADDR 56
#define WLAN_FW_HDR_IMEM_ADDR 60
#define WLAN_FW_HDR_VERSION 4
#define WLAN_FW_HDR_SUBVERSION 6
#define WLAN_FW_HDR_SUBINDEX 7
#define WLAN_FW_HDR_MONTH 16
#define WLAN_FW_HDR_DATE 17
#define WLAN_FW_HDR_HOUR 18
#define WLAN_FW_HDR_MIN 19
#define WLAN_FW_HDR_YEAR 20
#define WLAN_FW_HDR_MEM_USAGE 24
#define WLAN_FW_HDR_H2C_FMT_VER 28
#define WLAN_FW_HDR_DMEM_ADDR 32
#define WLAN_FW_HDR_DMEM_SIZE 36
#define WLAN_FW_HDR_IMEM_SIZE 48
#define WLAN_FW_HDR_EMEM_SIZE 52
#define WLAN_FW_HDR_EMEM_ADDR 56
#define WLAN_FW_HDR_IMEM_ADDR 60
#define H2C_ACK_HDR_CONTENT_LENGTH 8
#define H2C_ACK_HDR_CONTENT_LENGTH 8
#define CFG_PARAMETER_ACK_CONTENT_LENGTH 16
#define CH_SWITCH_ACK_CONTENT_LENGTH 16
#define SCAN_STATUS_RPT_CONTENT_LENGTH 4
#define C2H_DBG_HDR_LEN 4
#define C2H_DBG_CONTENT_MAX_LENGTH 228
#define C2H_DBG_CONTENT_SEQ_OFFSET 1
#define SCAN_STATUS_RPT_CONTENT_LENGTH_V2 12
#define SCAN_CH_NOTIFY_CONTENT_LENGTH 12
#define C2H_DBG_HDR_LEN 4
#define C2H_DBG_CONTENT_MAX_LENGTH 228
#define C2H_DBG_CONTENT_SEQ_OFFSET 1
/* Rename from FW SysHalCom_Debug_RAM.h */
#define FW_REG_H2CPKT_DONE_SEQ 0x1C8
#define FW_REG_WOW_REASON 0x1C7
#define FW_REG_H2CPKT_DONE_SEQ 0x1C8
#define FW_REG_WOW_REASON 0x1C7
enum halmac_data_type {
HALMAC_DATA_TYPE_MAC_REG = 0x00,
@@ -89,6 +92,7 @@ enum halmac_cs_extra_action_id {
HALMAC_CS_EXTRA_ACTION_NONE = 0x00,
HALMAC_CS_EXTRA_UPDATE_PROBE = 0x01,
HALMAC_CS_EXTRA_UPDATE_BEACON = 0x02,
HALMAC_CS_EXTRA_ACTION_SCAN = 0x03,
HALMAC_CS_EXTRA_ACTION_UNDEFINE = 0x7FFFFFFF,
};
@@ -108,6 +112,10 @@ enum halmac_h2c_return_code {
HALMAC_H2C_RETURN_SCAN_ERR_FULL = 0x0C,
HALMAC_H2C_RETURN_SCAN_ERR_PHYDM = 0x0D,
HALMAC_H2C_RETURN_ORIG_ERR_ID = 0x0E,
HALMAC_H2C_RETURN_SCAN_PKT_FULL = 0x0F,
HALMAC_H2C_RETURN_SCAN_PKT_BUF_BUSY = 0x10,
HALMAC_H2C_RETURN_SCAN_PKT_IDX_REUSE = 0x11,
HALMAC_H2C_RETURN_EFUSE_BUF_BUSY = 0x12,
HALMAC_H2C_RETURN_UNDEFINE = 0x7FFFFFFF,
};
@@ -119,4 +127,28 @@ enum halmac_scan_report_code {
HALMAC_SCAN_REPORT_UNDEFINE = 0x7FFFFFFF,
};
enum halmac_scan_notify_id {
HALMAC_SCAN_NOTIFY_ID_PRESWITCH = 0x00,
HALMAC_SCAN_NOTIFY_ID_POSTSWITCH = 0x01,
HALMAC_SCAN_NOTIFY_ID_PROBE_PRETX = 0x02,
HALMAC_SCAN_NOTIFY_ID_PROBE_POSTTX = 0x03,
HALMAC_SCAN_NOTIFY_ID_ACTION_PRETX = 0x04,
HALMAC_SCAN_NOTIFY_ID_ACTION_POSTTX = 0x05,
HALMAC_SCAN_NOTIFY_ID_DWELLEXT = 0x06,
HALMAC_SCAN_NOTIFY_ID_UNDEFINE = 0x7F,
};
enum halmac_scan_notify_status {
HALMAC_SCAN_NOTIFY_STATUS_NONE = 0x00,
HALMAC_SCAN_NOTIFY_STATUS_PHYDM_OK = 0x01,
HALMAC_SCAN_NOTIFY_STATUS_PHYDM_ERR = 0x02,
HALMAC_SCAN_NOTIFY_STATUS_NO_PROBE = 0x03,
HALMAC_SCAN_NOTIFY_STATUS_TX_PROBE_OK = 0x04,
HALMAC_SCAN_NOTIFY_STATUS_TX_PROBE_FAIL = 0x05,
HALMAC_SCAN_NOTIFY_STATUS_INVALID_ACTION_IDX = 0x06,
HALMAC_SCAN_NOTIFY_STATUS_TX_ACTION_OK = 0x07,
HALMAC_SCAN_NOTIFY_STATUS_TX_ACTION_FAIL = 0x08,
HALMAC_SCAN_NOTIFY_STATUS_UNDEFINE = 0x7F,
};
#endif

31
hal/halmac/halmac_fw_offload_c2h_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -24,12 +24,16 @@
#define C2H_SUB_CMD_ID_BT_COEX_ACK 0X01
#define C2H_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK 0X01
#define C2H_SUB_CMD_ID_UPDATE_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_SEND_SCAN_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_DROP_SCAN_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_UPDATE_DATAPACK_ACK 0X01
#define C2H_SUB_CMD_ID_RUN_DATAPACK_ACK 0X01
#define C2H_SUB_CMD_ID_IQK_ACK 0X01
#define C2H_SUB_CMD_ID_PWR_TRK_ACK 0X01
#define C2H_SUB_CMD_ID_PSD_ACK 0X01
#define C2H_SUB_CMD_ID_FW_MEM_DUMP_ACK 0X01
#define C2H_SUB_CMD_ID_ACT_SCHEDULE_REQ_ACK 0X1
#define C2H_SUB_CMD_ID_NAN_FUNC_CTRL_ACK 0X1
#define C2H_SUB_CMD_ID_PSD_DATA 0X04
#define C2H_SUB_CMD_ID_EFUSE_DATA 0X05
#define C2H_SUB_CMD_ID_IQK_DATA 0X06
@@ -44,6 +48,8 @@
#define C2H_SUB_CMD_ID_CCX_RPT 0X0F
#define C2H_SUB_CMD_ID_C2H_PKT_NAN_RPT 0X10
#define C2H_SUB_CMD_ID_C2H_PKT_ATM_RPT 0X11
#define C2H_SUB_CMD_ID_C2H_PKT_SCC_CSA_RPT 0X1A
#define C2H_SUB_CMD_ID_C2H_PKT_FW_STATUS_NOTIFY 0X1B
#define C2H_SUB_CMD_ID_C2H_PKT_FTMSESSION_END 0X1C
#define C2H_SUB_CMD_ID_C2H_PKT_DETECT_THERMAL 0X1D
#define C2H_SUB_CMD_ID_FW_DBG_MSG 0XFF
@@ -59,12 +65,16 @@
#define H2C_SUB_CMD_ID_BT_COEX_ACK SUB_CMD_ID_BT_COEX
#define H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK SUB_CMD_ID_DUMP_PHYSICAL_EFUSE
#define H2C_SUB_CMD_ID_UPDATE_PKT_ACK SUB_CMD_ID_UPDATE_PKT
#define H2C_SUB_CMD_ID_SEND_SCAN_PKT_ACK SUB_CMD_ID_SEND_SCAN_PKT
#define H2C_SUB_CMD_ID_DROP_SCAN_PKT_ACK SUB_CMD_ID_DROP_SCAN_PKT
#define H2C_SUB_CMD_ID_UPDATE_DATAPACK_ACK SUB_CMD_ID_UPDATE_DATAPACK
#define H2C_SUB_CMD_ID_RUN_DATAPACK_ACK SUB_CMD_ID_RUN_DATAPACK
#define H2C_SUB_CMD_ID_IQK_ACK SUB_CMD_ID_IQK
#define H2C_SUB_CMD_ID_PWR_TRK_ACK SUB_CMD_ID_PWR_TRK
#define H2C_SUB_CMD_ID_PSD_ACK SUB_CMD_ID_PSD
#define H2C_SUB_CMD_ID_FW_MEM_DUMP_ACK SUB_CMD_ID_FW_MEM_DUMP
#define H2C_SUB_CMD_ID_ACT_SCHEDULE_REQ_ACK SUB_CMD_ID_ACT_SCHEDULE_REQ
#define H2C_SUB_CMD_ID_NAN_FUNC_CTRL_ACK SUB_CMD_ID_NAN_FUNC_CTRL
#define H2C_SUB_CMD_ID_CCX_RPT SUB_CMD_ID_CCX_RPT
#define H2C_SUB_CMD_ID_FW_DBG_MSG SUB_CMD_ID_FW_DBG_MSG
#define H2C_SUB_CMD_ID_FW_SNDING_ACK SUB_CMD_ID_FW_SNDING
@@ -76,12 +86,16 @@
#define H2C_CMD_ID_BT_COEX_ACK 0XFF
#define H2C_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK 0XFF
#define H2C_CMD_ID_UPDATE_PKT_ACK 0XFF
#define H2C_CMD_ID_SEND_SCAN_PKT_ACK 0XFF
#define H2C_CMD_ID_DROP_SCAN_PKT_ACK 0XFF
#define H2C_CMD_ID_UPDATE_DATAPACK_ACK 0XFF
#define H2C_CMD_ID_RUN_DATAPACK_ACK 0XFF
#define H2C_CMD_ID_IQK_ACK 0XFF
#define H2C_CMD_ID_PWR_TRK_ACK 0XFF
#define H2C_CMD_ID_PSD_ACK 0XFF
#define H2C_CMD_ID_FW_MEM_DUMP_ACK 0XFF
#define H2C_CMD_ID_ACT_SCHEDULE_REQ_ACK 0XFF
#define H2C_CMD_ID_NAN_FUNC_CTRL_ACK 0XFF
#define H2C_CMD_ID_CCX_RPT 0XFF
#define H2C_CMD_ID_FW_DBG_MSG 0XFF
#define H2C_CMD_ID_FW_SNDING_ACK 0XFF
@@ -430,6 +444,18 @@
SET_C2H_FIELD_CLR(c2h_pkt + 0XC, 30, 2, value)
#define CCX_RPT_SET_BW_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0XC, 30, 2, value)
#define C2H_PKT_FW_STATUS_NOTIFY_GET_STATUS_CODE(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X04, 0, 32)
#define C2H_PKT_FW_STATUS_NOTIFY_SET_STATUS_CODE(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 32, value)
#define C2H_PKT_FW_STATUS_NOTIFY_SET_STATUS_CODE_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X04, 0, 32, value)
#define C2H_PKT_DETECT_THERMAL_GET_THERMAL_VALUE(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X04, 0, 32)
#define C2H_PKT_DETECT_THERMAL_SET_THERMAL_VALUE(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 32, value)
#define C2H_PKT_DETECT_THERMAL_SET_THERMAL_VALUE_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X04, 0, 32, value)
#define FW_DBG_MSG_GET_CMD_ID(c2h_pkt) GET_C2H_FIELD(c2h_pkt + 0X00, 0, 8)
#define FW_DBG_MSG_SET_CMD_ID(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
@@ -650,8 +676,7 @@
SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
#define FW_TBTT_RPT_SET_PORT_NUMBER_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X04, 0, 8, value)
#define BCN_OFFLOAD_GET_SUPPORT_VER(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X04, 0, 8)
#define BCN_OFFLOAD_GET_SUPPORT_VER(c2h_pkt) GET_C2H_FIELD(c2h_pkt + 0X04, 0, 8)
#define BCN_OFFLOAD_SET_SUPPORT_VER(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
#define BCN_OFFLOAD_SET_SUPPORT_VER_NO_CLR(c2h_pkt, value) \

24
hal/halmac/halmac_fw_offload_c2h_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -24,12 +24,16 @@
#define C2H_SUB_CMD_ID_BT_COEX_ACK 0X01
#define C2H_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK 0X01
#define C2H_SUB_CMD_ID_UPDATE_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_SEND_SCAN_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_DROP_SCAN_PKT_ACK 0X01
#define C2H_SUB_CMD_ID_UPDATE_DATAPACK_ACK 0X01
#define C2H_SUB_CMD_ID_RUN_DATAPACK_ACK 0X01
#define C2H_SUB_CMD_ID_IQK_ACK 0X01
#define C2H_SUB_CMD_ID_PWR_TRK_ACK 0X01
#define C2H_SUB_CMD_ID_PSD_ACK 0X01
#define C2H_SUB_CMD_ID_FW_MEM_DUMP_ACK 0X01
#define C2H_SUB_CMD_ID_ACT_SCHEDULE_REQ_ACK 0X1
#define C2H_SUB_CMD_ID_NAN_FUNC_CTRL_ACK 0X1
#define C2H_SUB_CMD_ID_PSD_DATA 0X04
#define C2H_SUB_CMD_ID_EFUSE_DATA 0X05
#define C2H_SUB_CMD_ID_IQK_DATA 0X06
@@ -44,6 +48,8 @@
#define C2H_SUB_CMD_ID_CCX_RPT 0X0F
#define C2H_SUB_CMD_ID_C2H_PKT_NAN_RPT 0X10
#define C2H_SUB_CMD_ID_C2H_PKT_ATM_RPT 0X11
#define C2H_SUB_CMD_ID_C2H_PKT_SCC_CSA_RPT 0X1A
#define C2H_SUB_CMD_ID_C2H_PKT_FW_STATUS_NOTIFY 0X1B
#define C2H_SUB_CMD_ID_C2H_PKT_FTMSESSION_END 0X1C
#define C2H_SUB_CMD_ID_C2H_PKT_DETECT_THERMAL 0X1D
#define C2H_SUB_CMD_ID_FW_DBG_MSG 0XFF
@@ -59,12 +65,16 @@
#define H2C_SUB_CMD_ID_BT_COEX_ACK SUB_CMD_ID_BT_COEX
#define H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK SUB_CMD_ID_DUMP_PHYSICAL_EFUSE
#define H2C_SUB_CMD_ID_UPDATE_PKT_ACK SUB_CMD_ID_UPDATE_PKT
#define H2C_SUB_CMD_ID_SEND_SCAN_PKT_ACK SUB_CMD_ID_SEND_SCAN_PKT
#define H2C_SUB_CMD_ID_DROP_SCAN_PKT_ACK SUB_CMD_ID_DROP_SCAN_PKT
#define H2C_SUB_CMD_ID_UPDATE_DATAPACK_ACK SUB_CMD_ID_UPDATE_DATAPACK
#define H2C_SUB_CMD_ID_RUN_DATAPACK_ACK SUB_CMD_ID_RUN_DATAPACK
#define H2C_SUB_CMD_ID_IQK_ACK SUB_CMD_ID_IQK
#define H2C_SUB_CMD_ID_PWR_TRK_ACK SUB_CMD_ID_PWR_TRK
#define H2C_SUB_CMD_ID_PSD_ACK SUB_CMD_ID_PSD
#define H2C_SUB_CMD_ID_FW_MEM_DUMP_ACK SUB_CMD_ID_FW_MEM_DUMP
#define H2C_SUB_CMD_ID_ACT_SCHEDULE_REQ_ACK SUB_CMD_ID_ACT_SCHEDULE_REQ
#define H2C_SUB_CMD_ID_NAN_FUNC_CTRL_ACK SUB_CMD_ID_NAN_FUNC_CTRL
#define H2C_SUB_CMD_ID_CCX_RPT SUB_CMD_ID_CCX_RPT
#define H2C_SUB_CMD_ID_FW_DBG_MSG SUB_CMD_ID_FW_DBG_MSG
#define H2C_SUB_CMD_ID_FW_SNDING_ACK SUB_CMD_ID_FW_SNDING
@@ -76,12 +86,16 @@
#define H2C_CMD_ID_BT_COEX_ACK 0XFF
#define H2C_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK 0XFF
#define H2C_CMD_ID_UPDATE_PKT_ACK 0XFF
#define H2C_CMD_ID_SEND_SCAN_PKT_ACK 0XFF
#define H2C_CMD_ID_DROP_SCAN_PKT_ACK 0XFF
#define H2C_CMD_ID_UPDATE_DATAPACK_ACK 0XFF
#define H2C_CMD_ID_RUN_DATAPACK_ACK 0XFF
#define H2C_CMD_ID_IQK_ACK 0XFF
#define H2C_CMD_ID_PWR_TRK_ACK 0XFF
#define H2C_CMD_ID_PSD_ACK 0XFF
#define H2C_CMD_ID_FW_MEM_DUMP_ACK 0XFF
#define H2C_CMD_ID_ACT_SCHEDULE_REQ_ACK 0XFF
#define H2C_CMD_ID_NAN_FUNC_CTRL_ACK 0XFF
#define H2C_CMD_ID_CCX_RPT 0XFF
#define H2C_CMD_ID_FW_DBG_MSG 0XFF
#define H2C_CMD_ID_FW_SNDING_ACK 0XFF
@@ -320,6 +334,14 @@
#define CCX_RPT_GET_BW(c2h_pkt) LE_BITS_TO_4BYTE(c2h_pkt + 0XC, 30, 2)
#define CCX_RPT_SET_BW(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0XC, 30, 2, value)
#define C2H_PKT_FW_STATUS_NOTIFY_GET_STATUS_CODE(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X04, 0, 32)
#define C2H_PKT_FW_STATUS_NOTIFY_SET_STATUS_CODE(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X04, 0, 32, value)
#define C2H_PKT_DETECT_THERMAL_GET_THERMAL_VALUE(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X04, 0, 32)
#define C2H_PKT_DETECT_THERMAL_SET_THERMAL_VALUE(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X04, 0, 32, value)
#define FW_DBG_MSG_GET_CMD_ID(c2h_pkt) LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 0, 8)
#define FW_DBG_MSG_SET_CMD_ID(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 0, 8, value)

186
hal/halmac/halmac_fw_offload_h2c_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -34,13 +34,16 @@
#define CMD_ID_FW_FWCTRL 0XFF
#define CMD_ID_H2C_LOOPBACK 0XFF
#define CMD_ID_FWCMD_LOOPBACK 0XFF
#define CMD_ID_UPDATE_SCAN_PKT 0XFF
#define CMD_ID_SEND_SCAN_PKT 0XFF
#define CMD_ID_BCN_OFFLOAD 0XFF
#define CMD_ID_DROP_SCAN_PKT 0XFF
#define CMD_ID_P2PPS 0XFF
#define CMD_ID_BT_COEX 0XFF
#define CMD_ID_ACT_SCHEDULE_REQ 0XFF
#define CMD_ID_NAN_CTRL 0XFF
#define CMD_ID_NAN_CHANNEL_PLAN_0 0XFF
#define CMD_ID_NAN_CHANNEL_PLAN_1 0XFF
#define CMD_ID_NAN_FUNC_CTRL 0XFF
#define CATEGORY_H2C_CMD_HEADER 0X00
#define CATEGORY_FW_OFFLOAD_H2C 0X01
#define CATEGORY_FW_ACCESS_TEST 0X01
@@ -61,13 +64,16 @@
#define CATEGORY_FW_FWCTRL 0X01
#define CATEGORY_H2C_LOOPBACK 0X01
#define CATEGORY_FWCMD_LOOPBACK 0X01
#define CATEGORY_UPDATE_SCAN_PKT 0X01
#define CATEGORY_SEND_SCAN_PKT 0X01
#define CATEGORY_BCN_OFFLOAD 0X01
#define CATEGORY_DROP_SCAN_PKT 0X01
#define CATEGORY_P2PPS 0X01
#define CATEGORY_BT_COEX 0X01
#define CATEGORY_ACT_SCHEDULE_REQ 0X01
#define CATEGORY_NAN_CTRL 0X01
#define CATEGORY_NAN_CHANNEL_PLAN_0 0X01
#define CATEGORY_NAN_CHANNEL_PLAN_1 0X01
#define CATEGORY_NAN_FUNC_CTRL 0X01
#define SUB_CMD_ID_FW_ACCESS_TEST 0X00
#define SUB_CMD_ID_CH_SWITCH 0X02
#define SUB_CMD_ID_DUMP_PHYSICAL_EFUSE 0X03
@@ -86,13 +92,16 @@
#define SUB_CMD_ID_FW_FWCTRL 0X13
#define SUB_CMD_ID_H2C_LOOPBACK 0X14
#define SUB_CMD_ID_FWCMD_LOOPBACK 0X15
#define SUB_CMD_ID_UPDATE_SCAN_PKT 0X16
#define SUB_CMD_ID_SEND_SCAN_PKT 0X16
#define SUB_CMD_ID_BCN_OFFLOAD 0X17
#define SUB_CMD_ID_DROP_SCAN_PKT 0X18
#define SUB_CMD_ID_P2PPS 0X24
#define SUB_CMD_ID_BT_COEX 0X60
#define SUB_CMD_ID_ACT_SCHEDULE_REQ 0X70
#define SUB_CMD_ID_NAN_CTRL 0XB2
#define SUB_CMD_ID_NAN_CHANNEL_PLAN_0 0XB4
#define SUB_CMD_ID_NAN_CHANNEL_PLAN_1 0XB5
#define SUB_CMD_ID_NAN_FUNC_CTRL 0XB6
#define H2C_CMD_HEADER_GET_CATEGORY(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X00, 0, 7)
#define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 7, value)
@@ -626,6 +635,21 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 28, 4, value)
#define PHYDM_INFO_SET_TX_ANT_STATUS_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 28, 4, value)
#define PHYDM_INFO_GET_EXT_PA(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0XC, 0, 8)
#define PHYDM_INFO_SET_EXT_PA(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0XC, 0, 8, value)
#define PHYDM_INFO_SET_EXT_PA_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0XC, 0, 8, value)
#define PHYDM_INFO_GET_PACKAGE_TYPE(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0XC, 8, 8)
#define PHYDM_INFO_SET_PACKAGE_TYPE(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0XC, 8, 8, value)
#define PHYDM_INFO_SET_PACKAGE_TYPE_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0XC, 8, 8, value)
#define PHYDM_INFO_GET_MP_MODE(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0XC, 16, 1)
#define PHYDM_INFO_SET_MP_MODE(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0XC, 16, 1, value)
#define PHYDM_INFO_SET_MP_MODE_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0XC, 16, 1, value)
#define FW_SNDING_GET_SU0(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 1)
#define FW_SNDING_SET_SU0(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 1, value)
@@ -709,20 +733,20 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X0C, 0, 32, value)
#define FW_FWCTRL_SET_CONTENT_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X0C, 0, 32, value)
#define UPDATE_SCAN_PKT_GET_SIZE(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 16)
#define UPDATE_SCAN_PKT_SET_SIZE(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_SIZE(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 16)
#define SEND_SCAN_PKT_SET_SIZE(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 16, value)
#define UPDATE_SCAN_PKT_SET_SIZE_NO_CLR(h2c_pkt, value) \
#define SEND_SCAN_PKT_SET_SIZE_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 0, 16, value)
#define UPDATE_SCAN_PKT_GET_INDEX(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 16, 8)
#define UPDATE_SCAN_PKT_SET_INDEX(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_INDEX(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 16, 8)
#define SEND_SCAN_PKT_SET_INDEX(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 16, 8, value)
#define UPDATE_SCAN_PKT_SET_INDEX_NO_CLR(h2c_pkt, value) \
#define SEND_SCAN_PKT_SET_INDEX_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 16, 8, value)
#define UPDATE_SCAN_PKT_GET_LOC(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 24, 8)
#define UPDATE_SCAN_PKT_SET_LOC(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_LOC(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 24, 8)
#define SEND_SCAN_PKT_SET_LOC(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 24, 8, value)
#define UPDATE_SCAN_PKT_SET_LOC_NO_CLR(h2c_pkt, value) \
#define SEND_SCAN_PKT_SET_LOC_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 24, 8, value)
#define BCN_OFFLOAD_GET_REQUEST_VERSION(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 0, 1)
@@ -764,6 +788,22 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X0C, 0, 8, value)
#define BCN_OFFLOAD_SET_RULE_CONTENT_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X0C, 0, 8, value)
#define DROP_SCAN_PKT_GET_DROP_ALL(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 1)
#define DROP_SCAN_PKT_SET_DROP_ALL(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 1, value)
#define DROP_SCAN_PKT_SET_DROP_ALL_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 0, 1, value)
#define DROP_SCAN_PKT_GET_DROP_SINGLE(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 1, 1)
#define DROP_SCAN_PKT_SET_DROP_SINGLE(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 1, 1, value)
#define DROP_SCAN_PKT_SET_DROP_SINGLE_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 1, 1, value)
#define DROP_SCAN_PKT_GET_DROP_IDX(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 8, 8)
#define DROP_SCAN_PKT_SET_DROP_IDX(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 8, 8, value)
#define DROP_SCAN_PKT_SET_DROP_IDX_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 8, 8, value)
#define P2PPS_GET_OFFLOAD_EN(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 1)
#define P2PPS_SET_OFFLOAD_EN(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 1, value)
@@ -852,6 +892,65 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 8, value)
#define BT_COEX_SET_DATA_START_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_MODULE_ID(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 0, 8)
#define ACT_SCHEDULE_REQ_SET_MODULE_ID(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 8, value)
#define ACT_SCHEDULE_REQ_SET_MODULE_ID_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_PRIORITY(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 8, 8)
#define ACT_SCHEDULE_REQ_SET_PRIORITY(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 8, 8, value)
#define ACT_SCHEDULE_REQ_SET_PRIORITY_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 8, 8, value)
#define ACT_SCHEDULE_REQ_GET_RSVD1(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 16, 16)
#define ACT_SCHEDULE_REQ_SET_RSVD1(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 16, 16, value)
#define ACT_SCHEDULE_REQ_SET_RSVD1_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 16, 16, value)
#define ACT_SCHEDULE_REQ_GET_START_TIME(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0XC, 0, 32)
#define ACT_SCHEDULE_REQ_SET_START_TIME(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0XC, 0, 32, value)
#define ACT_SCHEDULE_REQ_SET_START_TIME_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0XC, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_DURATION(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X10, 0, 32)
#define ACT_SCHEDULE_REQ_SET_DURATION(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X10, 0, 32, value)
#define ACT_SCHEDULE_REQ_SET_DURATION_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X10, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_PERIOD(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X14, 0, 32)
#define ACT_SCHEDULE_REQ_SET_PERIOD(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X14, 0, 32, value)
#define ACT_SCHEDULE_REQ_SET_PERIOD_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X14, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_TSF_IDX(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X18, 0, 8)
#define ACT_SCHEDULE_REQ_SET_TSF_IDX(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X18, 0, 8, value)
#define ACT_SCHEDULE_REQ_SET_TSF_IDX_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X18, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_CHANNEL(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X18, 8, 8)
#define ACT_SCHEDULE_REQ_SET_CHANNEL(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X18, 8, 8, value)
#define ACT_SCHEDULE_REQ_SET_CHANNEL_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X18, 8, 8, value)
#define ACT_SCHEDULE_REQ_GET_BW(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X18, 16, 8)
#define ACT_SCHEDULE_REQ_SET_BW(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X18, 16, 8, value)
#define ACT_SCHEDULE_REQ_SET_BW_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X18, 16, 8, value)
#define ACT_SCHEDULE_REQ_GET_PRIMART_CH_IDX(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X18, 24, 9)
#define ACT_SCHEDULE_REQ_SET_PRIMART_CH_IDX(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X18, 24, 9, value)
#define ACT_SCHEDULE_REQ_SET_PRIMART_CH_IDX_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X18, 24, 9, value)
#define NAN_CTRL_GET_NAN_EN(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 2)
#define NAN_CTRL_SET_NAN_EN(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 2, value)
@@ -1052,4 +1151,65 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X1C, 16, 16, value)
#define NAN_CHANNEL_PLAN_1_SET_DURATION_5_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X1C, 16, 16, value)
#define NAN_FUNC_CTRL_GET_PORT_IDX(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 0, 8)
#define NAN_FUNC_CTRL_SET_PORT_IDX(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 0, 8, value)
#define NAN_FUNC_CTRL_SET_PORT_IDX_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 0, 8, value)
#define NAN_FUNC_CTRL_GET_MAC_ID(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X08, 8, 8)
#define NAN_FUNC_CTRL_SET_MAC_ID(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 8, 8, value)
#define NAN_FUNC_CTRL_SET_MAC_ID_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 8, 8, value)
#define NAN_FUNC_CTRL_GET_MASTER_PREF(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 16, 8)
#define NAN_FUNC_CTRL_SET_MASTER_PREF(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 16, 8, value)
#define NAN_FUNC_CTRL_SET_MASTER_PREF_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 16, 8, value)
#define NAN_FUNC_CTRL_GET_RANDOM_FACTOR(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X08, 24, 8)
#define NAN_FUNC_CTRL_SET_RANDOM_FACTOR(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X08, 24, 8, value)
#define NAN_FUNC_CTRL_SET_RANDOM_FACTOR_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X08, 24, 8, value)
#define NAN_FUNC_CTRL_GET_OP_CH_24G(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X0C, 0, 8)
#define NAN_FUNC_CTRL_SET_OP_CH_24G(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X0C, 0, 8, value)
#define NAN_FUNC_CTRL_SET_OP_CH_24G_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X0C, 0, 8, value)
#define NAN_FUNC_CTRL_GET_OP_CH_5G(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X0C, 8, 8)
#define NAN_FUNC_CTRL_SET_OP_CH_5G(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X0C, 8, 8, value)
#define NAN_FUNC_CTRL_SET_OP_CH_5G_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X0C, 8, 8, value)
#define NAN_FUNC_CTRL_GET_OPTIONS(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X0C, 16, 16)
#define NAN_FUNC_CTRL_SET_OPTIONS(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X0C, 16, 16, value)
#define NAN_FUNC_CTRL_SET_OPTIONS_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X0C, 16, 16, value)
#define NAN_FUNC_CTRL_GET_SYNC_BCN_RSVD_OFFSET(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X10, 0, 8)
#define NAN_FUNC_CTRL_SET_SYNC_BCN_RSVD_OFFSET(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X10, 0, 8, value)
#define NAN_FUNC_CTRL_SET_SYNC_BCN_RSVD_OFFSET_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X10, 0, 8, value)
#define NAN_FUNC_CTRL_GET_DISC_BCN_RSVD_OFFSET(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X10, 8, 8)
#define NAN_FUNC_CTRL_SET_DISC_BCN_RSVD_OFFSET(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X10, 8, 8, value)
#define NAN_FUNC_CTRL_SET_DISC_BCN_RSVD_OFFSET_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X10, 8, 8, value)
#define NAN_FUNC_CTRL_GET_DW_SCHDL_PRIORITY(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X10, 16, 8)
#define NAN_FUNC_CTRL_SET_DW_SCHDL_PRIORITY(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X10, 16, 8, value)
#define NAN_FUNC_CTRL_SET_DW_SCHDL_PRIORITY_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X10, 16, 8, value)
#define NAN_FUNC_CTRL_GET_TIME_INDICATE_PERIOD(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X10, 24, 8)
#define NAN_FUNC_CTRL_SET_TIME_INDICATE_PERIOD(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X10, 24, 8, value)
#define NAN_FUNC_CTRL_SET_TIME_INDICATE_PERIOD_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X10, 24, 8, value)
#endif

135
hal/halmac/halmac_fw_offload_h2c_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -34,13 +34,16 @@
#define CMD_ID_FW_FWCTRL 0XFF
#define CMD_ID_H2C_LOOPBACK 0XFF
#define CMD_ID_FWCMD_LOOPBACK 0XFF
#define CMD_ID_UPDATE_SCAN_PKT 0XFF
#define CMD_ID_SEND_SCAN_PKT 0XFF
#define CMD_ID_BCN_OFFLOAD 0XFF
#define CMD_ID_DROP_SCAN_PKT 0XFF
#define CMD_ID_P2PPS 0XFF
#define CMD_ID_BT_COEX 0XFF
#define CMD_ID_ACT_SCHEDULE_REQ 0XFF
#define CMD_ID_NAN_CTRL 0XFF
#define CMD_ID_NAN_CHANNEL_PLAN_0 0XFF
#define CMD_ID_NAN_CHANNEL_PLAN_1 0XFF
#define CMD_ID_NAN_FUNC_CTRL 0XFF
#define CATEGORY_H2C_CMD_HEADER 0X00
#define CATEGORY_FW_OFFLOAD_H2C 0X01
#define CATEGORY_FW_ACCESS_TEST 0X01
@@ -61,13 +64,16 @@
#define CATEGORY_FW_FWCTRL 0X01
#define CATEGORY_H2C_LOOPBACK 0X01
#define CATEGORY_FWCMD_LOOPBACK 0X01
#define CATEGORY_UPDATE_SCAN_PKT 0X01
#define CATEGORY_SEND_SCAN_PKT 0X01
#define CATEGORY_BCN_OFFLOAD 0X01
#define CATEGORY_DROP_SCAN_PKT 0X01
#define CATEGORY_P2PPS 0X01
#define CATEGORY_BT_COEX 0X01
#define CATEGORY_ACT_SCHEDULE_REQ 0X01
#define CATEGORY_NAN_CTRL 0X01
#define CATEGORY_NAN_CHANNEL_PLAN_0 0X01
#define CATEGORY_NAN_CHANNEL_PLAN_1 0X01
#define CATEGORY_NAN_FUNC_CTRL 0X01
#define SUB_CMD_ID_FW_ACCESS_TEST 0X00
#define SUB_CMD_ID_CH_SWITCH 0X02
#define SUB_CMD_ID_DUMP_PHYSICAL_EFUSE 0X03
@@ -86,13 +92,16 @@
#define SUB_CMD_ID_FW_FWCTRL 0X13
#define SUB_CMD_ID_H2C_LOOPBACK 0X14
#define SUB_CMD_ID_FWCMD_LOOPBACK 0X15
#define SUB_CMD_ID_UPDATE_SCAN_PKT 0X16
#define SUB_CMD_ID_SEND_SCAN_PKT 0X16
#define SUB_CMD_ID_BCN_OFFLOAD 0X17
#define SUB_CMD_ID_DROP_SCAN_PKT 0X18
#define SUB_CMD_ID_P2PPS 0X24
#define SUB_CMD_ID_BT_COEX 0X60
#define SUB_CMD_ID_ACT_SCHEDULE_REQ 0X70
#define SUB_CMD_ID_NAN_CTRL 0XB2
#define SUB_CMD_ID_NAN_CHANNEL_PLAN_0 0XB4
#define SUB_CMD_ID_NAN_CHANNEL_PLAN_1 0XB5
#define SUB_CMD_ID_NAN_FUNC_CTRL 0XB6
#define H2C_CMD_HEADER_GET_CATEGORY(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 0, 7)
#define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \
@@ -454,6 +463,16 @@
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 28, 4)
#define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 28, 4, value)
#define PHYDM_INFO_GET_EXT_PA(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0XC, 0, 8)
#define PHYDM_INFO_SET_EXT_PA(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0XC, 0, 8, value)
#define PHYDM_INFO_GET_PACKAGE_TYPE(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0XC, 8, 8)
#define PHYDM_INFO_SET_PACKAGE_TYPE(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0XC, 8, 8, value)
#define PHYDM_INFO_GET_MP_MODE(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0XC, 16, 1)
#define PHYDM_INFO_SET_MP_MODE(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0XC, 16, 1, value)
#define FW_SNDING_GET_SU0(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 1)
#define FW_SNDING_SET_SU0(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 1, value)
@@ -510,16 +529,14 @@
#define FW_FWCTRL_GET_CONTENT(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X0C, 0, 32)
#define FW_FWCTRL_SET_CONTENT(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X0C, 0, 32, value)
#define UPDATE_SCAN_PKT_GET_SIZE(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 16)
#define UPDATE_SCAN_PKT_SET_SIZE(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_SIZE(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 16)
#define SEND_SCAN_PKT_SET_SIZE(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 16, value)
#define UPDATE_SCAN_PKT_GET_INDEX(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 16, 8)
#define UPDATE_SCAN_PKT_SET_INDEX(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_INDEX(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 16, 8)
#define SEND_SCAN_PKT_SET_INDEX(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 16, 8, value)
#define UPDATE_SCAN_PKT_GET_LOC(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 24, 8)
#define UPDATE_SCAN_PKT_SET_LOC(h2c_pkt, value) \
#define SEND_SCAN_PKT_GET_LOC(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 24, 8)
#define SEND_SCAN_PKT_SET_LOC(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 24, 8, value)
#define BCN_OFFLOAD_GET_REQUEST_VERSION(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 1)
@@ -548,6 +565,18 @@
LE_BITS_TO_4BYTE(h2c_pkt + 0X0C, 0, 8)
#define BCN_OFFLOAD_SET_RULE_CONTENT(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X0C, 0, 8, value)
#define DROP_SCAN_PKT_GET_DROP_ALL(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 1)
#define DROP_SCAN_PKT_SET_DROP_ALL(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 1, value)
#define DROP_SCAN_PKT_GET_DROP_SINGLE(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 1, 1)
#define DROP_SCAN_PKT_SET_DROP_SINGLE(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 1, 1, value)
#define DROP_SCAN_PKT_GET_DROP_IDX(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 8, 8)
#define DROP_SCAN_PKT_SET_DROP_IDX(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 8, 8, value)
#define P2PPS_GET_OFFLOAD_EN(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 1)
#define P2PPS_SET_OFFLOAD_EN(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 1, value)
@@ -605,6 +634,45 @@
#define BT_COEX_GET_DATA_START(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 8)
#define BT_COEX_SET_DATA_START(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_MODULE_ID(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 8)
#define ACT_SCHEDULE_REQ_SET_MODULE_ID(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_PRIORITY(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 8, 8)
#define ACT_SCHEDULE_REQ_SET_PRIORITY(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 8, 8, value)
#define ACT_SCHEDULE_REQ_GET_RSVD1(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 16, 16)
#define ACT_SCHEDULE_REQ_SET_RSVD1(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 16, 16, value)
#define ACT_SCHEDULE_REQ_GET_START_TIME(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0XC, 0, 32)
#define ACT_SCHEDULE_REQ_SET_START_TIME(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0XC, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_DURATION(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X10, 0, 32)
#define ACT_SCHEDULE_REQ_SET_DURATION(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X10, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_PERIOD(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X14, 0, 32)
#define ACT_SCHEDULE_REQ_SET_PERIOD(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X14, 0, 32, value)
#define ACT_SCHEDULE_REQ_GET_TSF_IDX(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X18, 0, 8)
#define ACT_SCHEDULE_REQ_SET_TSF_IDX(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X18, 0, 8, value)
#define ACT_SCHEDULE_REQ_GET_CHANNEL(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X18, 8, 8)
#define ACT_SCHEDULE_REQ_SET_CHANNEL(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X18, 8, 8, value)
#define ACT_SCHEDULE_REQ_GET_BW(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X18, 16, 8)
#define ACT_SCHEDULE_REQ_SET_BW(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X18, 16, 8, value)
#define ACT_SCHEDULE_REQ_GET_PRIMART_CH_IDX(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X18, 24, 9)
#define ACT_SCHEDULE_REQ_SET_PRIMART_CH_IDX(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X18, 24, 9, value)
#define NAN_CTRL_GET_NAN_EN(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 2)
#define NAN_CTRL_SET_NAN_EN(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 2, value)
@@ -738,4 +806,47 @@
LE_BITS_TO_4BYTE(h2c_pkt + 0X1C, 16, 16)
#define NAN_CHANNEL_PLAN_1_SET_DURATION_5(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X1C, 16, 16, value)
#define NAN_FUNC_CTRL_GET_PORT_IDX(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 0, 8)
#define NAN_FUNC_CTRL_SET_PORT_IDX(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 0, 8, value)
#define NAN_FUNC_CTRL_GET_MAC_ID(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 8, 8)
#define NAN_FUNC_CTRL_SET_MAC_ID(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 8, 8, value)
#define NAN_FUNC_CTRL_GET_MASTER_PREF(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 16, 8)
#define NAN_FUNC_CTRL_SET_MASTER_PREF(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 16, 8, value)
#define NAN_FUNC_CTRL_GET_RANDOM_FACTOR(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X08, 24, 8)
#define NAN_FUNC_CTRL_SET_RANDOM_FACTOR(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X08, 24, 8, value)
#define NAN_FUNC_CTRL_GET_OP_CH_24G(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X0C, 0, 8)
#define NAN_FUNC_CTRL_SET_OP_CH_24G(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X0C, 0, 8, value)
#define NAN_FUNC_CTRL_GET_OP_CH_5G(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X0C, 8, 8)
#define NAN_FUNC_CTRL_SET_OP_CH_5G(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X0C, 8, 8, value)
#define NAN_FUNC_CTRL_GET_OPTIONS(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X0C, 16, 16)
#define NAN_FUNC_CTRL_SET_OPTIONS(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X0C, 16, 16, value)
#define NAN_FUNC_CTRL_GET_SYNC_BCN_RSVD_OFFSET(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X10, 0, 8)
#define NAN_FUNC_CTRL_SET_SYNC_BCN_RSVD_OFFSET(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X10, 0, 8, value)
#define NAN_FUNC_CTRL_GET_DISC_BCN_RSVD_OFFSET(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X10, 8, 8)
#define NAN_FUNC_CTRL_SET_DISC_BCN_RSVD_OFFSET(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X10, 8, 8, value)
#define NAN_FUNC_CTRL_GET_DW_SCHDL_PRIORITY(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X10, 16, 8)
#define NAN_FUNC_CTRL_SET_DW_SCHDL_PRIORITY(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X10, 16, 8, value)
#define NAN_FUNC_CTRL_GET_TIME_INDICATE_PERIOD(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X10, 24, 8)
#define NAN_FUNC_CTRL_SET_TIME_INDICATE_PERIOD(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X10, 24, 8, value)
#endif

9
hal/halmac/halmac_gpio_cmd.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -88,6 +88,13 @@
#define HALMAC_BT_LNAON_SEL 42
#define HALMAC_WLBT_LNAON_SEL 43
#define HALMAC_SWR_CTRL_EN 44
#define HALMAC_UART_BRIDGE 45
#define HALMAC_BT_I2C 46
#define HALMAC_BTCOEX_CMD 47
#define HALMAC_BT_UART_INTF 48
#define HALMAC_DATA_CPU_JTAG 49
#define HALMAC_DATA_CPU_SFLASH 50
#define HALMAC_DATA_CPU_UART 51
struct halmac_gpio_pimux_list {
u16 func;

18
hal/halmac/halmac_h2c_extra_info_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -15,6 +15,22 @@
#ifndef _HAL_H2CEXTRAINFO_H2C_C2H_AP_H_
#define _HAL_H2CEXTRAINFO_H2C_C2H_AP_H_
/* H2C extra info (rsvd page) usage, unit : page (128byte)*/
/* dlfw : not include txdesc size*/
/* update pkt : not include txdesc size*/
/* cfg param : not include txdesc size*/
/* scan info : not include txdesc size*/
/* dl flash : not include txdesc size*/
#define DLFW_RSVDPG_SIZE 2048
#define UPDATE_PKT_RSVDPG_SIZE 2048
#define CFG_PARAM_RSVDPG_SIZE 2048
#define SCAN_INFO_RSVDPG_SIZE 256
#define DL_FLASH_RSVDPG_SIZE 2048
/* su0 snding pkt : include txdesc size */
#define SU0_SNDING_PKT_OFFSET 0
#define SU0_SNDING_PKT_RSVDPG_SIZE 128
#define PARAM_INFO_GET_LEN(extra_info) GET_C2H_FIELD(extra_info + 0X00, 0, 8)
#define PARAM_INFO_SET_LEN(extra_info, value) \
SET_C2H_FIELD_CLR(extra_info + 0X00, 0, 8, value)

2
hal/halmac/halmac_h2c_extra_info_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

11
hal/halmac/halmac_hw_cfg.h
View File

@@ -150,11 +150,6 @@
#define HALMAC_8197G_SUPPORT 0
#endif
#ifdef CONFIG_RTL8812F
#define HALMAC_8812F_SUPPORT 1
#else
#define HALMAC_8812F_SUPPORT 0
#endif
/* Halmac support IC version */
@@ -183,6 +178,12 @@
#define HALMAC_8822C_SUPPORT 0
#endif
#ifdef CONFIG_RTL8812F
#define HALMAC_8812F_SUPPORT 1
#else
#define HALMAC_8812F_SUPPORT 0
#endif
/* Interface support */
#ifdef CONFIG_SDIO_HCI

6
hal/halmac/halmac_intf_phy_cmd.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -39,7 +39,9 @@ enum halmac_ip_sel {
/* Platform mask */
enum halmac_intf_phy_platform {
HALMAC_INTF_PHY_PLATFORM_ALL = 0x7FFF,
HALMAC_INTF_PHY_PLATFORM_ALL = BIT(0),
HALMAC_INTF_PHY_PLATFORM_ASUS = BIT(1),
HALMAC_INTF_PHY_PLATFORM_FOR_ALL = 0x7FFF,
};
#endif

37
hal/halmac/halmac_original_c2h_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -28,6 +28,7 @@
#define CMD_ID_C2H_CUR_CHANNEL 0X10
#define CMD_ID_C2H_GPIO_WAKEUP 0X14
#define CMD_ID_C2H_DROPID_RPT 0X2D
#define CMD_ID_C2H_LPS_STATUS_RPT 0X32
#define C2H_GET_CMD_ID(c2h_pkt) GET_C2H_FIELD(c2h_pkt + 0X00, 0, 8)
#define C2H_SET_CMD_ID(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
@@ -647,4 +648,38 @@
SET_C2H_FIELD_CLR(c2h_pkt + 0X0C, 24, 8, value)
#define C2H_DROPID_RPT_SET_TRIGGER_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X0C, 24, 8, value)
#define C2H_LPS_STATUS_RPT_GET_CMD_ID(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X00, 0, 8)
#define C2H_LPS_STATUS_RPT_SET_CMD_ID(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
#define C2H_LPS_STATUS_RPT_SET_CMD_ID_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
#define C2H_LPS_STATUS_RPT_GET_SEQ(c2h_pkt) GET_C2H_FIELD(c2h_pkt + 0X00, 8, 8)
#define C2H_LPS_STATUS_RPT_SET_SEQ(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
#define C2H_LPS_STATUS_RPT_SET_SEQ_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
#define C2H_LPS_STATUS_RPT_GET_ACTION(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X00, 16, 8)
#define C2H_LPS_STATUS_RPT_SET_ACTION(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
#define C2H_LPS_STATUS_RPT_SET_ACTION_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 16, 8, value)
#define C2H_LPS_STATUS_RPT_GET_STATUSCODE(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X00, 24, 8)
#define C2H_LPS_STATUS_RPT_SET_STATUSCODE(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
#define C2H_LPS_STATUS_RPT_SET_STATUSCODE_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 24, 8, value)
#define C2H_LPS_STATUS_RPT_GET_LEN(c2h_pkt) GET_C2H_FIELD(c2h_pkt + 0X0C, 16, 8)
#define C2H_LPS_STATUS_RPT_SET_LEN(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X0C, 16, 8, value)
#define C2H_LPS_STATUS_RPT_SET_LEN_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X0C, 16, 8, value)
#define C2H_LPS_STATUS_RPT_GET_TRIGGER(c2h_pkt) \
GET_C2H_FIELD(c2h_pkt + 0X0C, 24, 8)
#define C2H_LPS_STATUS_RPT_SET_TRIGGER(c2h_pkt, value) \
SET_C2H_FIELD_CLR(c2h_pkt + 0X0C, 24, 8, value)
#define C2H_LPS_STATUS_RPT_SET_TRIGGER_NO_CLR(c2h_pkt, value) \
SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X0C, 24, 8, value)
#endif

27
hal/halmac/halmac_original_c2h_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -28,6 +28,7 @@
#define CMD_ID_C2H_CUR_CHANNEL 0X10
#define CMD_ID_C2H_GPIO_WAKEUP 0X14
#define CMD_ID_C2H_DROPID_RPT 0X2D
#define CMD_ID_C2H_LPS_STATUS_RPT 0X32
#define C2H_GET_CMD_ID(c2h_pkt) LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 0, 8)
#define C2H_SET_CMD_ID(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 0, 8, value)
@@ -431,4 +432,28 @@
LE_BITS_TO_4BYTE(c2h_pkt + 0X0C, 24, 8)
#define C2H_DROPID_RPT_SET_TRIGGER(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X0C, 24, 8, value)
#define C2H_LPS_STATUS_RPT_GET_CMD_ID(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 0, 8)
#define C2H_LPS_STATUS_RPT_SET_CMD_ID(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 0, 8, value)
#define C2H_LPS_STATUS_RPT_GET_SEQ(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 8, 8)
#define C2H_LPS_STATUS_RPT_SET_SEQ(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 8, 8, value)
#define C2H_LPS_STATUS_RPT_GET_ACTION(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 16, 8)
#define C2H_LPS_STATUS_RPT_SET_ACTION(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 16, 8, value)
#define C2H_LPS_STATUS_RPT_GET_STATUSCODE(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X00, 24, 8)
#define C2H_LPS_STATUS_RPT_SET_STATUSCODE(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X00, 24, 8, value)
#define C2H_LPS_STATUS_RPT_GET_LEN(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X0C, 16, 8)
#define C2H_LPS_STATUS_RPT_SET_LEN(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X0C, 16, 8, value)
#define C2H_LPS_STATUS_RPT_GET_TRIGGER(c2h_pkt) \
LE_BITS_TO_4BYTE(c2h_pkt + 0X0C, 24, 8)
#define C2H_LPS_STATUS_RPT_SET_TRIGGER(c2h_pkt, value) \
SET_BITS_TO_LE_4BYTE(c2h_pkt + 0X0C, 24, 8, value)
#endif

32
hal/halmac/halmac_original_h2c_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -43,6 +43,7 @@
#define CMD_ID_IQK_OFFLOAD 0X05
#define CMD_ID_MACID_CFG_3SS 0X06
#define CMD_ID_RA_PARA_ADJUST 0X07
#define CMD_ID_REQ_TXRPT_ACQ 0X12
#define CMD_ID_WWLAN 0X00
#define CMD_ID_REMOTE_WAKE_CTRL 0X01
#define CMD_ID_AOAC_GLOBAL_INFO 0X02
@@ -80,6 +81,7 @@
#define CLASS_IQK_OFFLOAD 0X2
#define CLASS_MACID_CFG_3SS 0X2
#define CLASS_RA_PARA_ADJUST 0X02
#define CLASS_REQ_TXRPT_ACQ 0X02
#define CLASS_WWLAN 0X4
#define CLASS_REMOTE_WAKE_CTRL 0X4
#define CLASS_AOAC_GLOBAL_INFO 0X04
@@ -1221,6 +1223,28 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X04, 16, 8, value)
#define RA_PARA_ADJUST_SET_ASK_FW_FOR_FW_PARA_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X04, 16, 8, value)
#define REQ_TXRPT_ACQ_GET_CMD_ID(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X00, 0, 5)
#define REQ_TXRPT_ACQ_SET_CMD_ID(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
#define REQ_TXRPT_ACQ_SET_CMD_ID_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 5, value)
#define REQ_TXRPT_ACQ_GET_CLASS(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X00, 5, 3)
#define REQ_TXRPT_ACQ_SET_CLASS(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 5, 3, value)
#define REQ_TXRPT_ACQ_SET_CLASS_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 5, 3, value)
#define REQ_TXRPT_ACQ_GET_STA1_MACID(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X00, 8, 8)
#define REQ_TXRPT_ACQ_SET_STA1_MACID(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 8, 8, value)
#define REQ_TXRPT_ACQ_SET_STA1_MACID_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 8, 8, value)
#define REQ_TXRPT_ACQ_GET_PASS_DROP_SEL(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X00, 16, 8)
#define REQ_TXRPT_ACQ_SET_PASS_DROP_SEL(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 16, 8, value)
#define REQ_TXRPT_ACQ_SET_PASS_DROP_SEL_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 16, 8, value)
#define WWLAN_GET_CMD_ID(h2c_pkt) GET_H2C_FIELD(h2c_pkt + 0X00, 0, 5)
#define WWLAN_SET_CMD_ID(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
@@ -1394,6 +1418,12 @@
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 24, 1, value)
#define REMOTE_WAKE_CTRL_SET_ARP_ACTION_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 24, 1, value)
#define REMOTE_WAKE_CTRL_GET_TIM_PARSER_EN(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X00, 26, 1)
#define REMOTE_WAKE_CTRL_SET_TIM_PARSER_EN(h2c_pkt, value) \
SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 26, 1, value)
#define REMOTE_WAKE_CTRL_SET_TIM_PARSER_EN_NO_CLR(h2c_pkt, value) \
SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 26, 1, value)
#define REMOTE_WAKE_CTRL_GET_FW_PARSING_UNTIL_WAKEUP(h2c_pkt) \
GET_H2C_FIELD(h2c_pkt + 0X00, 28, 1)
#define REMOTE_WAKE_CTRL_SET_FW_PARSING_UNTIL_WAKEUP(h2c_pkt, value) \

22
hal/halmac/halmac_original_h2c_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -43,6 +43,7 @@
#define CMD_ID_IQK_OFFLOAD 0X05
#define CMD_ID_MACID_CFG_3SS 0X06
#define CMD_ID_RA_PARA_ADJUST 0X07
#define CMD_ID_REQ_TXRPT_ACQ 0X12
#define CMD_ID_WWLAN 0X00
#define CMD_ID_REMOTE_WAKE_CTRL 0X01
#define CMD_ID_AOAC_GLOBAL_INFO 0X02
@@ -80,6 +81,7 @@
#define CLASS_IQK_OFFLOAD 0X2
#define CLASS_MACID_CFG_3SS 0X2
#define CLASS_RA_PARA_ADJUST 0X02
#define CLASS_REQ_TXRPT_ACQ 0X02
#define CLASS_WWLAN 0X4
#define CLASS_REMOTE_WAKE_CTRL 0X4
#define CLASS_AOAC_GLOBAL_INFO 0X04
@@ -845,6 +847,20 @@
LE_BITS_TO_4BYTE(h2c_pkt + 0X04, 16, 8)
#define RA_PARA_ADJUST_SET_ASK_FW_FOR_FW_PARA(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X04, 16, 8, value)
#define REQ_TXRPT_ACQ_GET_CMD_ID(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 0, 5)
#define REQ_TXRPT_ACQ_SET_CMD_ID(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
#define REQ_TXRPT_ACQ_GET_CLASS(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 5, 3)
#define REQ_TXRPT_ACQ_SET_CLASS(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
#define REQ_TXRPT_ACQ_GET_STA1_MACID(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 8, 8)
#define REQ_TXRPT_ACQ_SET_STA1_MACID(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 8, 8, value)
#define REQ_TXRPT_ACQ_GET_PASS_DROP_SEL(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 16, 8)
#define REQ_TXRPT_ACQ_SET_PASS_DROP_SEL(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 16, 8, value)
#define WWLAN_GET_CMD_ID(h2c_pkt) LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 0, 5)
#define WWLAN_SET_CMD_ID(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
@@ -961,6 +977,10 @@
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 24, 1)
#define REMOTE_WAKE_CTRL_SET_ARP_ACTION(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 24, 1, value)
#define REMOTE_WAKE_CTRL_GET_TIM_PARSER_EN(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 26, 1)
#define REMOTE_WAKE_CTRL_SET_TIM_PARSER_EN(h2c_pkt, value) \
SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 26, 1, value)
#define REMOTE_WAKE_CTRL_GET_FW_PARSING_UNTIL_WAKEUP(h2c_pkt) \
LE_BITS_TO_4BYTE(h2c_pkt + 0X00, 28, 1)
#define REMOTE_WAKE_CTRL_SET_FW_PARSING_UNTIL_WAKEUP(h2c_pkt, value) \

2
hal/halmac/halmac_pcie_reg.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_pwr_seq_cmd.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

25
hal/halmac/halmac_reg2.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -95,6 +95,21 @@
HALMAC_8881A_SUPPORT)
#define REG_SYS_SWR_CTRL1 0x0010
#endif
#if (HALMAC_8812F_SUPPORT)
#define REG_SDIO_CTRL_2 0x10250010
#endif
#if (HALMAC_8192E_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8197G_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8814A_SUPPORT || HALMAC_8814AMP_SUPPORT || HALMAC_8814B_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8881A_SUPPORT)
#define REG_SYS_SWR_CTRL2 0x0014
#endif
@@ -6132,7 +6147,7 @@
#if (HALMAC_8822C_SUPPORT)
#define REG_XTAL_AAC_OUTPUT 0x1060
#define REG_XTAL_AAC_OUTPUT 0x1060
#endif
@@ -8012,6 +8027,12 @@
#endif
#if (HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define REG_RXAI_CTRL 0x1668
#endif
#if (HALMAC_8814B_SUPPORT)
#define REG_FWPHYFF_RCR 0x1668

2
hal/halmac/halmac_reg_8197f.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

886
hal/halmac/halmac_reg_8812f.h Normal file
View File

@@ -0,0 +1,886 @@
/******************************************************************************
*
* Copyright(c) 2018 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __INC_HALMAC_REG_8812F_H
#define __INC_HALMAC_REG_8812F_H
#define REG_SYS_ISO_CTRL_8812F 0x0000
#define REG_SYS_FUNC_EN_8812F 0x0002
#define REG_SYS_PW_CTRL_8812F 0x0004
#define REG_SYS_CLK_CTRL_8812F 0x0008
#define REG_SYS_EEPROM_CTRL_8812F 0x000A
#define REG_EE_VPD_8812F 0x000C
#define REG_SYS_SWR_CTRL1_8812F 0x0010
#define REG_SYS_SWR_CTRL2_8812F 0x0014
#define REG_SYS_SWR_CTRL3_8812F 0x0018
#define REG_RSV_CTRL_8812F 0x001C
#define REG_RF_CTRL_8812F 0x001F
#define REG_AFE_LDO_CTRL_8812F 0x0020
#define REG_AFE_CTRL1_8812F 0x0024
#define REG_ANAPARSW_POW_MAC_8812F 0x0028
#define REG_ANAPARLDO_POW_MAC_8812F 0x0029
#define REG_ANAPAR_POW_MAC_8812F 0x002A
#define REG_ANAPAR_POW_XTAL_8812F 0x002B
#define REG_ANAPARLDO_MAC_8812F 0x002C
#define REG_EFUSE_CTRL_8812F 0x0030
#define REG_LDO_EFUSE_CTRL_8812F 0x0034
#define REG_PWR_OPTION_CTRL_8812F 0x0038
#define REG_CAL_TIMER_8812F 0x003C
#define REG_ACLK_MON_8812F 0x003E
#define REG_GPIO_MUXCFG_2_8812F 0x003F
#define REG_GPIO_MUXCFG_8812F 0x0040
#define REG_GPIO_PIN_CTRL_8812F 0x0044
#define REG_GPIO_INTM_8812F 0x0048
#define REG_LED_CFG_8812F 0x004C
#define REG_FSIMR_8812F 0x0050
#define REG_FSISR_8812F 0x0054
#define REG_HSIMR_8812F 0x0058
#define REG_HSISR_8812F 0x005C
#define REG_GPIO_EXT_CTRL_8812F 0x0060
#define REG_PAD_CTRL1_8812F 0x0064
#define REG_WL_BT_PWR_CTRL_8812F 0x0068
#define REG_SDM_DEBUG_8812F 0x006C
#define REG_SYS_SDIO_CTRL_8812F 0x0070
#define REG_HCI_OPT_CTRL_8812F 0x0074
#define REG_HCI_BG_CTRL_8812F 0x0078
#define REG_HCI_LDO_CTRL_8812F 0x007A
#define REG_LDO_SWR_CTRL_8812F 0x007C
#define REG_MCUFW_CTRL_8812F 0x0080
#define REG_MCU_TST_CFG_8812F 0x0084
#define REG_HMEBOX_E0_E1_8812F 0x0088
#define REG_HMEBOX_E2_E3_8812F 0x008C
#define REG_WLLPS_CTRL_8812F 0x0090
#define REG_GPIO_DEBOUNCE_CTRL_8812F 0x0098
#define REG_RPWM2_8812F 0x009C
#define REG_SYSON_FSM_MON_8812F 0x00A0
#define REG_PMC_DBG_CTRL1_8812F 0x00A8
#define REG_HIMR0_8812F 0x00B0
#define REG_HISR0_8812F 0x00B4
#define REG_HIMR1_8812F 0x00B8
#define REG_HISR1_8812F 0x00BC
#define REG_DBG_PORT_SEL_8812F 0x00C0
#define REG_PAD_CTRL2_8812F 0x00C4
#define REG_PMC_DBG_CTRL2_8812F 0x00CC
#define REG_BIST_CTRL_8812F 0x00D0
#define REG_BIST_RPT_8812F 0x00D4
#define REG_MEM_CTRL_8812F 0x00D8
#define REG_USB_SIE_INTF_8812F 0x00E0
#define REG_PCIE_MIO_INTF_8812F 0x00E4
#define REG_PCIE_MIO_INTD_8812F 0x00E8
#define REG_WLRF1_8812F 0x00EC
#define REG_SYS_CFG1_8812F 0x00F0
#define REG_SYS_STATUS1_8812F 0x00F4
#define REG_SYS_STATUS2_8812F 0x00F8
#define REG_SYS_CFG2_8812F 0x00FC
#define REG_SYS_CFG3_8812F 0x1000
#define REG_ANAPARSW_MAC_0_8812F 0x1010
#define REG_ANAPARSW_MAC_1_8812F 0x1014
#define REG_ANAPAR_MAC_0_8812F 0x1018
#define REG_ANAPAR_MAC_1_8812F 0x101C
#define REG_ANAPAR_MAC_2_8812F 0x1020
#define REG_ANAPAR_XTAL_0_8812F 0x1040
#define REG_ANAPAR_XTAL_1_8812F 0x1044
#define REG_ANAPAR_XTAL_2_8812F 0x1048
#define REG_ANAPAR_XTAL_3_8812F 0x104C
#define REG_ANAPAR_XTAL_AACK_0_8812F 0x1054
#define REG_ANAPAR_XTAL_AACK_1_8812F 0x1058
#define REG_ANAPAR_XTAL_MODE_DECODER_8812F 0x1064
#define REG_SYS_CFG5_8812F 0x1070
#define REG_REGU_32K_1_8812F 0x1078
#define REG_REGU_32K_2_8812F 0x107C
#define REG_CPU_DMEM_CON_8812F 0x1080
#define REG_BOOT_REASON_8812F 0x1088
#define REG_HIMR2_8812F 0x10B0
#define REG_HISR2_8812F 0x10B4
#define REG_HIMR3_8812F 0x10B8
#define REG_HISR3_8812F 0x10BC
#define REG_SW_MDIO_8812F 0x10C0
#define REG_H2C_PKT_READADDR_8812F 0x10D0
#define REG_H2C_PKT_WRITEADDR_8812F 0x10D4
#define REG_MEM_PWR_CRTL_8812F 0x10D8
#define REG_FW_DBG6_8812F 0x10F8
#define REG_FW_DBG7_8812F 0x10FC
#define REG_CR_8812F 0x0100
#define REG_PG_SIZE_8812F 0x0104
#define REG_PKT_BUFF_ACCESS_CTRL_8812F 0x0106
#define REG_TSF_CLK_STATE_8812F 0x0108
#define REG_TXDMA_PQ_MAP_8812F 0x010C
#define REG_TRXFF_BNDY_8812F 0x0114
#define REG_PTA_I2C_MBOX_8812F 0x0118
#define REG_RXFF_BNDY_8812F 0x011C
#define REG_FE1IMR_8812F 0x0120
#define REG_FE1ISR_8812F 0x0124
#define REG_CPWM_8812F 0x012C
#define REG_FWIMR_8812F 0x0130
#define REG_FWISR_8812F 0x0134
#define REG_FTIMR_8812F 0x0138
#define REG_FTISR_8812F 0x013C
#define REG_PKTBUF_DBG_CTRL_8812F 0x0140
#define REG_PKTBUF_DBG_DATA_L_8812F 0x0144
#define REG_PKTBUF_DBG_DATA_H_8812F 0x0148
#define REG_CPWM2_8812F 0x014C
#define REG_TC0_CTRL_8812F 0x0150
#define REG_TC1_CTRL_8812F 0x0154
#define REG_TC2_CTRL_8812F 0x0158
#define REG_TC3_CTRL_8812F 0x015C
#define REG_TC4_CTRL_8812F 0x0160
#define REG_TCUNIT_BASE_8812F 0x0164
#define REG_TC5_CTRL_8812F 0x0168
#define REG_TC6_CTRL_8812F 0x016C
#define REG_MBIST_DRF_FAIL_8812F 0x0170
#define REG_MBIST_START_PAUSE_8812F 0x0174
#define REG_MBIST_DONE_8812F 0x0178
#define REG_MBIST_READ_BIST_RPT_8812F 0x017C
#define REG_AES_DECRPT_DATA_8812F 0x0180
#define REG_AES_DECRPT_CFG_8812F 0x0184
#define REG_HIOE_CTRL_8812F 0x0188
#define REG_HIOE_CFG_FILE_8812F 0x018C
#define REG_TMETER_8812F 0x0190
#define REG_OSC_32K_CTRL_8812F 0x0194
#define REG_32K_CAL_REG1_8812F 0x0198
#define REG_C2HEVT_8812F 0x01A0
#define REG_C2HEVT_1_8812F 0x01A4
#define REG_C2HEVT_2_8812F 0x01A8
#define REG_C2HEVT_3_8812F 0x01AC
#define REG_SW_DEFINED_PAGE1_8812F 0x01B8
#define REG_SW_DEFINED_PAGE2_8812F 0x01BC
#define REG_MCUTST_I_8812F 0x01C0
#define REG_MCUTST_II_8812F 0x01C4
#define REG_FMETHR_8812F 0x01C8
#define REG_HMETFR_8812F 0x01CC
#define REG_HMEBOX0_8812F 0x01D0
#define REG_HMEBOX1_8812F 0x01D4
#define REG_HMEBOX2_8812F 0x01D8
#define REG_HMEBOX3_8812F 0x01DC
#define REG_BB_ACCESS_CTRL_8812F 0x01E8
#define REG_BB_ACCESS_DATA_8812F 0x01EC
#define REG_HMEBOX_E0_8812F 0x01F0
#define REG_HMEBOX_E1_8812F 0x01F4
#define REG_HMEBOX_E2_8812F 0x01F8
#define REG_HMEBOX_E3_8812F 0x01FC
#define REG_CR_EXT_8812F 0x1100
#define REG_FWFF_8812F 0x1114
#define REG_RXFF_PTR_V1_8812F 0x1118
#define REG_RXFF_WTR_V1_8812F 0x111C
#define REG_FE2IMR_8812F 0x1120
#define REG_FE2ISR_8812F 0x1124
#define REG_FE3IMR_8812F 0x1128
#define REG_FE3ISR_8812F 0x112C
#define REG_FE4IMR_8812F 0x1130
#define REG_FE4ISR_8812F 0x1134
#define REG_FT1IMR_8812F 0x1138
#define REG_FT1ISR_8812F 0x113C
#define REG_SPWR0_8812F 0x1140
#define REG_SPWR1_8812F 0x1144
#define REG_SPWR2_8812F 0x1148
#define REG_SPWR3_8812F 0x114C
#define REG_POWSEQ_8812F 0x1150
#define REG_TC7_CTRL_V1_8812F 0x1158
#define REG_TC8_CTRL_V1_8812F 0x115C
#define REG_RX_BCN_TBTT_ITVL0_8812F 0x1160
#define REG_RX_BCN_TBTT_ITVL1_8812F 0x1164
#define REG_IO_WRAP_ERR_FLAG_8812F 0x1170
#define REG_SPEED_SENSOR_8812F 0x1180
#define REG_SPEED_SENSOR1_8812F 0x1184
#define REG_SPEED_SENSOR2_8812F 0x1188
#define REG_SPEED_SENSOR3_8812F 0x118C
#define REG_SPEED_SENSOR4_8812F 0x1190
#define REG_SPEED_SENSOR5_8812F 0x1194
#define REG_COUNTER_CTRL_8812F 0x11C4
#define REG_COUNTER_THRESHOLD_8812F 0x11C8
#define REG_COUNTER_SET_8812F 0x11CC
#define REG_COUNTER_OVERFLOW_8812F 0x11D0
#define REG_TXDMA_LEN_THRESHOLD_8812F 0x11D4
#define REG_RXDMA_LEN_THRESHOLD_8812F 0x11D8
#define REG_PCIE_EXEC_TIME_THRESHOLD_8812F 0x11DC
#define REG_FT2IMR_8812F 0x11E0
#define REG_FT2ISR_8812F 0x11E4
#define REG_MSG2_8812F 0x11F0
#define REG_MSG3_8812F 0x11F4
#define REG_MSG4_8812F 0x11F8
#define REG_MSG5_8812F 0x11FC
#define REG_FIFOPAGE_CTRL_1_8812F 0x0200
#define REG_FIFOPAGE_CTRL_2_8812F 0x0204
#define REG_AUTO_LLT_V1_8812F 0x0208
#define REG_TXDMA_OFFSET_CHK_8812F 0x020C
#define REG_TXDMA_STATUS_8812F 0x0210
#define REG_TX_DMA_DBG_8812F 0x0214
#define REG_TQPNT1_8812F 0x0218
#define REG_TQPNT2_8812F 0x021C
#define REG_TQPNT3_8812F 0x0220
#define REG_TQPNT4_8812F 0x0224
#define REG_RQPN_CTRL_1_8812F 0x0228
#define REG_RQPN_CTRL_2_8812F 0x022C
#define REG_FIFOPAGE_INFO_1_8812F 0x0230
#define REG_FIFOPAGE_INFO_2_8812F 0x0234
#define REG_FIFOPAGE_INFO_3_8812F 0x0238
#define REG_FIFOPAGE_INFO_4_8812F 0x023C
#define REG_FIFOPAGE_INFO_5_8812F 0x0240
#define REG_H2C_HEAD_8812F 0x0244
#define REG_H2C_TAIL_8812F 0x0248
#define REG_H2C_READ_ADDR_8812F 0x024C
#define REG_H2C_WR_ADDR_8812F 0x0250
#define REG_H2C_INFO_8812F 0x0254
#define REG_PGSUB_CNT_8812F 0x026C
#define REG_PGSUB_H_8812F 0x0270
#define REG_PGSUB_N_8812F 0x0274
#define REG_PGSUB_L_8812F 0x0278
#define REG_PGSUB_E_8812F 0x027C
#define REG_RXDMA_AGG_PG_TH_8812F 0x0280
#define REG_RXPKT_NUM_8812F 0x0284
#define REG_RXDMA_STATUS_8812F 0x0288
#define REG_RXDMA_DPR_8812F 0x028C
#define REG_RXDMA_MODE_8812F 0x0290
#define REG_C2H_PKT_8812F 0x0294
#define REG_FWFF_C2H_8812F 0x0298
#define REG_FWFF_CTRL_8812F 0x029C
#define REG_FWFF_PKT_INFO_8812F 0x02A0
#define REG_RXPKTNUM_8812F 0x02B0
#define REG_RXPKTNUM_TH_8812F 0x02B4
#define REG_FW_MSG1_8812F 0x02E0
#define REG_FW_MSG2_8812F 0x02E4
#define REG_FW_MSG3_8812F 0x02E8
#define REG_FW_MSG4_8812F 0x02EC
#define REG_DDMA_CH0SA_8812F 0x1200
#define REG_DDMA_CH0DA_8812F 0x1204
#define REG_DDMA_CH0CTRL_8812F 0x1208
#define REG_DDMA_CH1SA_8812F 0x1210
#define REG_DDMA_CH1DA_8812F 0x1214
#define REG_DDMA_CH1CTRL_8812F 0x1218
#define REG_DDMA_CH2SA_8812F 0x1220
#define REG_DDMA_CH2DA_8812F 0x1224
#define REG_DDMA_CH2CTRL_8812F 0x1228
#define REG_DDMA_CH3SA_8812F 0x1230
#define REG_DDMA_CH3DA_8812F 0x1234
#define REG_DDMA_CH3CTRL_8812F 0x1238
#define REG_DDMA_CH4SA_8812F 0x1240
#define REG_DDMA_CH4DA_8812F 0x1244
#define REG_DDMA_CH4CTRL_8812F 0x1248
#define REG_DDMA_CH5SA_8812F 0x1250
#define REG_DDMA_CH5DA_8812F 0x1254
#define REG_DDMA_CH5CTRL_8812F 0x1258
#define REG_DDMA_INT_MSK_8812F 0x12E0
#define REG_DDMA_CHSTATUS_8812F 0x12E8
#define REG_DDMA_CHKSUM_8812F 0x12F0
#define REG_DDMA_MONITOR_8812F 0x12FC
#define REG_PCIE_CTRL_8812F 0x0300
#define REG_INT_MIG_8812F 0x0304
#define REG_BCNQ_TXBD_DESA_8812F 0x0308
#define REG_MGQ_TXBD_DESA_8812F 0x0310
#define REG_VOQ_TXBD_DESA_8812F 0x0318
#define REG_VIQ_TXBD_DESA_8812F 0x0320
#define REG_BEQ_TXBD_DESA_8812F 0x0328
#define REG_BKQ_TXBD_DESA_8812F 0x0330
#define REG_RXQ_RXBD_DESA_8812F 0x0338
#define REG_HI0Q_TXBD_DESA_8812F 0x0340
#define REG_HI1Q_TXBD_DESA_8812F 0x0348
#define REG_HI2Q_TXBD_DESA_8812F 0x0350
#define REG_HI3Q_TXBD_DESA_8812F 0x0358
#define REG_HI4Q_TXBD_DESA_8812F 0x0360
#define REG_HI5Q_TXBD_DESA_8812F 0x0368
#define REG_HI6Q_TXBD_DESA_8812F 0x0370
#define REG_HI7Q_TXBD_DESA_8812F 0x0378
#define REG_MGQ_TXBD_NUM_8812F 0x0380
#define REG_RX_RXBD_NUM_8812F 0x0382
#define REG_VOQ_TXBD_NUM_8812F 0x0384
#define REG_VIQ_TXBD_NUM_8812F 0x0386
#define REG_BEQ_TXBD_NUM_8812F 0x0388
#define REG_BKQ_TXBD_NUM_8812F 0x038A
#define REG_HI0Q_TXBD_NUM_8812F 0x038C
#define REG_HI1Q_TXBD_NUM_8812F 0x038E
#define REG_HI2Q_TXBD_NUM_8812F 0x0390
#define REG_HI3Q_TXBD_NUM_8812F 0x0392
#define REG_HI4Q_TXBD_NUM_8812F 0x0394
#define REG_HI5Q_TXBD_NUM_8812F 0x0396
#define REG_HI6Q_TXBD_NUM_8812F 0x0398
#define REG_HI7Q_TXBD_NUM_8812F 0x039A
#define REG_TSFTIMER_HCI_8812F 0x039C
#define REG_BD_RWPTR_CLR_8812F 0x039C
#define REG_VOQ_TXBD_IDX_8812F 0x03A0
#define REG_VIQ_TXBD_IDX_8812F 0x03A4
#define REG_BEQ_TXBD_IDX_8812F 0x03A8
#define REG_BKQ_TXBD_IDX_8812F 0x03AC
#define REG_MGQ_TXBD_IDX_8812F 0x03B0
#define REG_RXQ_RXBD_IDX_8812F 0x03B4
#define REG_HI0Q_TXBD_IDX_8812F 0x03B8
#define REG_HI1Q_TXBD_IDX_8812F 0x03BC
#define REG_HI2Q_TXBD_IDX_8812F 0x03C0
#define REG_HI3Q_TXBD_IDX_8812F 0x03C4
#define REG_HI4Q_TXBD_IDX_8812F 0x03C8
#define REG_HI5Q_TXBD_IDX_8812F 0x03CC
#define REG_HI6Q_TXBD_IDX_8812F 0x03D0
#define REG_HI7Q_TXBD_IDX_8812F 0x03D4
#define REG_DBG_SEL_V1_8812F 0x03D8
#define REG_PCIE_HRPWM1_V1_8812F 0x03D9
#define REG_PCIE_HCPWM1_V1_8812F 0x03DA
#define REG_PCIE_CTRL2_8812F 0x03DB
#define REG_PCIE_HRPWM2_V1_8812F 0x03DC
#define REG_PCIE_HCPWM2_V1_8812F 0x03DE
#define REG_PCIE_H2C_MSG_V1_8812F 0x03E0
#define REG_PCIE_C2H_MSG_V1_8812F 0x03E4
#define REG_DBI_WDATA_V1_8812F 0x03E8
#define REG_DBI_RDATA_V1_8812F 0x03EC
#define REG_DBI_FLAG_V1_8812F 0x03F0
#define REG_MDIO_V1_8812F 0x03F4
#define REG_PCIE_MIX_CFG_8812F 0x03F8
#define REG_HCI_MIX_CFG_8812F 0x03FC
#define REG_STC_INT_CS_8812F 0x1300
#define REG_ST_INT_CFG_8812F 0x1304
#define REG_H2CQ_TXBD_DESA_8812F 0x1320
#define REG_H2CQ_TXBD_NUM_8812F 0x1328
#define REG_H2CQ_TXBD_IDX_8812F 0x132C
#define REG_H2CQ_CSR_8812F 0x1330
#define REG_CHANGE_PCIE_SPEED_8812F 0x1350
#define REG_DEBUG_STATE1_8812F 0x1354
#define REG_DEBUG_STATE2_8812F 0x1358
#define REG_DEBUG_STATE3_8812F 0x135C
#define REG_CHNL_DMA_CFG_V1_8812F 0x137C
#define REG_PCIE_HISR0_V1_8812F 0x13B4
#define REG_PCIE_HISR1_V1_8812F 0x13BC
#define REG_PCIE_HISR2_V1_8812F 0x23B4
#define REG_PCIE_HISR3_V1_8812F 0x23BC
#define REG_Q0_INFO_8812F 0x0400
#define REG_Q1_INFO_8812F 0x0404
#define REG_Q2_INFO_8812F 0x0408
#define REG_Q3_INFO_8812F 0x040C
#define REG_MGQ_INFO_8812F 0x0410
#define REG_HIQ_INFO_8812F 0x0414
#define REG_BCNQ_INFO_8812F 0x0418
#define REG_TXPKT_EMPTY_8812F 0x041A
#define REG_CPU_MGQ_INFO_8812F 0x041C
#define REG_FWHW_TXQ_CTRL_8812F 0x0420
#define REG_DATAFB_SEL_8812F 0x0423
#define REG_BCNQ_BDNY_V1_8812F 0x0424
#define REG_LIFETIME_EN_8812F 0x0426
#define REG_SPEC_SIFS_8812F 0x0428
#define REG_RETRY_LIMIT_8812F 0x042A
#define REG_TXBF_CTRL_8812F 0x042C
#define REG_DARFRC_8812F 0x0430
#define REG_DARFRCH_8812F 0x0434
#define REG_RARFRC_8812F 0x0438
#define REG_RARFRCH_8812F 0x043C
#define REG_RRSR_8812F 0x0440
#define REG_ARFR0_8812F 0x0444
#define REG_ARFRH0_8812F 0x0448
#define REG_ARFR1_V1_8812F 0x044C
#define REG_ARFRH1_V1_8812F 0x0450
#define REG_CCK_CHECK_8812F 0x0454
#define REG_AMPDU_MAX_TIME_V1_8812F 0x0455
#define REG_BCNQ1_BDNY_V1_8812F 0x0456
#define REG_AMPDU_MAX_LENGTH_HT_8812F 0x0458
#define REG_ACQ_STOP_8812F 0x045C
#define REG_NDPA_RATE_8812F 0x045D
#define REG_TX_HANG_CTRL_8812F 0x045E
#define REG_NDPA_OPT_CTRL_8812F 0x045F
#define REG_AMPDU_MAX_LENGTH_VHT_8812F 0x0460
#define REG_RD_RESP_PKT_TH_8812F 0x0463
#define REG_CMDQ_INFO_8812F 0x0464
#define REG_Q4_INFO_8812F 0x0468
#define REG_Q5_INFO_8812F 0x046C
#define REG_Q6_INFO_8812F 0x0470
#define REG_Q7_INFO_8812F 0x0474
#define REG_WMAC_LBK_BUF_HD_V1_8812F 0x0478
#define REG_MGQ_BDNY_V1_8812F 0x047A
#define REG_TXRPT_CTRL_8812F 0x047C
#define REG_INIRTS_RATE_SEL_8812F 0x0480
#define REG_BASIC_CFEND_RATE_8812F 0x0481
#define REG_STBC_CFEND_RATE_8812F 0x0482
#define REG_DATA_SC_8812F 0x0483
#define REG_MACID_SLEEP3_8812F 0x0484
#define REG_MACID_SLEEP1_8812F 0x0488
#define REG_ARFR2_V1_8812F 0x048C
#define REG_ARFRH2_V1_8812F 0x0490
#define REG_ARFR3_V1_8812F 0x0494
#define REG_ARFRH3_V1_8812F 0x0498
#define REG_ARFR4_8812F 0x049C
#define REG_ARFRH4_8812F 0x04A0
#define REG_ARFR5_8812F 0x04A4
#define REG_ARFRH5_8812F 0x04A8
#define REG_TXRPT_START_OFFSET_8812F 0x04AC
#define REG_RRSR_CTS_8812F 0x04B0
#define REG_POWER_STAGE1_8812F 0x04B4
#define REG_POWER_STAGE2_8812F 0x04B8
#define REG_SW_AMPDU_BURST_MODE_CTRL_8812F 0x04BC
#define REG_PKT_LIFE_TIME_8812F 0x04C0
#define REG_STBC_SETTING_8812F 0x04C4
#define REG_STBC_SETTING2_8812F 0x04C5
#define REG_QUEUE_CTRL_8812F 0x04C6
#define REG_SINGLE_AMPDU_CTRL_8812F 0x04C7
#define REG_PROT_MODE_CTRL_8812F 0x04C8
#define REG_BAR_MODE_CTRL_8812F 0x04CC
#define REG_RA_TRY_RATE_AGG_LMT_8812F 0x04CF
#define REG_MACID_SLEEP2_8812F 0x04D0
#define REG_MACID_SLEEP_8812F 0x04D4
#define REG_HW_SEQ0_8812F 0x04D8
#define REG_HW_SEQ1_8812F 0x04DA
#define REG_HW_SEQ2_8812F 0x04DC
#define REG_HW_SEQ3_8812F 0x04DE
#define REG_NULL_PKT_STATUS_V1_8812F 0x04E0
#define REG_PTCL_ERR_STATUS_8812F 0x04E2
#define REG_NULL_PKT_STATUS_EXTEND_8812F 0x04E3
#define REG_HQMGQ_DROP_8812F 0x04E4
#define REG_PRECNT_CTRL_8812F 0x04E5
#define REG_BT_POLLUTE_PKT_CNT_8812F 0x04E8
#define REG_PTCL_DBG_8812F 0x04EC
#define REG_CPUMGQ_TIMER_CTRL2_8812F 0x04F4
#define REG_DUMMY_PAGE4_V1_8812F 0x04FC
#define REG_MOREDATA_8812F 0x04FE
#define REG_Q0_Q1_INFO_8812F 0x1400
#define REG_Q2_Q3_INFO_8812F 0x1404
#define REG_Q4_Q5_INFO_8812F 0x1408
#define REG_Q6_Q7_INFO_8812F 0x140C
#define REG_MGQ_HIQ_INFO_8812F 0x1410
#define REG_CMDQ_BCNQ_INFO_8812F 0x1414
#define REG_LOOPBACK_OPTION_8812F 0x1420
#define REG_AESIV_SETTING_8812F 0x1424
#define REG_BF0_TIME_SETTING_8812F 0x1428
#define REG_BF1_TIME_SETTING_8812F 0x142C
#define REG_BF_TIMEOUT_EN_8812F 0x1430
#define REG_MACID_RELEASE0_8812F 0x1434
#define REG_MACID_RELEASE1_8812F 0x1438
#define REG_MACID_RELEASE2_8812F 0x143C
#define REG_MACID_RELEASE3_8812F 0x1440
#define REG_MACID_RELEASE_SETTING_8812F 0x1444
#define REG_FAST_EDCA_VOVI_SETTING_8812F 0x1448
#define REG_FAST_EDCA_BEBK_SETTING_8812F 0x144C
#define REG_MACID_DROP0_8812F 0x1450
#define REG_MACID_DROP1_8812F 0x1454
#define REG_MACID_DROP2_8812F 0x1458
#define REG_MACID_DROP3_8812F 0x145C
#define REG_R_MACID_RELEASE_SUCCESS_0_8812F 0x1460
#define REG_R_MACID_RELEASE_SUCCESS_1_8812F 0x1464
#define REG_R_MACID_RELEASE_SUCCESS_2_8812F 0x1468
#define REG_R_MACID_RELEASE_SUCCESS_3_8812F 0x146C
#define REG_MGQ_FIFO_WRITE_POINTER_8812F 0x1470
#define REG_MGQ_FIFO_READ_POINTER_8812F 0x1472
#define REG_MGQ_FIFO_ENABLE_8812F 0x1472
#define REG_MGQ_FIFO_RELEASE_INT_MASK_8812F 0x1474
#define REG_MGQ_FIFO_RELEASE_INT_FLAG_8812F 0x1476
#define REG_MGQ_FIFO_VALID_MAP_8812F 0x1478
#define REG_MGQ_FIFO_LIFETIME_8812F 0x147A
#define REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F 0x147C
#define REG_SHCUT_SETTING_8812F 0x1480
#define REG_SHCUT_LLC_ETH_TYPE0_8812F 0x1484
#define REG_SHCUT_LLC_ETH_TYPE1_8812F 0x1488
#define REG_SHCUT_LLC_OUI0_8812F 0x148C
#define REG_SHCUT_LLC_OUI1_8812F 0x1490
#define REG_SHCUT_LLC_OUI2_8812F 0x1494
#define REG_MU_TX_CTL_8812F 0x14C0
#define REG_MU_STA_GID_VLD_8812F 0x14C4
#define REG_MU_STA_USER_POS_INFO_8812F 0x14C8
#define REG_MU_STA_USER_POS_INFO_H_8812F 0x14CC
#define REG_CHNL_INFO_CTRL_8812F 0x14D0
#define REG_CHNL_IDLE_TIME_8812F 0x14D4
#define REG_CHNL_BUSY_TIME_8812F 0x14D8
#define REG_MU_TRX_DBG_CNT_V1_8812F 0x14DC
#define REG_SU_DURATION_8812F 0x14F0
#define REG_MU_DURATION_8812F 0x14F2
#define REG_HW_NDPA_RTY_LIMIT_8812F 0x14F4
#define REG_EDCA_VO_PARAM_8812F 0x0500
#define REG_EDCA_VI_PARAM_8812F 0x0504
#define REG_EDCA_BE_PARAM_8812F 0x0508
#define REG_EDCA_BK_PARAM_8812F 0x050C
#define REG_BCNTCFG_8812F 0x0510
#define REG_PIFS_8812F 0x0512
#define REG_RDG_PIFS_8812F 0x0513
#define REG_SIFS_8812F 0x0514
#define REG_TSFTR_SYN_OFFSET_8812F 0x0518
#define REG_AGGR_BREAK_TIME_8812F 0x051A
#define REG_SLOT_8812F 0x051B
#define REG_NOA_ON_ERLY_TIME_8812F 0x051C
#define REG_NOA_OFF_ERLY_TIME_8812F 0x051D
#define REG_TX_PTCL_CTRL_8812F 0x0520
#define REG_TXPAUSE_8812F 0x0522
#define REG_DIS_TXREQ_CLR_8812F 0x0523
#define REG_RD_CTRL_8812F 0x0524
#define REG_MBSSID_CTRL_8812F 0x0526
#define REG_P2PPS_CTRL_8812F 0x0527
#define REG_PKT_LIFETIME_CTRL_8812F 0x0528
#define REG_P2PPS_SPEC_STATE_8812F 0x052B
#define REG_TXOP_LIMIT_CTRL_8812F 0x052C
#define REG_BAR_TX_CTRL_8812F 0x0530
#define REG_P2PON_DIS_TXTIME_8812F 0x0531
#define REG_CCA_TXEN_CNT_8812F 0x0534
#define REG_MAX_INTER_COLLISION_8812F 0x0538
#define REG_MAX_INTER_COLLISION_CNT_8812F 0x053C
#define REG_TBTT_PROHIBIT_8812F 0x0540
#define REG_P2PPS_STATE_8812F 0x0543
#define REG_RD_NAV_NXT_8812F 0x0544
#define REG_NAV_PROT_LEN_8812F 0x0546
#define REG_FTM_PTT_8812F 0x0548
#define REG_FTM_TSF_8812F 0x054C
#define REG_BCN_CTRL_8812F 0x0550
#define REG_BCN_CTRL_CLINT0_8812F 0x0551
#define REG_MBID_NUM_8812F 0x0552
#define REG_DUAL_TSF_RST_8812F 0x0553
#define REG_MBSSID_BCN_SPACE_8812F 0x0554
#define REG_DRVERLYINT_8812F 0x0558
#define REG_BCNDMATIM_8812F 0x0559
#define REG_ATIMWND_8812F 0x055A
#define REG_USTIME_TSF_8812F 0x055C
#define REG_BCN_MAX_ERR_8812F 0x055D
#define REG_RXTSF_OFFSET_CCK_8812F 0x055E
#define REG_RXTSF_OFFSET_OFDM_8812F 0x055F
#define REG_TSFTR_8812F 0x0560
#define REG_TSFTR_1_8812F 0x0564
#define REG_FREERUN_CNT_8812F 0x0568
#define REG_FREERUN_CNT_1_8812F 0x056C
#define REG_ATIMWND1_V1_8812F 0x0570
#define REG_TBTT_PROHIBIT_INFRA_8812F 0x0571
#define REG_CTWND_8812F 0x0572
#define REG_BCNIVLCUNT_8812F 0x0573
#define REG_BCNDROPCTRL_8812F 0x0574
#define REG_HGQ_TIMEOUT_PERIOD_8812F 0x0575
#define REG_TXCMD_TIMEOUT_PERIOD_8812F 0x0576
#define REG_MISC_CTRL_8812F 0x0577
#define REG_BCN_CTRL_CLINT1_8812F 0x0578
#define REG_BCN_CTRL_CLINT2_8812F 0x0579
#define REG_BCN_CTRL_CLINT3_8812F 0x057A
#define REG_EXTEND_CTRL_8812F 0x057B
#define REG_P2PPS1_SPEC_STATE_8812F 0x057C
#define REG_P2PPS1_STATE_8812F 0x057D
#define REG_P2PPS2_SPEC_STATE_8812F 0x057E
#define REG_P2PPS2_STATE_8812F 0x057F
#define REG_PS_TIMER0_8812F 0x0580
#define REG_PS_TIMER1_8812F 0x0584
#define REG_PS_TIMER2_8812F 0x0588
#define REG_TBTT_CTN_AREA_8812F 0x058C
#define REG_FORCE_BCN_IFS_8812F 0x058E
#define REG_TXOP_MIN_8812F 0x0590
#define REG_PRE_BKF_TIME_8812F 0x0592
#define REG_CROSS_TXOP_CTRL_8812F 0x0593
#define REG_RX_TBTT_SHIFT_V1_8812F 0x0598
#define REG_ATIMWND2_8812F 0x05A0
#define REG_ATIMWND3_8812F 0x05A1
#define REG_ATIMWND4_8812F 0x05A2
#define REG_ATIMWND5_8812F 0x05A3
#define REG_ATIMWND6_8812F 0x05A4
#define REG_ATIMWND7_8812F 0x05A5
#define REG_ATIMUGT_8812F 0x05A6
#define REG_HIQ_NO_LMT_EN_8812F 0x05A7
#define REG_DTIM_COUNTER_ROOT_8812F 0x05A8
#define REG_DTIM_COUNTER_VAP1_8812F 0x05A9
#define REG_DTIM_COUNTER_VAP2_8812F 0x05AA
#define REG_DTIM_COUNTER_VAP3_8812F 0x05AB
#define REG_DTIM_COUNTER_VAP4_8812F 0x05AC
#define REG_DTIM_COUNTER_VAP5_8812F 0x05AD
#define REG_DTIM_COUNTER_VAP6_8812F 0x05AE
#define REG_DTIM_COUNTER_VAP7_8812F 0x05AF
#define REG_DIS_ATIM_8812F 0x05B0
#define REG_EARLY_128US_8812F 0x05B1
#define REG_P2PPS1_CTRL_8812F 0x05B2
#define REG_P2PPS2_CTRL_8812F 0x05B3
#define REG_TIMER0_SRC_SEL_8812F 0x05B4
#define REG_NOA_UNIT_SEL_8812F 0x05B5
#define REG_P2POFF_DIS_TXTIME_8812F 0x05B7
#define REG_MBSSID_BCN_SPACE2_8812F 0x05B8
#define REG_MBSSID_BCN_SPACE3_8812F 0x05BC
#define REG_ACMHWCTRL_8812F 0x05C0
#define REG_ACMRSTCTRL_8812F 0x05C1
#define REG_ACMAVG_8812F 0x05C2
#define REG_VO_ADMTIME_8812F 0x05C4
#define REG_VI_ADMTIME_8812F 0x05C6
#define REG_BE_ADMTIME_8812F 0x05C8
#define REG_MAC_HEADER_NAV_OFFSET_8812F 0x05CA
#define REG_DIS_NDPA_NAV_CHECK_8812F 0x05CB
#define REG_EDCA_RANDOM_GEN_8812F 0x05CC
#define REG_TXCMD_NOA_SEL_8812F 0x05CF
#define REG_32K_CLK_SEL_8812F 0x05D0
#define REG_EARLYINT_ADJUST_8812F 0x05D4
#define REG_BCNERR_CNT_8812F 0x05D8
#define REG_BCNERR_CNT_2_8812F 0x05DC
#define REG_NOA_PARAM_8812F 0x05E0
#define REG_NOA_PARAM_1_8812F 0x05E4
#define REG_NOA_PARAM_2_8812F 0x05E8
#define REG_NOA_PARAM_3_8812F 0x05EC
#define REG_P2P_RST_8812F 0x05F0
#define REG_SCHEDULER_RST_8812F 0x05F1
#define REG_SCH_DBG_VALUE_8812F 0x05F4
#define REG_SCH_TXCMD_8812F 0x05F8
#define REG_PAGE5_DUMMY_8812F 0x05FC
#define REG_CPUMGQ_TX_TIMER_8812F 0x1500
#define REG_PS_TIMER_A_8812F 0x1504
#define REG_PS_TIMER_B_8812F 0x1508
#define REG_PS_TIMER_C_8812F 0x150C
#define REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8812F 0x1510
#define REG_CPUMGQ_TX_TIMER_EARLY_8812F 0x1514
#define REG_PS_TIMER_A_EARLY_8812F 0x1515
#define REG_PS_TIMER_B_EARLY_8812F 0x1516
#define REG_PS_TIMER_C_EARLY_8812F 0x1517
#define REG_CPUMGQ_PARAMETER_8812F 0x1518
#define REG_TSF_SYNC_ADJ_8812F 0x1520
#define REG_TSF_ADJ_VLAUE_8812F 0x1524
#define REG_TSF_ADJ_VLAUE_2_8812F 0x1528
#define REG_P2PPS_HW_AUTO_PAUSE_CTRL_8812F 0x156C
#define REG_P2PPS1_HW_AUTO_PAUSE_CTRL_8812F 0x1570
#define REG_P2PPS2_HW_AUTO_PAUSE_CTRL_8812F 0x1574
#define REG_WMAC_CR_8812F 0x0600
#define REG_WMAC_FWPKT_CR_8812F 0x0601
#define REG_FW_STS_FILTER_8812F 0x0602
#define REG_TCR_8812F 0x0604
#define REG_RCR_8812F 0x0608
#define REG_RX_PKT_LIMIT_8812F 0x060C
#define REG_RX_DLK_TIME_8812F 0x060D
#define REG_RX_DRVINFO_SZ_8812F 0x060F
#define REG_MACID_8812F 0x0610
#define REG_MACID_H_8812F 0x0614
#define REG_BSSID_8812F 0x0618
#define REG_BSSID_H_8812F 0x061C
#define REG_MAR_8812F 0x0620
#define REG_MAR_H_8812F 0x0624
#define REG_MBIDCAMCFG_1_8812F 0x0628
#define REG_MBIDCAMCFG_2_8812F 0x062C
#define REG_WMAC_TCR_TSFT_OFS_8812F 0x0630
#define REG_UDF_THSD_8812F 0x0632
#define REG_ZLD_NUM_8812F 0x0633
#define REG_STMP_THSD_8812F 0x0634
#define REG_WMAC_TXTIMEOUT_8812F 0x0635
#define REG_USTIME_EDCA_8812F 0x0638
#define REG_ACKTO_CCK_8812F 0x0639
#define REG_MAC_SPEC_SIFS_8812F 0x063A
#define REG_RESP_SIFS_CCK_8812F 0x063C
#define REG_RESP_SIFS_OFDM_8812F 0x063E
#define REG_ACKTO_8812F 0x0640
#define REG_CTS2TO_8812F 0x0641
#define REG_EIFS_8812F 0x0642
#define REG_RPFM_MAP0_8812F 0x0644
#define REG_RPFM_MAP1_V1_8812F 0x0646
#define REG_RPFM_CAM_CMD_8812F 0x0648
#define REG_RPFM_CAM_RWD_8812F 0x064C
#define REG_NAV_CTRL_8812F 0x0650
#define REG_BACAMCMD_8812F 0x0654
#define REG_BACAMCONTENT_8812F 0x0658
#define REG_BACAMCONTENT_H_8812F 0x065C
#define REG_LBDLY_8812F 0x0660
#define REG_WMAC_BACAM_RPMEN_8812F 0x0661
#define REG_TX_RX_8812F 0x0662
#define REG_WMAC_BITMAP_CTL_8812F 0x0663
#define REG_RXERR_RPT_8812F 0x0664
#define REG_WMAC_TRXPTCL_CTL_8812F 0x0668
#define REG_WMAC_TRXPTCL_CTL_H_8812F 0x066C
#define REG_CAMCMD_8812F 0x0670
#define REG_CAMWRITE_8812F 0x0674
#define REG_CAMREAD_8812F 0x0678
#define REG_CAMDBG_8812F 0x067C
#define REG_SECCFG_8812F 0x0680
#define REG_RXFILTER_CATEGORY_1_8812F 0x0682
#define REG_RXFILTER_ACTION_1_8812F 0x0683
#define REG_RXFILTER_CATEGORY_2_8812F 0x0684
#define REG_RXFILTER_ACTION_2_8812F 0x0685
#define REG_RXFILTER_CATEGORY_3_8812F 0x0686
#define REG_RXFILTER_ACTION_3_8812F 0x0687
#define REG_RXFLTMAP3_8812F 0x0688
#define REG_RXFLTMAP4_8812F 0x068A
#define REG_RXFLTMAP5_8812F 0x068C
#define REG_RXFLTMAP6_8812F 0x068E
#define REG_WOW_CTRL_8812F 0x0690
#define REG_NAN_RX_TSF_FILTER_8812F 0x0691
#define REG_PS_RX_INFO_8812F 0x0692
#define REG_WMMPS_UAPSD_TID_8812F 0x0693
#define REG_LPNAV_CTRL_8812F 0x0694
#define REG_WKFMCAM_CMD_8812F 0x0698
#define REG_WKFMCAM_RWD_8812F 0x069C
#define REG_RXFLTMAP0_8812F 0x06A0
#define REG_RXFLTMAP1_8812F 0x06A2
#define REG_RXFLTMAP2_8812F 0x06A4
#define REG_BCN_PSR_RPT_8812F 0x06A8
#define REG_FLC_RPC_8812F 0x06AC
#define REG_FLC_RPCT_8812F 0x06AD
#define REG_FLC_PTS_8812F 0x06AE
#define REG_FLC_TRPC_8812F 0x06AF
#define REG_RXPKTMON_CTRL_8812F 0x06B0
#define REG_STATE_MON_8812F 0x06B4
#define REG_ERROR_MON_8812F 0x06B8
#define REG_SEARCH_MACID_8812F 0x06BC
#define REG_BT_COEX_TABLE_8812F 0x06C0
#define REG_BT_COEX_TABLE2_8812F 0x06C4
#define REG_BT_COEX_BREAK_TABLE_8812F 0x06C8
#define REG_BT_COEX_TABLE_H_8812F 0x06CC
#define REG_RXCMD_0_8812F 0x06D0
#define REG_RXCMD_1_8812F 0x06D4
#define REG_WMAC_RESP_TXINFO_8812F 0x06D8
#define REG_BBPSF_CTRL_8812F 0x06DC
#define REG_P2P_RX_BCN_NOA_8812F 0x06E0
#define REG_ASSOCIATED_BFMER0_INFO_8812F 0x06E4
#define REG_ASSOCIATED_BFMER0_INFO_H_8812F 0x06E8
#define REG_ASSOCIATED_BFMER1_INFO_8812F 0x06EC
#define REG_ASSOCIATED_BFMER1_INFO_H_8812F 0x06F0
#define REG_TX_CSI_RPT_PARAM_BW20_8812F 0x06F4
#define REG_TX_CSI_RPT_PARAM_BW40_8812F 0x06F8
#define REG_CSI_PTR_8812F 0x06FC
#define REG_BCN_PSR_RPT2_8812F 0x1600
#define REG_BCN_PSR_RPT3_8812F 0x1604
#define REG_BCN_PSR_RPT4_8812F 0x1608
#define REG_A1_ADDR_MASK_8812F 0x160C
#define REG_RXPSF_CTRL_8812F 0x1610
#define REG_RXPSF_TYPE_CTRL_8812F 0x1614
#define REG_CAM_ACCESS_CTRL_8812F 0x1618
#define REG_HT_SND_REF_RATE_8812F 0x161C
#define REG_MACID2_8812F 0x1620
#define REG_MACID2_H_8812F 0x1624
#define REG_BSSID2_8812F 0x1628
#define REG_BSSID2_H_8812F 0x162C
#define REG_MACID3_8812F 0x1630
#define REG_MACID3_H_8812F 0x1634
#define REG_BSSID3_8812F 0x1638
#define REG_BSSID3_H_8812F 0x163C
#define REG_MACID4_8812F 0x1640
#define REG_MACID4_H_8812F 0x1644
#define REG_BSSID4_8812F 0x1648
#define REG_BSSID4_H_8812F 0x164C
#define REG_NOA_REPORT_8812F 0x1650
#define REG_NOA_REPORT_1_8812F 0x1654
#define REG_NOA_REPORT_2_8812F 0x1658
#define REG_NOA_REPORT_3_8812F 0x165C
#define REG_PWRBIT_SETTING_8812F 0x1660
#define REG_GENERAL_OPTION_8812F 0x1664
#define REG_RXAI_CTRL_8812F 0x1668
#define REG_CSI_RRSR_8812F 0x1678
#define REG_MU_BF_OPTION_8812F 0x167C
#define REG_WMAC_PAUSE_BB_CLR_TH_8812F 0x167D
#define REG__WMAC_MULBK_BUF_8812F 0x167E
#define REG_WMAC_MU_OPTION_8812F 0x167F
#define REG_WMAC_MU_BF_CTL_8812F 0x1680
#define REG_WMAC_MU_BFRPT_PARA_8812F 0x1682
#define REG_WMAC_ASSOCIATED_MU_BFMEE2_8812F 0x1684
#define REG_WMAC_ASSOCIATED_MU_BFMEE3_8812F 0x1686
#define REG_WMAC_ASSOCIATED_MU_BFMEE4_8812F 0x1688
#define REG_WMAC_ASSOCIATED_MU_BFMEE5_8812F 0x168A
#define REG_WMAC_ASSOCIATED_MU_BFMEE6_8812F 0x168C
#define REG_WMAC_ASSOCIATED_MU_BFMEE7_8812F 0x168E
#define REG_WMAC_BB_STOP_RX_COUNTER_8812F 0x1690
#define REG_WMAC_PLCP_MONITOR_8812F 0x1694
#define REG_WMAC_PLCP_MONITOR_MUTX_8812F 0x1698
#define REG_WMAC_CSIDMA_CFG_8812F 0x169C
#define REG_TRANSMIT_ADDRSS_0_8812F 0x16A0
#define REG_TRANSMIT_ADDRSS_0_H_8812F 0x16A4
#define REG_TRANSMIT_ADDRSS_1_8812F 0x16A8
#define REG_TRANSMIT_ADDRSS_1_H_8812F 0x16AC
#define REG_TRANSMIT_ADDRSS_2_8812F 0x16B0
#define REG_TRANSMIT_ADDRSS_2_H_8812F 0x16B4
#define REG_TRANSMIT_ADDRSS_3_8812F 0x16B8
#define REG_TRANSMIT_ADDRSS_3_H_8812F 0x16BC
#define REG_TRANSMIT_ADDRSS_4_8812F 0x16C0
#define REG_TRANSMIT_ADDRSS_4_H_8812F 0x16C4
#define REG_SND_AID12_8812F 0x16D0
#define REG_SND_PKT_INFO_8812F 0x16D2
#define REG_MACID1_8812F 0x0700
#define REG_MACID1_1_8812F 0x0704
#define REG_BSSID1_8812F 0x0708
#define REG_BSSID1_1_8812F 0x070C
#define REG_BCN_PSR_RPT1_8812F 0x0710
#define REG_ASSOCIATED_BFMEE_SEL_8812F 0x0714
#define REG_SND_PTCL_CTRL_8812F 0x0718
#define REG_RX_CSI_RPT_INFO_8812F 0x071C
#define REG_NS_ARP_CTRL_8812F 0x0720
#define REG_NS_ARP_INFO_8812F 0x0724
#define REG_BEAMFORMING_INFO_NSARP_V1_8812F 0x0728
#define REG_BEAMFORMING_INFO_NSARP_8812F 0x072C
#define REG_IPV6_8812F 0x0730
#define REG_IPV6_1_8812F 0x0734
#define REG_IPV6_2_8812F 0x0738
#define REG_IPV6_3_8812F 0x073C
#define REG_WMAC_RTX_CTX_SUBTYPE_CFG_8812F 0x0750
#define REG_WMAC_SWAES_DIO_B63_B32_8812F 0x0754
#define REG_WMAC_SWAES_DIO_B95_B64_8812F 0x0758
#define REG_WMAC_SWAES_DIO_B127_B96_8812F 0x075C
#define REG_WMAC_SWAES_CFG_8812F 0x0760
#define REG_BT_COEX_V2_8812F 0x0762
#define REG_BT_COEX_8812F 0x0764
#define REG_WLAN_ACT_MASK_CTRL_8812F 0x0768
#define REG_WLAN_ACT_MASK_CTRL_1_8812F 0x076C
#define REG_BT_COEX_ENHANCED_INTR_CTRL_8812F 0x076E
#define REG_BT_ACT_STATISTICS_8812F 0x0770
#define REG_BT_ACT_STATISTICS_1_8812F 0x0774
#define REG_BT_STATISTICS_CONTROL_REGISTER_8812F 0x0778
#define REG_BT_STATUS_REPORT_REGISTER_8812F 0x077C
#define REG_BT_INTERRUPT_CONTROL_REGISTER_8812F 0x0780
#define REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8812F 0x0784
#define REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8812F 0x0785
#define REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_1_8812F 0x0788
#define REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_2_8812F 0x078C
#define REG_BT_INTERRUPT_STATUS_REGISTER_8812F 0x078F
#define REG_BT_TDMA_TIME_REGISTER_8812F 0x0790
#define REG_BT_ACT_REGISTER_8812F 0x0794
#define REG_OBFF_CTRL_BASIC_8812F 0x0798
#define REG_OBFF_CTRL2_TIMER_8812F 0x079C
#define REG_LTR_CTRL_BASIC_8812F 0x07A0
#define REG_LTR_CTRL2_TIMER_THRESHOLD_8812F 0x07A4
#define REG_LTR_IDLE_LATENCY_V1_8812F 0x07A8
#define REG_LTR_ACTIVE_LATENCY_V1_8812F 0x07AC
#define REG_ANTENNA_TRAINING_CONTROL_REGISTER_8812F 0x07B0
#define REG_ANTENNA_TRAINING_CONTROL_REGISTER_1_8812F 0x07B4
#define REG_WMAC_PKTCNT_RWD_8812F 0x07B8
#define REG_WMAC_PKTCNT_CTRL_8812F 0x07BC
#define REG_IQ_DUMP_8812F 0x07C0
#define REG_IQ_DUMP_1_8812F 0x07C4
#define REG_IQ_DUMP_2_8812F 0x07C8
#define REG_WMAC_FTM_CTL_8812F 0x07CC
#define REG_WMAC_IQ_MDPK_FUNC_8812F 0x07CE
#define REG_WMAC_OPTION_FUNCTION_8812F 0x07D0
#define REG_WMAC_OPTION_FUNCTION_1_8812F 0x07D4
#define REG_WMAC_OPTION_FUNCTION_2_8812F 0x07D8
#define REG_RX_FILTER_FUNCTION_8812F 0x07DA
#define REG_NDP_SIG_8812F 0x07E0
#define REG_TXCMD_INFO_FOR_RSP_PKT_8812F 0x07E4
#define REG_TXCMD_INFO_FOR_RSP_PKT_1_8812F 0x07E8
#define REG_WSEC_OPTION_8812F 0x07EC
#define REG_RTS_ADDRESS_0_8812F 0x07F0
#define REG_RTS_ADDRESS_0_1_8812F 0x07F4
#define REG_RTS_ADDRESS_1_8812F 0x07F8
#define REG_RTS_ADDRESS_1_1_8812F 0x07FC
#define REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8812F 0x1700
#define REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8812F 0x1704
#define REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8812F 0x1708
#define REG_SDIO_TX_CTRL_8812F 0x10250000
#define REG_SDIO_CMD11_VOL_SWITCH_8812F 0x10250004
#define REG_SDIO_CTRL_8812F 0x10250005
#define REG_SDIO_DRIVING_8812F 0x10250006
#define REG_SDIO_MONITOR_8812F 0x10250008
#define REG_SDIO_MONITOR_2_8812F 0x1025000C
#define REG_SDIO_CTRL_2_8812F 0x10250010
#define REG_SDIO_HIMR_8812F 0x10250014
#define REG_SDIO_HISR_8812F 0x10250018
#define REG_SDIO_RX_REQ_LEN_8812F 0x1025001C
#define REG_SDIO_FREE_TXPG_SEQ_V1_8812F 0x1025001F
#define REG_SDIO_FREE_TXPG_8812F 0x10250020
#define REG_SDIO_FREE_TXPG2_8812F 0x10250024
#define REG_SDIO_OQT_FREE_TXPG_V1_8812F 0x10250028
#define REG_SDIO_TXPKT_EMPTY_8812F 0x1025002C
#define REG_SDIO_HTSFR_INFO_8812F 0x10250030
#define REG_SDIO_HCPWM1_V2_8812F 0x10250038
#define REG_SDIO_HCPWM2_V2_8812F 0x1025003A
#define REG_SDIO_INDIRECT_REG_CFG_8812F 0x10250040
#define REG_SDIO_INDIRECT_REG_DATA_8812F 0x10250044
#define REG_SDIO_H2C_8812F 0x10250060
#define REG_SDIO_C2H_8812F 0x10250064
#define REG_SDIO_HRPWM1_8812F 0x10250080
#define REG_SDIO_HRPWM2_8812F 0x10250082
#define REG_SDIO_HPS_CLKR_8812F 0x10250084
#define REG_SDIO_BUS_CTRL_8812F 0x10250085
#define REG_SDIO_HSUS_CTRL_8812F 0x10250086
#define REG_SDIO_RESPONSE_TIMER_8812F 0x10250088
#define REG_SDIO_CMD_CRC_8812F 0x1025008A
#define REG_SDIO_HSISR_8812F 0x10250090
#define REG_SDIO_HSIMR_8812F 0x10250091
#define REG_SDIO_DIOERR_RPT_8812F 0x102500C0
#define REG_SDIO_CMD_ERRCNT_8812F 0x102500C2
#define REG_SDIO_DATA_ERRCNT_8812F 0x102500C3
#define REG_SDIO_CMD_ERR_CONTENT_8812F 0x102500C4
#define REG_SDIO_CRC_ERR_IDX_8812F 0x102500C9
#define REG_SDIO_DATA_CRC_8812F 0x102500CA
#define REG_SDIO_TRANS_FIFO_STATUS_8812F 0x102500CC
#endif

2
hal/halmac/halmac_reg_8814b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_reg_8821c.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_reg_8822b.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

3
hal/halmac/halmac_reg_8822c.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -96,6 +96,7 @@
#define REG_ANAPAR_XTAL_3_8822C 0x104C
#define REG_ANAPAR_XTAL_AACK_0_8822C 0x1054
#define REG_ANAPAR_XTAL_AACK_1_8822C 0x1058
#define REG_XTAL_AAC_OUTPUT_8822C 0x1060
#define REG_ANAPAR_XTAL_MODE_DECODER_8822C 0x1064
#define REG_SYS_CFG5_8822C 0x1070
#define REG_CPU_DMEM_CON_8822C 0x1080

4
hal/halmac/halmac_rx_bd_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_RX_BD_NIC_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT ||\
HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8814B_SUPPORT)
/*TXBD_DW0*/

89
hal/halmac/halmac_rx_desc_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_RX_DESC_AP_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD0*/
@@ -29,7 +29,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PHYPKTIDC(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword0, 0x1, \
@@ -47,7 +47,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_SWDEC(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword0, 0x1, \
@@ -90,7 +91,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_TY_PE(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x3, \
@@ -108,7 +109,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MF(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -124,7 +126,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PAM(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -142,7 +144,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_CHK_VLD(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -160,7 +162,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_IS_TCP_UDP(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -173,7 +176,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_CHKERR(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -197,7 +200,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PAGGR(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -215,7 +218,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RXID_MATCH(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -233,7 +236,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_AMSDU(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -243,7 +247,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID_VLD(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x1, \
@@ -253,7 +257,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_TID(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0xf, 8)
@@ -262,7 +267,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword1, 0x7f, \
@@ -286,7 +291,7 @@
#if (HALMAC_8822B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PPDU_CNT(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x3, \
@@ -296,7 +301,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_C2H(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x1, \
@@ -304,7 +310,7 @@
#endif
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_HWRSVD_V1(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x7, \
@@ -331,7 +337,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_WLANHD_IV_LEN(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x3f, \
@@ -347,7 +354,7 @@
#endif
#if (HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
#if (HALMAC_8822C_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_STATISTICS(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x1, \
@@ -357,7 +364,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_IS_QOS(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0x1, \
@@ -375,7 +382,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_FRAG(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, 0xf, \
@@ -384,6 +392,12 @@
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword2, \
0xfff, 0)
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD3*/
#define GET_RX_DESC_MAGIC_WAKE(rxdesc) \
@@ -427,7 +441,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_DMA_AGG_NUM(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword3, 0xff, \
@@ -437,7 +452,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_BSSID_FIT_1_0(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword3, 0x3, \
@@ -458,7 +473,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_HTC(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword3, 0x1, \
@@ -477,7 +493,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_BSSID_FIT_4_2(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword3, 0x7, 7)
@@ -493,7 +509,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_RATE(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword3, 0x7f, \
@@ -521,7 +538,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_A1_FIT_A1(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x7f, \
@@ -539,7 +556,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID_RPT_BUFF(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x7f, \
@@ -549,7 +566,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_PRE_NDP_VLD(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x1, \
@@ -586,7 +603,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_SCRAMBLER(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x7f, \
@@ -604,21 +621,21 @@
#endif
#if (HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT)
#if (HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_FC_POWER(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x1, 7)
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_TXRPTMID_CTL_MASK(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x1, 6)
#endif
#if (HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT)
#if (HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_SWPS_RPT(rxdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_rx_desc *)rxdesc)->dword4, 0x1, 5)
@@ -652,7 +669,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD5*/

85
hal/halmac/halmac_rx_desc_chip.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -689,6 +689,89 @@
#endif
#if (HALMAC_8197G_SUPPORT)
/*RXDESC_WORD0*/
#define GET_RX_DESC_EOR_8197G(rxdesc) GET_RX_DESC_EOR(rxdesc)
#define GET_RX_DESC_PHYPKTIDC_8197G(rxdesc) GET_RX_DESC_PHYPKTIDC(rxdesc)
#define GET_RX_DESC_SWDEC_8197G(rxdesc) GET_RX_DESC_SWDEC(rxdesc)
#define GET_RX_DESC_PHYST_8197G(rxdesc) GET_RX_DESC_PHYST(rxdesc)
#define GET_RX_DESC_SHIFT_8197G(rxdesc) GET_RX_DESC_SHIFT(rxdesc)
#define GET_RX_DESC_QOS_8197G(rxdesc) GET_RX_DESC_QOS(rxdesc)
#define GET_RX_DESC_SECURITY_8197G(rxdesc) GET_RX_DESC_SECURITY(rxdesc)
#define GET_RX_DESC_DRV_INFO_SIZE_8197G(rxdesc) \
GET_RX_DESC_DRV_INFO_SIZE(rxdesc)
#define GET_RX_DESC_ICV_ERR_8197G(rxdesc) GET_RX_DESC_ICV_ERR(rxdesc)
#define GET_RX_DESC_CRC32_8197G(rxdesc) GET_RX_DESC_CRC32(rxdesc)
#define GET_RX_DESC_PKT_LEN_8197G(rxdesc) GET_RX_DESC_PKT_LEN(rxdesc)
/*RXDESC_WORD1*/
#define GET_RX_DESC_BC_8197G(rxdesc) GET_RX_DESC_BC(rxdesc)
#define GET_RX_DESC_MC_8197G(rxdesc) GET_RX_DESC_MC(rxdesc)
#define GET_RX_DESC_TY_PE_8197G(rxdesc) GET_RX_DESC_TY_PE(rxdesc)
#define GET_RX_DESC_MF_8197G(rxdesc) GET_RX_DESC_MF(rxdesc)
#define GET_RX_DESC_MD_8197G(rxdesc) GET_RX_DESC_MD(rxdesc)
#define GET_RX_DESC_PWR_8197G(rxdesc) GET_RX_DESC_PWR(rxdesc)
#define GET_RX_DESC_PAM_8197G(rxdesc) GET_RX_DESC_PAM(rxdesc)
#define GET_RX_DESC_CHK_VLD_8197G(rxdesc) GET_RX_DESC_CHK_VLD(rxdesc)
#define GET_RX_DESC_RX_IS_TCP_UDP_8197G(rxdesc) \
GET_RX_DESC_RX_IS_TCP_UDP(rxdesc)
#define GET_RX_DESC_RX_IPV_8197G(rxdesc) GET_RX_DESC_RX_IPV(rxdesc)
#define GET_RX_DESC_CHKERR_8197G(rxdesc) GET_RX_DESC_CHKERR(rxdesc)
#define GET_RX_DESC_PAGGR_8197G(rxdesc) GET_RX_DESC_PAGGR(rxdesc)
#define GET_RX_DESC_RXID_MATCH_8197G(rxdesc) GET_RX_DESC_RXID_MATCH(rxdesc)
#define GET_RX_DESC_AMSDU_8197G(rxdesc) GET_RX_DESC_AMSDU(rxdesc)
#define GET_RX_DESC_MACID_VLD_8197G(rxdesc) GET_RX_DESC_MACID_VLD(rxdesc)
#define GET_RX_DESC_TID_8197G(rxdesc) GET_RX_DESC_TID(rxdesc)
#define GET_RX_DESC_MACID_8197G(rxdesc) GET_RX_DESC_MACID(rxdesc)
/*RXDESC_WORD2*/
#define GET_RX_DESC_FCS_OK_8197G(rxdesc) GET_RX_DESC_FCS_OK(rxdesc)
#define GET_RX_DESC_PPDU_CNT_8197G(rxdesc) GET_RX_DESC_PPDU_CNT(rxdesc)
#define GET_RX_DESC_C2H_8197G(rxdesc) GET_RX_DESC_C2H(rxdesc)
#define GET_RX_DESC_HWRSVD_8197G(rxdesc) GET_RX_DESC_HWRSVD_V1(rxdesc)
#define GET_RX_DESC_WLANHD_IV_LEN_8197G(rxdesc) \
GET_RX_DESC_WLANHD_IV_LEN(rxdesc)
#define GET_RX_DESC_RX_STATISTICS_8197G(rxdesc) \
GET_RX_DESC_RX_STATISTICS(rxdesc)
#define GET_RX_DESC_RX_IS_QOS_8197G(rxdesc) GET_RX_DESC_RX_IS_QOS(rxdesc)
#define GET_RX_DESC_FRAG_8197G(rxdesc) GET_RX_DESC_FRAG(rxdesc)
#define GET_RX_DESC_SEQ_8197G(rxdesc) GET_RX_DESC_SEQ(rxdesc)
/*RXDESC_WORD3*/
#define GET_RX_DESC_DMA_AGG_NUM_8197G(rxdesc) GET_RX_DESC_DMA_AGG_NUM(rxdesc)
#define GET_RX_DESC_BSSID_FIT_1_0_8197G(rxdesc) \
GET_RX_DESC_BSSID_FIT_1_0(rxdesc)
#define GET_RX_DESC_EOSP_8197G(rxdesc) GET_RX_DESC_EOSP(rxdesc)
#define GET_RX_DESC_HTC_8197G(rxdesc) GET_RX_DESC_HTC(rxdesc)
#define GET_RX_DESC_BSSID_FIT_4_2_8197G(rxdesc) \
GET_RX_DESC_BSSID_FIT_4_2(rxdesc)
#define GET_RX_DESC_RX_RATE_8197G(rxdesc) GET_RX_DESC_RX_RATE(rxdesc)
/*RXDESC_WORD4*/
#define GET_RX_DESC_A1_FIT_A1_8197G(rxdesc) GET_RX_DESC_A1_FIT_A1(rxdesc)
#define GET_RX_DESC_MACID_RPT_BUFF_8197G(rxdesc) \
GET_RX_DESC_MACID_RPT_BUFF(rxdesc)
#define GET_RX_DESC_RX_PRE_NDP_VLD_8197G(rxdesc) \
GET_RX_DESC_RX_PRE_NDP_VLD(rxdesc)
#define GET_RX_DESC_RX_SCRAMBLER_8197G(rxdesc) GET_RX_DESC_RX_SCRAMBLER(rxdesc)
#define GET_RX_DESC_RX_EOF_8197G(rxdesc) GET_RX_DESC_RX_EOF(rxdesc)
#define GET_RX_DESC_FC_POWER_8197G(rxdesc) GET_RX_DESC_FC_POWER(rxdesc)
#define GET_RX_DESC_TXRPTMID_CTL_MASK_8197G(rxdesc) \
GET_RX_DESC_TXRPTMID_CTL_MASK(rxdesc)
#define GET_RX_DESC_SWPS_RPT_8197G(rxdesc) GET_RX_DESC_SWPS_RPT(rxdesc)
/*RXDESC_WORD5*/
#define GET_RX_DESC_TSFL_8197G(rxdesc) GET_RX_DESC_TSFL(rxdesc)
#endif
#if (HALMAC_8812F_SUPPORT)
/*RXDESC_WORD0*/

89
hal/halmac/halmac_rx_desc_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_RX_DESC_NIC_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD0*/
@@ -27,7 +27,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PHYPKTIDC(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x00, 28, 1)
@@ -41,7 +41,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_SWDEC(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x00, 27, 1)
#define GET_RX_DESC_PHYST(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x00, 26, 1)
@@ -62,7 +63,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_TY_PE(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 28, 2)
@@ -76,7 +77,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MF(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 27, 1)
#define GET_RX_DESC_MD(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 26, 1)
@@ -86,7 +88,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PAM(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 24, 1)
@@ -100,7 +102,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_CHK_VLD(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 23, 1)
@@ -115,7 +117,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_IS_TCP_UDP(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 22, 1)
#define GET_RX_DESC_RX_IPV(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 21, 1)
@@ -124,7 +127,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_CHKERR(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 20, 1)
@@ -141,7 +144,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PAGGR(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 15, 1)
@@ -155,7 +158,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RXID_MATCH(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 14, 1)
@@ -169,7 +172,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_AMSDU(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 13, 1)
@@ -177,7 +181,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID_VLD(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 12, 1)
@@ -185,7 +189,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_TID(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 8, 4)
@@ -193,7 +198,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x04, 0, 7)
@@ -211,7 +216,7 @@
#if (HALMAC_8822B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_PPDU_CNT(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 29, 2)
@@ -219,13 +224,14 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_C2H(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 28, 1)
#endif
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_HWRSVD_V1(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 25, 3)
@@ -246,7 +252,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_WLANHD_IV_LEN(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 18, 6)
@@ -258,7 +265,7 @@
#endif
#if (HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
#if (HALMAC_8822C_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_STATISTICS(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 17, 1)
@@ -266,7 +273,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_IS_QOS(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 16, 1)
@@ -280,11 +287,18 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_FRAG(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 12, 4)
#define GET_RX_DESC_SEQ(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x08, 0, 12)
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD3*/
#define GET_RX_DESC_MAGIC_WAKE(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 31, 1)
@@ -317,7 +331,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_DMA_AGG_NUM(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 16, 8)
@@ -325,7 +340,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_BSSID_FIT_1_0(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 12, 2)
#define GET_RX_DESC_EOSP(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 11, 1)
@@ -340,7 +355,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_HTC(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 10, 1)
@@ -356,7 +372,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_BSSID_FIT_4_2(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 7, 3)
@@ -370,7 +386,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || \
HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_RATE(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x0C, 0, 7)
@@ -392,7 +409,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_A1_FIT_A1(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x10, 24, 7)
@@ -406,7 +423,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_MACID_RPT_BUFF(rxdesc) \
LE_BITS_TO_4BYTE(rxdesc + 0x10, 17, 7)
@@ -415,7 +432,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_PRE_NDP_VLD(rxdesc) \
LE_BITS_TO_4BYTE(rxdesc + 0x10, 16, 1)
@@ -444,7 +461,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
#define GET_RX_DESC_RX_SCRAMBLER(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x10, 9, 7)
#define GET_RX_DESC_RX_EOF(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x10, 8, 1)
@@ -457,20 +474,20 @@
#endif
#if (HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT)
#if (HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_FC_POWER(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x10, 7, 1)
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_TXRPTMID_CTL_MASK(rxdesc) \
LE_BITS_TO_4BYTE(rxdesc + 0x10, 6, 1)
#endif
#if (HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT)
#if (HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define GET_RX_DESC_SWPS_RPT(rxdesc) LE_BITS_TO_4BYTE(rxdesc + 0x10, 5, 1)
@@ -497,7 +514,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8812F_SUPPORT)
/*RXDESC_WORD5*/

2
hal/halmac/halmac_sdio_reg.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

17
hal/halmac/halmac_state_machine.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -107,6 +107,19 @@ struct halmac_update_pkt_state {
enum halmac_cmd_process_status proc_status;
u8 fw_rc;
u16 seq_num;
u8 used_page;
};
struct halmac_scan_pkt_state {
enum halmac_cmd_process_status proc_status;
u8 fw_rc;
u16 seq_num;
};
struct halmac_drop_pkt_state {
enum halmac_cmd_process_status proc_status;
u8 fw_rc;
u16 seq_num;
};
struct halmac_iqk_state {
@@ -142,6 +155,8 @@ struct halmac_state {
struct halmac_cfg_param_state cfg_param_state;
struct halmac_scan_state scan_state;
struct halmac_update_pkt_state update_pkt_state;
struct halmac_scan_pkt_state scan_pkt_state;
struct halmac_drop_pkt_state drop_pkt_state;
struct halmac_iqk_state iqk_state;
struct halmac_pwr_tracking_state pwr_trk_state;
struct halmac_psd_state psd_state;

4
hal/halmac/halmac_tx_bd_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_TX_BD_NIC_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT ||\
HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT || HALMAC_8814B_SUPPORT)
/*TXBD_DW0*/

125
hal/halmac/halmac_tx_desc_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_TX_DESC_AP_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD0*/
@@ -49,7 +49,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_GF(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -79,7 +79,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NO_ACM(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -108,7 +108,8 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_BCNPKT_TSF_CTRL(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -124,7 +125,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_AMSDU_PAD_EN(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -140,7 +141,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_LS(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -156,7 +157,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_HTC(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -195,7 +196,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_OFFSET(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword0, \
@@ -218,7 +220,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
/*WORD1*/
@@ -248,7 +250,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_FTM_EN_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -278,7 +280,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MOREDATA(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -317,7 +319,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PKT_OFFSET(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -347,7 +349,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SEC_TYPE(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -395,7 +397,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PIFS(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -443,7 +445,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_QSEL(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -457,7 +460,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SPECIAL_CW(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -472,7 +475,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MACID(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword1, \
@@ -546,7 +549,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTCEL_D_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -604,7 +607,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_C_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -620,7 +623,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_BT_NULL(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -695,7 +698,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NULL_1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -747,7 +750,7 @@
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TRI_FRAME(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -762,7 +765,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_P_AID(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword2, \
@@ -792,7 +795,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD3*/
@@ -851,7 +854,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NAVUSEHDR(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword3, \
@@ -917,7 +920,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DISDATAFB(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword3, \
@@ -978,7 +981,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_WHEADER_LEN(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword3, \
@@ -1008,7 +1011,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD4*/
@@ -1122,7 +1125,7 @@
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT)
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TXPWR_OFSET(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1180,7 +1183,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DROP_ID(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1210,7 +1213,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PORT_ID(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1239,7 +1242,8 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MULTIPLE_PORT(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1255,7 +1259,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SIGNALING_TAPKT_EN(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1270,7 +1274,7 @@
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8192F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_RTS_SC(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1301,7 +1305,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_RTS_SHORT(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword5, \
@@ -1381,7 +1385,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPD_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1424,7 +1428,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPC_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1467,7 +1471,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPB_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1510,7 +1514,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPA_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1582,7 +1586,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_B_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1634,7 +1638,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_A_V1(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1664,7 +1668,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MBSSID(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1693,7 +1697,7 @@
#endif
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SWPS_SEQ(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword6, \
@@ -1709,7 +1713,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD7*/
@@ -1727,7 +1731,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_FINAL_DATA_RATE(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword7, \
@@ -1766,7 +1770,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NTX_MAP(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword7, \
@@ -1780,7 +1784,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_EN(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword7, \
@@ -1819,7 +1823,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TX_BUFF_SIZE(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword7, \
@@ -1853,7 +1857,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD8*/
@@ -1934,7 +1938,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TAILPAGE_L(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword8, \
@@ -1997,7 +2001,7 @@
#endif
#if (HALMAC_8812F_SUPPORT)
#if (HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_EN_HWSEQ_MODE(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword8, \
@@ -2013,7 +2017,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DATA_RC(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword8, \
@@ -2046,7 +2050,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD9*/
@@ -2087,7 +2091,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SW_SEQ(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword9, \
@@ -2103,7 +2107,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TXBF_PATH(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword9, \
@@ -2119,7 +2123,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PADDING_LEN(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword9, \
@@ -2155,6 +2159,11 @@
#define GET_TX_DESC_HT_DATA_SND(txdesc) \
HALMAC_GET_DESC_FIELD(((struct halmac_tx_desc *)txdesc)->dword10, 0x1, \
31)
#endif
#if (HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SHCUT_CAM(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword10, \
value, 0x3f, 16)
@@ -2215,7 +2224,7 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SND_PKT_SEL(txdesc, value) \
HALMAC_SET_DESC_FIELD_CLR(((struct halmac_tx_desc *)txdesc)->dword10, \

2
hal/halmac/halmac_tx_desc_buffer_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_tx_desc_buffer_chip.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_tx_desc_buffer_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

387
hal/halmac/halmac_tx_desc_chip.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -3105,4 +3105,389 @@
#endif
#if (HALMAC_8197G_SUPPORT)
/*TXDESC_WORD0*/
#define SET_TX_DESC_DISQSELSEQ_8197G(txdesc, value) \
SET_TX_DESC_DISQSELSEQ(txdesc, value)
#define GET_TX_DESC_DISQSELSEQ_8197G(txdesc) GET_TX_DESC_DISQSELSEQ(txdesc)
#define SET_TX_DESC_GF_8197G(txdesc, value) SET_TX_DESC_GF(txdesc, value)
#define GET_TX_DESC_GF_8197G(txdesc) GET_TX_DESC_GF(txdesc)
#define SET_TX_DESC_NO_ACM_8197G(txdesc, value) \
SET_TX_DESC_NO_ACM(txdesc, value)
#define GET_TX_DESC_NO_ACM_8197G(txdesc) GET_TX_DESC_NO_ACM(txdesc)
#define SET_TX_DESC_BCNPKT_TSF_CTRL_8197G(txdesc, value) \
SET_TX_DESC_BCNPKT_TSF_CTRL(txdesc, value)
#define GET_TX_DESC_BCNPKT_TSF_CTRL_8197G(txdesc) \
GET_TX_DESC_BCNPKT_TSF_CTRL(txdesc)
#define SET_TX_DESC_AMSDU_PAD_EN_8197G(txdesc, value) \
SET_TX_DESC_AMSDU_PAD_EN(txdesc, value)
#define GET_TX_DESC_AMSDU_PAD_EN_8197G(txdesc) GET_TX_DESC_AMSDU_PAD_EN(txdesc)
#define SET_TX_DESC_LS_8197G(txdesc, value) SET_TX_DESC_LS(txdesc, value)
#define GET_TX_DESC_LS_8197G(txdesc) GET_TX_DESC_LS(txdesc)
#define SET_TX_DESC_HTC_8197G(txdesc, value) SET_TX_DESC_HTC(txdesc, value)
#define GET_TX_DESC_HTC_8197G(txdesc) GET_TX_DESC_HTC(txdesc)
#define SET_TX_DESC_BMC_8197G(txdesc, value) SET_TX_DESC_BMC(txdesc, value)
#define GET_TX_DESC_BMC_8197G(txdesc) GET_TX_DESC_BMC(txdesc)
#define SET_TX_DESC_OFFSET_8197G(txdesc, value) \
SET_TX_DESC_OFFSET(txdesc, value)
#define GET_TX_DESC_OFFSET_8197G(txdesc) GET_TX_DESC_OFFSET(txdesc)
#define SET_TX_DESC_TXPKTSIZE_8197G(txdesc, value) \
SET_TX_DESC_TXPKTSIZE(txdesc, value)
#define GET_TX_DESC_TXPKTSIZE_8197G(txdesc) GET_TX_DESC_TXPKTSIZE(txdesc)
/*WORD1*/
#define SET_TX_DESC_HW_AES_IV_8197G(txdesc, value) \
SET_TX_DESC_HW_AES_IV_V2(txdesc, value)
#define GET_TX_DESC_HW_AES_IV_8197G(txdesc) GET_TX_DESC_HW_AES_IV_V2(txdesc)
#define SET_TX_DESC_FTM_EN_8197G(txdesc, value) \
SET_TX_DESC_FTM_EN_V1(txdesc, value)
#define GET_TX_DESC_FTM_EN_8197G(txdesc) GET_TX_DESC_FTM_EN_V1(txdesc)
#define SET_TX_DESC_MOREDATA_8197G(txdesc, value) \
SET_TX_DESC_MOREDATA(txdesc, value)
#define GET_TX_DESC_MOREDATA_8197G(txdesc) GET_TX_DESC_MOREDATA(txdesc)
#define SET_TX_DESC_PKT_OFFSET_8197G(txdesc, value) \
SET_TX_DESC_PKT_OFFSET(txdesc, value)
#define GET_TX_DESC_PKT_OFFSET_8197G(txdesc) GET_TX_DESC_PKT_OFFSET(txdesc)
#define SET_TX_DESC_SEC_TYPE_8197G(txdesc, value) \
SET_TX_DESC_SEC_TYPE(txdesc, value)
#define GET_TX_DESC_SEC_TYPE_8197G(txdesc) GET_TX_DESC_SEC_TYPE(txdesc)
#define SET_TX_DESC_EN_DESC_ID_8197G(txdesc, value) \
SET_TX_DESC_EN_DESC_ID(txdesc, value)
#define GET_TX_DESC_EN_DESC_ID_8197G(txdesc) GET_TX_DESC_EN_DESC_ID(txdesc)
#define SET_TX_DESC_RATE_ID_8197G(txdesc, value) \
SET_TX_DESC_RATE_ID(txdesc, value)
#define GET_TX_DESC_RATE_ID_8197G(txdesc) GET_TX_DESC_RATE_ID(txdesc)
#define SET_TX_DESC_PIFS_8197G(txdesc, value) SET_TX_DESC_PIFS(txdesc, value)
#define GET_TX_DESC_PIFS_8197G(txdesc) GET_TX_DESC_PIFS(txdesc)
#define SET_TX_DESC_LSIG_TXOP_EN_8197G(txdesc, value) \
SET_TX_DESC_LSIG_TXOP_EN(txdesc, value)
#define GET_TX_DESC_LSIG_TXOP_EN_8197G(txdesc) GET_TX_DESC_LSIG_TXOP_EN(txdesc)
#define SET_TX_DESC_RD_NAV_EXT_8197G(txdesc, value) \
SET_TX_DESC_RD_NAV_EXT(txdesc, value)
#define GET_TX_DESC_RD_NAV_EXT_8197G(txdesc) GET_TX_DESC_RD_NAV_EXT(txdesc)
#define SET_TX_DESC_QSEL_8197G(txdesc, value) SET_TX_DESC_QSEL(txdesc, value)
#define GET_TX_DESC_QSEL_8197G(txdesc) GET_TX_DESC_QSEL(txdesc)
#define SET_TX_DESC_SPECIAL_CW_8197G(txdesc, value) \
SET_TX_DESC_SPECIAL_CW(txdesc, value)
#define GET_TX_DESC_SPECIAL_CW_8197G(txdesc) GET_TX_DESC_SPECIAL_CW(txdesc)
#define SET_TX_DESC_MACID_8197G(txdesc, value) SET_TX_DESC_MACID(txdesc, value)
#define GET_TX_DESC_MACID_8197G(txdesc) GET_TX_DESC_MACID(txdesc)
/*TXDESC_WORD2*/
#define SET_TX_DESC_ANTCEL_D_8197G(txdesc, value) \
SET_TX_DESC_ANTCEL_D_V1(txdesc, value)
#define GET_TX_DESC_ANTCEL_D_8197G(txdesc) GET_TX_DESC_ANTCEL_D_V1(txdesc)
#define SET_TX_DESC_ANTSEL_C_8197G(txdesc, value) \
SET_TX_DESC_ANTSEL_C_V1(txdesc, value)
#define GET_TX_DESC_ANTSEL_C_8197G(txdesc) GET_TX_DESC_ANTSEL_C_V1(txdesc)
#define SET_TX_DESC_BT_NULL_8197G(txdesc, value) \
SET_TX_DESC_BT_NULL(txdesc, value)
#define GET_TX_DESC_BT_NULL_8197G(txdesc) GET_TX_DESC_BT_NULL(txdesc)
#define SET_TX_DESC_AMPDU_DENSITY_8197G(txdesc, value) \
SET_TX_DESC_AMPDU_DENSITY(txdesc, value)
#define GET_TX_DESC_AMPDU_DENSITY_8197G(txdesc) \
GET_TX_DESC_AMPDU_DENSITY(txdesc)
#define SET_TX_DESC_SPE_RPT_8197G(txdesc, value) \
SET_TX_DESC_SPE_RPT(txdesc, value)
#define GET_TX_DESC_SPE_RPT_8197G(txdesc) GET_TX_DESC_SPE_RPT(txdesc)
#define SET_TX_DESC_RAW_8197G(txdesc, value) SET_TX_DESC_RAW(txdesc, value)
#define GET_TX_DESC_RAW_8197G(txdesc) GET_TX_DESC_RAW(txdesc)
#define SET_TX_DESC_MOREFRAG_8197G(txdesc, value) \
SET_TX_DESC_MOREFRAG(txdesc, value)
#define GET_TX_DESC_MOREFRAG_8197G(txdesc) GET_TX_DESC_MOREFRAG(txdesc)
#define SET_TX_DESC_BK_8197G(txdesc, value) SET_TX_DESC_BK(txdesc, value)
#define GET_TX_DESC_BK_8197G(txdesc) GET_TX_DESC_BK(txdesc)
#define SET_TX_DESC_NULL_1_8197G(txdesc, value) \
SET_TX_DESC_NULL_1(txdesc, value)
#define GET_TX_DESC_NULL_1_8197G(txdesc) GET_TX_DESC_NULL_1(txdesc)
#define SET_TX_DESC_NULL_0_8197G(txdesc, value) \
SET_TX_DESC_NULL_0(txdesc, value)
#define GET_TX_DESC_NULL_0_8197G(txdesc) GET_TX_DESC_NULL_0(txdesc)
#define SET_TX_DESC_RDG_EN_8197G(txdesc, value) \
SET_TX_DESC_RDG_EN(txdesc, value)
#define GET_TX_DESC_RDG_EN_8197G(txdesc) GET_TX_DESC_RDG_EN(txdesc)
#define SET_TX_DESC_AGG_EN_8197G(txdesc, value) \
SET_TX_DESC_AGG_EN(txdesc, value)
#define GET_TX_DESC_AGG_EN_8197G(txdesc) GET_TX_DESC_AGG_EN(txdesc)
#define SET_TX_DESC_CCA_RTS_8197G(txdesc, value) \
SET_TX_DESC_CCA_RTS(txdesc, value)
#define GET_TX_DESC_CCA_RTS_8197G(txdesc) GET_TX_DESC_CCA_RTS(txdesc)
#define SET_TX_DESC_TRI_FRAME_8197G(txdesc, value) \
SET_TX_DESC_TRI_FRAME(txdesc, value)
#define GET_TX_DESC_TRI_FRAME_8197G(txdesc) GET_TX_DESC_TRI_FRAME(txdesc)
#define SET_TX_DESC_P_AID_8197G(txdesc, value) SET_TX_DESC_P_AID(txdesc, value)
#define GET_TX_DESC_P_AID_8197G(txdesc) GET_TX_DESC_P_AID(txdesc)
/*TXDESC_WORD3*/
#define SET_TX_DESC_AMPDU_MAX_TIME_8197G(txdesc, value) \
SET_TX_DESC_AMPDU_MAX_TIME(txdesc, value)
#define GET_TX_DESC_AMPDU_MAX_TIME_8197G(txdesc) \
GET_TX_DESC_AMPDU_MAX_TIME(txdesc)
#define SET_TX_DESC_NDPA_8197G(txdesc, value) SET_TX_DESC_NDPA(txdesc, value)
#define GET_TX_DESC_NDPA_8197G(txdesc) GET_TX_DESC_NDPA(txdesc)
#define SET_TX_DESC_MAX_AGG_NUM_8197G(txdesc, value) \
SET_TX_DESC_MAX_AGG_NUM(txdesc, value)
#define GET_TX_DESC_MAX_AGG_NUM_8197G(txdesc) GET_TX_DESC_MAX_AGG_NUM(txdesc)
#define SET_TX_DESC_USE_MAX_TIME_EN_8197G(txdesc, value) \
SET_TX_DESC_USE_MAX_TIME_EN(txdesc, value)
#define GET_TX_DESC_USE_MAX_TIME_EN_8197G(txdesc) \
GET_TX_DESC_USE_MAX_TIME_EN(txdesc)
#define SET_TX_DESC_NAVUSEHDR_8197G(txdesc, value) \
SET_TX_DESC_NAVUSEHDR(txdesc, value)
#define GET_TX_DESC_NAVUSEHDR_8197G(txdesc) GET_TX_DESC_NAVUSEHDR(txdesc)
#define SET_TX_DESC_CHK_EN_8197G(txdesc, value) \
SET_TX_DESC_CHK_EN(txdesc, value)
#define GET_TX_DESC_CHK_EN_8197G(txdesc) GET_TX_DESC_CHK_EN(txdesc)
#define SET_TX_DESC_HW_RTS_EN_8197G(txdesc, value) \
SET_TX_DESC_HW_RTS_EN(txdesc, value)
#define GET_TX_DESC_HW_RTS_EN_8197G(txdesc) GET_TX_DESC_HW_RTS_EN(txdesc)
#define SET_TX_DESC_RTSEN_8197G(txdesc, value) SET_TX_DESC_RTSEN(txdesc, value)
#define GET_TX_DESC_RTSEN_8197G(txdesc) GET_TX_DESC_RTSEN(txdesc)
#define SET_TX_DESC_CTS2SELF_8197G(txdesc, value) \
SET_TX_DESC_CTS2SELF(txdesc, value)
#define GET_TX_DESC_CTS2SELF_8197G(txdesc) GET_TX_DESC_CTS2SELF(txdesc)
#define SET_TX_DESC_DISDATAFB_8197G(txdesc, value) \
SET_TX_DESC_DISDATAFB(txdesc, value)
#define GET_TX_DESC_DISDATAFB_8197G(txdesc) GET_TX_DESC_DISDATAFB(txdesc)
#define SET_TX_DESC_DISRTSFB_8197G(txdesc, value) \
SET_TX_DESC_DISRTSFB(txdesc, value)
#define GET_TX_DESC_DISRTSFB_8197G(txdesc) GET_TX_DESC_DISRTSFB(txdesc)
#define SET_TX_DESC_USE_RATE_8197G(txdesc, value) \
SET_TX_DESC_USE_RATE(txdesc, value)
#define GET_TX_DESC_USE_RATE_8197G(txdesc) GET_TX_DESC_USE_RATE(txdesc)
#define SET_TX_DESC_HW_SSN_SEL_8197G(txdesc, value) \
SET_TX_DESC_HW_SSN_SEL(txdesc, value)
#define GET_TX_DESC_HW_SSN_SEL_8197G(txdesc) GET_TX_DESC_HW_SSN_SEL(txdesc)
#define SET_TX_DESC_WHEADER_LEN_8197G(txdesc, value) \
SET_TX_DESC_WHEADER_LEN(txdesc, value)
#define GET_TX_DESC_WHEADER_LEN_8197G(txdesc) GET_TX_DESC_WHEADER_LEN(txdesc)
/*TXDESC_WORD4*/
#define SET_TX_DESC_PCTS_MASK_IDX_8197G(txdesc, value) \
SET_TX_DESC_PCTS_MASK_IDX(txdesc, value)
#define GET_TX_DESC_PCTS_MASK_IDX_8197G(txdesc) \
GET_TX_DESC_PCTS_MASK_IDX(txdesc)
#define SET_TX_DESC_PCTS_EN_8197G(txdesc, value) \
SET_TX_DESC_PCTS_EN(txdesc, value)
#define GET_TX_DESC_PCTS_EN_8197G(txdesc) GET_TX_DESC_PCTS_EN(txdesc)
#define SET_TX_DESC_RTSRATE_8197G(txdesc, value) \
SET_TX_DESC_RTSRATE(txdesc, value)
#define GET_TX_DESC_RTSRATE_8197G(txdesc) GET_TX_DESC_RTSRATE(txdesc)
#define SET_TX_DESC_RTS_DATA_RTY_LMT_8197G(txdesc, value) \
SET_TX_DESC_RTS_DATA_RTY_LMT(txdesc, value)
#define GET_TX_DESC_RTS_DATA_RTY_LMT_8197G(txdesc) \
GET_TX_DESC_RTS_DATA_RTY_LMT(txdesc)
#define SET_TX_DESC_RTY_LMT_EN_8197G(txdesc, value) \
SET_TX_DESC_RTY_LMT_EN(txdesc, value)
#define GET_TX_DESC_RTY_LMT_EN_8197G(txdesc) GET_TX_DESC_RTY_LMT_EN(txdesc)
#define SET_TX_DESC_RTS_RTY_LOWEST_RATE_8197G(txdesc, value) \
SET_TX_DESC_RTS_RTY_LOWEST_RATE(txdesc, value)
#define GET_TX_DESC_RTS_RTY_LOWEST_RATE_8197G(txdesc) \
GET_TX_DESC_RTS_RTY_LOWEST_RATE(txdesc)
#define SET_TX_DESC_DATA_RTY_LOWEST_RATE_8197G(txdesc, value) \
SET_TX_DESC_DATA_RTY_LOWEST_RATE(txdesc, value)
#define GET_TX_DESC_DATA_RTY_LOWEST_RATE_8197G(txdesc) \
GET_TX_DESC_DATA_RTY_LOWEST_RATE(txdesc)
#define SET_TX_DESC_TRY_RATE_8197G(txdesc, value) \
SET_TX_DESC_TRY_RATE(txdesc, value)
#define GET_TX_DESC_TRY_RATE_8197G(txdesc) GET_TX_DESC_TRY_RATE(txdesc)
#define SET_TX_DESC_DATARATE_8197G(txdesc, value) \
SET_TX_DESC_DATARATE(txdesc, value)
#define GET_TX_DESC_DATARATE_8197G(txdesc) GET_TX_DESC_DATARATE(txdesc)
/*TXDESC_WORD5*/
#define SET_TX_DESC_POLLUTED_8197G(txdesc, value) \
SET_TX_DESC_POLLUTED(txdesc, value)
#define GET_TX_DESC_POLLUTED_8197G(txdesc) GET_TX_DESC_POLLUTED(txdesc)
#define SET_TX_DESC_TXPWR_OFSET_8197G(txdesc, value) \
SET_TX_DESC_TXPWR_OFSET(txdesc, value)
#define GET_TX_DESC_TXPWR_OFSET_8197G(txdesc) GET_TX_DESC_TXPWR_OFSET(txdesc)
#define SET_TX_DESC_DROP_ID_8197G(txdesc, value) \
SET_TX_DESC_DROP_ID(txdesc, value)
#define GET_TX_DESC_DROP_ID_8197G(txdesc) GET_TX_DESC_DROP_ID(txdesc)
#define SET_TX_DESC_PORT_ID_8197G(txdesc, value) \
SET_TX_DESC_PORT_ID(txdesc, value)
#define GET_TX_DESC_PORT_ID_8197G(txdesc) GET_TX_DESC_PORT_ID(txdesc)
#define SET_TX_DESC_MULTIPLE_PORT_8197G(txdesc, value) \
SET_TX_DESC_MULTIPLE_PORT(txdesc, value)
#define GET_TX_DESC_MULTIPLE_PORT_8197G(txdesc) \
GET_TX_DESC_MULTIPLE_PORT(txdesc)
#define SET_TX_DESC_SIGNALING_TAPKT_EN_8197G(txdesc, value) \
SET_TX_DESC_SIGNALING_TAPKT_EN(txdesc, value)
#define GET_TX_DESC_SIGNALING_TAPKT_EN_8197G(txdesc) \
GET_TX_DESC_SIGNALING_TAPKT_EN(txdesc)
#define SET_TX_DESC_RTS_SC_8197G(txdesc, value) \
SET_TX_DESC_RTS_SC(txdesc, value)
#define GET_TX_DESC_RTS_SC_8197G(txdesc) GET_TX_DESC_RTS_SC(txdesc)
#define SET_TX_DESC_RTS_SHORT_8197G(txdesc, value) \
SET_TX_DESC_RTS_SHORT(txdesc, value)
#define GET_TX_DESC_RTS_SHORT_8197G(txdesc) GET_TX_DESC_RTS_SHORT(txdesc)
#define SET_TX_DESC_VCS_STBC_8197G(txdesc, value) \
SET_TX_DESC_VCS_STBC(txdesc, value)
#define GET_TX_DESC_VCS_STBC_8197G(txdesc) GET_TX_DESC_VCS_STBC(txdesc)
#define SET_TX_DESC_DATA_STBC_8197G(txdesc, value) \
SET_TX_DESC_DATA_STBC(txdesc, value)
#define GET_TX_DESC_DATA_STBC_8197G(txdesc) GET_TX_DESC_DATA_STBC(txdesc)
#define SET_TX_DESC_DATA_LDPC_8197G(txdesc, value) \
SET_TX_DESC_DATA_LDPC(txdesc, value)
#define GET_TX_DESC_DATA_LDPC_8197G(txdesc) GET_TX_DESC_DATA_LDPC(txdesc)
#define SET_TX_DESC_DATA_BW_8197G(txdesc, value) \
SET_TX_DESC_DATA_BW(txdesc, value)
#define GET_TX_DESC_DATA_BW_8197G(txdesc) GET_TX_DESC_DATA_BW(txdesc)
#define SET_TX_DESC_DATA_SHORT_8197G(txdesc, value) \
SET_TX_DESC_DATA_SHORT(txdesc, value)
#define GET_TX_DESC_DATA_SHORT_8197G(txdesc) GET_TX_DESC_DATA_SHORT(txdesc)
#define SET_TX_DESC_DATA_SC_8197G(txdesc, value) \
SET_TX_DESC_DATA_SC(txdesc, value)
#define GET_TX_DESC_DATA_SC_8197G(txdesc) GET_TX_DESC_DATA_SC(txdesc)
/*TXDESC_WORD6*/
#define SET_TX_DESC_ANT_MAPD_8197G(txdesc, value) \
SET_TX_DESC_ANT_MAPD_V1(txdesc, value)
#define GET_TX_DESC_ANT_MAPD_8197G(txdesc) GET_TX_DESC_ANT_MAPD_V1(txdesc)
#define SET_TX_DESC_ANT_MAPC_8197G(txdesc, value) \
SET_TX_DESC_ANT_MAPC_V1(txdesc, value)
#define GET_TX_DESC_ANT_MAPC_8197G(txdesc) GET_TX_DESC_ANT_MAPC_V1(txdesc)
#define SET_TX_DESC_ANT_MAPB_8197G(txdesc, value) \
SET_TX_DESC_ANT_MAPB_V1(txdesc, value)
#define GET_TX_DESC_ANT_MAPB_8197G(txdesc) GET_TX_DESC_ANT_MAPB_V1(txdesc)
#define SET_TX_DESC_ANT_MAPA_8197G(txdesc, value) \
SET_TX_DESC_ANT_MAPA_V1(txdesc, value)
#define GET_TX_DESC_ANT_MAPA_8197G(txdesc) GET_TX_DESC_ANT_MAPA_V1(txdesc)
#define SET_TX_DESC_ANTSEL_B_8197G(txdesc, value) \
SET_TX_DESC_ANTSEL_B_V1(txdesc, value)
#define GET_TX_DESC_ANTSEL_B_8197G(txdesc) GET_TX_DESC_ANTSEL_B_V1(txdesc)
#define SET_TX_DESC_ANTSEL_A_8197G(txdesc, value) \
SET_TX_DESC_ANTSEL_A_V1(txdesc, value)
#define GET_TX_DESC_ANTSEL_A_8197G(txdesc) GET_TX_DESC_ANTSEL_A_V1(txdesc)
#define SET_TX_DESC_MBSSID_8197G(txdesc, value) \
SET_TX_DESC_MBSSID(txdesc, value)
#define GET_TX_DESC_MBSSID_8197G(txdesc) GET_TX_DESC_MBSSID(txdesc)
#define SET_TX_DESC_SWPS_SEQ_8197G(txdesc, value) \
SET_TX_DESC_SWPS_SEQ(txdesc, value)
#define GET_TX_DESC_SWPS_SEQ_8197G(txdesc) GET_TX_DESC_SWPS_SEQ(txdesc)
/*TXDESC_WORD7*/
#define SET_TX_DESC_DMA_TXAGG_NUM_8197G(txdesc, value) \
SET_TX_DESC_DMA_TXAGG_NUM(txdesc, value)
#define GET_TX_DESC_DMA_TXAGG_NUM_8197G(txdesc) \
GET_TX_DESC_DMA_TXAGG_NUM(txdesc)
#define SET_TX_DESC_FINAL_DATA_RATE_8197G(txdesc, value) \
SET_TX_DESC_FINAL_DATA_RATE(txdesc, value)
#define GET_TX_DESC_FINAL_DATA_RATE_8197G(txdesc) \
GET_TX_DESC_FINAL_DATA_RATE(txdesc)
#define SET_TX_DESC_NTX_MAP_8197G(txdesc, value) \
SET_TX_DESC_NTX_MAP(txdesc, value)
#define GET_TX_DESC_NTX_MAP_8197G(txdesc) GET_TX_DESC_NTX_MAP(txdesc)
#define SET_TX_DESC_ANTSEL_EN_8197G(txdesc, value) \
SET_TX_DESC_ANTSEL_EN(txdesc, value)
#define GET_TX_DESC_ANTSEL_EN_8197G(txdesc) GET_TX_DESC_ANTSEL_EN(txdesc)
#define SET_TX_DESC_MBSSID_EX_8197G(txdesc, value) \
SET_TX_DESC_MBSSID_EX(txdesc, value)
#define GET_TX_DESC_MBSSID_EX_8197G(txdesc) GET_TX_DESC_MBSSID_EX(txdesc)
#define SET_TX_DESC_TX_BUFF_SIZE_8197G(txdesc, value) \
SET_TX_DESC_TX_BUFF_SIZE(txdesc, value)
#define GET_TX_DESC_TX_BUFF_SIZE_8197G(txdesc) GET_TX_DESC_TX_BUFF_SIZE(txdesc)
#define SET_TX_DESC_TXDESC_CHECKSUM_8197G(txdesc, value) \
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, value)
#define GET_TX_DESC_TXDESC_CHECKSUM_8197G(txdesc) \
GET_TX_DESC_TXDESC_CHECKSUM(txdesc)
#define SET_TX_DESC_TIMESTAMP_8197G(txdesc, value) \
SET_TX_DESC_TIMESTAMP(txdesc, value)
#define GET_TX_DESC_TIMESTAMP_8197G(txdesc) GET_TX_DESC_TIMESTAMP(txdesc)
/*TXDESC_WORD8*/
#define SET_TX_DESC_TXWIFI_CP_8197G(txdesc, value) \
SET_TX_DESC_TXWIFI_CP(txdesc, value)
#define GET_TX_DESC_TXWIFI_CP_8197G(txdesc) GET_TX_DESC_TXWIFI_CP(txdesc)
#define SET_TX_DESC_MAC_CP_8197G(txdesc, value) \
SET_TX_DESC_MAC_CP(txdesc, value)
#define GET_TX_DESC_MAC_CP_8197G(txdesc) GET_TX_DESC_MAC_CP(txdesc)
#define SET_TX_DESC_STW_PKTRE_DIS_8197G(txdesc, value) \
SET_TX_DESC_STW_PKTRE_DIS(txdesc, value)
#define GET_TX_DESC_STW_PKTRE_DIS_8197G(txdesc) \
GET_TX_DESC_STW_PKTRE_DIS(txdesc)
#define SET_TX_DESC_STW_RB_DIS_8197G(txdesc, value) \
SET_TX_DESC_STW_RB_DIS(txdesc, value)
#define GET_TX_DESC_STW_RB_DIS_8197G(txdesc) GET_TX_DESC_STW_RB_DIS(txdesc)
#define SET_TX_DESC_STW_RATE_DIS_8197G(txdesc, value) \
SET_TX_DESC_STW_RATE_DIS(txdesc, value)
#define GET_TX_DESC_STW_RATE_DIS_8197G(txdesc) GET_TX_DESC_STW_RATE_DIS(txdesc)
#define SET_TX_DESC_STW_ANT_DIS_8197G(txdesc, value) \
SET_TX_DESC_STW_ANT_DIS(txdesc, value)
#define GET_TX_DESC_STW_ANT_DIS_8197G(txdesc) GET_TX_DESC_STW_ANT_DIS(txdesc)
#define SET_TX_DESC_STW_EN_8197G(txdesc, value) \
SET_TX_DESC_STW_EN(txdesc, value)
#define GET_TX_DESC_STW_EN_8197G(txdesc) GET_TX_DESC_STW_EN(txdesc)
#define SET_TX_DESC_SMH_EN_8197G(txdesc, value) \
SET_TX_DESC_SMH_EN(txdesc, value)
#define GET_TX_DESC_SMH_EN_8197G(txdesc) GET_TX_DESC_SMH_EN(txdesc)
#define SET_TX_DESC_TAILPAGE_L_8197G(txdesc, value) \
SET_TX_DESC_TAILPAGE_L(txdesc, value)
#define GET_TX_DESC_TAILPAGE_L_8197G(txdesc) GET_TX_DESC_TAILPAGE_L(txdesc)
#define SET_TX_DESC_SDIO_DMASEQ_8197G(txdesc, value) \
SET_TX_DESC_SDIO_DMASEQ(txdesc, value)
#define GET_TX_DESC_SDIO_DMASEQ_8197G(txdesc) GET_TX_DESC_SDIO_DMASEQ(txdesc)
#define SET_TX_DESC_NEXTHEADPAGE_L_8197G(txdesc, value) \
SET_TX_DESC_NEXTHEADPAGE_L(txdesc, value)
#define GET_TX_DESC_NEXTHEADPAGE_L_8197G(txdesc) \
GET_TX_DESC_NEXTHEADPAGE_L(txdesc)
#define SET_TX_DESC_EN_HWSEQ_MODE_8197G(txdesc, value) \
SET_TX_DESC_EN_HWSEQ_MODE(txdesc, value)
#define GET_TX_DESC_EN_HWSEQ_MODE_8197G(txdesc) \
GET_TX_DESC_EN_HWSEQ_MODE(txdesc)
#define SET_TX_DESC_DATA_RC_8197G(txdesc, value) \
SET_TX_DESC_DATA_RC(txdesc, value)
#define GET_TX_DESC_DATA_RC_8197G(txdesc) GET_TX_DESC_DATA_RC(txdesc)
#define SET_TX_DESC_BAR_RTY_TH_8197G(txdesc, value) \
SET_TX_DESC_BAR_RTY_TH(txdesc, value)
#define GET_TX_DESC_BAR_RTY_TH_8197G(txdesc) GET_TX_DESC_BAR_RTY_TH(txdesc)
#define SET_TX_DESC_RTS_RC_8197G(txdesc, value) \
SET_TX_DESC_RTS_RC(txdesc, value)
#define GET_TX_DESC_RTS_RC_8197G(txdesc) GET_TX_DESC_RTS_RC(txdesc)
/*TXDESC_WORD9*/
#define SET_TX_DESC_TAILPAGE_H_8197G(txdesc, value) \
SET_TX_DESC_TAILPAGE_H(txdesc, value)
#define GET_TX_DESC_TAILPAGE_H_8197G(txdesc) GET_TX_DESC_TAILPAGE_H(txdesc)
#define SET_TX_DESC_NEXTHEADPAGE_H_8197G(txdesc, value) \
SET_TX_DESC_NEXTHEADPAGE_H(txdesc, value)
#define GET_TX_DESC_NEXTHEADPAGE_H_8197G(txdesc) \
GET_TX_DESC_NEXTHEADPAGE_H(txdesc)
#define SET_TX_DESC_SW_SEQ_8197G(txdesc, value) \
SET_TX_DESC_SW_SEQ(txdesc, value)
#define GET_TX_DESC_SW_SEQ_8197G(txdesc) GET_TX_DESC_SW_SEQ(txdesc)
#define SET_TX_DESC_TXBF_PATH_8197G(txdesc, value) \
SET_TX_DESC_TXBF_PATH(txdesc, value)
#define GET_TX_DESC_TXBF_PATH_8197G(txdesc) GET_TX_DESC_TXBF_PATH(txdesc)
#define SET_TX_DESC_PADDING_LEN_8197G(txdesc, value) \
SET_TX_DESC_PADDING_LEN(txdesc, value)
#define GET_TX_DESC_PADDING_LEN_8197G(txdesc) GET_TX_DESC_PADDING_LEN(txdesc)
#define SET_TX_DESC_GROUP_BIT_IE_OFFSET_8197G(txdesc, value) \
SET_TX_DESC_GROUP_BIT_IE_OFFSET(txdesc, value)
#define GET_TX_DESC_GROUP_BIT_IE_OFFSET_8197G(txdesc) \
GET_TX_DESC_GROUP_BIT_IE_OFFSET(txdesc)
/*WORD10*/
#define SET_TX_DESC_SHCUT_CAM_8197G(txdesc, value) \
SET_TX_DESC_SHCUT_CAM(txdesc, value)
#define GET_TX_DESC_SHCUT_CAM_8197G(txdesc) GET_TX_DESC_SHCUT_CAM(txdesc)
#define SET_TX_DESC_SND_PKT_SEL_8197G(txdesc, value) \
SET_TX_DESC_SND_PKT_SEL(txdesc, value)
#define GET_TX_DESC_SND_PKT_SEL_8197G(txdesc) GET_TX_DESC_SND_PKT_SEL(txdesc)
#endif
#endif

2
hal/halmac/halmac_tx_desc_ie_ap.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_tx_desc_ie_chip.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

2
hal/halmac/halmac_tx_desc_ie_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as

125
hal/halmac/halmac_tx_desc_nic.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -17,7 +17,7 @@
#define _HALMAC_TX_DESC_NIC_H_
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD0*/
@@ -37,7 +37,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_GF(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 30, 1, value)
@@ -55,7 +55,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NO_ACM(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 29, 1, value)
@@ -72,7 +72,8 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_BCNPKT_TSF_CTRL(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 28, 1, value)
@@ -83,7 +84,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_AMSDU_PAD_EN(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 27, 1, value)
@@ -93,7 +94,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_LS(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 26, 1, value)
@@ -103,7 +104,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_HTC(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 25, 1, value)
@@ -124,7 +125,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_OFFSET(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 16, 8, value)
@@ -135,7 +137,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
/*WORD1*/
@@ -153,7 +155,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_FTM_EN_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 30, 1, value)
@@ -171,7 +173,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MOREDATA(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 29, 1, value)
@@ -192,7 +194,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PKT_OFFSET(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 24, 5, value)
@@ -210,7 +212,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SEC_TYPE(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 22, 2, value)
@@ -234,7 +236,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PIFS(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 15, 1, value)
@@ -258,7 +260,8 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_QSEL(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 8, 5, value)
@@ -266,7 +269,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SPECIAL_CW(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 7, 1, value)
@@ -276,7 +279,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MACID(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x04, 0, 7, value)
@@ -320,7 +323,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTCEL_D_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 28, 4, value)
@@ -355,7 +358,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_C_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 24, 4, value)
@@ -365,7 +368,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_BT_NULL(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 23, 1, value)
@@ -399,7 +402,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NULL_1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 15, 1, value)
@@ -421,7 +424,7 @@
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8192F_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TRI_FRAME(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 9, 1, value)
@@ -431,7 +434,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_P_AID(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x08, 0, 9, value)
@@ -450,7 +453,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD3*/
@@ -481,7 +484,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NAVUSEHDR(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x0C, 15, 1, value)
@@ -511,7 +514,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DISDATAFB(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x0C, 10, 1, value)
@@ -541,7 +544,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_WHEADER_LEN(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x0C, 0, 5, value)
@@ -559,7 +562,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD4*/
@@ -611,7 +614,7 @@
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT)
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TXPWR_OFSET(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 28, 3, value)
@@ -647,7 +650,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DROP_ID(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 24, 2, value)
@@ -665,7 +668,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PORT_ID(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 21, 3, value)
@@ -682,7 +685,8 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || \
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT || \
HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MULTIPLE_PORT(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 18, 3, value)
@@ -692,7 +696,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SIGNALING_TAPKT_EN(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 17, 1, value)
@@ -702,7 +706,7 @@
#endif
#if (HALMAC_8814A_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8198F_SUPPORT || \
HALMAC_8192F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_RTS_SC(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 13, 4, value)
@@ -722,7 +726,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_RTS_SHORT(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x14, 12, 1, value)
@@ -759,7 +763,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPD_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 30, 2, value)
@@ -784,7 +788,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPC_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 28, 2, value)
@@ -809,7 +813,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPB_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 26, 2, value)
@@ -834,7 +838,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANT_MAPA_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 24, 2, value)
@@ -876,7 +880,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_B_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 20, 4, value)
@@ -904,7 +908,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_A_V1(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 16, 4, value)
@@ -922,7 +926,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_MBSSID(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 12, 4, value)
@@ -939,7 +943,7 @@
#endif
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8192F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SWPS_SEQ(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x18, 0, 12, value)
@@ -949,7 +953,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD7*/
@@ -961,7 +965,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_FINAL_DATA_RATE(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x1C, 24, 8, value)
@@ -983,7 +987,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_NTX_MAP(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x1C, 20, 4, value)
@@ -991,7 +995,7 @@
#endif
#if (HALMAC_8198F_SUPPORT)
#if (HALMAC_8198F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_ANTSEL_EN(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x1C, 19, 1, value)
@@ -1012,7 +1016,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TX_BUFF_SIZE(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x1C, 0, 16, value)
@@ -1029,7 +1033,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD8*/
@@ -1062,7 +1066,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TAILPAGE_L(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x20, 24, 8, value)
@@ -1096,7 +1100,7 @@
#endif
#if (HALMAC_8812F_SUPPORT)
#if (HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_EN_HWSEQ_MODE(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x20, 14, 2, value)
@@ -1106,7 +1110,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_DATA_RC(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x20, 8, 6, value)
@@ -1122,7 +1126,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
/*TXDESC_WORD9*/
@@ -1147,7 +1151,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SW_SEQ(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x24, 12, 12, value)
@@ -1157,7 +1161,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_TXBF_PATH(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x24, 11, 1, value)
@@ -1167,7 +1171,7 @@
#if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || \
HALMAC_8821C_SUPPORT || HALMAC_8198F_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT)
HALMAC_8192F_SUPPORT || HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_PADDING_LEN(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x24, 0, 11, value)
@@ -1186,6 +1190,11 @@
#define SET_TX_DESC_HT_DATA_SND(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x28, 31, 1, value)
#define GET_TX_DESC_HT_DATA_SND(txdesc) LE_BITS_TO_4BYTE(txdesc + 0x28, 31, 1)
#endif
#if (HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SHCUT_CAM(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x28, 16, 6, value)
#define GET_TX_DESC_SHCUT_CAM(txdesc) LE_BITS_TO_4BYTE(txdesc + 0x28, 16, 6)
@@ -1216,7 +1225,7 @@
#endif
#if (HALMAC_8822B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8822C_SUPPORT || \
HALMAC_8812F_SUPPORT)
HALMAC_8812F_SUPPORT || HALMAC_8197G_SUPPORT)
#define SET_TX_DESC_SND_PKT_SEL(txdesc, value) \
SET_BITS_TO_LE_4BYTE(txdesc + 0x28, 0, 2, value)

178
hal/halmac/halmac_type.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@@ -64,6 +64,10 @@
#define HALMAC_MSG_LEVEL HALMAC_MSG_LEVEL_TRACE
#endif
#ifndef HALMAC_DBG_MONITOR_IO
#define HALMAC_DBG_MONITOR_IO 0
#endif
/* platform api */
#define PLTFM_SDIO_CMD52_R(offset) \
adapter->pltfm_api->SDIO_CMD52_READ(adapter->drv_adapter, offset)
@@ -176,6 +180,34 @@
#endif
#if HALMAC_DBG_MONITOR_IO
#define PLTFM_MONITOR_READ(offset, byte, val, __func, __line) \
adapter->pltfm_api->READ_MONITOR(adapter->drv_adapter, offset, byte, \
val, __func, __line)
#define PLTFM_MONITOR_WRITE(offset, byte, val, __func, __line) \
adapter->pltfm_api->WRITE_MONITOR(adapter->drv_adapter, offset, byte, \
val, __func, __line)
#define HALMAC_REG_R8(offset) \
api->halmac_mon_reg_read_8(adapter, offset, __func__, __LINE__)
#define HALMAC_REG_R16(offset) \
api->halmac_mon_reg_read_16(adapter, offset, __func__, __LINE__)
#define HALMAC_REG_R32(offset) \
api->halmac_mon_reg_read_32(adapter, offset, __func__, __LINE__)
#define HALMAC_REG_W8(offset, val) \
api->halmac_mon_reg_write_8(adapter, offset, val, \
__func__, __LINE__)
#define HALMAC_REG_W16(offset, val) \
api->halmac_mon_reg_write_16(adapter, offset, val, \
__func__, __LINE__)
#define HALMAC_REG_W32(offset, val) \
api->halmac_mon_reg_write_32(adapter, offset, val, \
__func__, __LINE__)
#define HALMAC_REG_SDIO_RN(offset, size, data) \
api->halmac_mon_reg_sdio_cmd53_read_n(adapter, offset, size, data, \
__func__, __LINE__)
#else
#define HALMAC_REG_R8(offset) api->halmac_reg_read_8(adapter, offset)
#define HALMAC_REG_R16(offset) api->halmac_reg_read_16(adapter, offset)
#define HALMAC_REG_R32(offset) api->halmac_reg_read_32(adapter, offset)
@@ -186,6 +218,7 @@
api->halmac_reg_write_32(adapter, offset, val)
#define HALMAC_REG_SDIO_RN(offset, size, data) \
api->halmac_reg_sdio_cmd53_read_n(adapter, offset, size, data)
#endif
#define HALMAC_REG_W8_CLR(offset, mask) \
do { \
@@ -511,6 +544,8 @@ enum halmac_ret_status {
HALMAC_RET_WLAN_MODE_FAIL = 0x75,
HALMAC_RET_SDIO_SEQ_FAIL = 0x72,
HALMAC_RET_INIT_XTAL_AAC_FAIL = 0x76,
HALMAC_RET_PINMUX_NOT_SUPPORT = 0x77,
HALMAC_RET_FWFF_NO_EMPTY = 0x78,
};
enum halmac_chip_id {
@@ -728,6 +763,11 @@ struct halmac_api_registry {
u8 rsvd:4;
};
enum halmac_watcher_sel {
HALMAC_WATCHER_SDIO_RN_FOOL_PROOFING = 0x0,
HALMAC_WATCHER_UNDEFINE = 0x7F,
};
enum halmac_trx_mode {
HALMAC_TRX_MODE_NORMAL = 0x0,
HALMAC_TRX_MODE_TRXSHARE = 0x1,
@@ -977,6 +1017,7 @@ struct halmac_ch_switch_option {
u8 dest_ch_en;
u8 absolute_time_en;
u8 dest_ch;
u8 scan_mode_en;
u8 normal_period;
u8 normal_period_sel;
u8 normal_cycle;
@@ -985,6 +1026,13 @@ struct halmac_ch_switch_option {
u8 nlo_en;
};
struct halmac_drop_pkt_option {
u8 drop_all:1;
u8 drop_single:1;
u8 rsvd:6;
u8 drop_index;
};
struct halmac_p2pps {
u8 offload_en:1;
u8 role:1;
@@ -1041,6 +1089,9 @@ struct halmac_general_info {
enum halmac_rf_type rf_type;
u8 tx_ant_status;
u8 rx_ant_status;
u8 ext_pa;
u8 package_type;
u8 mp_mode;
};
struct halmac_pwr_tracking_para {
@@ -1163,7 +1214,9 @@ enum halmac_rf_path {
HALMAC_RF_PATH_A,
HALMAC_RF_PATH_B,
HALMAC_RF_PATH_C,
HALMAC_RF_PATH_D
HALMAC_RF_PATH_D,
HALMAC_RF_SYN_0,
HALMAC_RF_SYN_1
};
enum hal_security_type {
@@ -1221,7 +1274,10 @@ enum halmac_feature_id {
HALMAC_FEATURE_CFG_PARA, /* Support */
HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, /* Support */
HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, /* Support */
HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK, /* Support */
HALMAC_FEATURE_UPDATE_PACKET, /* Support */
HALMAC_FEATURE_SEND_SCAN_PACKET, /* Support */
HALMAC_FEATURE_DROP_SCAN_PACKET, /* Support */
HALMAC_FEATURE_UPDATE_DATAPACK,
HALMAC_FEATURE_RUN_DATAPACK,
HALMAC_FEATURE_CHANNEL_SWITCH, /* Support */
@@ -1330,7 +1386,12 @@ struct halmac_platform_api {
enum halmac_feature_id feature_id,
enum halmac_cmd_process_status process_status,
u8 *buf, u32 size);
#if HALMAC_DBG_MONITOR_IO
void (*READ_MONITOR)(void *drv_adapter, u32 offset, u32 byte, u32 val,
const char *caller, const u32 line);
void (*WRITE_MONITOR)(void *drv_adapter, u32 offset, u32 byte, u32 val,
const char *caller, const u32 line);
#endif
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmisc_platform_api *halmisc_pltfm_api;
#endif
@@ -1383,6 +1444,7 @@ struct halmac_mu_bfer_init_para {
struct halmac_ch_sw_info {
u8 *buf;
u8 *buf_wptr;
u8 scan_mode;
u8 extra_info_en;
u32 buf_size;
u32 avl_buf_size;
@@ -1390,10 +1452,37 @@ struct halmac_ch_sw_info {
u32 ch_num;
};
struct halmac_ch_sw_extra_scan {
u8 dwell_ext_val:7;
u8 dwell_ext_en:1;
u8 dwell_ext_c2h:1;
u8 post_tx_c2h:1;
u8 pre_tx_c2h:1;
u8 post_switch_c2h:1;
u8 pre_switch_c2h:1;
u8 rsvd0:2;
u8 wait_probrsp:1;
u8 txid:7;
u8 rsvd1:1;
};
struct halmac_scan_rpt_info {
u8 *buf;
u8 *buf_wptr;
u32 buf_size;
u32 avl_buf_size;
u32 total_size;
u32 ack_tsf_low;
u32 ack_tsf_high;
u32 rpt_tsf_low;
u32 rpt_tsf_high;
};
struct halmac_event_trigger {
u32 phy_efuse_map : 1;
u32 log_efuse_map : 1;
u32 rsvd1 : 28;
u32 log_efuse_mask : 1;
u32 rsvd1 : 27;
};
struct halmac_h2c_header_info {
@@ -1558,6 +1647,10 @@ enum halmac_api_id {
HALMAC_API_EN_REF_AUTOK = 0x9C,
HALMAC_API_RESET_WIFI_FW = 0x9D,
HALMAC_API_CFGSPC_SET_PCIE = 0x9E,
HALMAC_API_GET_WATCHER = 0x9F,
HALMAC_API_DUMP_LOGICAL_EFUSE_MASK = 0xA0,
HALMAC_API_READ_WIFI_PHY_EFUSE = 0xA1,
HALMAC_API_WRITE_WIFI_PHY_EFUSE = 0xA2,
HALMAC_API_MAX
};
@@ -1699,6 +1792,12 @@ enum halmac_gpio_func {
HALMAC_GPIO_FUNC_SW_IO_15 = 17,
HALMAC_GPIO_FUNC_BT_HOST_WAKE1 = 18,
HALMAC_GPIO_FUNC_BT_DEV_WAKE1 = 19,
HALMAC_GPIO_FUNC_S0_PAPE = 20,
HALMAC_GPIO_FUNC_S1_PAPE = 21,
HALMAC_GPIO_FUNC_S0_TRSW = 22,
HALMAC_GPIO_FUNC_S1_TRSW = 23,
HALMAC_GPIO_FUNC_S0_TRSWB = 24,
HALMAC_GPIO_FUNC_S1_TRSWB = 25,
HALMAC_GPIO_FUNC_UNDEFINE = 0X7F,
};
@@ -1711,7 +1810,6 @@ enum halmac_wlled_mode {
};
enum halmac_psf_fcs_chk_thr {
HALMAC_PSF_FCS_CHK_THR_1 = 0,
HALMAC_PSF_FCS_CHK_THR_4 = 1,
HALMAC_PSF_FCS_CHK_THR_8 = 2,
HALMAC_PSF_FCS_CHK_THR_12 = 3,
@@ -1932,6 +2030,7 @@ struct halmac_sdio_hw_info {
u16 block_size;
u8 tx_seq;
u8 io_indir_flag; /* Halmac internal use */
u8 io_warn_flag; /* SW */
};
struct halmac_edca_para {
@@ -1956,6 +2055,14 @@ struct halmac_rx_ignore_info {
enum halmac_psf_fcs_chk_thr fcs_chk_thr;
};
struct halmac_get_watcher {
u32 sdio_rn_not_align;
};
struct halmac_watcher {
struct halmac_get_watcher get_watcher;
};
struct halmac_pinmux_info {
/* byte0 */
u8 wl_led:1;
@@ -1981,6 +2088,13 @@ struct halmac_pinmux_info {
u8 sw_io_13:1;
u8 sw_io_14:1;
u8 sw_io_15:1;
/* byte3 */
u8 s0_trsw:1;
u8 s1_trsw:1;
u8 s0_pape:1;
u8 s1_pape:1;
u8 s0_trswb:1;
u8 s1_trswb:1;
};
struct halmac_ofld_func_info {
@@ -2017,6 +2131,7 @@ struct halmac_adapter {
HALMAC_MUTEX sdio_indir_mutex; /*protect sdio indirect access */
struct halmac_cfg_param_info cfg_param_info;
struct halmac_ch_sw_info ch_sw_info;
struct halmac_scan_rpt_info scan_rpt_info;
struct halmac_event_trigger evnt;
struct halmac_hw_cfg_info hw_cfg_info;
struct halmac_sdio_free_space sdio_fs;
@@ -2051,6 +2166,7 @@ struct halmac_adapter {
u8 pwr_off_flow_flag;
u8 nlo_flag;
struct halmac_rx_ignore_info rx_ignore_info;
struct halmac_watcher watcher;
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmisc_adapter *halmisc_adapter;
#endif
@@ -2157,6 +2273,9 @@ struct halmac_api {
(*halmac_dump_logical_efuse_map)(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
(*halmac_dump_logical_efuse_mask)(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
(*halmac_write_logical_efuse)(struct halmac_adapter *adapter,
u32 offset, u8 value);
enum halmac_ret_status
@@ -2287,6 +2406,12 @@ struct halmac_api {
(*halmac_ctrl_ch_switch)(struct halmac_adapter *adapter,
struct halmac_ch_switch_option *opt);
enum halmac_ret_status
(*halmac_send_scan_packet)(struct halmac_adapter *adapter, u8 index,
u8 *pkt, u32 size);
enum halmac_ret_status
(*halmac_drop_scan_packet)(struct halmac_adapter *adapter,
struct halmac_drop_pkt_option *opt);
enum halmac_ret_status
(*halmac_p2pps)(struct halmac_adapter *adapter,
struct halmac_p2pps *info);
enum halmac_ret_status
@@ -2367,7 +2492,8 @@ struct halmac_api {
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
(*halmac_cfg_csi_rate)(struct halmac_adapter *adapter, u8 rssi,
u8 cur_rate, u8 fixrate_en, u8 *new_rate);
u8 cur_rate, u8 fixrate_en, u8 *new_rate,
u8 *bmp_ofdm54);
#if HALMAC_SDIO_SUPPORT
enum halmac_ret_status
(*halmac_sdio_cmd53_4byte)(struct halmac_adapter *adapter,
@@ -2399,7 +2525,7 @@ struct halmac_api {
u32 size, u32 rom_addr);
enum halmac_ret_status
(*halmac_read_flash)(struct halmac_adapter *adapter, u32 addr,
u32 length);
u32 length, u8 *data);
enum halmac_ret_status
(*halmac_erase_flash)(struct halmac_adapter *adapter, u8 erase_cmd,
u32 addr);
@@ -2465,12 +2591,48 @@ struct halmac_api {
enum halmac_ret_status
(*halmac_write_efuse)(struct halmac_adapter *adapter, u32 offset,
u8 value);
enum halmac_ret_status
(*halmac_write_wifi_phy_efuse)(struct halmac_adapter *adapter,
u32 offset, u8 value);
enum halmac_ret_status
(*halmac_read_wifi_phy_efuse)(struct halmac_adapter *adapter,
u32 offset, u32 size, u8 *value);
#if HALMAC_PCIE_SUPPORT
enum halmac_ret_status
(*halmac_cfgspc_set_pcie)(struct halmac_adapter *adapter,
struct halmac_pcie_cfgspc_param *param);
void
#endif
enum halmac_ret_status
(*halmac_en_ref_autok_pcie)(struct halmac_adapter *adapter, u8 en);
enum halmac_ret_status
(*halmac_get_watcher)(struct halmac_adapter *adapter,
enum halmac_watcher_sel sel, void *vlue);
enum halmac_ret_status
(*halmac_cfg_rf_pinmux)(struct halmac_adapter *adapter,
u8 value);
#if HALMAC_DBG_MONITOR_IO
u8
(*halmac_mon_reg_read_8)(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
u16
(*halmac_mon_reg_read_16)(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
u32
(*halmac_mon_reg_read_32)(struct halmac_adapter *adapter, u32 offset,
const char *func, const u32 line);
enum halmac_ret_status
(*halmac_mon_reg_sdio_cmd53_read_n)(struct halmac_adapter *adapter,
u32 offset, u32 size, u8 *value,
const char *func, const u32 line);
enum halmac_ret_status
(*halmac_mon_reg_write_8)(struct halmac_adapter *adapter, u32 offset,
u8 value, const char *func, const u32 line);
enum halmac_ret_status
(*halmac_mon_reg_write_16)(struct halmac_adapter *adapter, u32 offset,
u16 value, const char *func, const u32 line);
enum halmac_ret_status
(*halmac_mon_reg_write_32)(struct halmac_adapter *adapter, u32 offset,
u32 value, const char *func, const u32 line);
#endif
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmisc_api *halmisc_api;

2
hal/halmac/halmac_usb_reg.h
View File

@@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as