Update to 5.13.1 from upstream

2026-01-29 07:16:35 +00:00 · 2021-12-04 07:42:09 -05:00
parent aab1daf818
commit c0e109d401
352 changed files with 50307 additions and 18938 deletions
--- a/hal/phydm/halrf/halphyrf_ap.c
+++ b/hal/phydm/halrf/halphyrf_ap.c
@@ -433,17 +433,25 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series4(void *dm_void)
 			priv->pmib->dot11RFEntry.thermal[i] == 0x0)
 			return;
 	}
-	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) {
 		for (i = 0; i < c.rf_path_count; i++)
 			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/
+	} else if (dm->support_ic_type == ODM_RTL8197G) {
+		for (i = 0; i < c.rf_path_count; i++)
+			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, RF_0xf6, 0x7E000);
 	} else {
 		for (i = 0; i < c.rf_path_count; i++) {
 			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */

-			thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
-
-			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
-				"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			if (dm->support_ic_type == ODM_RTL8814B) {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i));
+			} else {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			}

 			if (thermal_value_temp[i] > 63)
 				thermal_value[i] = 63;
@@ -591,7 +599,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series4(void *dm_void)

 #endif
 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
+	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) {
 		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 		if (delta_IQK >= c.threshold_iqk) {
 			cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
@@ -838,9 +846,9 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 				if (GET_CHIP_VER(priv) == VERSION_8197F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
-				//}  else if (GET_CHIP_VER(priv) == VERSION_8192F) {
-				//	for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				//		(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
@@ -850,15 +858,18 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 				}  else if (GET_CHIP_VER(priv) == VERSION_8198F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				}
 			} else {
 				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n");
 				if (GET_CHIP_VER(priv) == VERSION_8197F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
-				//} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
-				//	for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				//		(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
@@ -868,13 +879,16 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 				} else if (GET_CHIP_VER(priv) == VERSION_8198F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
 						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				}
 			}
 		}
 #endif

 		if (GET_CHIP_VER(priv) != VERSION_8198F) {
-			if ((delta_IQK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
+			if ((delta_IQK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden) && dm->is_linked) {
 				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
 				dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
 				if (!(dm->support_ic_type & ODM_RTL8197F)) {
--- a/hal/phydm/halrf/halphyrf_ap.h
+++ b/hal/phydm/halrf/halphyrf_ap.h
@@ -52,6 +52,7 @@
 #if (RTL8814B_SUPPORT == 1)
 	#include "halrf/rtl8814b/halrf_iqk_8814b.h"
 	#include "halrf/rtl8814b/halrf_dpk_8814b.h"
+	#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
 #endif

 #if (RTL8197G_SUPPORT == 1)
--- a/hal/phydm/halrf/halphyrf_ce.c
+++ b/hal/phydm/halrf/halphyrf_ce.c
@@ -115,6 +115,10 @@ void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config)
 		configure_txpower_track_8814b(config);
 #endif

+#if RTL8723F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8723F)
+		configure_txpower_track_8723f(config);
+#endif

 }

@@ -376,12 +380,20 @@ void odm_pwrtrk_method(void *dm_void)
 	if (dm->support_ic_type &
 		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8812 |
 		ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8188F |
-		ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B |
+		ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
 		ODM_RTL8192F)) {
 		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
 		       "***Enter PwrTrk MIX_MODE***\n");
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
 			(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+	} else if (dm->support_ic_type & ODM_RTL8723D) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "***Enter PwrTrk MIX_MODE***\n");
+		p = (u8)odm_get_bb_reg(dm, R_0x948, 0x00000080);
+		(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+		/*if open ant_div 0x948=140,do 2 path pwr_track*/
+		if (odm_get_bb_reg(dm, R_0x948, 0x00000040))
+			(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, 1, 0);
 	} else {
 		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
 		       "***Enter PwrTrk BBSWING_MODE***\n");
@@ -780,7 +792,7 @@ void odm_txpowertracking_callback_thermal_meter(void *adapter)

 	/* Wait sacn to do IQK by RF Jenyu*/
 	if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden &&
-	    !cali_info->is_iqk_in_progress) {
+	    !cali_info->is_iqk_in_progress && dm->is_linked) {
 		if (!(dm->support_ic_type & ODM_RTL8723B)) {
 			/*Delta temperature is equal or larger than 20 Celsius*/
 			/*When threshold is 8*/
@@ -840,7 +852,7 @@ void odm_txpowertracking_callback_thermal_meter(void *adapter)
 	cali_info->tx_powercount = 0;
 }

-#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1  || RTL8723F_SUPPORT == 1)
 void
 odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 {
@@ -895,11 +907,17 @@ odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/
 	} else {
 		for (i = 0; i < c.rf_path_count; i++) {
-			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10]*/
-			thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
+			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */

-			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
-				"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			if (dm->support_ic_type == ODM_RTL8814B) {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i));
+			} else {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			}

 			if (thermal_value_temp[i] > 63)
 				thermal_value[i] = 63;
@@ -1048,7 +1066,7 @@ odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 			(*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0);

 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
+	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) {
 		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 		if (delta_IQK >= c.threshold_iqk) {
 			cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
--- a/hal/phydm/halrf/halphyrf_ce.h
+++ b/hal/phydm/halrf/halphyrf_ce.h
@@ -49,6 +49,7 @@
 #if (RTL8814B_SUPPORT == 1)
 	#include "halrf/rtl8814b/halrf_iqk_8814b.h"	
 	#include "halrf/rtl8814b/halrf_dpk_8814b.h"
+	#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
 #endif

 #include "halrf/halrf_powertracking_ce.h"
--- a/hal/phydm/halrf/halphyrf_iot.c
+++ b/hal/phydm/halrf/halphyrf_iot.c
@@ -125,6 +125,7 @@ odm_txpowertracking_callback_thermal_meter(
 	u8 power_tracking_type = rf->pwt_type;
 	u8 xtal_offset_eanble = 0;
 	s8 thermal_value_temp = 0;
+	u8 xtal_track_efuse = 0;

 	struct txpwrtrack_cfg	c = {0};

@@ -157,9 +158,12 @@ odm_txpowertracking_callback_thermal_meter(
 #endif

 	/*for Xtal Offset*/
+	odm_efuse_one_byte_read(dm, 0xf7, &xtal_track_efuse, false);
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Read efuse 0xf7=0x%x\n", xtal_track_efuse);
+	xtal_track_efuse = xtal_track_efuse & 0x3;
 	if (dm->support_ic_type == ODM_RTL8195B ||
 	    dm->support_ic_type == ODM_RTL8721D ||
-	    dm->support_ic_type == ODM_RTL8710C)
+	    (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2))
 		(*c.get_delta_swing_xtal_table)(dm,
 		 (s8 **)&delta_swing_table_xtal_up,
 		 (s8 **)&delta_swing_table_xtal_down);
@@ -316,7 +320,7 @@ odm_txpowertracking_callback_thermal_meter(
 			/* JJ ADD 20161014 */
 			if (dm->support_ic_type == ODM_RTL8195B ||
 			    dm->support_ic_type == ODM_RTL8721D ||
-			    dm->support_ic_type == ODM_RTL8710C) {
+			    (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
 				/*Save xtal_offset from Xtal table*/
 				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
 				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -371,7 +375,7 @@ odm_txpowertracking_callback_thermal_meter(

 			if (dm->support_ic_type == ODM_RTL8195B ||
 			    dm->support_ic_type == ODM_RTL8721D ||
-			    dm->support_ic_type == ODM_RTL8710C) {
+			    (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
 				/*Save xtal_offset from Xtal table*/
 				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
 				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -539,9 +543,17 @@ odm_txpowertracking_callback_thermal_meter(
 	}
 #endif
 	/* JJ ADD 20161014 */
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"cali_info->xtal_offset_last=%d   cali_info->xtal_offset=%d\n",
+			cali_info->xtal_offset_last, cali_info->xtal_offset);
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"xtal_offset_eanble=%d   cali_info->txpowertrack_control=%d   rf->eeprom_thermal=%d xtal_track_efuse=%d\n",
+			xtal_offset_eanble, cali_info->txpowertrack_control, rf->eeprom_thermal, xtal_track_efuse);
+
 	if (dm->support_ic_type == ODM_RTL8195B ||
 	    dm->support_ic_type == ODM_RTL8721D ||
-	    dm->support_ic_type == ODM_RTL8710C) {
+	    (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
 		if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) {
 			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");

@@ -559,7 +571,7 @@ odm_txpowertracking_callback_thermal_meter(
 	}
 #if (!RTL8721D_SUPPORT)
 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden)) {
+	if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) {
 		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 		if (delta_IQK >= c.threshold_iqk) {
 			cali_info->thermal_value_iqk = thermal_value;
--- a/hal/phydm/halrf/halphyrf_win.c
+++ b/hal/phydm/halrf/halphyrf_win.c
@@ -109,6 +109,10 @@ void configure_txpower_track(
 		configure_txpower_track_8814b(config);
 #endif

+#if RTL8723F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8723F)
+		configure_txpower_track_8723f(config);
+#endif

 }

@@ -230,8 +234,11 @@ odm_txpowertracking_callback_thermal_meter(
 	<Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
+#ifndef RTL8723F_SUPPORT
 	cali_info->rega24 = 0x090e1317;
 #endif
+#endif
+
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	if (*(dm->mp_mode) == true)
 		cali_info->rega24 = 0x090e1317;
@@ -700,7 +707,7 @@ odm_txpowertracking_callback_thermal_meter(
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)

 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
+	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && dm->is_linked) {
 		if (!IS_HARDWARE_TYPE_8723B(adapter)) {
 			/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 			if (delta_IQK >= c.threshold_iqk) {
@@ -753,7 +760,7 @@ odm_txpowertracking_callback_thermal_meter(
 	cali_info->tx_powercount = 0;
 }

-#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1  || RTL8723F_SUPPORT == 1)
 void
 odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 {
@@ -808,11 +815,17 @@ odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e);	/* 0x42: RF Reg[6:1] Thermal Trim*/
 	} else {
 		for (i = 0; i < c.rf_path_count; i++) {
-			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10]*/
-			thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
+			thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */

-			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
-				"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			if (dm->support_ic_type == ODM_RTL8814B) {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i));
+			} else {
+				thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm));
+			}

 			if (thermal_value_temp[i] > 63)
 				thermal_value[i] = 63;
@@ -871,7 +884,9 @@ odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 			cali_info->thermal_value_lck = thermal_value[RF_PATH_A];

 			/*Use RTLCK, so close power tracking driver LCK*/
-			if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
+			if ((!(dm->support_ic_type & ODM_RTL8814A)) &&
+			    (!(dm->support_ic_type & ODM_RTL8822B)) &&
+			    (!(dm->support_ic_type & ODM_RTL8723F))) {
 				if (c.phy_lc_calibrate)
 					(*c.phy_lc_calibrate)(dm);
 			} else
@@ -960,7 +975,7 @@ odm_txpowertracking_new_callback_thermal_meter(void *dm_void)
 			(*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0);

 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
+	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) {
 		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 		if (delta_IQK >= c.threshold_iqk) {
 			cali_info->thermal_value_iqk = thermal_value[RF_PATH_A];
@@ -1026,26 +1041,39 @@ odm_iq_calibrate(
 	if (*dm->is_fcs_mode_enable)
 		return;
 #endif
+	if (dm->is_linked) {
+		RF_DBG(dm, DBG_RF_IQK,
+		       "interval=%d ch=%d prech=%d scan=%s rfk_f =%s\n",
+		       dm->linked_interval, *dm->channel,  dm->pre_channel,
+		       *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE",
+		       iqk_info->rfk_forbidden == TRUE ? "TRUE":"FALSE");

-	if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) {
-		RF_DBG(dm, DBG_RF_IQK, "interval=%d ch=%d prech=%d scan=%s\n", dm->linked_interval,
-		       *dm->channel,  dm->pre_channel, *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE");
+		if (iqk_info->rfk_forbidden)	{
+			RF_DBG(dm, DBG_RF_IQK, "return by rfk_forbidden\n");
+			return;
+		}
+
+		if (*dm->is_scan_in_process)	{
+			RF_DBG(dm, DBG_RF_IQK, "return by is_scan_in_process\n");
+			return;
+		}

 		if (*dm->channel != dm->pre_channel) {
 			dm->pre_channel = *dm->channel;
 			dm->linked_interval = 0;
 		}

-		if ((dm->linked_interval < 3) && (!*dm->is_scan_in_process))
+		if (dm->linked_interval < 3)
 			dm->linked_interval++;

 		if (dm->linked_interval == 2)
 			PHY_IQCalibrate(adapter, false);
-	} else
+	} else {
 		dm->linked_interval = 0;
-
-		RF_DBG(dm, DBG_RF_IQK, "<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, dm->linked_interval,
-			*dm->channel,  dm->pre_channel, *dm->is_scan_in_process == TRUE?"TRUE":"FALSE");
+		RF_DBG(dm, DBG_RF_IQK, "is_linked =%s, interval =%d\n",
+		       dm->is_linked == TRUE ? "TRUE":"FALSE",
+		       dm->linked_interval);		
+	}
 }

 void phydm_rf_init(struct dm_struct		*dm)
--- a/hal/phydm/halrf/halphyrf_win.h
+++ b/hal/phydm/halrf/halphyrf_win.h
@@ -40,6 +40,7 @@

 #if (RTL8814B_SUPPORT == 1)
 	#include "halrf/rtl8814b/halrf_iqk_8814b.h"
+	#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
 #endif

 enum spur_cal_method {
--- a/hal/phydm/halrf/halrf.c
+++ b/hal/phydm/halrf/halrf.c
--- a/hal/phydm/halrf/halrf.h
+++ b/hal/phydm/halrf/halrf.h
@@ -38,6 +38,7 @@
 #include "halrf/rtl8822c/halrf_iqk_8822c.h"
 #include "halrf/rtl8822c/halrf_tssi_8822c.h"
 #include "halrf/rtl8822c/halrf_dpk_8822c.h"
+#include "halrf/rtl8822c/halrf_txgapk_8822c.h"
 #endif

 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@@ -57,6 +58,7 @@
 #include "halrf/rtl8814b/halrf_rfk_init_8814b.h"
 #include "halrf/rtl8814b/halrf_iqk_8814b.h"
 #include "halrf/rtl8814b/halrf_dpk_8814b.h"
+#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
 #endif

 /*@============================================================*/
@@ -69,12 +71,12 @@
 #define IQK_VER_8192F "0x01"
 #define IQK_VER_8723B "0x1e"
 #define IQK_VER_8812A "0x02"
-#define IQK_VER_8821A "0x01"
+#define IQK_VER_8821A "0x02"
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 #define IQK_VER_8188E "0x01"
 #define IQK_VER_8192E "0x01"
 #define IQK_VER_8192F "0x01"
-#define IQK_VER_8723B "0x1e"
+#define IQK_VER_8723B "0x1f"
 #define IQK_VER_8812A "0x01"
 #define IQK_VER_8821A "0x01"
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
@@ -99,19 +101,21 @@
 #define IQK_VER_8710B "0x01"
 #define IQK_VER_8723D "0x02"
 #define IQK_VER_8822B "0x32"
-#define IQK_VER_8822C "0x0c"
+#define IQK_VER_8822C "0x14"
 #define IQK_VER_8821C "0x23"
-#define IQK_VER_8198F "0x0a"
-#define IQK_VER_8814B "0x0e"
-#define IQK_VER_8812F "0x08"
-#define IQK_VER_8710C "0x05"
-#define IQK_VER_8197G "0x02"
+#define IQK_VER_8198F "0x0b"
+#define IQK_VER_8814B "0x15"
+#define IQK_VER_8812F "0x0c"
+#define IQK_VER_8710C "0x0a"
+#define IQK_VER_8197G "0x03"
+#define IQK_VER_8723F "0x00"
+

 /*LCK version*/
-#define LCK_VER_8188E "0x01"
-#define LCK_VER_8192E "0x01"
+#define LCK_VER_8188E "0x02"
+#define LCK_VER_8192E "0x02"
 #define LCK_VER_8192F "0x01"
-#define LCK_VER_8723B "0x01"
+#define LCK_VER_8723B "0x02"
 #define LCK_VER_8812A "0x01"
 #define LCK_VER_8821A "0x01"
 #define LCK_VER_8814A "0x01"
@@ -122,11 +126,12 @@
 #define LCK_VER_8723D "0x01"
 #define LCK_VER_8822B "0x02"
 #define LCK_VER_8822C "0x00"
-#define LCK_VER_8821C "0x02"
-#define LCK_VER_8814B "0x01"
+#define LCK_VER_8821C "0x03"
+#define LCK_VER_8814B "0x02"
 #define LCK_VER_8195B "0x02"
-#define LCK_VER_8710C "0x01"
-#define LCK_VER_8197G "0x00"
+#define LCK_VER_8710C "0x02"
+#define LCK_VER_8197G "0x01"
+#define LCK_VER_8198F "0x01"

 /*power tracking version*/
 #define PWRTRK_VER_8188E "0x01"
@@ -160,27 +165,31 @@
 #define DPK_VER_8710B "NONE"
 #define DPK_VER_8723D "NONE"
 #define DPK_VER_8822B "NONE"
-#define DPK_VER_8822C "0x19"
+#define DPK_VER_8822C "0x20"
 #define DPK_VER_8821C "NONE"
-#define DPK_VER_8192F "0x0d"
+#define DPK_VER_8192F "0x11"
 #define DPK_VER_8198F "0x0e"
-#define DPK_VER_8814B "0x08"
-#define DPK_VER_8195B "0x0b"
-#define DPK_VER_8812F "0x06"
-#define DPK_VER_8197G "0x04"
+#define DPK_VER_8814B "0x0f"
+#define DPK_VER_8195B "0x0c"
+#define DPK_VER_8812F "0x0a"
+#define DPK_VER_8197G "0x09"

 /*RFK_INIT version*/
 #define RFK_INIT_VER_8822B "0x8"
-#define RFK_INIT_VER_8822C "0x7"
+#define RFK_INIT_VER_8822C "0x8"
 #define RFK_INIT_VER_8195B "0x1"
 #define RFK_INIT_VER_8198F "0x8"
 #define RFK_INIT_VER_8814B "0xa"
-#define RFK_INIT_VER_8812F "0x3"
-#define RFK_INIT_VER_8197G "0x3"
+#define RFK_INIT_VER_8812F "0x4"
+#define RFK_INIT_VER_8197G "0x4"

 /*DACK version*/
-#define DACK_VER_8822C "0x6"
-#define DACK_VER_8814B "0x3"
+#define DACK_VER_8822C "0xa"
+#define DACK_VER_8814B "0x4"
+
+/*TXGAPK version*/
+#define TXGAPK_VER_8814B "0x1"
+#define TXGAPK_VER_8195B "0x2"

 /*Kfree tracking version*/
 #define KFREE_VER_8188E \
@@ -223,6 +232,7 @@
 #define TSSI_VER_8821C "0x1"
 #define TSSI_VER_8814B "0x1"
 #define TSSI_VER_8197G "0x1"
+#define TSSI_VER_8723F "0x1"

 /*PA Bias Calibration version*/
 #define PABIASK_VER_8188E \
@@ -278,6 +288,7 @@
 	(dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \
 	(dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \
 	(dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \
+	(dm->support_ic_type == ODM_RTL8723F) ? IQK_VER_8723F : \
 	(dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown"

 #define HALRF_LCK_VER \
@@ -333,6 +344,7 @@
 	(dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \
 	(dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \
 	(dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \
 	(dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \
 	(dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \
 	(dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown"
@@ -361,7 +373,8 @@
 	(dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \
 	(dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \
 	(dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \
-	(dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : "unknown"
+	(dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : \
+	(dm->support_ic_type == ODM_RTL8723F) ? TSSI_VER_8723F : "unknown"

 #define HALRF_PABIASK_VER \
 	(dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \
@@ -385,6 +398,7 @@
 #define HALRF_RFK_INIT_VER \
 	(dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \
 	(dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \
 	(dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \
 	(dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \
 	(dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown"
@@ -423,7 +437,9 @@ enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/
 	RF04_TXGAPK = 4,
 	RF05_DACK = 5,
 	RF06_DPK_TRK = 6,
-	RF07_2GBAND_SHIFT = 7
+	RF07_2GBAND_SHIFT = 7,
+	RF08_RXDCK = 8,
+	RF09_RFK = 9
 };

 enum halrf_ability {
@@ -434,7 +450,8 @@ enum halrf_ability {
 	HAL_RF_TXGAPK = BIT(RF04_TXGAPK),
 	HAL_RF_DACK = BIT(RF05_DACK),
 	HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK),
-	HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT)
+	HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT),
+	HAL_RF_RXDCK = BIT(RF08_RXDCK)
 };

 enum halrf_shift_band {
@@ -450,6 +467,8 @@ enum halrf_dbg_comp {
 	DBG_RF_DPK = BIT(RF03_DPK),
 	DBG_RF_TXGAPK = BIT(RF04_TXGAPK),
 	DBG_RF_DACK = BIT(RF05_DACK),
+	DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK),
+	DBG_RF_RFK = BIT(RF09_RFK),
 	DBG_RF_MP = BIT(29),
 	DBG_RF_TMP = BIT(30),
 	DBG_RF_INIT = BIT(31)
@@ -467,7 +486,9 @@ enum halrf_cmninfo_init {
 	HALRF_CMNINFO_MP_PSD_START_POINT,
 	HALRF_CMNINFO_MP_PSD_STOP_POINT,
 	HALRF_CMNINFO_MP_PSD_AVERAGE,
-	HALRF_CMNINFO_IQK_TIMES
+	HALRF_CMNINFO_IQK_TIMES,
+	HALRF_CMNINFO_MP_POWER_TRACKING_TYPE,
+	HALRF_CMNINFO_POWER_TRACK_CONTROL
 };

 enum halrf_cmninfo_hook {
@@ -500,6 +521,7 @@ enum halrf_k_segment_time {

 #define TSSI_EFUSE_NUM 25
 #define TSSI_EFUSE_KFREE_NUM 4
+#define TSSI_DE_DIFF_EFUSE_NUM 10

 struct _halrf_tssi_data {
 	s32 cck_offset_patha;
@@ -509,6 +531,7 @@ struct _halrf_tssi_data {
 	s16 txagc_codeword[TSSI_CODE_NUM];
 	u16 tssi_codeword[TSSI_CODE_NUM];
 	s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM];
+	s8 tssi_de_diff_efuse[PHYDM_MAX_RF_PATH][TSSI_DE_DIFF_EFUSE_NUM];
 	s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM];
 	u8 thermal[PHYDM_MAX_RF_PATH];
 	u32 index[PHYDM_MAX_RF_PATH][14];
@@ -516,8 +539,18 @@ struct _halrf_tssi_data {
 	u8 get_thermal;
 	u8 tssi_finish_bit[PHYDM_MAX_RF_PATH];
 	u8 thermal_trigger;
+	s8 tssi_de;
 };

+struct _halrf_txgapk_info {
+	u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */
+	boolean txgapk_bp_done;
+	s8 offset[12][PHYDM_MAX_RF_PATH];
+	s8 fianl_offset[12][PHYDM_MAX_RF_PATH];
+	u8 read_txgain;
+};
+
+
 /*@============================================================*/
 /*@ structure */
 /*@============================================================*/
@@ -544,18 +577,29 @@ struct _hal_rf_ {
 	boolean is_dpk_in_progress;
 	boolean is_tssi_in_progress;
 	boolean is_bt_iqk_timeout;
+	boolean is_rfk_h2c_timeout;
 	boolean aac_checked;
+	boolean is_txgapk_in_progress;

 	u8 *mp_rate_index;
 	u32 *manual_rf_supportability;
 	u32 p_rate_index;
 	u8 pwt_type;
 	u32 rf_dbg_comp;
+	u8 rfk_type;
+	u32 gnt_control;
+
+	u8 ext_lna;		/*@with 2G external LNA  NO/Yes = 0/1*/
+	u8 ext_lna_5g;		/*@with 5G external LNA  NO/Yes = 0/1*/
+	u8 ext_pa;		/*@with 2G external PNA  NO/Yes = 0/1*/
+	u8 ext_pa_5g;		/*@with 5G external PNA  NO/Yes = 0/1*/
 #if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
 	struct _halrf_psd_data halrf_psd_data;
 	struct _halrf_tssi_data halrf_tssi_data;
 #endif
+	struct _halrf_txgapk_info halrf_txgapk_info;
 	u8 power_track_type;
+	u8 mp_pwt_type;
 	u8 pre_band_type;
 };

@@ -625,6 +669,8 @@ u32 halrf_psd_log2base(u32 val);

 void halrf_dpk_trigger(void *dm_void);

+void halrf_txgapk_trigger(void *dm_void);
+
 u8 halrf_dpk_result_check(void *dm_void);

 void halrf_dpk_sram_read(void *dm_void);
@@ -635,6 +681,13 @@ void halrf_dpk_track(void *dm_void);

 void halrf_dpk_reload(void *dm_void);

+void halrf_dpk_switch(void *dm_void, u8 enable);
+
+void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len);
+
+void halrf_dpk_c2h_report_transfer(void	*dm_void, boolean is_ok, u8 *buf, u8 buf_size);
+
 void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);

 /*Global function*/
@@ -677,6 +730,8 @@ void halrf_tssi_get_efuse(void *dm_void);

 void halrf_do_tssi(void *dm_void);

+void halrf_set_tssi_enable(void *dm_void, boolean enable);
+
 void halrf_do_thermal(void *dm_void);

 u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value);
@@ -701,10 +756,22 @@ void halrf_set_tssi_codeword(void *dm_void);

 u8 halrf_get_tssi_codeword_for_txindex(void *dm_void);

+void halrf_tssi_clean_de(void *dm_void);
+
+u32 halrf_tssi_trigger_de(void *dm_void, u8 path);
+
 u32 halrf_tssi_get_de(void *dm_void, u8 path);

+u32 halrf_get_online_tssi_de(void *dm_void, u8 path, s32 pout);
+
 void halrf_tssi_trigger(void *dm_void);

+void halrf_txgapk_write_gain_table(void *dm_void);
+
+void halrf_txgapk_reload_tx_gain(void *dm_void);
+
+void halrf_txgap_enable_disable(void *dm_void, u8 enable);
+
 void halrf_set_dpk_track(void *dm_void, u8 enable);

 void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch);
@@ -725,7 +792,23 @@ void halrf_reload_iqk(void *dm_void, boolean reset);

 void halrf_dack_dbg(void *dm_void);

+void halrf_dack_trigger(void *dm_void, boolean force);
+
+void halrf_dack_restore(void *dm_void);
+
 void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);

 void halrf_set_rfsupportability(void *dm_void);
+
+void halrf_rxdck(void *dm_void);
+
+void halrf_delay_10us(u16 v1);
+
+void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len);
+
+void halrf_xtal_thermal_track(void *dm_void);
+
+void halrf_rfk_power_save(void *dm_void, boolean is_power_save);
+
 #endif /*__HALRF_H__*/
--- a/hal/phydm/halrf/halrf_debug.c
+++ b/hal/phydm/halrf/halrf_debug.c
@@ -89,7 +89,7 @@ void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 #endif

 #if (RTL8192F_SUPPORT)
-	case ODM_RTL8197F:
+	case ODM_RTL8192F:
 		rf_release_ver = RF_RELEASE_VERSION_8192F;
 		break;
 #endif
@@ -173,6 +173,9 @@ void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used,
 		PDM_SNPF(out_len, used, output + used, out_len - used,
 			 "04. (( %s ))TXGAPK\n",
 			 ((rf->rf_dbg_comp & DBG_RF_TXGAPK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "06. (( %s ))DPK_TRACK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_DPK_TRACK) ? ("V") : (".")));
 		PDM_SNPF(out_len, used, output + used, out_len - used,
 			 "29. (( %s ))MP\n",
 			 ((rf->rf_dbg_comp & DBG_RF_MP) ? ("V") : (".")));
@@ -200,6 +203,23 @@ void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used,
 	*_out_len = out_len;
 }

+void halrf_dack_debug_cmd(void *dm_void, char input[][16])
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u32 dm_value[10] = {0};
+	u8 i;
+
+	for (i = 0; i < 7; i++)
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]);
+
+	if (dm_value[0] == 1)
+		halrf_dack_trigger(dm, true);
+	else			
+		halrf_dack_trigger(dm, false);	
+}
+
 struct halrf_command {
 	char name[16];
 	u8 id;
@@ -214,6 +234,9 @@ enum halrf_CMD_ID {
 	HALRF_IQK,
 	HALRF_IQK_DEBUG,
 	HALRF_DPK,
+	HALRF_DACK,
+	HALRF_DACK_DEBUG,
+	HALRF_DUMP_RFK_REG,
 #ifdef CONFIG_2G_BAND_SHIFT
 	HAL_BAND_SHIFT,
 #endif
@@ -226,8 +249,11 @@ struct halrf_command halrf_cmd_ary[] = {
 	{"profile", HALRF_PROFILE},
 	{"iqk_info", HALRF_IQK_INFO},
 	{"iqk", HALRF_IQK},
-	{"dpk", HALRF_DPK},
 	{"iqk_dbg", HALRF_IQK_DEBUG},
+	{"dpk", HALRF_DPK},
+	{"dack", HALRF_DACK},
+	{"dack_dbg", HALRF_DACK_DEBUG},
+	{"dump_rfk_reg", HALRF_DUMP_RFK_REG},
 #ifdef CONFIG_2G_BAND_SHIFT
 	{"band_shift", HAL_BAND_SHIFT},
 #endif
@@ -300,7 +326,8 @@ void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
 #endif
 		break;
 	case HALRF_IQK_DEBUG:
-
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "IQK DEBUG!!!!!\n");
 		for (i = 0; i < 5; i++) {
 			if (input[i + 1]) {
 				PHYDM_SSCANF(input[i + 2], DCMD_HEX,
@@ -310,17 +337,28 @@ void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
 		}

 		if (input_idx >= 1) {
-#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-			if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
+			if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8822C | ODM_RTL8814B))
 				halrf_iqk_debug(dm, (u32 *)rf_var, &used,
 						output, &out_len);
 #endif
 		}
 		break;
 	case HALRF_DPK:
+		halrf_dpk_debug_cmd(dm, input, &used, output, &out_len);
+		break;
+	case HALRF_DACK:
 		PDM_SNPF(out_len, used, output + used, out_len - used,
-			 "DPK Trigger\n");
-		halrf_dpk_trigger(dm);
+			 "DACK Trigger\n");
+		halrf_dack_debug_cmd(dm, &input[0]);
+		break;
+	case HALRF_DACK_DEBUG:
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "DACK DEBUG\n");
+		halrf_dack_dbg(dm);
+		break;
+	case HALRF_DUMP_RFK_REG:
+		halrf_dump_rfk_reg(dm, input, &used, output, &out_len);
 		break;
 	default:
 		break;
@@ -337,15 +375,18 @@ void halrf_init_debug_setting(void *dm_void)
 	struct _hal_rf_ *rf = &dm->rf_table;

 	rf->rf_dbg_comp =
+
+	DBG_RF_RFK		|
 #if DBG
-#if 0
-	/*DBG_RF_TX_PWR_TRACK	|*/
+#if 1
+	/*DBG_RF_TX_PWR_TRACK	| */
 	/*DBG_RF_IQK		| */
 	/*DBG_RF_LCK		| */
 	/*DBG_RF_DPK		| */
-	/*DBG_RF_DACK		| */
 	/*DBG_RF_TXGAPK		| */
-	/*DBG_RF_MP			| */
+	/*DBG_RF_DACK		| */
+	/*DBG_RF_DPK_TRACK	| */ 
+	/*DBG_RF_MP		| */
 	/*DBG_RF_TMP		| */
 	/*DBG_RF_INIT		| */
 #endif
--- a/hal/phydm/halrf/halrf_debug.h
+++ b/hal/phydm/halrf/halrf_debug.h
@@ -96,6 +96,23 @@ static __inline void RF_DBG(PDM_ODM_T dm, int comp, char *fmt, ...)
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 static __inline void RF_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
 {
+#if 0
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[128] = {0};/*PRINT_MAX_SIZE*/
+
+	if ((comp & dm->rf_table.rf_dbg_comp) == 0)
+		return;
+
+	if (NULL != fmt) {
+		va_start(args, fmt);
+		rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, sizeof(buf), fmt, args);
+		va_end(args);
+		if (rt_status == RT_STATUS_SUCCESS) {
+			halrf_rt_trace(buf);
+		}
+	}
+#endif
 }
 #else
 #define RF_DBG(dm, comp, fmt, args...)
--- a/hal/phydm/halrf/halrf_dpk.h
+++ b/hal/phydm/halrf/halrf_dpk.h
@@ -43,6 +43,22 @@
 #define AVG_THERMAL_NUM_DPK 8
 #define THERMAL_DPK_AVG_NUM 4

+/*define RF path numer*/
+#if (RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
+#define KPATH 4
+#elif (RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||RTL8197G_SUPPORT == 1 ||\
+	RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
+#define KPATH 2
+#else
+#define KPATH 1
+#endif
+
+#if (RTL8814B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
+#define GROUP_5G 6
+#elif (RTL8195B_SUPPORT == 1)
+#define GROUP_5G 13
+#endif
+
 /*@---------------------------End Define Parameters---------------------------*/

 struct dm_dpk_info {
@@ -51,19 +67,30 @@ struct dm_dpk_info {
 	boolean	is_dpk_pwr_on;
 	boolean	is_dpk_by_channel;
 	boolean is_tssi_mode;
-	boolean is_reload;
-	u16 dpk_path_ok;
+	u8	dpk_status;			/*bit[0]:reload;bit[1]:cal;bit[2]:cal_ok*/
+	u16	dpk_path_ok;
 	/*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/
 	/*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/
-	u8	thermal_dpk[4];					/*path*/	
-	u8	thermal_dpk_avg[4][AVG_THERMAL_NUM_DPK];	/*path*/
-	u8	pre_pwsf[4];	
+	u8	thermal_dpk[KPATH];					/*path*/	
+	u8	thermal_dpk_avg[KPATH][AVG_THERMAL_NUM_DPK];	/*path*/
+	u8	pre_pwsf[KPATH];
 	u8	thermal_dpk_avg_index;
 	u32	gnt_control;
 	u32	gnt_value;
 	u8	dpk_ch;
 	u8	dpk_band;
 	u8	dpk_bw;
+	u32	dpk_rf18[2];
+	u32	dpk_cal_cnt;
+	u32	dpk_ok_cnt;
+	u32	dpk_reload_cnt;
+
+#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
+	u16	dc_i[2];			/*MDPD DC I path*/
+	u16	dc_q[2];			/*MDPD DC Q path*/
+	u8	corr_val[2];			/*Corr value path*/
+	u8	corr_idx[2];			/*Corr index path*/
+#endif

 #if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1)
 	u8	result[2];			/*path*/
@@ -74,52 +101,63 @@ struct dm_dpk_info {
 #endif

 #if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||\
-     RTL8814B_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
+	RTL8814B_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
 	/*2G DPK data*/
-	u8 	dpk_result[4][3];		/*path/group*/
-	u8 	pwsf_2g[4][3];			/*path/group*/	
-	u32	lut_2g_even[4][3][64];		/*path/group/LUT data*/
-	u32	lut_2g_odd[4][3][64];		/*path/group/LUT data*/
+	u8 	dpk_result[KPATH][3];			/*path/group*/
+	u8 	pwsf_2g[KPATH][3];			/*path/group*/	
+	u32	lut_2g_even[KPATH][3][64];		/*path/group/LUT data*/
+	u32	lut_2g_odd[KPATH][3][64];		/*path/group/LUT data*/
 	s16	tmp_pas_i[32];			/*PAScan I data*/
 	s16	tmp_pas_q[32];			/*PAScan Q data*/
+#endif
+
+#if (RTL8814B_SUPPORT == 1)
 	/*5G DPK data*/
-	u8	dpk_5g_result[4][6];		/*path/group*/
-	u8	pwsf_5g[4][6];			/*path/group*/
-	u32	lut_5g[4][6][64];		/*path/group/LUT data*/
-	u32	lut_2g[4][3][64];		/*path/group/LUT data*/
-	/*8814B*/
+	u8	dpk_5g_result[KPATH][GROUP_5G];			/*path/group*/
+	u8	pwsf_5g[KPATH][GROUP_5G];			/*path/group*/
+	u32	lut_5g[KPATH][GROUP_5G][64];			/*path/group/LUT data*/
+	u32	lut_2g[KPATH][3][64];			/*path/group/LUT data*/
 	u8	rxbb[4];			/*path/group*/
 	u8	txbb[4];			/*path/group*/
 	u8	tx_gain;
 #endif

-#if (RTL8195B_SUPPORT == 1)
-		/*2G DPK data*/
-		u8	dpk_2g_result[1][3];		/*path/group*/
-		u8	pwsf_2g[1][3];			/*path/group*/
-		u32	lut_2g_even[1][3][16];		/*path/group/LUT data*/
-		u32	lut_2g_odd[1][3][16];		/*path/group/LUT data*/
-		/*5G DPK data*/
-		u8	dpk_5g_result[1][13];		/*path/group*/
-		u8	pwsf_5g[1][13];			/*path/group*/
-		u32	lut_5g_even[1][13][16];		/*path/group/LUT data*/
-		u32	lut_5g_odd[1][13][16];		/*path/group/LUT data*/
-#endif
-
-#if (RTL8721D_SUPPORT == 1)
+#if (RTL8195B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
 		u8	dpk_txagc;
 		/*2G DPK data*/
-		u8	dpk_2g_result[1][3];		/*path/group*/
-		u8	pwsf_2g[1][3];			/*path/group*/
-		u32	lut_2g_even[1][3][16];		/*path/group/LUT data*/
-		u32	lut_2g_odd[1][3][16];		/*path/group/LUT data*/
+	u8	dpk_2g_result[KPATH][3];			/*path/group*/
+	u8	pwsf_2g[KPATH][3];			/*path/group*/
+	u32	lut_2g_even[KPATH][3][16];		/*path/group/LUT data*/
+	u32	lut_2g_odd[KPATH][3][16];		/*path/group/LUT data*/
 		/*5G DPK data*/
-		u8	dpk_5g_result[1][6];		/*path/group*/
-		u8	pwsf_5g[1][6];			/*path/group*/
-		u32	lut_5g_even[1][6][16];		/*path/group/LUT data*/
-		u32	lut_5g_odd[1][6][16];		/*path/group/LUT data*/
+	u8	dpk_5g_result[KPATH][GROUP_5G];			/*path/group*/
+	u8	pwsf_5g[KPATH][GROUP_5G];			/*path/group*/
+	u32	lut_5g_even[KPATH][GROUP_5G][16];		/*path/group/LUT data*/
+	u32	lut_5g_odd[KPATH][GROUP_5G][16];		/*path/group/LUT data*/
 #endif

+#if(RTL8723F_SUPPORT == 1)
+	u8	one_shot_cnt;
+	u8	dpk_current_path;
+	u8	thermal_init[KPATH];
+	u8	dpk_delta_thermal[KPATH];		/*path*/
+	s8	last_offset[KPATH];			/*path*/
+	u8	txagc[KPATH];				/*path*/
+	u8	tssi_txagc[KPATH][2];			/*path/0:txagc_rf,1:tssi_offset*/
+	u16	digital_bbgain[KPATH];			/*path*/
+	u16	pwsf[KPATH];				/*path*/
+
+#endif
 };

+#if (RTL8822C_SUPPORT == 1)
+struct dm_dpk_c2h_report {
+	u8	result[2];		/*ch0_result/ch1_result*/
+	u8	therm[2][2];		/*therm0_s0/therm0_s1/therm1_s0/therm1_s1*/
+	u8	therm_delta[2][2];	/*therm_delta0_s0/therm_delta0_s1/therm_delta1_s0/therm_delta1_s1*/
+	u32	dpk_rf18[2];		/*dpk_ch0/dpk_ch1*/
+	u8	dpk_status;		/*dpk_status*/
+};
+#endif
+
 #endif /*__HALRF_DPK_H__*/
--- a/hal/phydm/halrf/halrf_iqk.h
+++ b/hal/phydm/halrf/halrf_iqk.h
@@ -39,16 +39,24 @@
 #define rxiqk_gs_limit 6
 #define TXWBIQK_EN 1
 #define RXWBIQK_EN 1
+#if (RTL8814A_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT)
 #define NUM 4
+#elif (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
+	RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\
+	RTL8723F_SUPPORT == 1)
+#define NUM 2
+#else
+#define NUM 1
+#endif
+
 /*@-----------------------End Define Parameters-----------------------*/

 struct dm_dack_info {
-	u32 ic_a;
-	u32 qc_a;
-	u32 ic_b;
-	u32 qc_b;
 	boolean dack_en;
 	u16 msbk_d[2][2][15];
+	u8 dck_d[2][2][2];
+	u16 biask_d[2][2];
 };

 struct dm_iqk_info {
@@ -70,37 +78,52 @@ struct dm_iqk_info {
 	u8 rxbb;
 	u32 rf_reg58;
 	boolean segment_iqk;
+	boolean is_tssi_mode;
+	u8 iqk_band;
+	u8 iqk_ch;
+	u8 iqk_bw;
 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
 	RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
 	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
 	RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\
-	RTL8710C_SUPPORT == 1)
+	RTL8710C_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
 	u32 iqk_channel[2];
-	boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
+	boolean iqk_fail_report[2][NUM][2]; /*channel/path/TRX(TX:0, RX:1) */
 	/*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
 	/*channel index = 2 is just for debug*/
-#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
+#if (RTL8814B_SUPPORT == 1)
+	u16 iqk_cfir_real[3][NUM][2][19];
+	u16 iqk_cfir_imag[3][NUM][2][19];
+#elif (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
 	u16 iqk_cfir_real[3][2][2][17];
 	/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
 	/*channel index = 2 is just for debug*/
 	u16 iqk_cfir_imag[3][2][2][17];
+	/*times/path*/
+#elif (RTL8195B_SUPPORT == 1)
+	u32 iqk_cfir_real[3][NUM][2][9];
+	u32 iqk_cfir_imag[3][NUM][2][9];
+	/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
+	/*channel index = 2 is just for debug*/
+#else
+	u32 iqk_cfir_real[3][NUM][2][8];
+	/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
+	/*channel index = 2 is just for debug*/
+	u32 iqk_cfir_imag[3][NUM][2][8];
+#endif
+
+#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
 	u32 rx_cfir_real[2][2][17];
 	u32 rx_cfir_imag[2][2][17];
 	u32 rx_cfir[2][2];
-	/*times/path*/
-#else
-	u32 iqk_cfir_real[3][4][2][8];
-	/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
-	/*channel index = 2 is just for debug*/
-	u32 iqk_cfir_imag[3][4][2][8];
 #endif
-	u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
-	u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
+	u8 retry_count[2][NUM][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
+	u8 gs_retry_count[2][NUM][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
 	/* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
-	u8 rxiqk_fail_code[2][4];
-	u32 lok_idac[2][4]; /*channel / path*/
-	u16 rxiqk_agc[2][4]; /*channel / path*/
-	u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/
+	u8 rxiqk_fail_code[2][NUM];
+	u32 lok_idac[2][NUM]; /*channel / path*/
+	u16 rxiqk_agc[2][NUM]; /*channel / path*/
+	u32 bypass_iqk[2][NUM]; /*channel / 0xc94/0xe94*/
 	u32 txgap_result[8]; /*txagpK result  */
 	u32 tmp_gntwl;
 	boolean is_btg;
@@ -109,13 +132,25 @@ struct dm_iqk_info {
 	boolean is_hwtx;
 	boolean xym_read;
 	boolean trximr_enable;
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
 	u32 rx_xym[2][10];
 	u32 tx_xym[2][10];
 	u32 gs1_xym[2][6];
 	u32 gs2_xym[2][6];
 	u32 rxk1_xym[2][6];
+	u32 nbtxk_1b38[2];
+	u32 nbrxk_1b3c[2];
+#endif
+#if (RTL8710C_SUPPORT == 1 || RTL8197G_SUPPORT == 1 )
 	u32 txxy[2][2];
 	u32 rxxy[2][2];
+#endif
+#if (RTL8723F_SUPPORT == 1)
+	u32 txxy[2][2];
+	u32 rxxy[2][2][2];
+#endif
+
 #endif
 };

--- a/hal/phydm/halrf/halrf_kfree.c
+++ b/hal/phydm/halrf/halrf_kfree.c
--- a/hal/phydm/halrf/halrf_kfree.h
+++ b/hal/phydm/halrf/halrf_kfree.h
@@ -164,10 +164,15 @@
 #define PPG_5GH1_TXA_8721D 0x1E9

 /*8197G*/
-#define PPG_THERMAL_OFFSET_97G 0x50
+#define PPG_THERMAL_A_OFFSET_97G 0x50
+#define PPG_THERMAL_B_OFFSET_97G 0x27
 #define PPG_2GM_TXAB_97G 0x51
 #define PPG_2GL_TXAB_97G 0x53
 #define PPG_2GH_TXAB_97G 0x55
+#define TSSI_2GL_TXA_97G 0x1c
+#define TSSI_2GL_TXB_97G 0x1d
+#define TSSI_2GH_TXA_97G 0x1e
+#define TSSI_2GH_TXB_97G 0x1f
 #define PPG_PABIAS_2GAB_97G 0x57
 #define PPG_LNA_2GA_97G 0x21
 #define PPG_LNA_2GB_97G 0x22
@@ -180,13 +185,83 @@
 #define PPG_PABIAS_10C 0x1D6
 #define PPG_LNA_10C 0x1D0

+/*8814B*/
+#define PPG_2GL_TXAB_14B 0x3ee
+#define PPG_2GL_TXCD_14B 0x3ed
+#define PPG_5GL1_TXA_14B 0x3ec
+#define PPG_5GL1_TXB_14B 0x3eb
+#define PPG_5GL1_TXC_14B 0x3ea
+#define PPG_5GL1_TXD_14B 0x3e9
+#define PPG_5GL2_TXA_14B 0x3e8
+#define PPG_5GL2_TXB_14B 0x3e7
+#define PPG_5GL2_TXC_14B 0x3e6
+#define PPG_5GL2_TXD_14B 0x3e5
+#define PPG_5GM1_TXA_14B 0x3e4
+#define PPG_5GM1_TXB_14B 0x3e3
+#define PPG_5GM1_TXC_14B 0x3e2
+#define PPG_5GM1_TXD_14B 0x3e1
+#define PPG_5GM2_TXA_14B 0x3e0
+#define PPG_5GM2_TXB_14B 0x3df
+#define PPG_5GM2_TXC_14B 0x3de
+#define PPG_5GM2_TXD_14B 0x3dd
+#define PPG_5GH1_TXA_14B 0x3dc
+#define PPG_5GH1_TXB_14B 0x3db
+#define PPG_5GH1_TXC_14B 0x3da
+#define PPG_5GH1_TXD_14B 0x3d9
+#define PPG_PABIAS_5GAC_14B 0x3d8
+#define PPG_PABIAS_5GBD_14B 0x3d7
+#define PPG_PABIAS_2GAC_14B 0x3d6
+#define PPG_PABIAS_2GBD_14B 0x3d5
+
+#define PPG_THERMAL_A_OFFSET_14B 0x3D4
+#define PPG_THERMAL_B_OFFSET_14B 0x3D3
+#define PPG_THERMAL_C_OFFSET_14B 0x3D2
+#define PPG_THERMAL_D_OFFSET_14B 0x3D1
+
+#define TSSI_2GM_TXA_14B 0x3c0
+#define TSSI_2GM_TXB_14B 0x3bf
+#define TSSI_2GM_TXC_14B 0x3be
+#define TSSI_2GM_TXD_14B 0x3bd
+#define TSSI_2GH_TXA_14B 0x3bc
+#define TSSI_2GH_TXB_14B 0x3bb
+#define TSSI_2GH_TXC_14B 0x3ba
+#define TSSI_2GH_TXD_14B 0x3b9
+#define TSSI_5GL1_TXA_14B 0x3b8
+#define TSSI_5GL1_TXB_14B 0x3b7
+#define TSSI_5GL1_TXC_14B 0x3b6
+#define TSSI_5GL1_TXD_14B 0x3b5
+#define TSSI_5GL2_TXA_14B 0x3b4
+#define TSSI_5GL2_TXB_14B 0x3b3
+#define TSSI_5GL2_TXC_14B 0x3b2
+#define TSSI_5GL2_TXD_14B 0x3b1
+#define TSSI_5GM1_TXA_14B 0x3b0
+#define TSSI_5GM1_TXB_14B 0x3af
+#define TSSI_5GM1_TXC_14B 0x3ae
+#define TSSI_5GM1_TXD_14B 0x3ad
+#define TSSI_5GM2_TXA_14B 0x3ac
+#define TSSI_5GM2_TXB_14B 0x3ab
+#define TSSI_5GM2_TXC_14B 0x3aa
+#define TSSI_5GM2_TXD_14B 0x3a9
+#define TSSI_5GH1_TXA_14B 0x3a8
+#define TSSI_5GH1_TXB_14B 0x3a7
+#define TSSI_5GH1_TXC_14B 0x3a6
+#define TSSI_5GH1_TXD_14B 0x3a5
+#define TSSI_5GH2_TXA_14B 0x3a4
+#define TSSI_5GH2_TXB_14B 0x3a3
+#define TSSI_5GH2_TXC_14B 0x3a2
+#define TSSI_5GH2_TXD_14B 0x3a1
+
+
 struct odm_power_trim_data {
 	u8 flag;
 	u8 pa_bias_flag;
 	u8 lna_flag;
 	s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
 	s8 tssi_trim[KFREE_BAND_NUM][MAX_RF_PATH];
+	s8 pa_bias_trim[KFREE_BAND_NUM][MAX_RF_PATH];
+	s8 lna_trim[MAX_RF_PATH];
 	s8 thermal;
+	s8 multi_thermal[MAX_RF_PATH];
 };

 enum phydm_kfree_channeltosw {
@@ -206,6 +281,8 @@ void phydm_get_pa_bias_offset(void *dm_void);

 s8 phydm_get_thermal_offset(void *dm_void);

+s8 phydm_get_multi_thermal_offset(void *dm_void, u8 path);
+
 void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);

 void phydm_config_new_kfree(void *dm_void);
@@ -214,4 +291,6 @@ s8 phydm_get_tssi_trim_de(void *dm_void, u8 path);

 void phydm_config_kfree(void *dm_void, u8 channel_to_sw);

+void phydm_set_lna_trim_offset (void *dm_void, u8 path, u8 cg_cs, u8 enable);
+
 #endif /*__HALRF_KFREE_H__*/
--- a/hal/phydm/halrf/halrf_powertracking.c
+++ b/hal/phydm/halrf/halrf_powertracking.c
@@ -162,16 +162,39 @@ void halrf_set_pwr_track(void *dm_void, u8 enable)
 	configure_txpower_track(dm, &c);
 	if (enable) {
 		rf->rf_supportability = rf->rf_supportability | HAL_RF_TX_PWR_TRACK;
+#if !(RTL8723F_SUPPORT == 1)
 		if (cali_info->txpowertrack_control == 1 || cali_info->txpowertrack_control == 3)
 			halrf_do_tssi(dm);
+#else
+	halrf_tssi_get_efuse(dm);
+	halrf_do_tssi(dm);
+#endif
+
 	} else {
 		rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TX_PWR_TRACK;
 		odm_clear_txpowertracking_state(dm);
 		halrf_do_tssi(dm);
 		halrf_calculate_tssi_codeword(dm);
 		halrf_set_tssi_codeword(dm);
+		
+//#if !(RTL8723F_SUPPORT == 1)
 		for (i = 0; i < c.rf_path_count; i++)
 			(*c.odm_tx_pwr_track_set_pwr)(dm, CLEAN_MODE, i, 0);
+//#endif
 	}
+
+#if (RTL8723F_SUPPORT == 1)
+	if (dm->mp_mode) {
+		if (*dm->mp_mode)
+			/*Re-do dpk when tssi mode is changed*/
+			halrf_dpk_trigger(dm);
+	}
+#endif
+
+	if (cali_info->txpowertrack_control == 2 ||
+		cali_info->txpowertrack_control == 3 ||
+		cali_info->txpowertrack_control == 4 ||
+		cali_info->txpowertrack_control == 5)
+		halrf_txgapk_reload_tx_gain(dm);
 }

--- a/hal/phydm/halrf/halrf_powertracking_ap.c
+++ b/hal/phydm/halrf/halrf_powertracking_ap.c
@@ -927,7 +927,7 @@ odm_txpowertracking_init(
 {
 	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_IC_11N_SERIES)))
+	if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8814B | ODM_IC_11N_SERIES)))
 		return;
 #endif

@@ -987,6 +987,24 @@ get_swing_index(
 	return i;
 }

+s8
+get_txagc_default_index(
+	void *dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 tmp;
+
+#if RTL8814B_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
+		if (tmp & BIT(6))
+			tmp = tmp | 0x80;
+		return tmp;
+	} else
+		return 0;
+#endif
+}

 void
 odm_txpowertracking_thermal_meter_init(
@@ -995,9 +1013,12 @@ odm_txpowertracking_thermal_meter_init(
 {
 	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
+	struct _hal_rf_ *rf = &dm->rf_table;
+	struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
 	struct rtl8192cd_priv		*priv = dm->priv;
 	u8 p;
 	u8 default_swing_index;
+	u8 i;
 #if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1)
 	if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B) ||(GET_CHIP_VER(priv) == VERSION_8192F))
 		default_swing_index = get_swing_index(dm);
@@ -1073,7 +1094,7 @@ odm_txpowertracking_thermal_meter_init(

 #if (RTL8192F_SUPPORT == 1)
 	if (GET_CHIP_VER(priv) == VERSION_8192F) {
-		cali_info->default_ofdm_index = 30;
+		cali_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index;
 		cali_info->default_cck_index = 28;
 	}
 #endif
@@ -1087,10 +1108,27 @@ odm_txpowertracking_thermal_meter_init(


 #if RTL8188E_SUPPORT
-	cali_info->default_cck_index = 20;	/* -6 dB */
-#elif RTL8192E_SUPPORT
-	cali_info->default_cck_index = 8;	/* -12 dB */
+	if (GET_CHIP_VER(priv) == VERSION_8188E) {
+		cali_info->default_cck_index = 20;	/* -6 dB */
+	}
 #endif
+
+#if RTL8192E_SUPPORT
+	if (GET_CHIP_VER(priv) == VERSION_8192E) {
+		cali_info->default_cck_index = 8;	/* -12 dB */
+	}
+#endif
+
+#if RTL8814B_SUPPORT
+	if (GET_CHIP_VER(priv) == VERSION_8814B) {
+		cali_info->default_txagc_index = get_txagc_default_index(dm);
+
+		for (i = 0; i < MAX_PATH_NUM_8814B; i++)
+			tssi->tssi_trk_txagc_offset[i] =
+				cali_info->default_txagc_index;
+	}
+#endif
+
 	cali_info->bb_swing_idx_ofdm_base = cali_info->default_ofdm_index;
 	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
 	dm->rf_calibrate_info.CCK_index = cali_info->default_cck_index;
@@ -1207,7 +1245,7 @@ odm_txpowertracking_check_ap(
 	struct _hal_rf_ *rf = &dm->rf_table;
 	struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;

-#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1))
+#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1) || (RTL8197G_SUPPORT == 1))
 	if (!dm->rf_calibrate_info.tm_trigger) {
 		if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F)) {
 			odm_set_rf_reg(dm, RF_PATH_A, 0x42, (BIT(17) | BIT(16)), 0x3);
@@ -1224,6 +1262,14 @@ odm_txpowertracking_check_ap(
 			odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
 			odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
 			odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
+		} else if (dm->support_ic_type & ODM_RTL8197G) {
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x1);
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x0);
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x1);
+
+			odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x1);
+			odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x0);
+			odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x1);
 		}

 		if (dm->support_ic_type & ODM_RTL8814B) {
--- a/hal/phydm/halrf/halrf_powertracking_ap.h
+++ b/hal/phydm/halrf/halrf_powertracking_ap.h
@@ -228,6 +228,7 @@ struct dm_rf_calibration_struct {
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
+	s8			default_txagc_index;
 	boolean			bb_swing_flag_cck;

 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
--- a/hal/phydm/halrf/halrf_powertracking_ce.c
+++ b/hal/phydm/halrf/halrf_powertracking_ce.c
@@ -664,6 +664,23 @@ u8 get_cck_swing_index(void *dm_void)
 	return i;
 }

+s8
+get_txagc_default_index(
+	void *dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 tmp;
+
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
+		if (tmp & BIT(6))
+			tmp = tmp | 0x80;
+		return tmp;
+	} else
+		return 0;
+}
+
 void odm_txpowertracking_thermal_meter_init(void *dm_void)
 {
 	struct dm_struct *dm = (struct dm_struct *)dm_void;
@@ -696,8 +713,9 @@ void odm_txpowertracking_thermal_meter_init(void *dm_void)
 	cali_info->thermal_value_iqk = rf->eeprom_thermal;
 	cali_info->thermal_value_lck = rf->eeprom_thermal;

-#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
-	if (dm->support_ic_type == ODM_RTL8822C) {
+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822C || 
+	    dm->support_ic_type == ODM_RTL8723F) {
 		cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
 		cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
 		cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
@@ -748,6 +766,8 @@ void odm_txpowertracking_thermal_meter_init(void *dm_void)
 			else
 				cali_info->default_ofdm_index = swing_idx;

+			cali_info->default_txagc_index = get_txagc_default_index(dm);
+
 			cali_info->default_cck_index = 24;
 		}
 		cali_info->default_bb_swing_index_flag = true;
@@ -805,6 +825,12 @@ void odm_txpowertracking_check_ce(void *dm_void)
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
+#if (RTL8723F_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8723F) {
+		/*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF][TSSI] Pwrtrack return!\n");*/
+		return;
+	}
+#endif

 	if ((rf->power_track_type & 0xf0) >> 4 != 0) {
 		if (dm->support_ic_type & ODM_RTL8822C) {
@@ -868,10 +894,17 @@ odm_txpowertracking_direct_ce(void *dm_void)
 {
 	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	struct _hal_rf_ *rf = &dm->rf_table;
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)

 	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
+	if (dm->support_ic_type & ODM_RTL8723F) {
+#if (RTL8723F_SUPPORT == 1)
+		/*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF]===>%s 8723F TSSI, return!\n", __func__);*/
+		return;
+#endif
+	}

 	if (dm->support_ic_type & ODM_RTL8822C) {
 		/*halrf_tssi_cck(dm);*/
--- a/hal/phydm/halrf/halrf_powertracking_ce.h
+++ b/hal/phydm/halrf/halrf_powertracking_ce.h
@@ -199,6 +199,7 @@ struct dm_rf_calibration_struct {
 	u8 bb_swing_idx_cck_base;
 	u8 default_ofdm_index;
 	u8 default_cck_index;
+	s8 default_txagc_index;
 	boolean bb_swing_flag_cck;

 	s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
--- a/hal/phydm/halrf/halrf_powertracking_iot.c
+++ b/hal/phydm/halrf/halrf_powertracking_iot.c
@@ -34,7 +34,7 @@
 * ************************************************************
 */

-u32	ofdm_swing_table[OFDM_TABLE_SIZE] = {
+const u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
 	0x7f8001fe,	/* 0, +6.0dB */
 	0x788001e2,	/* 1, +5.5dB */
 	0x71c001c7,	/* 2, +5.0dB*/
@@ -74,7 +74,7 @@ u32	ofdm_swing_table[OFDM_TABLE_SIZE] = {
 	0x10000040,	/* 36, -12.0dB*/
 };

-u8	cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
+const u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
 	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	/* 0, +0dB */
 	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	/* 1, -0.5dB */
 	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	/* 2, -1.0dB*/
@@ -110,7 +110,7 @@ u8	cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
 	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	/* 32, -16.0dB*/
 };

-u8	cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
+const u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
 	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	/* 0, +0dB */
 	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	/* 1, -0.5dB */
 	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	/* 2, -1.0dB */
@@ -146,7 +146,7 @@ u8	cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
 	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	/* 32, -16.0dB*/
 };

-u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
+const u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
 	0x0b40002d, /* 0,  -15.0dB	*/
 	0x0c000030, /* 1,  -14.5dB*/
 	0x0cc00033, /* 2,  -14.0dB*/
@@ -192,7 +192,7 @@ u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
 	0x7f8001fe  /* 42, +6.0dB*/
 };

-u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
+const u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
 	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
 	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
@@ -216,7 +216,7 @@ u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
 };

-u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
+const u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
 	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
 	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
@@ -240,7 +240,7 @@ u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
 };

-u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
+const u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0x44,	 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
 	{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
 	{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
@@ -264,7 +264,7 @@ u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
 };

-u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
+const u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
 	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01},	/*  0, -16.0dB*/
 	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/*   1, -15.5dB*/
 	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	/*  2, -15.0dB*/
@@ -300,7 +300,7 @@ u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
 	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}	/*  32, +0dB*/
 };

-u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
+const u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
 	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00},	/*  0, -16.0dB*/
 	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 1, -15.5dB*/
 	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/*  2, -15.0dB*/
@@ -336,7 +336,7 @@ u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
 	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}	/* 32, +0dB	*/
 };

-u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
+const u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 	0x0CD,          /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
@@ -381,7 +381,7 @@ u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 };

 /* JJ ADD 20161014 */
-u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
+const u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
 	0x0CD,          /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
@@ -426,7 +426,7 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
 };

 /* Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
-u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
+const u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
 	0x0CD,			 /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
@@ -471,7 +471,7 @@ u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
 };

 /* Winnita ADD 201805 PathA 0xAB4[10:0]*/
-u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = {
+const u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = {
 	0x0CD,			 /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
@@ -515,7 +515,7 @@ u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = {
 	0x7FF,
 };

-u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C] = {
+const u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C] = {
 	0x0CD,          /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
@@ -559,7 +559,7 @@ u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C] = {
 	0x7FF,
 };

-u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C] = {
+const u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C] = {
 	0x143,		/*0 ,    -4dB*/
 	0x14C,		/*1 ,    -3.75dB*/
 	0x156,		/*2 ,    -3.5dB*/
@@ -643,7 +643,7 @@ u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C] = {
 	0xCA3		/*80 ,    +16dB*/
 };

-u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C] = {
+const u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C] = {
 	0xE4,		/*0 ,    -7dB*/
 	0xEB,		/*1 ,    -6.75dB*/
 	0xF2,		/*2 ,    -6.5dB*/
@@ -729,7 +729,7 @@ u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C] = {



-u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
+const u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x081, /* 0,  -12.0dB*/
 	0x088, /* 1,  -11.5dB*/
 	0x090, /* 2,  -11.0dB*/
@@ -792,6 +792,7 @@ get_swing_index(
 	u32 *swing_table;
 	u32 table_value;

+#if (RTL8710C_SUPPORT == 1)
 	if (dm->support_ic_type == ODM_RTL8710C) {
 		bb_swing = odm_get_bb_reg(dm, R_0xcc8, 0x000007ff);

@@ -800,10 +801,10 @@ get_swing_index(
 				break;
 		}
 	}
-
+#elif (RTL8195B_SUPPORT == 1)
 	if (dm->support_ic_type == ODM_RTL8195B) {
 		bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000);
-		swing_table = tx_scaling_table_jaguar;
+		swing_table = (u32*)tx_scaling_table_jaguar;
 		swing_table_size = TXSCALE_TABLE_SIZE;

 		for (i = 0; i < swing_table_size; i++) {
@@ -814,7 +815,7 @@ get_swing_index(
 				break;
 		}
 	}
-
+#endif
 	return i;
 }

@@ -828,6 +829,7 @@ get_cck_swing_index(
 	u8 i = 0;
 	u32 bb_cck_swing;

+#if (RTL8188E_SUPPORT == 1 || RTL8723B_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
 	if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
 	    dm->support_ic_type == ODM_RTL8192E) {
 		bb_cck_swing = odm_read_1byte(dm, 0xa22);
@@ -836,14 +838,18 @@ get_cck_swing_index(
 			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
 				break;
 		}
-	} else if (dm->support_ic_type == ODM_RTL8703B) {
+	}
+#elif (RTL8703B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8703B) {
 		bb_cck_swing = odm_read_1byte(dm, 0xa22);

 		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
 			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
 				break;
 		}
-	} else if (dm->support_ic_type == ODM_RTL8710C) {
+	}
+#elif (RTL8710C_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8710C) {
 		bb_cck_swing = odm_get_bb_reg(dm, R_0xab4, 0x7ff);

 		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
@@ -854,10 +860,28 @@ get_cck_swing_index(
 				break;
 		}
 	}
+#endif

 	return i;
 }

+s8
+get_txagc_default_index(
+	void *dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 tmp;
+
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
+		if (tmp & BIT(6))
+			tmp = tmp | 0x80;
+		return tmp;
+	} else
+		return 0;
+}
+
 void
 odm_txpowertracking_thermal_meter_init(
 	void	*dm_void
--- a/hal/phydm/halrf/halrf_powertracking_iot.h
+++ b/hal/phydm/halrf/halrf_powertracking_iot.h
@@ -62,26 +62,26 @@
 #define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
 #endif

-extern	u32 ofdm_swing_table[OFDM_TABLE_SIZE];
-extern	u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
+extern const u32 ofdm_swing_table[OFDM_TABLE_SIZE];
+extern const u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
+extern const u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];

-extern	u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
-extern	u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
-extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
-extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
-extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+extern const u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
+extern const u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
+extern const u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
+extern const u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern const u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
+extern const u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern const u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
 /* JJ ADD 20161014 */
-extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
-extern	u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
-extern	u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D];
-extern  u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C];
-extern  u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C];
-extern  u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C];
+extern const u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
+extern const u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
+extern const u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D];
+extern const u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C];
+extern const u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C];
+extern const u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C];

-extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
+extern const u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];

 /* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
@@ -221,6 +221,7 @@ struct dm_rf_calibration_struct {
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
+	s8			default_txagc_index;
 	boolean			bb_swing_flag_cck;

 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
--- a/hal/phydm/halrf/halrf_powertracking_win.c
+++ b/hal/phydm/halrf/halrf_powertracking_win.c
@@ -532,8 +532,7 @@ get_swing_index(
 	if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
 	    dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || 
 	    dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || 
-	    dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B ||
-	    dm->support_ic_type == ODM_RTL8821) {
+	    dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) {
 		bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);

 		for (i = 0; i < OFDM_TABLE_SIZE; i++) {
@@ -588,6 +587,22 @@ get_cck_swing_index(
 	return i;
 }

+s8
+get_txagc_default_index(
+	void *dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 tmp;
+
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
+		if (tmp & BIT(6))
+			tmp = tmp | 0x80;
+		return tmp;
+	} else
+		return 0;
+}

 void
 odm_txpowertracking_thermal_meter_init(
@@ -662,8 +677,9 @@ odm_txpowertracking_thermal_meter_init(
 	cali_info->thermal_value_iqk	= hal_data->eeprom_thermal_meter;
 	cali_info->thermal_value_lck	= hal_data->eeprom_thermal_meter;

-#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
-	if (dm->support_ic_type == ODM_RTL8822C) {
+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822C || 
+	    dm->support_ic_type == ODM_RTL8723F) {
 		cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
 		cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
 		cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
@@ -683,8 +699,7 @@ odm_txpowertracking_thermal_meter_init(
 	if (cali_info->default_bb_swing_index_flag != true) {
 		/*The index of "0 dB" in SwingTable.*/
 		if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
-		    dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B ||
-		    dm->support_ic_type == ODM_RTL8821) {
+		    dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) {
 			cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
 			cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
 		} else if (dm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
@@ -704,6 +719,7 @@ odm_txpowertracking_thermal_meter_init(
 		} else {
 			cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
 			cali_info->default_cck_index = 24;
+			cali_info->default_txagc_index = get_txagc_default_index(dm);
 		}
 		cali_info->default_bb_swing_index_flag = true;
 	}
@@ -838,6 +854,12 @@ odm_txpowertracking_direct_call(
 	HAL_DATA_TYPE		*hal_data	= GET_HAL_DATA(((PADAPTER)adapter));
 	struct dm_struct			*dm = &hal_data->DM_OutSrc;

+	if (dm->support_ic_type & ODM_RTL8723F) {
+#if (RTL8723F_SUPPORT == 1)
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF]===>%s 8723F TSSI, return!\n", __func__);
+		return;
+#endif
+	}
 	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
 #if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
 		odm_txpowertracking_new_callback_thermal_meter(dm);
@@ -882,7 +904,12 @@ odm_txpowertracking_thermal_meter_check(
 			odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
 			odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
 			odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
-		} else
+		} else if (IS_HARDWARE_TYPE_8723F(adapter)) {
+			odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x01);
+			odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x00);
+			odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x01);
+		}
+		else
 			PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);

 		if (dm->support_ic_type & ODM_RTL8814B) {
--- a/hal/phydm/halrf/halrf_powertracking_win.h
+++ b/hal/phydm/halrf/halrf_powertracking_win.h
@@ -216,6 +216,7 @@ struct dm_rf_calibration_struct {
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
+	s8			default_txagc_index;
 	boolean			bb_swing_flag_cck;

 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
--- a/hal/phydm/halrf/halrf_psd.c
+++ b/hal/phydm/halrf/halrf_psd.c
@@ -260,19 +260,93 @@ void _halrf_psd_iqk_init(struct dm_struct *dm)
 	odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f);	
 }

-
-u32 halrf_get_iqk_psd_data(
-	struct dm_struct *dm,
-	u32 point)
+void _halrf_iqk_psd_init_8723f(void *dm_void,	 boolean onoff)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 s;
+
+	s = (u8)odm_get_bb_reg(dm, 0x1884, BIT(20));
+
+	if (onoff) {
+		/*01_8723F_AFE_ON_BB_settings.txt*/
+		odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
+		odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x0);
+		odm_set_bb_reg(dm, R_0x1860, 0xF0000000, 0xf);
+		odm_set_bb_reg(dm, R_0x1860, 0x0FFFF000, 0x0041);
+		odm_set_bb_reg(dm, 0x09f0, 0x0000FFFF, 0xbbbb);
+		odm_set_bb_reg(dm, 0x1d40, BIT(3), 0x1);
+		odm_set_bb_reg(dm, 0x1d40, 0x00000007, 0x3);
+		odm_set_bb_reg(dm, 0x09b4, 0x00000700, 0x3);
+		odm_set_bb_reg(dm, 0x09b4, 0x00003800, 0x3);
+		odm_set_bb_reg(dm, 0x09b4, 0x0001C000, 0x3);
+		odm_set_bb_reg(dm, 0x09b4, 0x000E0000, 0x3);
+		odm_set_bb_reg(dm, R_0x1c20, BIT(5), 0x1);
+		odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x0);
+		odm_set_bb_reg(dm, R_0x1e28, 0x0000000F, 0x1);
+		odm_set_bb_reg(dm, R_0x824, 0x000F0000, 0x1);
+		odm_set_bb_reg(dm, R_0x1cd0, 0xF0000000, 0x7);
+		odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x1);
+		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x1);
+		odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x1);
+		odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x1);
+		odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x1);
+		odm_set_bb_reg(dm, R_0x1e24, BIT(17), 0x1);
+		odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
+		odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffffffff);
+		/*02_IQK_Preset.txt*/
+		//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x0);
+		//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x0);
+		odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000080);
+		//odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x00000002);
+		//switch path  10 od 0x1b38 0x1/0x3 [1:0]
+		if (s == 0)
+			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x00000008);
+		else
+			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x0000000a);
+
+		odm_set_bb_reg(dm, R_0x1b18, MASKDWORD, 0x40010101);
+		odm_set_bb_reg(dm, R_0x1b14, MASKDWORD, 0x40010100);
+		//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
+		odm_set_bb_reg(dm, R_0x1b0c, 0x00000C00, 0x2);
+		odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x3f);	
+		//DbgPrint("[PSD][8723F]iqkpsd init!\n");
+	} else {
+		/*10_IQK_Reg_PSD_Restore.txt*/
+		//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
+		odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000000);
+		odm_set_bb_reg(dm, R_0x1b38, BIT(0), 0x0);
+		odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x0);	
+		//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x1);
+		//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x1);
+		/*11_8723F_restore_AFE_BB_settings.txt*/
+		odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
+		odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x1);
+		odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x1);
+		odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x0);
+		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x0);
+		odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x0);
+		odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x0);
+		odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x0);
+		odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
+		odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffa1005e);
+		//DbgPrint("[PSD][8723F]iqkpsd resotre!\n");
+	}
+}
+
+u64 halrf_get_iqk_psd_data(void *dm_void, u32 point)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	struct _hal_rf_ *rf = &(dm->rf_table);
 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
-	u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time = 0;
+	u64 psd_val, psd_val1, psd_val2;
+	u32 psd_point, i, delay_time = 0;

 #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
 	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
 		if (dm->support_ic_type & ODM_RTL8822C)
 			delay_time = 1000;
+		else if (dm->support_ic_type & ODM_RTL8723F)
+			delay_time = 1000;
 		else
 			delay_time = 0;
 	}
@@ -320,6 +394,14 @@ u32 halrf_get_iqk_psd_data(
 		psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);

 		psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
+	} else if (dm->support_ic_type & ODM_RTL8723F) {
+		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00210001);
+		psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
+		psd_val1 = (psd_val1 & 0x00FF0000) >> 16;
+		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00220001);
+		psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
+		//psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
+		psd_val = (psd_val1 << 32) + psd_val2;
 	} else {
 		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);

@@ -357,8 +439,8 @@ void halrf_iqk_psd(
 	mode = average >> 16;

 	if (mode == 2) {
-		if (dm->support_ic_type & ODM_RTL8822C)
-			average_tmp = 1;
+		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F))
+			average_tmp = 1; //HW average
 		else {
 			reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
 			if (reg_tmp == 0)
@@ -381,18 +463,22 @@ void halrf_iqk_psd(
 			average_tmp = 16;
 		else if (reg_tmp == 5)
 			average_tmp = 32;
+#ifndef RTL8723F_SUPPORT
 		odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
+#endif
 	}

 #if 0
 	DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n",
-		point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
+				point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
 #endif

 	for (i = 0; i < psd->buf_size; i++)
 		psd->psd_data[i] = 0;

 	i = start_point;
+
+#ifndef RTL8723F_SUPPORT
 	while (i < stop_point) {
 		data_tatal = 0;

@@ -431,13 +517,32 @@ void halrf_iqk_psd(

 	if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G))
 		odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp);
+#else
+	while (i < stop_point) {
+		data_tatal = 0;

+		if (i >= point)
+			point_temp = i - point;
+		else
+			point_temp = i + 0xB00;
+		//-640:0xD80,640:0x280,0x280+0xB00 =0xD80
+			//point_temp = i + 0xC00;
+		//-512:0xE00,512:0x200,0x200+0xC00 = 0xE00
+
+		data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
+		data_tatal = data_temp[k];
+		psd->psd_data[j] = (u32)data_tatal;
+		i++;
+		j++;
+	}
+
+#endif
 #if 0
 	DbgPrint("\n [iqk psd]psd result:\n");

 	for (i = 0; i < psd->buf_size; i++) {
 		if ((i % 20) == 0)
-			DbgPrint("\n ");
+		DbgPrint("\n ");

 		DbgPrint("0x%x ", psd->psd_data[i]);
 	}
@@ -454,19 +559,30 @@ halrf_psd_init(
 	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	struct _hal_rf_ *rf = &(dm->rf_table);
 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
-
+#ifndef RTL8723F_SUPPORT
 #if 0
 	u32 bb_backup[12];
 	u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18,
 				0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34,
 				0x1bd4, 0x1bfc};
 #endif
-
+#else
+	u32 bb_backup[11];
+	u32 backup_bb_reg[11] = {0x09f0, 0x09b4, 0x1c38, 0x1860, 0x1cd0,
+				 0x824, 0x2a24, 0x1d40, 0x1c20, 0x1880, 0x180c};
+#endif
 	if (psd->psd_progress) {
 		ret_status = RT_STATUS_PENDING;
 	} else {
 		psd->psd_progress = 1;
-		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) {
+		if (dm->support_ic_type & ODM_RTL8723F) {
+			backup_bb_register(dm, bb_backup, backup_bb_reg, 11);
+			_halrf_iqk_psd_init_8723f(dm, true);
+			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
+			_halrf_iqk_psd_init_8723f(dm, false);
+			restore_bb_register(dm, bb_backup, backup_bb_reg, 11);
+		} else if (dm->support_ic_type & 
+		(ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) {
 			/*backup_bb_register(dm, bb_backup, backup_bb_reg, 12);*/
 			_halrf_psd_iqk_init(dm);
 			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
--- a/hal/phydm/halrf/halrf_psd.h
+++ b/hal/phydm/halrf/halrf_psd.h
@@ -31,6 +31,16 @@ u32
 halrf_psd_init(
 	void *dm_void);

+void
+_halrf_iqk_psd_init_8723f(
+	void *dm_void,
+	boolean onoff);
+
+u64
+halrf_get_iqk_psd_data(
+	void *dm_void,
+	u32 point);
+
 u32
 halrf_psd_query(
 	void *dm_void,
--- a/hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.c
+++ b/hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.c
@@ -23,11 +23,9 @@
 *
 *****************************************************************************/

-/*Image2HeaderVersion: R3 1.5.10*/
+/*Image2HeaderVersion: R3 1.5.8*/
 #include "mp_precomp.h"

-#define ODM_WIN 0x08
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if RT_PLATFORM == PLATFORM_MACOSX
 #include "phydm_precomp.h"
--- a/hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.h
+++ b/hal/phydm/halrf/rtl8822b/halhwimg8822b_rf.h
@@ -23,7 +23,7 @@
 *
 *****************************************************************************/

-/*Image2HeaderVersion: R3 1.5.10*/
+/*Image2HeaderVersion: R3 1.5.8*/
 #if (RTL8822B_SUPPORT == 1)
 #ifndef __INC_MP_RF_HW_IMG_8822B_H
 #define __INC_MP_RF_HW_IMG_8822B_H
--- a/hal/phydm/halrf/rtl8822b/halrf_8822b.c
+++ b/hal/phydm/halrf/rtl8822b/halrf_8822b.c
@@ -458,11 +458,13 @@ void _phy_lc_calibrate_8822b(struct dm_struct *dm)
 	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK,
 		       lc_cal | 0x08000);
 	ODM_delay_ms(100);
-	for (cnt = 0; cnt < 100; cnt++) {
+	for (cnt = 0; cnt < 5; cnt++) {
 		if (odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
 			break;
 		ODM_delay_ms(10);
 	}
+	if (cnt == 5)
+		RF_DBG(dm, DBG_RF_LCK, "LCK time out\n");
 	/*Recover channel number*/
 	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
 	/*enable RTK*/
--- a/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.c
+++ b/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.c
@@ -44,10 +44,10 @@ void phydm_get_read_counter_8822b(struct dm_struct *dm)

 	while (1) {
 		rf_reg = odm_get_rf_reg(dm, RF_PATH_A, RF_0x8, MASK20BITS);
-		if (rf_reg == 0xabcde || counter > 300)
+		if (rf_reg == 0xabcde || counter > 20000)
 			break;
 		counter++;
-		ODM_delay_ms(1);
+		ODM_delay_us(10);
 	}

 	odm_set_rf_reg(dm, RF_PATH_A, RF_0x8, MASK20BITS, 0x0);
@@ -184,11 +184,8 @@ void _iqk_fill_iqk_report_8822b(void *dm_void, u8 ch)
 	odm_write_4byte(dm, 0x1b00, 0xf8000008);
 	odm_set_bb_reg(dm, R_0x1bf0, 0x0000ffff, tmp1 | tmp2 | tmp3);

-	for (i = 0; i < 2; i++) {
-		data = ((iqk->rxiqk_agc[ch][(i * 2) + 1] << 16) |
-			iqk->rxiqk_agc[ch][i * 2]);
-		odm_write_4byte(dm, 0x1be8 + (i * 4), data);
-	}
+	data = (iqk->rxiqk_agc[ch][1] << 16) | iqk->rxiqk_agc[ch][0];
+	odm_write_4byte(dm, 0x1be8, data);
 }

 void _iqk_fail_count_8822b(void *dm_void)
@@ -298,11 +295,11 @@ void _iqk_bb_reset_8822b(struct dm_struct *dm)
 		odm_set_bb_reg(dm, R_0x198c, 0x7, 0x7);
 		cca_ing = (boolean)odm_get_bb_reg(dm, R_0xfa0, BIT(3));

-		if (count > 30)
+		if (count > 20000)
 			cca_ing = false;

 		if (cca_ing) {
-			ODM_delay_ms(1);
+			ODM_delay_us(10);
 			count++;
 		} else {
 			/*RX ant off*/
@@ -404,7 +401,7 @@ void _iqk_backup_iqk_8822b_subfunction(struct dm_struct *dm)
 	u8 i, j, k;

 	iqk->iqk_channel[1] = iqk->iqk_channel[0];
-	for (i = 0; i < 2; i++) {
+	for (i = 0; i < SS_8822B; i++) {
 		iqk->lok_idac[1][i] = iqk->lok_idac[0][i];
 		iqk->rxiqk_agc[1][i] = iqk->rxiqk_agc[0][i];
 		iqk->bypass_iqk[1][i] = iqk->bypass_iqk[0][i];
@@ -431,7 +428,7 @@ void _iqk_backup_iqk_8822b(struct dm_struct *dm, u8 step, u8 path)
 	case 0:
 		_iqk_backup_iqk_8822b_subfunction(dm);

-		for (i = 0; i < 4; i++) {
+		for (i = 0; i < SS_8822B; i++) {
 			iqk->rxiqk_fail_code[0][i] = 0x0;
 			iqk->rxiqk_agc[0][i] = 0x0;
 			for (j = 0; j < 2; j++) {
@@ -467,7 +464,7 @@ void _iqk_reload_iqk_setting_8822b(struct dm_struct *dm, u8 ch,
 	u32 bmask20_16 = (BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16));
 	boolean report;

-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		if (reload_idx == 2) {
 #if 0
 			/*odm_set_rf_reg(dm, (enum rf_path)path, RF_0xdf, BIT(4), 0x1);*/
@@ -584,7 +581,7 @@ void _iqk_rf_setting_8822b(struct dm_struct *dm)
 	odm_write_4byte(dm, 0x1b00, 0xf8000008);
 	odm_write_4byte(dm, 0x1bb8, 0x00000000);

-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		/*0xdf:B11 = 1,B4 = 0, B1 = 1*/
 		tmp = odm_get_rf_reg(dm, (enum rf_path)path,
 				     RF_0xdf, MASK20BITS);
@@ -830,11 +827,11 @@ _iqk_check_cal_8822b(struct dm_struct *dm, u8 path, u8 cmd)
 					odm_get_bb_reg(dm, R_0x1b08, BIT(26));
 			notready = false;
 		} else {
-			ODM_delay_ms(1);
+			ODM_delay_us(10);
 			delay_count++;
 		}

-		if (delay_count >= 50) {
+		if (delay_count >= 20000) {
 			fail = true;
 			RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK timeout!!!\n");
 			break;
@@ -864,7 +861,7 @@ _iqk_rxk_gsearch_fail_8822b(struct dm_struct *dm, u8 path, u8 step)
 		_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
 		odm_write_4byte(dm, 0x1b00, IQK_CMD);
 		odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
-		ODM_delay_ms(GS_delay_8822B);
+		ODM_delay_us(10);
 		fail = _iqk_check_cal_8822b(dm, path, 0x1);
 		_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);
 	} else if (step == RXIQK2) {
@@ -872,6 +869,10 @@ _iqk_rxk_gsearch_fail_8822b(struct dm_struct *dm, u8 path, u8 step)
 			if (iqk->tmp1bcc == IQMUX[idx])
 				break;
 		}
+		if (idx == 4) {
+			RF_DBG(dm, DBG_RF_IQK, "[IQK] rx_gs overflow\n");
+			return fail;
+		}
 		odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1);
 		odm_write_4byte(dm, 0x1bcc, iqk->tmp1bcc);

@@ -882,7 +883,7 @@ _iqk_rxk_gsearch_fail_8822b(struct dm_struct *dm, u8 path, u8 step)
 		_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
 		odm_write_4byte(dm, 0x1b00, IQK_CMD);
 		odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
-		ODM_delay_ms(GS_delay_8822B);
+		ODM_delay_us(10);
 		fail = _iqk_check_cal_8822b(dm, path, 0x1);
 		_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);

@@ -950,7 +951,7 @@ _lok_one_shot_8822b(void *dm_void, u8 path)
 	odm_write_4byte(dm, 0x1b00, IQK_CMD + 1);
 	/*LOK: CMD ID = 0	{0xf8000018, 0xf8000028}*/
 	/*LOK: CMD ID = 0	{0xf8000019, 0xf8000029}*/
-	ODM_delay_ms(LOK_delay_8822B);
+	ODM_delay_us(10);
 	LOK_notready = _iqk_check_cal_8822b(dm, path, 0x0);
 	_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);

@@ -1023,7 +1024,7 @@ _iqk_one_shot_8822b(void *dm_void, u8 path, u8 idx)
 	_iqk_ltec_write_8822b(dm, 0x38, 0xffff,0x7700);
 	odm_write_4byte(dm, 0x1b00, IQK_CMD);
 	odm_write_4byte(dm, 0x1b00, IQK_CMD + 0x1);
-	ODM_delay_ms(WBIQK_delay_8822B);
+	ODM_delay_us(10);
 	fail = _iqk_check_cal_8822b(dm, path, 0x1);
 	_iqk_ltec_write_8822b(dm, 0x38, MASKDWORD, iqk->tmp_gntwl);

@@ -1297,7 +1298,7 @@ void _iqk_iqk_by_path_8822b(void *dm_void, boolean segment_iqk)
 			       "[IQK]B_GS1_retry = %d B_GS2_retry = %d\n",
 			       iqk->gs_retry_count[0][RF_PATH_B][0],
 			       iqk->gs_retry_count[0][RF_PATH_B][1]);
-			for (i = 0; i < 2; i++) {
+			for (i = 0; i < SS_8822B; i++) {
 				odm_write_4byte(dm, 0x1b00,
 						0xf8000008 | i << 1);
 				odm_write_4byte(dm, 0x1b2c, 0x7);
@@ -1425,7 +1426,7 @@ u32 _iqk_tximr_selfcheck_8822b(void *dm_void, u8 tone_index, u8 path)
 	odm_write_4byte(dm, 0x1b38, 0x20000000);
 	odm_write_4byte(dm, 0x1b3c, 0x20000000);
 	/* ======derive pwr1========*/
-	for (i = 0; i < 2; i++) {
+	for (i = 0; i < SS_8822B; i++) {
 		odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1);
 		if (i == 0)
 			odm_write_4byte(dm, 0x1bcc, 0x0f);
@@ -1463,7 +1464,7 @@ void _iqk_start_tximr_test_8822b(struct dm_struct *dm, u8 imr_limit)
 	u8 path, i, tone_index;
 	u32 imr_result;

-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		_iqk_txk_setting_8822b(dm, path);
 		KFAIL = _iqk_one_shot_8822b(dm, path, TXIQK);
 		for (i = 0x0; i < imr_limit; i++) {
@@ -1765,7 +1766,7 @@ void _iqk_start_rximr_test_8822b(struct dm_struct *dm, u8 imr_limit)
 {
 	u8 path;

-	for (path = 0; path < 2; path++)
+	for (path = 0; path < SS_8822B; path++)
 		_iqk_rximr_test_8822b(dm, path, imr_limit);
 }

@@ -1800,6 +1801,7 @@ void _phy_iq_calibrate_8822b(struct dm_struct *dm, boolean reset,
 					       0xc5c, 0xc6c, 0xe58, 0xe5c,
 					       0xe6c};
 	u32 backup_rf_reg[RF_REG_NUM_8822B] = {0xdf, 0x8f, 0x65, 0x0, 0x1};
+	u32 i;
 	boolean is_mp = false;

 	struct dm_iqk_info *iqk = &dm->IQK_info;
@@ -1817,7 +1819,7 @@ void _phy_iq_calibrate_8822b(struct dm_struct *dm, boolean reset,
 	       "[IQK]band_type=%s band_width=%d ExtPA2G=%d ext_pa_5g=%d\n",
 	       (*dm->band_type == ODM_BAND_5G) ? "5G" : "2G", *dm->band_width,
 	       dm->ext_pa, dm->ext_pa_5g);
-	RF_DBG(dm, DBG_RF_IQK, "[IQK]Interface = %d, cut_version = %x\n",
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]Interface = %d, Cv = %x\n",
 	       dm->support_interface, dm->cut_version);

 	iqk->iqk_times++;
@@ -1853,7 +1855,8 @@ void _phy_iq_calibrate_8822b(struct dm_struct *dm, boolean reset,
 			break;
 		iqk->kcount = 0;
 		RF_DBG(dm, DBG_RF_IQK, "[IQK]delay 50ms!!!\n");
-		ODM_delay_ms(50);
+		for (i = 0; i < 5000; i++)
+			ODM_delay_us(10);
 	};
 	if (segment_iqk)
 		_iqk_reload_iqk_setting_8822b(dm, 0x0, 0x1);
@@ -1889,17 +1892,17 @@ void _phy_iq_calibrate_by_fw_8822b(void *dm_void, u8 clear, u8 segment_iqk)
 		RF_DBG(dm, DBG_RF_IQK, "[IQK]FWIQK fail!!!\n");
 }

-/*IQK_version:0x2f, NCTL:0x8*/
-/*1.disable CCK block and OFDM CCA block while IQKing*/
 void phy_iq_calibrate_8822b(void *dm_void, boolean clear, boolean segment_iqk)
 {
 	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i;

 	if (*dm->mp_mode)
 		halrf_iqk_hwtx_check(dm, true);
-	/*FW IQK*/
 	if (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) {
 		_phy_iq_calibrate_by_fw_8822b(dm, clear, (u8)(segment_iqk));
+		for (i = 0; i < 100; i++)
+			ODM_delay_us(10);
 		phydm_get_read_counter_8822b(dm);
 		halrf_iqk_check_if_reload(dm);
 	} else {
@@ -1982,8 +1985,8 @@ void phy_get_iqk_cfir_8822b(void *dm_void, u8 idx, u8 path, boolean debug)
 		odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
 		tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
 		iqk_info->iqk_cfir_real[ch][path][idx][i] =
-						(tmp & 0x0fff0000) >> 16;
-		iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0xfff;
+						(u16)((tmp & 0x0fff0000) >> 16);
+		iqk_info->iqk_cfir_imag[ch][path][idx][i] = (u16)tmp & 0xfff;
 	}
 	odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
 	odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x0);
@@ -1997,11 +2000,11 @@ void phy_iqk_dbg_cfir_backup_8822b(void *dm_void)

 	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");

-	for (path = 0; path < 2; path++)
+	for (path = 0; path < SS_8822B; path++)
 		for (idx = 0; idx < 2; idx++)
 			phydm_get_iqk_cfir(dm, idx, path, true);

-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		for (idx = 0; idx < 2; idx++) {
 			for (i = 0; i < 8; i++) {
 				RF_DBG(dm, DBG_RF_IQK,
@@ -2036,7 +2039,7 @@ void phy_iqk_dbg_cfir_backup_update_8822b(void *dm_void)
 		RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
 		return;
 	}
-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		for (idx = 0; idx < 2; idx++) {
 			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
 				       0xf8000008 | path << 1);
@@ -2083,7 +2086,7 @@ void phy_iqk_dbg_cfir_reload_8822b(void *dm_void)
 		RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
 		return;
 	}
-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		for (idx = 0; idx < 2; idx++) {
 			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
 				       0xf8000008 | path << 1);
@@ -2137,7 +2140,7 @@ void phy_iqk_dbg_cfir_backup_show_8822b(void *dm_void)

 	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");

-	for (path = 0; path < 2; path++) {
+	for (path = 0; path < SS_8822B; path++) {
 		for (idx = 0; idx < 2; idx++) {
 			for (i = 0; i < 8; i++) {
 				RF_DBG(dm, DBG_RF_IQK,