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RTL88x2B Driver from Realtek. Version: 5.3.1

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Rin Cat
2018-11-23 15:19:44 -05:00
commit 95374e485a
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73
hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_8822B_CFG_H_
#define _HALMAC_8822B_CFG_H_
#include "../../halmac_hw_cfg.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822B_SUPPORT
#define TX_FIFO_SIZE_8822B 262144
#define RX_FIFO_SIZE_8822B 24576
#define TRX_SHARE_SIZE_8822B 65536
#define RX_DESC_DUMMY_SIZE_8822B 72 /* 8 * 9 Bytes */
#define RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B 80 /* 8 Byte alignment*/
/* should be 8 Byte alignment*/
#if (HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE <= \
RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B)
#define RX_FIFO_EXPANDING_UNIT_8822B (RX_DESC_SIZE_88XX + \
RX_DESC_DUMMY_SIZE_8822B + HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE)
#else
#define RX_FIFO_EXPANDING_UNIT_8822B (RX_DESC_SIZE_88XX + \
RX_DESC_DUMMY_SIZE_8822B + RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B)
#endif
#define TX_FIFO_SIZE_LA_8822B (TX_FIFO_SIZE_8822B >> 1)
#define TX_FIFO_SIZE_RX_EXPAND_1BLK_8822B \
(TX_FIFO_SIZE_8822B - TRX_SHARE_SIZE_8822B)
#define RX_FIFO_SIZE_RX_EXPAND_1BLK_8822B \
((((RX_FIFO_EXPANDING_UNIT_8822B << 8) - 1) >> 10) << 10)
#define TX_FIFO_SIZE_RX_EXPAND_2BLK_8822B \
(TX_FIFO_SIZE_8822B - (2 * TRX_SHARE_SIZE_8822B))
#define RX_FIFO_SIZE_RX_EXPAND_2BLK_8822B \
(RX_FIFO_SIZE_8822B + (2 * TRX_SHARE_SIZE_8822B))
#define TX_FIFO_SIZE_RX_EXPAND_3BLK_8822B \
(TX_FIFO_SIZE_8822B - (3 * TRX_SHARE_SIZE_8822B))
#define RX_FIFO_SIZE_RX_EXPAND_3BLK_8822B \
(RX_FIFO_SIZE_8822B + (3 * TRX_SHARE_SIZE_8822B))
#define EFUSE_SIZE_8822B 1024
#define EEPROM_SIZE_8822B 768
#define BT_EFUSE_SIZE_8822B 128
#define SEC_CAM_NUM_8822B 64
#define OQT_ENTRY_AC_8822B 32
#define OQT_ENTRY_NOAC_8822B 32
#define MACID_MAX_8822B 128
#define WLAN_FW_IRAM_MAX_SIZE_8822B 196608
#define WLAN_FW_DRAM_MAX_SIZE_8822B 49152
#define WLAN_FW_ERAM_MAX_SIZE_8822B 0
#define WLAN_FW_MAX_SIZE_8822B (WLAN_FW_IRAM_MAX_SIZE_8822B + \
WLAN_FW_DRAM_MAX_SIZE_8822B + WLAN_FW_ERAM_MAX_SIZE_8822B)
#endif /* HALMAC_8822B_SUPPORT*/
#endif

168
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_cfg_wmac_8822b.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_8822B_SUPPORT
/**
* cfg_drv_info_8822b() - config driver info
* @adapter : the adapter of halmac
* @drv_info : driver information selection
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_drv_info_8822b(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info)
{
u8 drv_info_size = 0;
u8 phy_status_en = 0;
u8 sniffer_en = 0;
u8 plcp_hdr_en = 0;
u8 value8;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_mac_rx_ignore_cfg cfg;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
switch (drv_info) {
case HALMAC_DRV_INFO_NONE:
drv_info_size = 0;
phy_status_en = 0;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_STATUS:
drv_info_size = 4;
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_SNIFFER:
drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
phy_status_en = 1;
sniffer_en = 1;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_PLCP:
drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 1;
cfg.hdr_chk_en = _FALSE;
break;
default:
return HALMAC_RET_SW_CASE_NOT_SUPPORT;
}
if (adapter->txff_alloc.rx_fifo_exp_mode !=
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
drv_info_size = RX_DESC_DUMMY_SIZE_8822B >> 3;
api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
value8 = HALMAC_REG_R8(REG_TRXFF_BNDY + 1);
value8 &= 0xF0;
/* For rxdesc len = 0 issue */
value8 |= 0xF;
HALMAC_REG_W8(REG_TRXFF_BNDY + 1, value8);
adapter->drv_info_size = drv_info_size;
value32 = HALMAC_REG_R32(REG_RCR);
value32 = (value32 & (~BIT_APP_PHYSTS));
if (phy_status_en == 1)
value32 = value32 | BIT_APP_PHYSTS;
HALMAC_REG_W32(REG_RCR, value32);
value32 = HALMAC_REG_R32(REG_WMAC_OPTION_FUNCTION + 4);
value32 = (value32 & (~(BIT(8) | BIT(9))));
if (sniffer_en == 1)
value32 = value32 | BIT(9);
if (plcp_hdr_en == 1)
value32 = value32 | BIT(8);
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 4, value32);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_low_pwr_8822b() - config WMAC register
* @adapter
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_low_pwr_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
void
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_BBPSF_CTRL);
/*mac header check enable*/
if (cfg->hdr_chk_en == _TRUE)
value8 |= BIT_BBPSF_MHCHKEN | BIT_BBPSF_MPDUCHKEN;
else
value8 &= ~(BIT_BBPSF_MHCHKEN) & (~(BIT_BBPSF_MPDUCHKEN));
HALMAC_REG_W8(REG_BBPSF_CTRL, value8);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
}
enum halmac_ret_status
cfg_ampdu_8822b(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (cfg->ht_max_len != cfg->vht_max_len) {
PLTFM_MSG_ERR("[ERR]max len ht != vht!!\n");
return HALMAC_RET_PARA_NOT_SUPPORT;
}
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 2, cfg->max_agg_num);
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 3, cfg->max_agg_num);
if (cfg->max_len_en == 1)
HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH, cfg->ht_max_len);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

40
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_CFG_WMAC_8822B_H_
#define _HALMAC_CFG_WMAC_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
cfg_drv_info_8822b(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info);
enum halmac_ret_status
init_low_pwr_8822b(struct halmac_adapter *adapter);
void
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg);
enum halmac_ret_status
cfg_ampdu_8822b(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg);
#endif/* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_CFG_WMAC_8822B_H_ */

168
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_8822b_cfg.h"
#include "halmac_common_8822b.h"
#include "../halmac_common_88xx.h"
#include "halmac_cfg_wmac_8822b.h"
#if HALMAC_8822B_SUPPORT
static void
cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable);
/**
* get_hw_value_8822b() -get hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to query
* @pvalue : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]%s (NULL ==pvalue)\n", __func__);
return HALMAC_RET_NULL_POINTER;
}
if (get_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_FW_MAX_SIZE:
*(u32 *)value = WLAN_FW_MAX_SIZE_8822B;
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* set_hw_value_8822b() -set hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to config
* @pvalue : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]null pointer\n");
return HALMAC_RET_NULL_POINTER;
}
if (set_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_AMPDU_CONFIG:
status = cfg_ampdu_8822b(adapter,
(struct halmac_ampdu_config *)value);
break;
case HALMAC_HW_SDIO_TX_FORMAT:
break;
case HALMAC_HW_RXGCK_FIFO:
break;
case HALMAC_HW_RX_IGNORE:
cfg_rx_ignore_8822b(adapter,
(struct halmac_mac_rx_ignore_cfg *)value);
break;
case HALMAC_HW_LDO25_EN:
cfg_ldo25_8822b(adapter, *(u8 *)value);
break;
case HALMAC_HW_PCIE_REF_AUTOK:
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return status;
}
/**
* halmac_fill_txdesc_check_sum_88xx() - fill in tx desc check sum
* @adapter : the adapter of halmac
* @txdesc : tx desc packet
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
{
u16 chksum = 0;
u16 *data = (u16 *)NULL;
u32 i;
if (!txdesc) {
PLTFM_MSG_ERR("[ERR]null pointer");
return HALMAC_RET_NULL_POINTER;
}
if (adapter->tx_desc_checksum != _TRUE)
PLTFM_MSG_TRACE("[TRACE]chksum disable");
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000);
data = (u16 *)(txdesc);
/* HW clculates only 32byte */
for (i = 0; i < 8; i++)
chksum ^= (*(data + 2 * i) ^ *(data + (2 * i + 1)));
/* *(data + 2 * i) & *(data + (2 * i + 1) have endain issue*/
/* Process eniadn issue after checksum calculation */
chksum = rtk_le16_to_cpu(chksum);
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, chksum);
return HALMAC_RET_SUCCESS;
}
static void
cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_LDO_EFUSE_CTRL + 3);
if (enable == _TRUE)
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 | BIT(7)));
else
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 & ~BIT(7)));
}
#endif /* HALMAC_8822B_SUPPORT */

36
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_COMMON_8822B_H_
#define _HALMAC_COMMON_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
get_hw_value_8822b(struct halmac_adapter *adapter,
enum halmac_hw_id hw_id, void *value);
enum halmac_ret_status
set_hw_value_8822b(struct halmac_adapter *adapter,
enum halmac_hw_id hw_id, void *value);
enum halmac_ret_status
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc);
#endif/* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_COMMON_8822B_H_ */

831
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_gpio_8822b.h"
#include "../halmac_gpio_88xx.h"
#if HALMAC_8822B_SUPPORT
/* GPIO0 definition */
#define GPIO0_BT_GPIO0_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO0_BT_ACT_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x41, BIT(1), 0}
#define GPIO0_WL_ACT_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO0_WLMAC_DBG_GPIO0_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO0_WLPHY_DBG_GPIO0_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO0_BT_DBG_GPIO0_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO0_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO1 definition */
#define GPIO1_BT_GPIO1_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO1_BT_3DD_SYNC_A_8822B \
{HALMAC_BT_3DDLS_A, HALMAC_GPIO1, HALMAC_GPIO_IN, \
0x66, BIT(2), BIT(2)}
#define GPIO1_WL_CK_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO1_BT_CK_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO1_WLMAC_DBG_GPIO1_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO1_WLPHY_DBG_GPIO1_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO1_BT_DBG_GPIO1_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO1_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO2 definition */
#define GPIO2_BT_GPIO2_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO2_WL_STATE_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO2_BT_STATE_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO2_WLMAC_DBG_GPIO2_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO2_WLPHY_DBG_GPIO2_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO2_BT_DBG_GPIO2_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO2_RFE_CTRL_5_8822B \
{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(2), BIT(2)}
#define GPIO2_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO3 definition */
#define GPIO3_BT_GPIO3_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO3_WL_PRI_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO3_BT_PRI_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO3_WLMAC_DBG_GPIO3_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO3_WLPHY_DBG_GPIO3_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO3_BT_DBG_GPIO3_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO3_RFE_CTRL_4_8822B \
{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(2), BIT(2)}
#define GPIO3_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO4 definition */
#define GPIO4_BT_SPI_D0_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO4_WL_SPI_D0_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO4_SDIO_INT_8822B \
{HALMAC_SDIO_INT, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x72, BIT(2), BIT(2)}
#define GPIO4_JTAG_TRST_8822B \
{HALMAC_JTAG, HALMAC_GPIO4, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO4_DBG_GNT_WL_8822B \
{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x73, BIT(3), BIT(3)}
#define GPIO4_WLMAC_DBG_GPIO4_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO4_WLPHY_DBG_GPIO4_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO4_BT_DBG_GPIO4_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO4_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO5 definition */
#define GPIO5_BT_SPI_D1_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO5_WL_SPI_D1_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO5_JTAG_TDI_8822B \
{HALMAC_JTAG, HALMAC_GPIO5, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO5_DBG_GNT_BT_8822B \
{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x73, BIT(3), BIT(3)}
#define GPIO5_WLMAC_DBG_GPIO5_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO5_WLPHY_DBG_GPIO5_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO5_BT_DBG_GPIO5_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO5_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO6 definition */
#define GPIO6_BT_SPI_D2_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO6_WL_SPI_D2_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO6_EEDO_8822B \
{HALMAC_EEPROM, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x40, BIT(4), BIT(4)}
#define GPIO6_JTAG_TDO_8822B \
{HALMAC_JTAG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x67, BIT(0), BIT(0)}
#define GPIO6_BT_3DD_SYNC_B_8822B \
{HALMAC_BT_3DDLS_B, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x67, BIT(1), BIT(1)}
#define GPIO6_BT_GPIO18_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x67, BIT(1), BIT(1)}
#define GPIO6_SIN_8822B \
{HALMAC_WL_UART, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x41, BIT(0), BIT(0)}
#define GPIO6_WLMAC_DBG_GPIO6_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO6_WLPHY_DBG_GPIO6_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO6_BT_DBG_GPIO6_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO6_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO7 definition */
#define GPIO7_BT_SPI_D3_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO7_WL_SPI_D3_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO7_EEDI_8822B \
{HALMAC_EEPROM, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(4), BIT(4)}
#define GPIO7_JTAG_TMS_8822B \
{HALMAC_JTAG, HALMAC_GPIO7, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO7_BT_GPIO16_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x67, BIT(2), BIT(2)}
#define GPIO7_SOUT_8822B \
{HALMAC_WL_UART, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x41, BIT(0), BIT(0)}
#define GPIO7_WLMAC_DBG_GPIO7_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO7_WLPHY_DBG_GPIO7_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO7_BT_DBG_GPIO7_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO7_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO8 definition */
#define GPIO8_WL_EXT_WOL_8822B \
{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO8, HALMAC_GPIO_IN, \
0x4a, BIT(0) | BIT(1), BIT(0) | BIT(1)}
#define GPIO8_WL_LED_8822B \
{HALMAC_WL_LED, HALMAC_GPIO8, HALMAC_GPIO_OUT, \
0x4e, BIT(5), BIT(5)}
#define GPIO8_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO8, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO9 definition */
#define GPIO9_DIS_WL_N_8822B \
{HALMAC_WL_HWPDN, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x68, BIT(3) | BIT(0), BIT(3) | BIT(0)}
#define GPIO9_WL_EXT_WOL_8822B \
{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x4a, BIT(0) | BIT(1), BIT(0)}
#define GPIO9_USCTS0_8822B \
{HALMAC_UART0, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x66, BIT(6), BIT(6)}
#define GPIO9_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO9, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO10 definition */
#define GPIO10_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO10, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO11 definition */
#define GPIO11_DIS_BT_N_8822B \
{HALMAC_BT_HWPDN, HALMAC_GPIO11, HALMAC_GPIO_IN, \
0x6a, BIT(0), BIT(0)}
#define GPIO11_USOUT0_8822B \
{HALMAC_UART0, HALMAC_GPIO11, HALMAC_GPIO_OUT, \
0x66, BIT(6), BIT(6)}
#define GPIO11_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO11, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO12 definition */
#define GPIO12_USIN0_8822B \
{HALMAC_UART0, HALMAC_GPIO12, HALMAC_GPIO_IN, \
0x66, BIT(6), BIT(6)}
#define GPIO12_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO12, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO13 definition */
#define GPIO13_BT_WAKE_8822B \
{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO13, HALMAC_GPIO_IN, \
0x4e, BIT(6), BIT(6)}
#define GPIO13_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO13, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO14 definition */
#define GPIO14_UART_WAKE_8822B \
{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO14, HALMAC_GPIO_OUT, \
0x4e, BIT(6), BIT(6)}
#define GPIO14_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO14, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO15 definition */
#define GPIO15_EXT_XTAL_8822B \
{HALMAC_EXT_XTAL, HALMAC_GPIO15, HALMAC_GPIO_OUT, \
0x66, BIT(7), BIT(7)}
#define GPIO15_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO15, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
GPIO0_BT_GPIO0_8822B,
GPIO0_BT_ACT_8822B,
GPIO0_WL_ACT_8822B,
GPIO0_WLMAC_DBG_GPIO0_8822B,
GPIO0_WLPHY_DBG_GPIO0_8822B,
GPIO0_BT_DBG_GPIO0_8822B,
GPIO0_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
GPIO1_BT_GPIO1_8822B,
GPIO1_BT_3DD_SYNC_A_8822B,
GPIO1_WL_CK_8822B,
GPIO1_BT_CK_8822B,
GPIO1_WLMAC_DBG_GPIO1_8822B,
GPIO1_WLPHY_DBG_GPIO1_8822B,
GPIO1_BT_DBG_GPIO1_8822B,
GPIO1_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
GPIO2_BT_GPIO2_8822B,
GPIO2_WL_STATE_8822B,
GPIO2_BT_STATE_8822B,
GPIO2_WLMAC_DBG_GPIO2_8822B,
GPIO2_WLPHY_DBG_GPIO2_8822B,
GPIO2_BT_DBG_GPIO2_8822B,
GPIO2_RFE_CTRL_5_8822B,
GPIO2_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
GPIO3_BT_GPIO3_8822B,
GPIO3_WL_PRI_8822B,
GPIO3_BT_PRI_8822B,
GPIO3_WLMAC_DBG_GPIO3_8822B,
GPIO3_WLPHY_DBG_GPIO3_8822B,
GPIO3_BT_DBG_GPIO3_8822B,
GPIO3_RFE_CTRL_4_8822B,
GPIO3_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
GPIO4_BT_SPI_D0_8822B,
GPIO4_WL_SPI_D0_8822B,
GPIO4_SDIO_INT_8822B,
GPIO4_JTAG_TRST_8822B,
GPIO4_DBG_GNT_WL_8822B,
GPIO4_WLMAC_DBG_GPIO4_8822B,
GPIO4_WLPHY_DBG_GPIO4_8822B,
GPIO4_BT_DBG_GPIO4_8822B,
GPIO4_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
GPIO5_BT_SPI_D1_8822B,
GPIO5_WL_SPI_D1_8822B,
GPIO5_JTAG_TDI_8822B,
GPIO5_DBG_GNT_BT_8822B,
GPIO5_WLMAC_DBG_GPIO5_8822B,
GPIO5_WLPHY_DBG_GPIO5_8822B,
GPIO5_BT_DBG_GPIO5_8822B,
GPIO5_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
GPIO6_BT_SPI_D2_8822B,
GPIO6_WL_SPI_D2_8822B,
GPIO6_EEDO_8822B,
GPIO6_JTAG_TDO_8822B,
GPIO6_BT_3DD_SYNC_B_8822B,
GPIO6_BT_GPIO18_8822B,
GPIO6_SIN_8822B,
GPIO6_WLMAC_DBG_GPIO6_8822B,
GPIO6_WLPHY_DBG_GPIO6_8822B,
GPIO6_BT_DBG_GPIO6_8822B,
GPIO6_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
GPIO7_BT_SPI_D3_8822B,
GPIO7_WL_SPI_D3_8822B,
GPIO7_EEDI_8822B,
GPIO7_JTAG_TMS_8822B,
GPIO7_BT_GPIO16_8822B,
GPIO7_SOUT_8822B,
GPIO7_WLMAC_DBG_GPIO7_8822B,
GPIO7_WLPHY_DBG_GPIO7_8822B,
GPIO7_BT_DBG_GPIO7_8822B,
GPIO7_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO8_8822B[] = {
GPIO8_WL_EXT_WOL_8822B,
GPIO8_WL_LED_8822B,
GPIO8_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO9_8822B[] = {
GPIO9_DIS_WL_N_8822B,
GPIO9_WL_EXT_WOL_8822B,
GPIO9_USCTS0_8822B,
GPIO9_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO10_8822B[] = {
GPIO10_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO11_8822B[] = {
GPIO11_DIS_BT_N_8822B,
GPIO11_USOUT0_8822B,
GPIO11_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO12_8822B[] = {
GPIO12_USIN0_8822B,
GPIO12_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO13_8822B[] = {
GPIO13_BT_WAKE_8822B,
GPIO13_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO14_8822B[] = {
GPIO14_UART_WAKE_8822B,
GPIO14_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO15_8822B[] = {
GPIO15_EXT_XTAL_8822B,
GPIO15_SW_IO_8822B
};
static enum halmac_ret_status
get_pinmux_list_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func,
const struct halmac_gpio_pimux_list **list,
u32 *list_size, u32 *gpio_id);
static enum halmac_ret_status
chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
/**
* pinmux_get_func_8822b() -get current gpio status
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* @enable : function is enable(1) or disable(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_get_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 *enable)
{
u32 list_size;
u32 cur_func;
u32 gpio_id;
enum halmac_ret_status status;
const struct halmac_gpio_pimux_list *list = NULL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = get_pinmux_list_8822b(adapter, gpio_func, &list, &list_size,
&gpio_id);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_parser_88xx(adapter, list, list_size, gpio_id,
&cur_func);
if (status != HALMAC_RET_SUCCESS)
return status;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
*enable = (cur_func == HALMAC_WL_LED) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
*enable = (cur_func == HALMAC_SDIO_INT) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
case HALMAC_GPIO_FUNC_SW_IO_3:
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SW_IO_5:
case HALMAC_GPIO_FUNC_SW_IO_6:
case HALMAC_GPIO_FUNC_SW_IO_7:
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_SW_IO_9:
case HALMAC_GPIO_FUNC_SW_IO_10:
case HALMAC_GPIO_FUNC_SW_IO_11:
case HALMAC_GPIO_FUNC_SW_IO_12:
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_SW_IO_15:
*enable = (cur_func == HALMAC_SW_IO) ? 1 : 0;
break;
default:
*enable = 0;
return HALMAC_RET_GET_PINMUX_ERR;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_set_func_8822b() -set gpio function
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_set_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
u32 list_size;
u32 gpio_id;
enum halmac_ret_status status;
const struct halmac_gpio_pimux_list *list = NULL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]func name : %d\n", gpio_func);
status = chk_pinmux_valid_8822b(adapter, gpio_func);
if (status != HALMAC_RET_SUCCESS)
return status;
status = get_pinmux_list_8822b(adapter, gpio_func, &list, &list_size,
&gpio_id);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_switch_88xx(adapter, list, list_size, gpio_id,
gpio_func);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_record_88xx(adapter, gpio_func, 1);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_free_func_8822b() -free locked gpio function
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_free_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
struct halmac_pinmux_info *info = &adapter->pinmux_info;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
info->sw_io_0 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
info->sw_io_1 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
info->sw_io_2 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
info->sw_io_3 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
info->sw_io_4 = 0;
info->sdio_int = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
info->sw_io_5 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
info->sw_io_6 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
info->sw_io_7 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
info->sw_io_8 = 0;
info->wl_led = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
info->sw_io_9 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
info->sw_io_10 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
info->sw_io_11 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
info->sw_io_12 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
info->sw_io_13 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
info->sw_io_14 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
info->sw_io_15 = 0;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
PLTFM_MSG_TRACE("[TRACE]func : %X\n", gpio_func);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_pinmux_list_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func,
const struct halmac_gpio_pimux_list **list,
u32 *list_size, u32 *gpio_id)
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
*list = PIMUX_LIST_GPIO0_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO0_8822B);
*gpio_id = HALMAC_GPIO0;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
*list = PIMUX_LIST_GPIO1_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO1_8822B);
*gpio_id = HALMAC_GPIO1;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
*list = PIMUX_LIST_GPIO2_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO2_8822B);
*gpio_id = HALMAC_GPIO2;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
*list = PIMUX_LIST_GPIO3_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO3_8822B);
*gpio_id = HALMAC_GPIO3;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
*list = PIMUX_LIST_GPIO4_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO4_8822B);
*gpio_id = HALMAC_GPIO4;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
*list = PIMUX_LIST_GPIO5_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO5_8822B);
*gpio_id = HALMAC_GPIO5;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
*list = PIMUX_LIST_GPIO6_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO6_8822B);
*gpio_id = HALMAC_GPIO6;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
*list = PIMUX_LIST_GPIO7_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO7_8822B);
*gpio_id = HALMAC_GPIO7;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
*list = PIMUX_LIST_GPIO8_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO8_8822B);
*gpio_id = HALMAC_GPIO8;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
*list = PIMUX_LIST_GPIO9_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO9_8822B);
*gpio_id = HALMAC_GPIO9;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
*list = PIMUX_LIST_GPIO10_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO10_8822B);
*gpio_id = HALMAC_GPIO10;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
*list = PIMUX_LIST_GPIO11_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO11_8822B);
*gpio_id = HALMAC_GPIO11;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
*list = PIMUX_LIST_GPIO12_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO12_8822B);
*gpio_id = HALMAC_GPIO12;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
*list = PIMUX_LIST_GPIO13_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO13_8822B);
*gpio_id = HALMAC_GPIO13;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
*list = PIMUX_LIST_GPIO14_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO14_8822B);
*gpio_id = HALMAC_GPIO14;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
*list = PIMUX_LIST_GPIO15_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO15_8822B);
*gpio_id = HALMAC_GPIO15;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
struct halmac_pinmux_info *info = &adapter->pinmux_info;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
if (info->sw_io_0 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
if (info->sw_io_1 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
if (info->sw_io_2 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
if (info->sw_io_3 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
if (info->sw_io_4 == 1 || info->sdio_int == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
if (info->sw_io_5 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
if (info->sw_io_6 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
if (info->sw_io_7 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
if (info->sw_io_8 == 1 || info->wl_led == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
if (info->sw_io_9 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
if (info->sw_io_10 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
if (info->sw_io_11 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
if (info->sw_io_12 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
if (info->sw_io_13 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
if (info->sw_io_14 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
if (info->sw_io_15 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
PLTFM_MSG_TRACE("[TRACE]chk_pinmux_valid func : %X status : %X\n",
gpio_func, status);
return status;
}
#endif /* HALMAC_8822B_SUPPORT */

38
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h Normal file
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@@ -0,0 +1,38 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_GPIO_8822B_H_
#define _HALMAC_GPIO_8822B_H_
#include "../../halmac_api.h"
#include "../../halmac_gpio_cmd.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
pinmux_get_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 *enable);
enum halmac_ret_status
pinmux_set_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
enum halmac_ret_status
pinmux_free_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
#endif /* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_GPIO_8822B_H_ */

724
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_init_8822b.h"
#include "halmac_8822b_cfg.h"
#include "halmac_pcie_8822b.h"
#include "halmac_sdio_8822b.h"
#include "halmac_usb_8822b.h"
#include "halmac_gpio_8822b.h"
#include "halmac_common_8822b.h"
#include "halmac_cfg_wmac_8822b.h"
#include "../halmac_common_88xx.h"
#include "../halmac_init_88xx.h"
#if HALMAC_8822B_SUPPORT
#define RSVD_PG_DRV_NUM 16
#define RSVD_PG_H2C_EXTRAINFO_NUM 24
#define RSVD_PG_H2C_STATICINFO_NUM 8
#define RSVD_PG_H2CQ_NUM 8
#define RSVD_PG_CPU_INSTRUCTION_NUM 0
#define RSVD_PG_FW_TXBUF_NUM 4
#define RSVD_PG_CSIBUF_NUM 0
#define RSVD_PG_DLLB_NUM 32
#define MAC_TRX_ENABLE (BIT_HCI_TXDMA_EN | BIT_HCI_RXDMA_EN | BIT_TXDMA_EN | \
BIT_RXDMA_EN | BIT_PROTOCOL_EN | BIT_SCHEDULE_EN | \
BIT_MACTXEN | BIT_MACRXEN)
#define BLK_DESC_NUM 0x3
#define WLAN_AMPDU_MAX_TIME 0x70
#define WLAN_RTS_LEN_TH 0xFF
#define WLAN_RTS_TX_TIME_TH 0x08
#define WLAN_MAX_AGG_PKT_LIMIT 0x20
#define WLAN_RTS_MAX_AGG_PKT_LIMIT 0x20
#define WALN_FAST_EDCA_VO_TH 0x06
#define WLAN_FAST_EDCA_VI_TH 0x06
#define WLAN_FAST_EDCA_BE_TH 0x06
#define WLAN_FAST_EDCA_BK_TH 0x06
#define WLAN_BAR_RETRY_LIMIT 0x01
#define WLAN_RA_TRY_RATE_AGG_LIMIT 0x08
#if HALMAC_PLATFORM_WINDOWS
/*SDIO RQPN Mapping for Windows, extra queue is not implemented in Driver code*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
#else
/*SDIO RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
#endif
/*PCIE RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
/*USB 2 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
/*USB 3 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
/*USB 4 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
#if HALMAC_PLATFORM_WINDOWS
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 640},
};
#else
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
#endif
/*PCIE Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
/*USB 2 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
};
/*USB 3 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
};
/*USB 4 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
static enum halmac_ret_status
txdma_queue_mapping_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
static enum halmac_ret_status
priority_queue_cfg_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
static enum halmac_ret_status
set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
enum halmac_ret_status
mount_api_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
adapter->chip_id = HALMAC_CHIP_ID_8822B;
adapter->hw_cfg_info.efuse_size = EFUSE_SIZE_8822B;
adapter->hw_cfg_info.eeprom_size = EEPROM_SIZE_8822B;
adapter->hw_cfg_info.bt_efuse_size = BT_EFUSE_SIZE_8822B;
adapter->hw_cfg_info.cam_entry_num = SEC_CAM_NUM_8822B;
adapter->hw_cfg_info.tx_fifo_size = TX_FIFO_SIZE_8822B;
adapter->hw_cfg_info.rx_fifo_size = RX_FIFO_SIZE_8822B;
adapter->hw_cfg_info.ac_oqt_size = OQT_ENTRY_AC_8822B;
adapter->hw_cfg_info.non_ac_oqt_size = OQT_ENTRY_NOAC_8822B;
adapter->hw_cfg_info.usb_txagg_num = BLK_DESC_NUM;
adapter->txff_alloc.rsvd_drv_pg_num = RSVD_PG_DRV_NUM;
api->halmac_init_trx_cfg = init_trx_cfg_8822b;
api->halmac_init_protocol_cfg = init_protocol_cfg_8822b;
api->halmac_init_h2c = init_h2c_8822b;
api->halmac_pinmux_get_func = pinmux_get_func_8822b;
api->halmac_pinmux_set_func = pinmux_set_func_8822b;
api->halmac_pinmux_free_func = pinmux_free_func_8822b;
api->halmac_get_hw_value = get_hw_value_8822b;
api->halmac_set_hw_value = set_hw_value_8822b;
api->halmac_cfg_drv_info = cfg_drv_info_8822b;
api->halmac_fill_txdesc_checksum = fill_txdesc_check_sum_8822b;
api->halmac_init_low_pwr = init_low_pwr_8822b;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
api->halmac_mac_power_switch = mac_pwr_switch_sdio_8822b;
api->halmac_phy_cfg = phy_cfg_sdio_8822b;
api->halmac_pcie_switch = pcie_switch_sdio_8822b;
api->halmac_interface_integration_tuning = intf_tun_sdio_8822b;
api->halmac_tx_allowed_sdio = tx_allowed_sdio_8822b;
api->halmac_get_sdio_tx_addr = get_sdio_tx_addr_8822b;
api->halmac_reg_read_8 = reg_r8_sdio_8822b;
api->halmac_reg_write_8 = reg_w8_sdio_8822b;
api->halmac_reg_read_16 = reg_r16_sdio_8822b;
api->halmac_reg_write_16 = reg_w16_sdio_8822b;
api->halmac_reg_read_32 = reg_r32_sdio_8822b;
api->halmac_reg_write_32 = reg_w32_sdio_8822b;
adapter->sdio_fs.macid_map_size = MACID_MAX_8822B * 2;
if (!adapter->sdio_fs.macid_map) {
adapter->sdio_fs.macid_map =
(u8 *)PLTFM_MALLOC(adapter->sdio_fs.macid_map_size);
if (!adapter->sdio_fs.macid_map)
PLTFM_MSG_ERR("[ERR]allocate macid_map!!\n");
}
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
api->halmac_mac_power_switch = mac_pwr_switch_usb_8822b;
api->halmac_phy_cfg = phy_cfg_usb_8822b;
api->halmac_pcie_switch = pcie_switch_usb_8822b;
api->halmac_interface_integration_tuning = intf_tun_usb_8822b;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
api->halmac_mac_power_switch = mac_pwr_switch_pcie_8822b;
api->halmac_phy_cfg = phy_cfg_pcie_8822b;
api->halmac_pcie_switch = pcie_switch_8822b;
api->halmac_interface_integration_tuning = intf_tun_pcie_8822b;
} else {
PLTFM_MSG_ERR("[ERR]Undefined IC\n");
return HALMAC_RET_CHIP_NOT_SUPPORT;
}
return HALMAC_RET_SUCCESS;
}
/**
* init_trx_cfg_8822b() - config trx dma register
* @adapter : the adapter of halmac
* @mode : trx mode selection
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
adapter->trx_mode = mode;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = txdma_queue_mapping_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]queue mapping\n");
return status;
}
value8 = 0;
HALMAC_REG_W8(REG_CR, value8);
value8 = MAC_TRX_ENABLE;
HALMAC_REG_W8(REG_CR, value8);
HALMAC_REG_W32(REG_H2CQ_CSR, BIT(31));
status = priority_queue_cfg_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]halmac_txdma_queue_mapping fail!\n");
return status;
}
if (adapter->txff_alloc.rx_fifo_exp_mode !=
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, RX_DESC_DUMMY_SIZE_8822B >> 3);
status = init_h2c_8822b(adapter);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]init h2cq!\n");
return status;
}
if (adapter->intf == HALMAC_INTERFACE_USB)
HALMAC_REG_W8_SET(REG_TXDMA_PQ_MAP, BIT(0));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
txdma_queue_mapping_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u16 value16;
struct halmac_rqpn *cur_rqpn_sel = NULL;
enum halmac_ret_status status;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
cur_rqpn_sel = HALMAC_RQPN_SDIO_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
cur_rqpn_sel = HALMAC_RQPN_PCIE_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
if (adapter->bulkout_num == 2) {
cur_rqpn_sel = HALMAC_RQPN_2BULKOUT_8822B;
} else if (adapter->bulkout_num == 3) {
cur_rqpn_sel = HALMAC_RQPN_3BULKOUT_8822B;
} else if (adapter->bulkout_num == 4) {
cur_rqpn_sel = HALMAC_RQPN_4BULKOUT_8822B;
} else {
PLTFM_MSG_ERR("[ERR]invalid intf\n");
return HALMAC_RET_NOT_SUPPORT;
}
} else {
return HALMAC_RET_NOT_SUPPORT;
}
status = rqpn_parser_88xx(adapter, mode, cur_rqpn_sel);
if (status != HALMAC_RET_SUCCESS)
return status;
value16 = 0;
value16 |= BIT_TXDMA_HIQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_HI]);
value16 |= BIT_TXDMA_MGQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_MG]);
value16 |= BIT_TXDMA_BKQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_BK]);
value16 |= BIT_TXDMA_BEQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_BE]);
value16 |= BIT_TXDMA_VIQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_VI]);
value16 |= BIT_TXDMA_VOQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_VO]);
HALMAC_REG_W16(REG_TXDMA_PQ_MAP, value16);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
priority_queue_cfg_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u8 transfer_mode = 0;
u8 value8;
u32 cnt;
struct halmac_txff_allocation *txff_info = &adapter->txff_alloc;
enum halmac_ret_status status;
struct halmac_pg_num *cur_pg_num = NULL;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
status = set_trx_fifo_info_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]set trx fifo!!\n");
return status;
}
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
cur_pg_num = HALMAC_PG_NUM_SDIO_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
cur_pg_num = HALMAC_PG_NUM_PCIE_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
if (adapter->bulkout_num == 2) {
cur_pg_num = HALMAC_PG_NUM_2BULKOUT_8822B;
} else if (adapter->bulkout_num == 3) {
cur_pg_num = HALMAC_PG_NUM_3BULKOUT_8822B;
} else if (adapter->bulkout_num == 4) {
cur_pg_num = HALMAC_PG_NUM_4BULKOUT_8822B;
} else {
PLTFM_MSG_ERR("[ERR]interface not support\n");
return HALMAC_RET_NOT_SUPPORT;
}
} else {
return HALMAC_RET_NOT_SUPPORT;
}
status = pg_num_parser_88xx(adapter, mode, cur_pg_num);
if (status != HALMAC_RET_SUCCESS)
return status;
HALMAC_REG_W16(REG_FIFOPAGE_INFO_1, txff_info->high_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_2, txff_info->low_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_3, txff_info->normal_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_4, txff_info->extra_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_5, txff_info->pub_queue_pg_num);
HALMAC_REG_W32_SET(REG_RQPN_CTRL_2, BIT(31));
adapter->sdio_fs.hiq_pg_num = txff_info->high_queue_pg_num;
adapter->sdio_fs.miq_pg_num = txff_info->normal_queue_pg_num;
adapter->sdio_fs.lowq_pg_num = txff_info->low_queue_pg_num;
adapter->sdio_fs.pubq_pg_num = txff_info->pub_queue_pg_num;
adapter->sdio_fs.exq_pg_num = txff_info->extra_queue_pg_num;
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, txff_info->rsvd_boundary);
HALMAC_REG_W8_SET(REG_FWHW_TXQ_CTRL + 2, BIT(4));
/*20170411 Soar*/
/* SDIO sometimes use two CMD52 to do HALMAC_REG_W16 */
/* and may cause a mismatch between HW status and Reg value. */
/* A patch is to write high byte first, suggested by Argis */
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
value8 = (u8)(txff_info->rsvd_boundary >> 8 & 0xFF);
HALMAC_REG_W8(REG_BCNQ_BDNY_V1 + 1, value8);
value8 = (u8)(txff_info->rsvd_boundary & 0xFF);
HALMAC_REG_W8(REG_BCNQ_BDNY_V1, value8);
} else {
HALMAC_REG_W16(REG_BCNQ_BDNY_V1, txff_info->rsvd_boundary);
}
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2 + 2, txff_info->rsvd_boundary);
/*20170411 Soar*/
/* SDIO sometimes use two CMD52 to do HALMAC_REG_W16 */
/* and may cause a mismatch between HW status and Reg value. */
/* A patch is to write high byte first, suggested by Argis */
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
value8 = (u8)(txff_info->rsvd_boundary >> 8 & 0xFF);
HALMAC_REG_W8(REG_BCNQ1_BDNY_V1 + 1, value8);
value8 = (u8)(txff_info->rsvd_boundary & 0xFF);
HALMAC_REG_W8(REG_BCNQ1_BDNY_V1, value8);
} else {
HALMAC_REG_W16(REG_BCNQ1_BDNY_V1, txff_info->rsvd_boundary);
}
HALMAC_REG_W32(REG_RXFF_BNDY,
adapter->hw_cfg_info.rx_fifo_size -
C2H_PKT_BUF_88XX - 1);
if (adapter->intf == HALMAC_INTERFACE_USB) {
value8 = HALMAC_REG_R8(REG_AUTO_LLT_V1);
value8 &= ~(BIT_MASK_BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM);
value8 |= (BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM);
HALMAC_REG_W8(REG_AUTO_LLT_V1, value8);
HALMAC_REG_W8(REG_AUTO_LLT_V1 + 3, BLK_DESC_NUM);
HALMAC_REG_W8_SET(REG_TXDMA_OFFSET_CHK + 1, BIT(1));
}
HALMAC_REG_W8_SET(REG_AUTO_LLT_V1, BIT_AUTO_INIT_LLT_V1);
cnt = 1000;
while (HALMAC_REG_R8(REG_AUTO_LLT_V1) & BIT_AUTO_INIT_LLT_V1) {
cnt--;
if (cnt == 0)
return HALMAC_RET_INIT_LLT_FAIL;
}
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK) {
transfer_mode = HALMAC_TRNSFER_LOOPBACK_DELAY;
HALMAC_REG_W16(REG_WMAC_LBK_BUF_HD_V1,
adapter->txff_alloc.rsvd_boundary);
} else if (mode == HALMAC_TRX_MODE_LOOPBACK) {
transfer_mode = HALMAC_TRNSFER_LOOPBACK_DIRECT;
} else {
transfer_mode = HALMAC_TRNSFER_NORMAL;
}
adapter->hw_cfg_info.trx_mode = transfer_mode;
HALMAC_REG_W8(REG_CR + 3, transfer_mode);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u16 cur_pg_addr;
u32 txff_size = TX_FIFO_SIZE_8822B;
u32 rxff_size = RX_FIFO_SIZE_8822B;
struct halmac_txff_allocation *info = &adapter->txff_alloc;
if (info->rx_fifo_exp_mode == HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK) {
txff_size = TX_FIFO_SIZE_RX_EXPAND_1BLK_8822B;
rxff_size = RX_FIFO_SIZE_RX_EXPAND_1BLK_8822B;
}
if (info->la_mode != HALMAC_LA_MODE_DISABLE) {
txff_size = TX_FIFO_SIZE_LA_8822B;
rxff_size = RX_FIFO_SIZE_8822B;
}
adapter->hw_cfg_info.tx_fifo_size = txff_size;
adapter->hw_cfg_info.rx_fifo_size = rxff_size;
info->tx_fifo_pg_num = (u16)(txff_size >> TX_PAGE_SIZE_SHIFT_88XX);
info->rsvd_pg_num = info->rsvd_drv_pg_num +
RSVD_PG_H2C_EXTRAINFO_NUM +
RSVD_PG_H2C_STATICINFO_NUM +
RSVD_PG_H2CQ_NUM +
RSVD_PG_CPU_INSTRUCTION_NUM +
RSVD_PG_FW_TXBUF_NUM +
RSVD_PG_CSIBUF_NUM;
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK)
info->rsvd_pg_num += RSVD_PG_DLLB_NUM;
if (info->rsvd_pg_num > info->tx_fifo_pg_num)
return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
info->acq_pg_num = info->tx_fifo_pg_num - info->rsvd_pg_num;
info->rsvd_boundary = info->tx_fifo_pg_num - info->rsvd_pg_num;
cur_pg_addr = info->tx_fifo_pg_num;
cur_pg_addr -= RSVD_PG_CSIBUF_NUM;
info->rsvd_csibuf_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_FW_TXBUF_NUM;
info->rsvd_fw_txbuf_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_CPU_INSTRUCTION_NUM;
info->rsvd_cpu_instr_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2CQ_NUM;
info->rsvd_h2cq_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2C_STATICINFO_NUM;
info->rsvd_h2c_sta_info_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2C_EXTRAINFO_NUM;
info->rsvd_h2c_info_addr = cur_pg_addr;
cur_pg_addr -= info->rsvd_drv_pg_num;
info->rsvd_drv_addr = cur_pg_addr;
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK)
info->rsvd_drv_addr -= RSVD_PG_DLLB_NUM;
if (info->rsvd_boundary != info->rsvd_drv_addr)
return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
return HALMAC_RET_SUCCESS;
}
/**
* init_protocol_cfg_8822b() - config protocol register
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_protocol_cfg_8822b(struct halmac_adapter *adapter)
{
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_W8_CLR(REG_SW_AMPDU_BURST_MODE_CTRL, BIT(6));
HALMAC_REG_W8(REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME);
HALMAC_REG_W8(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
value32 = WLAN_RTS_LEN_TH | (WLAN_RTS_TX_TIME_TH << 8) |
(WLAN_MAX_AGG_PKT_LIMIT << 16) |
(WLAN_RTS_MAX_AGG_PKT_LIMIT << 24);
HALMAC_REG_W32(REG_PROT_MODE_CTRL, value32);
HALMAC_REG_W16(REG_BAR_MODE_CTRL + 2,
WLAN_BAR_RETRY_LIMIT | WLAN_RA_TRY_RATE_AGG_LIMIT << 8);
HALMAC_REG_W8(REG_FAST_EDCA_VOVI_SETTING, WALN_FAST_EDCA_VO_TH);
HALMAC_REG_W8(REG_FAST_EDCA_VOVI_SETTING + 2, WLAN_FAST_EDCA_VI_TH);
HALMAC_REG_W8(REG_FAST_EDCA_BEBK_SETTING, WLAN_FAST_EDCA_BE_TH);
HALMAC_REG_W8(REG_FAST_EDCA_BEBK_SETTING + 2, WLAN_FAST_EDCA_BK_TH);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_h2c_8822b() - config h2c packet buffer
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_h2c_8822b(struct halmac_adapter *adapter)
{
u8 value8;
u32 value32;
u32 h2cq_addr;
u32 h2cq_size;
struct halmac_txff_allocation *txff_info = &adapter->txff_alloc;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
h2cq_addr = txff_info->rsvd_h2cq_addr << TX_PAGE_SIZE_SHIFT_88XX;
h2cq_size = RSVD_PG_H2CQ_NUM << TX_PAGE_SIZE_SHIFT_88XX;
value32 = HALMAC_REG_R32(REG_H2C_HEAD);
value32 = (value32 & 0xFFFC0000) | h2cq_addr;
HALMAC_REG_W32(REG_H2C_HEAD, value32);
value32 = HALMAC_REG_R32(REG_H2C_READ_ADDR);
value32 = (value32 & 0xFFFC0000) | h2cq_addr;
HALMAC_REG_W32(REG_H2C_READ_ADDR, value32);
value32 = HALMAC_REG_R32(REG_H2C_TAIL);
value32 &= 0xFFFC0000;
value32 |= (h2cq_addr + h2cq_size);
HALMAC_REG_W32(REG_H2C_TAIL, value32);
value8 = HALMAC_REG_R8(REG_H2C_INFO);
value8 = (u8)((value8 & 0xFC) | 0x01);
HALMAC_REG_W8(REG_H2C_INFO, value8);
value8 = HALMAC_REG_R8(REG_H2C_INFO);
value8 = (u8)((value8 & 0xFB) | 0x04);
HALMAC_REG_W8(REG_H2C_INFO, value8);
value8 = HALMAC_REG_R8(REG_TXDMA_OFFSET_CHK + 1);
value8 = (u8)((value8 & 0x7f) | 0x80);
HALMAC_REG_W8(REG_TXDMA_OFFSET_CHK + 1, value8);
adapter->h2c_info.buf_size = h2cq_size;
get_h2c_buf_free_space_88xx(adapter);
if (adapter->h2c_info.buf_size != adapter->h2c_info.buf_fs) {
PLTFM_MSG_ERR("[ERR]get h2c free space error!\n");
return HALMAC_RET_GET_H2C_SPACE_ERR;
}
PLTFM_MSG_TRACE("[TRACE]h2c fs : %d\n", adapter->h2c_info.buf_fs);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

37
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.h Normal file
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@@ -0,0 +1,37 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_INIT_8822B_H_
#define _HALMAC_INIT_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
mount_api_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
enum halmac_ret_status
init_protocol_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_h2c_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_INIT_8822B_H_ */

214
hal/halmac/halmac_88xx/halmac_8822b/halmac_pcie_8822b.c Normal file
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@@ -0,0 +1,214 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pcie_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_pcie_88xx.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822B_SUPPORT
/**
* mac_pwr_switch_pcie_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]pwr = %x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_PCIE_HRPWM1_V1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_PCIE_HRPWM1_V1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/* Check if power switch is needed */
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
if (pwr == HALMAC_MAC_POWER_OFF) {
status = trxdma_check_idle_88xx(adapter);
if (status != HALMAC_RET_SUCCESS)
return status;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
{
u8 value8;
u32 value32;
u8 speed = 0;
u32 cnt = 0;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (cfg == HALMAC_PCIE_GEN1) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(0));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN1_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN1_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else if (cfg == HALMAC_PCIE_GEN2) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(1));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN2_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN2_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else {
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
return HALMAC_RET_FAIL;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_pcie_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = parse_intf_phy_88xx(adapter, pcie_gen1_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN1);
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, pcie_gen2_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN2);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* intf_tun_pcie_8822b() - pcie interface fine tuning
* @adapter : the adapter of halmac
* Author : Rick Liu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

42
hal/halmac/halmac_88xx/halmac_8822b/halmac_pcie_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_PCIE_H_
#define _HALMAC_API_8822B_PCIE_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
extern struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[];
extern struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[];
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_PCIE_H_ */

150
hal/halmac/halmac_88xx/halmac_8822b/halmac_phy_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "../../halmac_type.h"
/**
* ============ip sel item list============
* HALMAC_IP_INTF_PHY
* USB2 : usb2 phy, 1byte value
* USB3 : usb3 phy, 2byte value
* PCIE1 : pcie gen1 mdio, 2byte value
* PCIE2 : pcie gen2 mdio, 2byte value
* HALMAC_IP_SEL_MAC
* USB2, USB3, PCIE1, PCIE2 : mac ip, 1byte value
* HALMAC_IP_PCIE_DBI
* USB2 USB3 : none
* PCIE1, PCIE2 : pcie dbi, 1byte value
*/
#if HALMAC_8822B_SUPPORT
struct halmac_intf_phy_para usb2_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x00,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para usb3_phy_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_D,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0008, 0x3596,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x002A, 0x1840,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0008, 0x3597,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x002A, 0x3040,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
#endif /* HALMAC_8822B_SUPPORT*/

914
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pwr_seq_8822b.h"
#if HALMAC_8822B_SUPPORT
struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4) | BIT(7), 0},
{0x0300,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0001,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 1, HALMAC_PWR_DELAY_MS},
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT(2)), 0},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0},
{0x10C3,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(0), 0},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x10A8,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x10A9,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xef},
{0x10AA,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x0c},
{0x0068,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0029,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xF9},
{0x0024,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0074,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x00AF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0003,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x001F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x00EF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x30},
{0x0049,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x10C3,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x004F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0046,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(6), BIT(6)},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0046,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0062,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0081,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0044,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0040,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x90},
{0x0041,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x00},
{0x0042,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Card Enable Array */
struct halmac_wlan_pwr_cfg *card_en_flow_8822b[] = {
TRANS_CARDDIS_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_ACT_8822B,
NULL
};
/* Card Disable Array */
struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[] = {
TRANS_ACT_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_CARDDIS_8822B,
NULL
};
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT(4) | BIT(3))},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) | BIT(4)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(7), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK | HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x42},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0553,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x40},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0553,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFE58,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x84},
{0xFE58,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), 0},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0)},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x113C,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x03},
{0x0124,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0125,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0126,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0127,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Suspend Array */
struct halmac_wlan_pwr_cfg *suspend_flow_8822b[] = {
TRANS_ACT_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_SUS_8822B,
NULL
};
/* Resume Array */
struct halmac_wlan_pwr_cfg *resume_flow_8822b[] = {
TRANS_SUS_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_ACT_8822B,
NULL
};
/* HWPDN Array - HW behavior */
struct halmac_wlan_pwr_cfg *hwpdn_flow_8822b[] = {
NULL
};
/* Enter LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_lps_flow_8822b[] = {
TRANS_ACT_TO_LPS_8822B,
NULL
};
/* Enter Deep LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822b[] = {
TRANS_ACT_TO_DEEP_LPS_8822B,
NULL
};
/* Leave LPS -FW behavior */
struct halmac_wlan_pwr_cfg *leave_lps_flow_8822b[] = {
TRANS_LPS_TO_ACT_8822B,
NULL
};
#endif
#endif /* HALMAC_8822B_SUPPORT*/

40
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.h Normal file
View File

@@ -0,0 +1,40 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef HALMAC_POWER_SEQUENCE_8822B
#define HALMAC_POWER_SEQUENCE_8822B
#include "../../halmac_pwr_seq_cmd.h"
#include "../../halmac_hw_cfg.h"
#if HALMAC_8822B_SUPPORT
#define HALMAC_8822B_PWR_SEQ_VER "V24"
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[];
#if HALMAC_PLATFORM_TESTPROGRAM
extern struct halmac_wlan_pwr_cfg *suspend_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *resume_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *hwpdn_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *enter_lps_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *leave_lps_flow_8822b[];
#endif
#endif /* HALMAC_8822B_SUPPORT*/
#endif

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hal/halmac/halmac_88xx/halmac_8822b/halmac_sdio_8822b.c Normal file
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@@ -0,0 +1,868 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_sdio_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_sdio_88xx.h"
#if HALMAC_8822B_SUPPORT
#define WLAN_ACQ_NUM_MAX 8
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt);
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt);
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first);
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num);
/**
* mac_pwr_switch_sdio_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
u32 imr_backup;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_SDIO_HRPWM1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_SDIO_HRPWM1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/*Check if power switch is needed*/
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
imr_backup = HALMAC_REG_R32(REG_SDIO_HIMR);
HALMAC_REG_W32(REG_SDIO_HIMR, 0);
if (pwr == HALMAC_MAC_POWER_OFF) {
adapter->pwr_off_flow_flag = 1;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
adapter->pwr_off_flow_flag = 0;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_tx_allowed_sdio_88xx() - check tx status
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size, include txdesc
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u16 *cur_fs = NULL;
u32 cnt;
u32 tx_agg_num;
u32 rqd_pg_num = 0;
u8 macid_cnt = 0;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!fs_info->macid_map) {
PLTFM_MSG_ERR("[ERR]halmac allocate Macid_map Fail!!\n");
return HALMAC_RET_MALLOC_FAIL;
}
PLTFM_MEMSET(fs_info->macid_map, 0x00, fs_info->macid_map_size);
tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(buf);
tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
status = chk_rqd_page_num_8822b(adapter, buf, &rqd_pg_num, &cur_fs,
&macid_cnt, tx_agg_num);
if (status != HALMAC_RET_SUCCESS)
return status;
cnt = 10;
do {
if ((u32)(*cur_fs + fs_info->pubq_pg_num) > rqd_pg_num) {
status = chk_oqt_8822b(adapter, tx_agg_num, buf,
macid_cnt);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_WARN("[WARN]oqt buffer full!!\n");
return status;
}
if (*cur_fs >= rqd_pg_num) {
*cur_fs -= (u16)rqd_pg_num;
} else {
fs_info->pubq_pg_num -=
(u16)(rqd_pg_num - *cur_fs);
*cur_fs = 0;
}
break;
}
update_sdio_free_page_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
} while (1);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_8_sdio_88xx() - read 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
u8 value8;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0) {
value8 = (u8)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_BYTE);
} else {
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
value8 = PLTFM_SDIO_CMD52_R(offset);
}
return value8;
}
/**
* halmac_reg_write_8_sdio_88xx() - write 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_16_sdio_88xx() - read 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u16 word;
u8 byte[2];
} value16 = { 0x0000 };
if ((offset & 0xFFFF0000) == 0)
return (u16)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_WORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_R) {
value16.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value16.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value16.word = rtk_le16_to_cpu(value16.word);
} else {
value16.word = PLTFM_SDIO_CMD53_R16(offset);
}
return value16.word;
}
/**
* halmac_reg_write_16_sdio_88xx() - write 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_W) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (2 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_WORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value & 0xFF00) >> 8));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W16(offset, value);
}
return status;
}
/**
* halmac_reg_read_32_sdio_88xx() - read 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} value32 = { 0x00000000 };
if ((offset & 0xFFFF0000) == 0)
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
value32.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value32.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value32.byte[2] = PLTFM_SDIO_CMD52_R(offset + 2);
value32.byte[3] = PLTFM_SDIO_CMD52_R(offset + 3);
value32.dword = rtk_le32_to_cpu(value32.dword);
} else {
value32.dword = PLTFM_SDIO_CMD53_R32(offset);
}
return value32.dword;
}
/**
* halmac_reg_write_32_sdio_88xx() - write 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (4 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_DWORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value >> 8) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 2,
(u8)((value >> 16) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 3,
(u8)((value >> 24) & 0xFF));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W32(offset, value);
}
return status;
}
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt)
{
u32 cnt = 10;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
/*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
/*no need to check non_ac_oqt_number*/
/*HI and MGQ blocked will cause protocal issue before H_OQT being full*/
switch ((enum halmac_qsel)GET_TX_DESC_QSEL(buf)) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
if (macid_cnt > WLAN_ACQ_NUM_MAX &&
tx_agg_num > OQT_ENTRY_AC_8822B) {
PLTFM_MSG_WARN("[WARN]txagg num %d > oqt entry\n",
tx_agg_num);
PLTFM_MSG_WARN("[WARN]macid cnt %d > acq max\n",
macid_cnt);
}
cnt = 10;
do {
if (fs_info->ac_empty >= macid_cnt) {
fs_info->ac_empty -= macid_cnt;
break;
}
if (fs_info->ac_oqt_num >= tx_agg_num) {
fs_info->ac_empty = 0;
fs_info->ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
if (tx_agg_num > OQT_ENTRY_NOAC_8822B)
PLTFM_MSG_WARN("[WARN]tx_agg_num %d > oqt entry\n",
tx_agg_num, OQT_ENTRY_NOAC_8822B);
cnt = 10;
do {
if (fs_info->non_ac_oqt_num >= tx_agg_num) {
fs_info->non_ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
default:
break;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 value;
u32 oqt_free_page;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
oqt_free_page = HALMAC_REG_R32(REG_SDIO_OQT_FREE_TXPG_V1);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(oqt_free_page);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page);
fs_info->ac_empty = 0;
if (fs_info->ac_oqt_num == OQT_ENTRY_AC_8822B) {
value = HALMAC_REG_R8(REG_TXPKT_EMPTY);
while (value > 0) {
value = value & (value - 1);
fs_info->ac_empty++;
};
} else {
PLTFM_MSG_TRACE("[TRACE]free_space->ac_oqt_num %d != %d\n",
fs_info->ac_oqt_num, OQT_ENTRY_AC_8822B);
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter)
{
u32 free_page = 0;
u32 free_page2 = 0;
u32 free_page3 = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 data[12] = {0};
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_SDIO_RN(REG_SDIO_FREE_TXPG, 12, data);
free_page = rtk_le32_to_cpu(*(u32 *)(data + 0));
free_page2 = rtk_le32_to_cpu(*(u32 *)(data + 4));
free_page3 = rtk_le32_to_cpu(*(u32 *)(data + 8));
fs_info->hiq_pg_num = (u16)BIT_GET_HIQ_FREEPG_V1(free_page);
fs_info->miq_pg_num = (u16)BIT_GET_MID_FREEPG_V1(free_page);
fs_info->lowq_pg_num = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
fs_info->pubq_pg_num = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
fs_info->exq_pg_num = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(free_page3);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(free_page3);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_sdio_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8821c() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* intf_tun_sdio_8822b() - sdio interface fine tuning
* @adapter : the adapter of halmac
* Author : Ivan
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_get_sdio_tx_addr_sdio_88xx() - get CMD53 addr for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @cmd53_addr : cmd53 addr value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr)
{
u32 len_unit4;
enum halmac_qsel queue_sel;
enum halmac_dma_mapping dma_mapping;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!buf) {
PLTFM_MSG_ERR("[ERR]buf is NULL!!\n");
return HALMAC_RET_DATA_BUF_NULL;
}
if (size == 0) {
PLTFM_MSG_ERR("[ERR]size is 0!!\n");
return HALMAC_RET_DATA_SIZE_INCORRECT;
}
queue_sel = (enum halmac_qsel)GET_TX_DESC_QSEL(buf);
switch (queue_sel) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
len_unit4 = (size >> 2) + ((size & (4 - 1)) ? 1 : 0);
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_HIGH;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_NORMAL;
break;
case HALMAC_DMA_MAPPING_LOW:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_LOW;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_EXTRA;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
*cmd53_addr = (*cmd53_addr << 13) |
(len_unit4 & HALMAC_SDIO_4BYTE_LEN_MASK);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt)
{
u8 flag = 0;
u8 qsel_now;
u8 macid;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
macid = (u8)GET_TX_DESC_MACID(pkt);
qsel_now = (u8)GET_TX_DESC_QSEL(pkt);
if (qsel_first == qsel_now) {
if (*(fs_info->macid_map + macid) == 0) {
*(fs_info->macid_map + macid) = 1;
(*macid_cnt)++;
}
} else {
switch ((enum halmac_qsel)qsel_now) {
case HALMAC_QSEL_VO:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO_V2)
flag = 1;
break;
case HALMAC_QSEL_VO_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO)
flag = 1;
break;
case HALMAC_QSEL_VI:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI_V2)
flag = 1;
break;
case HALMAC_QSEL_VI_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI)
flag = 1;
break;
case HALMAC_QSEL_BE:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE_V2)
flag = 1;
break;
case HALMAC_QSEL_BE_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE)
flag = 1;
break;
case HALMAC_QSEL_BK:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK_V2)
flag = 1;
break;
case HALMAC_QSEL_BK_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK)
flag = 1;
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
flag = 1;
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
if (flag == 1) {
PLTFM_MSG_ERR("[ERR]Multi-Qsel is not allowed\n");
PLTFM_MSG_ERR("[ERR]qsel = %d, %d\n",
qsel_first, qsel_now);
return HALMAC_RET_QSEL_INCORRECT;
}
if (*(fs_info->macid_map + macid + MACID_MAX_8822B) == 0) {
*(fs_info->macid_map + macid + MACID_MAX_8822B) = 1;
(*macid_cnt)++;
}
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first)
{
enum halmac_dma_mapping dma_mapping;
switch ((enum halmac_qsel)qsel_first) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
return HALMAC_RET_SUCCESS;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range: %d\n", qsel_first);
return HALMAC_RET_QSEL_INCORRECT;
}
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cur_fs = &adapter->sdio_fs.hiq_pg_num;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cur_fs = &adapter->sdio_fs.miq_pg_num;
break;
case HALMAC_DMA_MAPPING_LOW:
*cur_fs = &adapter->sdio_fs.lowq_pg_num;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cur_fs = &adapter->sdio_fs.exq_pg_num;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num)
{
u8 *pkt;
u8 qsel_first;
u32 i;
u32 pkt_size;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
pkt = buf;
qsel_first = (u8)GET_TX_DESC_QSEL(pkt);
status = chk_dma_mapping_8822b(adapter, cur_fs, qsel_first);
if (status != HALMAC_RET_SUCCESS)
return status;
for (i = 0; i < tx_agg_num; i++) {
/*QSEL parser*/
status = chk_qsel_8822b(adapter, qsel_first, pkt, macid_cnt);
if (status != HALMAC_RET_SUCCESS)
return status;
/*Page number parser*/
pkt_size = GET_TX_DESC_TXPKTSIZE(pkt) + GET_TX_DESC_OFFSET(pkt);
*rqd_pg_num += (pkt_size >> TX_PAGE_SIZE_SHIFT_88XX) +
((pkt_size & (TX_PAGE_SIZE_88XX - 1)) ? 1 : 0);
pkt += HALMAC_ALIGN(GET_TX_DESC_TXPKTSIZE(pkt) +
(GET_TX_DESC_PKT_OFFSET(pkt) << 3) +
TX_DESC_SIZE_88XX, 8);
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

66
hal/halmac/halmac_88xx/halmac_8822b/halmac_sdio_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_SDIO_H_
#define _HALMAC_API_8822B_SDIO_H_
#include "../../halmac_api.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size);
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_SDIO_H_ */

159
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_usb_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#if HALMAC_8822B_SUPPORT
/**
* mac_pwr_switch_usb_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s\n", __func__);
PLTFM_MSG_TRACE("[TRACE]%x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8821C pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(0xFE58);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(0xFE58, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA) {
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
} else {
if (BIT(0) == (HALMAC_REG_R8(REG_SYS_STATUS1 + 1) & BIT(0)))
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
/*Check if power switch is needed*/
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
if (pwr == HALMAC_MAC_POWER_OFF) {
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
return HALMAC_RET_POWER_ON_FAIL;
}
HALMAC_REG_W8_CLR(REG_SYS_STATUS1 + 1, BIT(0));
if ((HALMAC_REG_R8(REG_SW_MDIO + 3) & BIT(0)) == BIT(0))
PLTFM_MSG_ALWAYS("[ALWAYS]shall R reg twice!!\n");
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_usb_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_usb_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = parse_intf_phy_88xx(adapter, usb2_phy_param_8822b, pltfm,
HAL_INTF_PHY_USB2);
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, usb3_phy_8822b, pltfm,
HAL_INTF_PHY_USB3);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_usb_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* intf_tun_usb_8822b() - usb interface fine tuning
* @adapter : the adapter of halmac
* Author : Ivan
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_usb_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

42
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_USB_H_
#define _HALMAC_API_8822B_USB_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
extern struct halmac_intf_phy_para usb2_phy_param_8822b[];
extern struct halmac_intf_phy_para usb3_phy_8822b[];
enum halmac_ret_status
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
phy_cfg_usb_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_usb_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_usb_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_USB_H_ */