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RTL88x2B Driver from Realtek. Version: 5.3.1

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Rin Cat
2018-11-23 15:19:44 -05:00
commit 95374e485a
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73
hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_8822B_CFG_H_
#define _HALMAC_8822B_CFG_H_
#include "../../halmac_hw_cfg.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822B_SUPPORT
#define TX_FIFO_SIZE_8822B 262144
#define RX_FIFO_SIZE_8822B 24576
#define TRX_SHARE_SIZE_8822B 65536
#define RX_DESC_DUMMY_SIZE_8822B 72 /* 8 * 9 Bytes */
#define RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B 80 /* 8 Byte alignment*/
/* should be 8 Byte alignment*/
#if (HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE <= \
RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B)
#define RX_FIFO_EXPANDING_UNIT_8822B (RX_DESC_SIZE_88XX + \
RX_DESC_DUMMY_SIZE_8822B + HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE)
#else
#define RX_FIFO_EXPANDING_UNIT_8822B (RX_DESC_SIZE_88XX + \
RX_DESC_DUMMY_SIZE_8822B + RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B)
#endif
#define TX_FIFO_SIZE_LA_8822B (TX_FIFO_SIZE_8822B >> 1)
#define TX_FIFO_SIZE_RX_EXPAND_1BLK_8822B \
(TX_FIFO_SIZE_8822B - TRX_SHARE_SIZE_8822B)
#define RX_FIFO_SIZE_RX_EXPAND_1BLK_8822B \
((((RX_FIFO_EXPANDING_UNIT_8822B << 8) - 1) >> 10) << 10)
#define TX_FIFO_SIZE_RX_EXPAND_2BLK_8822B \
(TX_FIFO_SIZE_8822B - (2 * TRX_SHARE_SIZE_8822B))
#define RX_FIFO_SIZE_RX_EXPAND_2BLK_8822B \
(RX_FIFO_SIZE_8822B + (2 * TRX_SHARE_SIZE_8822B))
#define TX_FIFO_SIZE_RX_EXPAND_3BLK_8822B \
(TX_FIFO_SIZE_8822B - (3 * TRX_SHARE_SIZE_8822B))
#define RX_FIFO_SIZE_RX_EXPAND_3BLK_8822B \
(RX_FIFO_SIZE_8822B + (3 * TRX_SHARE_SIZE_8822B))
#define EFUSE_SIZE_8822B 1024
#define EEPROM_SIZE_8822B 768
#define BT_EFUSE_SIZE_8822B 128
#define SEC_CAM_NUM_8822B 64
#define OQT_ENTRY_AC_8822B 32
#define OQT_ENTRY_NOAC_8822B 32
#define MACID_MAX_8822B 128
#define WLAN_FW_IRAM_MAX_SIZE_8822B 196608
#define WLAN_FW_DRAM_MAX_SIZE_8822B 49152
#define WLAN_FW_ERAM_MAX_SIZE_8822B 0
#define WLAN_FW_MAX_SIZE_8822B (WLAN_FW_IRAM_MAX_SIZE_8822B + \
WLAN_FW_DRAM_MAX_SIZE_8822B + WLAN_FW_ERAM_MAX_SIZE_8822B)
#endif /* HALMAC_8822B_SUPPORT*/
#endif

168
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_cfg_wmac_8822b.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_8822B_SUPPORT
/**
* cfg_drv_info_8822b() - config driver info
* @adapter : the adapter of halmac
* @drv_info : driver information selection
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_drv_info_8822b(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info)
{
u8 drv_info_size = 0;
u8 phy_status_en = 0;
u8 sniffer_en = 0;
u8 plcp_hdr_en = 0;
u8 value8;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_mac_rx_ignore_cfg cfg;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
switch (drv_info) {
case HALMAC_DRV_INFO_NONE:
drv_info_size = 0;
phy_status_en = 0;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_STATUS:
drv_info_size = 4;
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_SNIFFER:
drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
phy_status_en = 1;
sniffer_en = 1;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_PLCP:
drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 1;
cfg.hdr_chk_en = _FALSE;
break;
default:
return HALMAC_RET_SW_CASE_NOT_SUPPORT;
}
if (adapter->txff_alloc.rx_fifo_exp_mode !=
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
drv_info_size = RX_DESC_DUMMY_SIZE_8822B >> 3;
api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
value8 = HALMAC_REG_R8(REG_TRXFF_BNDY + 1);
value8 &= 0xF0;
/* For rxdesc len = 0 issue */
value8 |= 0xF;
HALMAC_REG_W8(REG_TRXFF_BNDY + 1, value8);
adapter->drv_info_size = drv_info_size;
value32 = HALMAC_REG_R32(REG_RCR);
value32 = (value32 & (~BIT_APP_PHYSTS));
if (phy_status_en == 1)
value32 = value32 | BIT_APP_PHYSTS;
HALMAC_REG_W32(REG_RCR, value32);
value32 = HALMAC_REG_R32(REG_WMAC_OPTION_FUNCTION + 4);
value32 = (value32 & (~(BIT(8) | BIT(9))));
if (sniffer_en == 1)
value32 = value32 | BIT(9);
if (plcp_hdr_en == 1)
value32 = value32 | BIT(8);
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 4, value32);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_low_pwr_8822b() - config WMAC register
* @adapter
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_low_pwr_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
void
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_BBPSF_CTRL);
/*mac header check enable*/
if (cfg->hdr_chk_en == _TRUE)
value8 |= BIT_BBPSF_MHCHKEN | BIT_BBPSF_MPDUCHKEN;
else
value8 &= ~(BIT_BBPSF_MHCHKEN) & (~(BIT_BBPSF_MPDUCHKEN));
HALMAC_REG_W8(REG_BBPSF_CTRL, value8);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
}
enum halmac_ret_status
cfg_ampdu_8822b(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (cfg->ht_max_len != cfg->vht_max_len) {
PLTFM_MSG_ERR("[ERR]max len ht != vht!!\n");
return HALMAC_RET_PARA_NOT_SUPPORT;
}
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 2, cfg->max_agg_num);
HALMAC_REG_W8(REG_PROT_MODE_CTRL + 3, cfg->max_agg_num);
if (cfg->max_len_en == 1)
HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH, cfg->ht_max_len);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

40
hal/halmac/halmac_88xx/halmac_8822b/halmac_cfg_wmac_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_CFG_WMAC_8822B_H_
#define _HALMAC_CFG_WMAC_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
cfg_drv_info_8822b(struct halmac_adapter *adapter,
enum halmac_drv_info drv_info);
enum halmac_ret_status
init_low_pwr_8822b(struct halmac_adapter *adapter);
void
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg);
enum halmac_ret_status
cfg_ampdu_8822b(struct halmac_adapter *adapter,
struct halmac_ampdu_config *cfg);
#endif/* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_CFG_WMAC_8822B_H_ */

168
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_8822b_cfg.h"
#include "halmac_common_8822b.h"
#include "../halmac_common_88xx.h"
#include "halmac_cfg_wmac_8822b.h"
#if HALMAC_8822B_SUPPORT
static void
cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable);
/**
* get_hw_value_8822b() -get hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to query
* @pvalue : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]%s (NULL ==pvalue)\n", __func__);
return HALMAC_RET_NULL_POINTER;
}
if (get_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_FW_MAX_SIZE:
*(u32 *)value = WLAN_FW_MAX_SIZE_8822B;
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* set_hw_value_8822b() -set hw config value
* @adapter : the adapter of halmac
* @hw_id : hw id for driver to config
* @pvalue : hw value, reference table to get data type
* Author : KaiYuan Chang / Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!value) {
PLTFM_MSG_ERR("[ERR]null pointer\n");
return HALMAC_RET_NULL_POINTER;
}
if (set_hw_value_88xx(adapter, hw_id, value) == HALMAC_RET_SUCCESS)
return HALMAC_RET_SUCCESS;
switch (hw_id) {
case HALMAC_HW_AMPDU_CONFIG:
status = cfg_ampdu_8822b(adapter,
(struct halmac_ampdu_config *)value);
break;
case HALMAC_HW_SDIO_TX_FORMAT:
break;
case HALMAC_HW_RXGCK_FIFO:
break;
case HALMAC_HW_RX_IGNORE:
cfg_rx_ignore_8822b(adapter,
(struct halmac_mac_rx_ignore_cfg *)value);
break;
case HALMAC_HW_LDO25_EN:
cfg_ldo25_8822b(adapter, *(u8 *)value);
break;
case HALMAC_HW_PCIE_REF_AUTOK:
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return status;
}
/**
* halmac_fill_txdesc_check_sum_88xx() - fill in tx desc check sum
* @adapter : the adapter of halmac
* @txdesc : tx desc packet
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
{
u16 chksum = 0;
u16 *data = (u16 *)NULL;
u32 i;
if (!txdesc) {
PLTFM_MSG_ERR("[ERR]null pointer");
return HALMAC_RET_NULL_POINTER;
}
if (adapter->tx_desc_checksum != _TRUE)
PLTFM_MSG_TRACE("[TRACE]chksum disable");
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000);
data = (u16 *)(txdesc);
/* HW clculates only 32byte */
for (i = 0; i < 8; i++)
chksum ^= (*(data + 2 * i) ^ *(data + (2 * i + 1)));
/* *(data + 2 * i) & *(data + (2 * i + 1) have endain issue*/
/* Process eniadn issue after checksum calculation */
chksum = rtk_le16_to_cpu(chksum);
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, chksum);
return HALMAC_RET_SUCCESS;
}
static void
cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_LDO_EFUSE_CTRL + 3);
if (enable == _TRUE)
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 | BIT(7)));
else
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 & ~BIT(7)));
}
#endif /* HALMAC_8822B_SUPPORT */

36
hal/halmac/halmac_88xx/halmac_8822b/halmac_common_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_COMMON_8822B_H_
#define _HALMAC_COMMON_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
get_hw_value_8822b(struct halmac_adapter *adapter,
enum halmac_hw_id hw_id, void *value);
enum halmac_ret_status
set_hw_value_8822b(struct halmac_adapter *adapter,
enum halmac_hw_id hw_id, void *value);
enum halmac_ret_status
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc);
#endif/* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_COMMON_8822B_H_ */

831
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_gpio_8822b.h"
#include "../halmac_gpio_88xx.h"
#if HALMAC_8822B_SUPPORT
/* GPIO0 definition */
#define GPIO0_BT_GPIO0_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO0_BT_ACT_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x41, BIT(1), 0}
#define GPIO0_WL_ACT_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO0_WLMAC_DBG_GPIO0_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO0_WLPHY_DBG_GPIO0_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO0_BT_DBG_GPIO0_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO0_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO1 definition */
#define GPIO1_BT_GPIO1_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO1_BT_3DD_SYNC_A_8822B \
{HALMAC_BT_3DDLS_A, HALMAC_GPIO1, HALMAC_GPIO_IN, \
0x66, BIT(2), BIT(2)}
#define GPIO1_WL_CK_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO1_BT_CK_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO1_WLMAC_DBG_GPIO1_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO1_WLPHY_DBG_GPIO1_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO1_BT_DBG_GPIO1_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO1_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO2 definition */
#define GPIO2_BT_GPIO2_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO2_WL_STATE_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO2_BT_STATE_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO2_WLMAC_DBG_GPIO2_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO2_WLPHY_DBG_GPIO2_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO2_BT_DBG_GPIO2_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO2_RFE_CTRL_5_8822B \
{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(2), BIT(2)}
#define GPIO2_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO3 definition */
#define GPIO3_BT_GPIO3_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x66, BIT(2), BIT(2)}
#define GPIO3_WL_PRI_8822B \
{HALMAC_BT_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x41, BIT(1), 0}
#define GPIO3_BT_PRI_8822B \
{HALMAC_WL_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x41, BIT(2), BIT(2)}
#define GPIO3_WLMAC_DBG_GPIO3_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO3_WLPHY_DBG_GPIO3_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO3_BT_DBG_GPIO3_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO3_RFE_CTRL_4_8822B \
{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(2), BIT(2)}
#define GPIO3_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO4 definition */
#define GPIO4_BT_SPI_D0_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO4_WL_SPI_D0_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO4_SDIO_INT_8822B \
{HALMAC_SDIO_INT, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x72, BIT(2), BIT(2)}
#define GPIO4_JTAG_TRST_8822B \
{HALMAC_JTAG, HALMAC_GPIO4, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO4_DBG_GNT_WL_8822B \
{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x73, BIT(3), BIT(3)}
#define GPIO4_WLMAC_DBG_GPIO4_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO4_WLPHY_DBG_GPIO4_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO4_BT_DBG_GPIO4_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO4_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO5 definition */
#define GPIO5_BT_SPI_D1_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO5_WL_SPI_D1_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO5_JTAG_TDI_8822B \
{HALMAC_JTAG, HALMAC_GPIO5, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO5_DBG_GNT_BT_8822B \
{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x73, BIT(3), BIT(3)}
#define GPIO5_WLMAC_DBG_GPIO5_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO5_WLPHY_DBG_GPIO5_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO5_BT_DBG_GPIO5_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO5_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO6 definition */
#define GPIO6_BT_SPI_D2_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO6_WL_SPI_D2_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO6_EEDO_8822B \
{HALMAC_EEPROM, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x40, BIT(4), BIT(4)}
#define GPIO6_JTAG_TDO_8822B \
{HALMAC_JTAG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x67, BIT(0), BIT(0)}
#define GPIO6_BT_3DD_SYNC_B_8822B \
{HALMAC_BT_3DDLS_B, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x67, BIT(1), BIT(1)}
#define GPIO6_BT_GPIO18_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x67, BIT(1), BIT(1)}
#define GPIO6_SIN_8822B \
{HALMAC_WL_UART, HALMAC_GPIO6, HALMAC_GPIO_IN, \
0x41, BIT(0), BIT(0)}
#define GPIO6_WLMAC_DBG_GPIO6_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO6_WLPHY_DBG_GPIO6_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO6_BT_DBG_GPIO6_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO6_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO7 definition */
#define GPIO7_BT_SPI_D3_8822B \
{HALMAC_BT_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x66, BIT(4), BIT(4)}
#define GPIO7_WL_SPI_D3_8822B \
{HALMAC_WL_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x42, BIT(3), BIT(3)}
#define GPIO7_EEDI_8822B \
{HALMAC_EEPROM, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(4), BIT(4)}
#define GPIO7_JTAG_TMS_8822B \
{HALMAC_JTAG, HALMAC_GPIO7, HALMAC_GPIO_IN, \
0x67, BIT(0), BIT(0)}
#define GPIO7_BT_GPIO16_8822B \
{HALMAC_BT_GPIO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x67, BIT(2), BIT(2)}
#define GPIO7_SOUT_8822B \
{HALMAC_WL_UART, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x41, BIT(0), BIT(0)}
#define GPIO7_WLMAC_DBG_GPIO7_8822B \
{HALMAC_WLMAC_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0)}
#define GPIO7_WLPHY_DBG_GPIO7_8822B \
{HALMAC_WLPHY_DBG, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), BIT(1)}
#define GPIO7_BT_DBG_GPIO7_8822B \
{HALMAC_BT_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, \
0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
#define GPIO7_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO8 definition */
#define GPIO8_WL_EXT_WOL_8822B \
{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO8, HALMAC_GPIO_IN, \
0x4a, BIT(0) | BIT(1), BIT(0) | BIT(1)}
#define GPIO8_WL_LED_8822B \
{HALMAC_WL_LED, HALMAC_GPIO8, HALMAC_GPIO_OUT, \
0x4e, BIT(5), BIT(5)}
#define GPIO8_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO8, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO9 definition */
#define GPIO9_DIS_WL_N_8822B \
{HALMAC_WL_HWPDN, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x68, BIT(3) | BIT(0), BIT(3) | BIT(0)}
#define GPIO9_WL_EXT_WOL_8822B \
{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x4a, BIT(0) | BIT(1), BIT(0)}
#define GPIO9_USCTS0_8822B \
{HALMAC_UART0, HALMAC_GPIO9, HALMAC_GPIO_IN, \
0x66, BIT(6), BIT(6)}
#define GPIO9_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO9, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO10 definition */
#define GPIO10_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO10, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO11 definition */
#define GPIO11_DIS_BT_N_8822B \
{HALMAC_BT_HWPDN, HALMAC_GPIO11, HALMAC_GPIO_IN, \
0x6a, BIT(0), BIT(0)}
#define GPIO11_USOUT0_8822B \
{HALMAC_UART0, HALMAC_GPIO11, HALMAC_GPIO_OUT, \
0x66, BIT(6), BIT(6)}
#define GPIO11_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO11, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO12 definition */
#define GPIO12_USIN0_8822B \
{HALMAC_UART0, HALMAC_GPIO12, HALMAC_GPIO_IN, \
0x66, BIT(6), BIT(6)}
#define GPIO12_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO12, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO13 definition */
#define GPIO13_BT_WAKE_8822B \
{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO13, HALMAC_GPIO_IN, \
0x4e, BIT(6), BIT(6)}
#define GPIO13_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO13, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO14 definition */
#define GPIO14_UART_WAKE_8822B \
{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO14, HALMAC_GPIO_OUT, \
0x4e, BIT(6), BIT(6)}
#define GPIO14_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO14, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
/* GPIO15 definition */
#define GPIO15_EXT_XTAL_8822B \
{HALMAC_EXT_XTAL, HALMAC_GPIO15, HALMAC_GPIO_OUT, \
0x66, BIT(7), BIT(7)}
#define GPIO15_SW_IO_8822B \
{HALMAC_SW_IO, HALMAC_GPIO15, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
GPIO0_BT_GPIO0_8822B,
GPIO0_BT_ACT_8822B,
GPIO0_WL_ACT_8822B,
GPIO0_WLMAC_DBG_GPIO0_8822B,
GPIO0_WLPHY_DBG_GPIO0_8822B,
GPIO0_BT_DBG_GPIO0_8822B,
GPIO0_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
GPIO1_BT_GPIO1_8822B,
GPIO1_BT_3DD_SYNC_A_8822B,
GPIO1_WL_CK_8822B,
GPIO1_BT_CK_8822B,
GPIO1_WLMAC_DBG_GPIO1_8822B,
GPIO1_WLPHY_DBG_GPIO1_8822B,
GPIO1_BT_DBG_GPIO1_8822B,
GPIO1_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
GPIO2_BT_GPIO2_8822B,
GPIO2_WL_STATE_8822B,
GPIO2_BT_STATE_8822B,
GPIO2_WLMAC_DBG_GPIO2_8822B,
GPIO2_WLPHY_DBG_GPIO2_8822B,
GPIO2_BT_DBG_GPIO2_8822B,
GPIO2_RFE_CTRL_5_8822B,
GPIO2_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
GPIO3_BT_GPIO3_8822B,
GPIO3_WL_PRI_8822B,
GPIO3_BT_PRI_8822B,
GPIO3_WLMAC_DBG_GPIO3_8822B,
GPIO3_WLPHY_DBG_GPIO3_8822B,
GPIO3_BT_DBG_GPIO3_8822B,
GPIO3_RFE_CTRL_4_8822B,
GPIO3_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
GPIO4_BT_SPI_D0_8822B,
GPIO4_WL_SPI_D0_8822B,
GPIO4_SDIO_INT_8822B,
GPIO4_JTAG_TRST_8822B,
GPIO4_DBG_GNT_WL_8822B,
GPIO4_WLMAC_DBG_GPIO4_8822B,
GPIO4_WLPHY_DBG_GPIO4_8822B,
GPIO4_BT_DBG_GPIO4_8822B,
GPIO4_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
GPIO5_BT_SPI_D1_8822B,
GPIO5_WL_SPI_D1_8822B,
GPIO5_JTAG_TDI_8822B,
GPIO5_DBG_GNT_BT_8822B,
GPIO5_WLMAC_DBG_GPIO5_8822B,
GPIO5_WLPHY_DBG_GPIO5_8822B,
GPIO5_BT_DBG_GPIO5_8822B,
GPIO5_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
GPIO6_BT_SPI_D2_8822B,
GPIO6_WL_SPI_D2_8822B,
GPIO6_EEDO_8822B,
GPIO6_JTAG_TDO_8822B,
GPIO6_BT_3DD_SYNC_B_8822B,
GPIO6_BT_GPIO18_8822B,
GPIO6_SIN_8822B,
GPIO6_WLMAC_DBG_GPIO6_8822B,
GPIO6_WLPHY_DBG_GPIO6_8822B,
GPIO6_BT_DBG_GPIO6_8822B,
GPIO6_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
GPIO7_BT_SPI_D3_8822B,
GPIO7_WL_SPI_D3_8822B,
GPIO7_EEDI_8822B,
GPIO7_JTAG_TMS_8822B,
GPIO7_BT_GPIO16_8822B,
GPIO7_SOUT_8822B,
GPIO7_WLMAC_DBG_GPIO7_8822B,
GPIO7_WLPHY_DBG_GPIO7_8822B,
GPIO7_BT_DBG_GPIO7_8822B,
GPIO7_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO8_8822B[] = {
GPIO8_WL_EXT_WOL_8822B,
GPIO8_WL_LED_8822B,
GPIO8_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO9_8822B[] = {
GPIO9_DIS_WL_N_8822B,
GPIO9_WL_EXT_WOL_8822B,
GPIO9_USCTS0_8822B,
GPIO9_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO10_8822B[] = {
GPIO10_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO11_8822B[] = {
GPIO11_DIS_BT_N_8822B,
GPIO11_USOUT0_8822B,
GPIO11_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO12_8822B[] = {
GPIO12_USIN0_8822B,
GPIO12_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO13_8822B[] = {
GPIO13_BT_WAKE_8822B,
GPIO13_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO14_8822B[] = {
GPIO14_UART_WAKE_8822B,
GPIO14_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO15_8822B[] = {
GPIO15_EXT_XTAL_8822B,
GPIO15_SW_IO_8822B
};
static enum halmac_ret_status
get_pinmux_list_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func,
const struct halmac_gpio_pimux_list **list,
u32 *list_size, u32 *gpio_id);
static enum halmac_ret_status
chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
/**
* pinmux_get_func_8822b() -get current gpio status
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* @enable : function is enable(1) or disable(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_get_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 *enable)
{
u32 list_size;
u32 cur_func;
u32 gpio_id;
enum halmac_ret_status status;
const struct halmac_gpio_pimux_list *list = NULL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = get_pinmux_list_8822b(adapter, gpio_func, &list, &list_size,
&gpio_id);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_parser_88xx(adapter, list, list_size, gpio_id,
&cur_func);
if (status != HALMAC_RET_SUCCESS)
return status;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
*enable = (cur_func == HALMAC_WL_LED) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
*enable = (cur_func == HALMAC_SDIO_INT) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
case HALMAC_GPIO_FUNC_SW_IO_3:
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SW_IO_5:
case HALMAC_GPIO_FUNC_SW_IO_6:
case HALMAC_GPIO_FUNC_SW_IO_7:
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_SW_IO_9:
case HALMAC_GPIO_FUNC_SW_IO_10:
case HALMAC_GPIO_FUNC_SW_IO_11:
case HALMAC_GPIO_FUNC_SW_IO_12:
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_SW_IO_15:
*enable = (cur_func == HALMAC_SW_IO) ? 1 : 0;
break;
default:
*enable = 0;
return HALMAC_RET_GET_PINMUX_ERR;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_set_func_8822b() -set gpio function
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_set_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
u32 list_size;
u32 gpio_id;
enum halmac_ret_status status;
const struct halmac_gpio_pimux_list *list = NULL;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]func name : %d\n", gpio_func);
status = chk_pinmux_valid_8822b(adapter, gpio_func);
if (status != HALMAC_RET_SUCCESS)
return status;
status = get_pinmux_list_8822b(adapter, gpio_func, &list, &list_size,
&gpio_id);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_switch_88xx(adapter, list, list_size, gpio_id,
gpio_func);
if (status != HALMAC_RET_SUCCESS)
return status;
status = pinmux_record_88xx(adapter, gpio_func, 1);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_free_func_8822b() -free locked gpio function
* @adapter : the adapter of halmac
* @gpio_func : gpio function
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_free_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
struct halmac_pinmux_info *info = &adapter->pinmux_info;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
info->sw_io_0 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
info->sw_io_1 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
info->sw_io_2 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
info->sw_io_3 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
info->sw_io_4 = 0;
info->sdio_int = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
info->sw_io_5 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
info->sw_io_6 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
info->sw_io_7 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
info->sw_io_8 = 0;
info->wl_led = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
info->sw_io_9 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
info->sw_io_10 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
info->sw_io_11 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
info->sw_io_12 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
info->sw_io_13 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
info->sw_io_14 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
info->sw_io_15 = 0;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
PLTFM_MSG_TRACE("[TRACE]func : %X\n", gpio_func);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
get_pinmux_list_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func,
const struct halmac_gpio_pimux_list **list,
u32 *list_size, u32 *gpio_id)
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
*list = PIMUX_LIST_GPIO0_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO0_8822B);
*gpio_id = HALMAC_GPIO0;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
*list = PIMUX_LIST_GPIO1_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO1_8822B);
*gpio_id = HALMAC_GPIO1;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
*list = PIMUX_LIST_GPIO2_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO2_8822B);
*gpio_id = HALMAC_GPIO2;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
*list = PIMUX_LIST_GPIO3_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO3_8822B);
*gpio_id = HALMAC_GPIO3;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
*list = PIMUX_LIST_GPIO4_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO4_8822B);
*gpio_id = HALMAC_GPIO4;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
*list = PIMUX_LIST_GPIO5_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO5_8822B);
*gpio_id = HALMAC_GPIO5;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
*list = PIMUX_LIST_GPIO6_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO6_8822B);
*gpio_id = HALMAC_GPIO6;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
*list = PIMUX_LIST_GPIO7_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO7_8822B);
*gpio_id = HALMAC_GPIO7;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
*list = PIMUX_LIST_GPIO8_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO8_8822B);
*gpio_id = HALMAC_GPIO8;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
*list = PIMUX_LIST_GPIO9_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO9_8822B);
*gpio_id = HALMAC_GPIO9;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
*list = PIMUX_LIST_GPIO10_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO10_8822B);
*gpio_id = HALMAC_GPIO10;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
*list = PIMUX_LIST_GPIO11_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO11_8822B);
*gpio_id = HALMAC_GPIO11;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
*list = PIMUX_LIST_GPIO12_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO12_8822B);
*gpio_id = HALMAC_GPIO12;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
*list = PIMUX_LIST_GPIO13_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO13_8822B);
*gpio_id = HALMAC_GPIO13;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
*list = PIMUX_LIST_GPIO14_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO14_8822B);
*gpio_id = HALMAC_GPIO14;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
*list = PIMUX_LIST_GPIO15_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO15_8822B);
*gpio_id = HALMAC_GPIO15;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func)
{
struct halmac_pinmux_info *info = &adapter->pinmux_info;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
if (info->sw_io_0 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
if (info->sw_io_1 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
if (info->sw_io_2 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
if (info->sw_io_3 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
if (info->sw_io_4 == 1 || info->sdio_int == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
if (info->sw_io_5 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
if (info->sw_io_6 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
if (info->sw_io_7 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
if (info->sw_io_8 == 1 || info->wl_led == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
if (info->sw_io_9 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
if (info->sw_io_10 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
if (info->sw_io_11 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
if (info->sw_io_12 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
if (info->sw_io_13 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
if (info->sw_io_14 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
if (info->sw_io_15 == 1)
status = HALMAC_RET_PINMUX_USED;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
PLTFM_MSG_TRACE("[TRACE]chk_pinmux_valid func : %X status : %X\n",
gpio_func, status);
return status;
}
#endif /* HALMAC_8822B_SUPPORT */

38
hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h Normal file
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@@ -0,0 +1,38 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_GPIO_8822B_H_
#define _HALMAC_GPIO_8822B_H_
#include "../../halmac_api.h"
#include "../../halmac_gpio_cmd.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
pinmux_get_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 *enable);
enum halmac_ret_status
pinmux_set_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
enum halmac_ret_status
pinmux_free_func_8822b(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func);
#endif /* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_GPIO_8822B_H_ */

724
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_init_8822b.h"
#include "halmac_8822b_cfg.h"
#include "halmac_pcie_8822b.h"
#include "halmac_sdio_8822b.h"
#include "halmac_usb_8822b.h"
#include "halmac_gpio_8822b.h"
#include "halmac_common_8822b.h"
#include "halmac_cfg_wmac_8822b.h"
#include "../halmac_common_88xx.h"
#include "../halmac_init_88xx.h"
#if HALMAC_8822B_SUPPORT
#define RSVD_PG_DRV_NUM 16
#define RSVD_PG_H2C_EXTRAINFO_NUM 24
#define RSVD_PG_H2C_STATICINFO_NUM 8
#define RSVD_PG_H2CQ_NUM 8
#define RSVD_PG_CPU_INSTRUCTION_NUM 0
#define RSVD_PG_FW_TXBUF_NUM 4
#define RSVD_PG_CSIBUF_NUM 0
#define RSVD_PG_DLLB_NUM 32
#define MAC_TRX_ENABLE (BIT_HCI_TXDMA_EN | BIT_HCI_RXDMA_EN | BIT_TXDMA_EN | \
BIT_RXDMA_EN | BIT_PROTOCOL_EN | BIT_SCHEDULE_EN | \
BIT_MACTXEN | BIT_MACRXEN)
#define BLK_DESC_NUM 0x3
#define WLAN_AMPDU_MAX_TIME 0x70
#define WLAN_RTS_LEN_TH 0xFF
#define WLAN_RTS_TX_TIME_TH 0x08
#define WLAN_MAX_AGG_PKT_LIMIT 0x20
#define WLAN_RTS_MAX_AGG_PKT_LIMIT 0x20
#define WALN_FAST_EDCA_VO_TH 0x06
#define WLAN_FAST_EDCA_VI_TH 0x06
#define WLAN_FAST_EDCA_BE_TH 0x06
#define WLAN_FAST_EDCA_BK_TH 0x06
#define WLAN_BAR_RETRY_LIMIT 0x01
#define WLAN_RA_TRY_RATE_AGG_LIMIT 0x08
#if HALMAC_PLATFORM_WINDOWS
/*SDIO RQPN Mapping for Windows, extra queue is not implemented in Driver code*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
#else
/*SDIO RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
#endif
/*PCIE RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
/*USB 2 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
/*USB 3 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
};
/*USB 4 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_TRXSHARE,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_WMM,
HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_P2P,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
{HALMAC_TRX_MODE_DELAY_LOOPBACK,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
};
#if HALMAC_PLATFORM_WINDOWS
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 640},
};
#else
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
#endif
/*PCIE Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
/*USB 2 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
};
/*USB 3 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
};
/*USB 4 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
};
static enum halmac_ret_status
txdma_queue_mapping_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
static enum halmac_ret_status
priority_queue_cfg_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
static enum halmac_ret_status
set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode);
enum halmac_ret_status
mount_api_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
adapter->chip_id = HALMAC_CHIP_ID_8822B;
adapter->hw_cfg_info.efuse_size = EFUSE_SIZE_8822B;
adapter->hw_cfg_info.eeprom_size = EEPROM_SIZE_8822B;
adapter->hw_cfg_info.bt_efuse_size = BT_EFUSE_SIZE_8822B;
adapter->hw_cfg_info.cam_entry_num = SEC_CAM_NUM_8822B;
adapter->hw_cfg_info.tx_fifo_size = TX_FIFO_SIZE_8822B;
adapter->hw_cfg_info.rx_fifo_size = RX_FIFO_SIZE_8822B;
adapter->hw_cfg_info.ac_oqt_size = OQT_ENTRY_AC_8822B;
adapter->hw_cfg_info.non_ac_oqt_size = OQT_ENTRY_NOAC_8822B;
adapter->hw_cfg_info.usb_txagg_num = BLK_DESC_NUM;
adapter->txff_alloc.rsvd_drv_pg_num = RSVD_PG_DRV_NUM;
api->halmac_init_trx_cfg = init_trx_cfg_8822b;
api->halmac_init_protocol_cfg = init_protocol_cfg_8822b;
api->halmac_init_h2c = init_h2c_8822b;
api->halmac_pinmux_get_func = pinmux_get_func_8822b;
api->halmac_pinmux_set_func = pinmux_set_func_8822b;
api->halmac_pinmux_free_func = pinmux_free_func_8822b;
api->halmac_get_hw_value = get_hw_value_8822b;
api->halmac_set_hw_value = set_hw_value_8822b;
api->halmac_cfg_drv_info = cfg_drv_info_8822b;
api->halmac_fill_txdesc_checksum = fill_txdesc_check_sum_8822b;
api->halmac_init_low_pwr = init_low_pwr_8822b;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
api->halmac_mac_power_switch = mac_pwr_switch_sdio_8822b;
api->halmac_phy_cfg = phy_cfg_sdio_8822b;
api->halmac_pcie_switch = pcie_switch_sdio_8822b;
api->halmac_interface_integration_tuning = intf_tun_sdio_8822b;
api->halmac_tx_allowed_sdio = tx_allowed_sdio_8822b;
api->halmac_get_sdio_tx_addr = get_sdio_tx_addr_8822b;
api->halmac_reg_read_8 = reg_r8_sdio_8822b;
api->halmac_reg_write_8 = reg_w8_sdio_8822b;
api->halmac_reg_read_16 = reg_r16_sdio_8822b;
api->halmac_reg_write_16 = reg_w16_sdio_8822b;
api->halmac_reg_read_32 = reg_r32_sdio_8822b;
api->halmac_reg_write_32 = reg_w32_sdio_8822b;
adapter->sdio_fs.macid_map_size = MACID_MAX_8822B * 2;
if (!adapter->sdio_fs.macid_map) {
adapter->sdio_fs.macid_map =
(u8 *)PLTFM_MALLOC(adapter->sdio_fs.macid_map_size);
if (!adapter->sdio_fs.macid_map)
PLTFM_MSG_ERR("[ERR]allocate macid_map!!\n");
}
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
api->halmac_mac_power_switch = mac_pwr_switch_usb_8822b;
api->halmac_phy_cfg = phy_cfg_usb_8822b;
api->halmac_pcie_switch = pcie_switch_usb_8822b;
api->halmac_interface_integration_tuning = intf_tun_usb_8822b;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
api->halmac_mac_power_switch = mac_pwr_switch_pcie_8822b;
api->halmac_phy_cfg = phy_cfg_pcie_8822b;
api->halmac_pcie_switch = pcie_switch_8822b;
api->halmac_interface_integration_tuning = intf_tun_pcie_8822b;
} else {
PLTFM_MSG_ERR("[ERR]Undefined IC\n");
return HALMAC_RET_CHIP_NOT_SUPPORT;
}
return HALMAC_RET_SUCCESS;
}
/**
* init_trx_cfg_8822b() - config trx dma register
* @adapter : the adapter of halmac
* @mode : trx mode selection
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
adapter->trx_mode = mode;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = txdma_queue_mapping_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]queue mapping\n");
return status;
}
value8 = 0;
HALMAC_REG_W8(REG_CR, value8);
value8 = MAC_TRX_ENABLE;
HALMAC_REG_W8(REG_CR, value8);
HALMAC_REG_W32(REG_H2CQ_CSR, BIT(31));
status = priority_queue_cfg_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]halmac_txdma_queue_mapping fail!\n");
return status;
}
if (adapter->txff_alloc.rx_fifo_exp_mode !=
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, RX_DESC_DUMMY_SIZE_8822B >> 3);
status = init_h2c_8822b(adapter);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]init h2cq!\n");
return status;
}
if (adapter->intf == HALMAC_INTERFACE_USB)
HALMAC_REG_W8_SET(REG_TXDMA_PQ_MAP, BIT(0));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
txdma_queue_mapping_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u16 value16;
struct halmac_rqpn *cur_rqpn_sel = NULL;
enum halmac_ret_status status;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
cur_rqpn_sel = HALMAC_RQPN_SDIO_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
cur_rqpn_sel = HALMAC_RQPN_PCIE_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
if (adapter->bulkout_num == 2) {
cur_rqpn_sel = HALMAC_RQPN_2BULKOUT_8822B;
} else if (adapter->bulkout_num == 3) {
cur_rqpn_sel = HALMAC_RQPN_3BULKOUT_8822B;
} else if (adapter->bulkout_num == 4) {
cur_rqpn_sel = HALMAC_RQPN_4BULKOUT_8822B;
} else {
PLTFM_MSG_ERR("[ERR]invalid intf\n");
return HALMAC_RET_NOT_SUPPORT;
}
} else {
return HALMAC_RET_NOT_SUPPORT;
}
status = rqpn_parser_88xx(adapter, mode, cur_rqpn_sel);
if (status != HALMAC_RET_SUCCESS)
return status;
value16 = 0;
value16 |= BIT_TXDMA_HIQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_HI]);
value16 |= BIT_TXDMA_MGQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_MG]);
value16 |= BIT_TXDMA_BKQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_BK]);
value16 |= BIT_TXDMA_BEQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_BE]);
value16 |= BIT_TXDMA_VIQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_VI]);
value16 |= BIT_TXDMA_VOQ_MAP(adapter->pq_map[HALMAC_PQ_MAP_VO]);
HALMAC_REG_W16(REG_TXDMA_PQ_MAP, value16);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
priority_queue_cfg_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u8 transfer_mode = 0;
u8 value8;
u32 cnt;
struct halmac_txff_allocation *txff_info = &adapter->txff_alloc;
enum halmac_ret_status status;
struct halmac_pg_num *cur_pg_num = NULL;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
status = set_trx_fifo_info_8822b(adapter, mode);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]set trx fifo!!\n");
return status;
}
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
cur_pg_num = HALMAC_PG_NUM_SDIO_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
cur_pg_num = HALMAC_PG_NUM_PCIE_8822B;
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
if (adapter->bulkout_num == 2) {
cur_pg_num = HALMAC_PG_NUM_2BULKOUT_8822B;
} else if (adapter->bulkout_num == 3) {
cur_pg_num = HALMAC_PG_NUM_3BULKOUT_8822B;
} else if (adapter->bulkout_num == 4) {
cur_pg_num = HALMAC_PG_NUM_4BULKOUT_8822B;
} else {
PLTFM_MSG_ERR("[ERR]interface not support\n");
return HALMAC_RET_NOT_SUPPORT;
}
} else {
return HALMAC_RET_NOT_SUPPORT;
}
status = pg_num_parser_88xx(adapter, mode, cur_pg_num);
if (status != HALMAC_RET_SUCCESS)
return status;
HALMAC_REG_W16(REG_FIFOPAGE_INFO_1, txff_info->high_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_2, txff_info->low_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_3, txff_info->normal_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_4, txff_info->extra_queue_pg_num);
HALMAC_REG_W16(REG_FIFOPAGE_INFO_5, txff_info->pub_queue_pg_num);
HALMAC_REG_W32_SET(REG_RQPN_CTRL_2, BIT(31));
adapter->sdio_fs.hiq_pg_num = txff_info->high_queue_pg_num;
adapter->sdio_fs.miq_pg_num = txff_info->normal_queue_pg_num;
adapter->sdio_fs.lowq_pg_num = txff_info->low_queue_pg_num;
adapter->sdio_fs.pubq_pg_num = txff_info->pub_queue_pg_num;
adapter->sdio_fs.exq_pg_num = txff_info->extra_queue_pg_num;
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, txff_info->rsvd_boundary);
HALMAC_REG_W8_SET(REG_FWHW_TXQ_CTRL + 2, BIT(4));
/*20170411 Soar*/
/* SDIO sometimes use two CMD52 to do HALMAC_REG_W16 */
/* and may cause a mismatch between HW status and Reg value. */
/* A patch is to write high byte first, suggested by Argis */
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
value8 = (u8)(txff_info->rsvd_boundary >> 8 & 0xFF);
HALMAC_REG_W8(REG_BCNQ_BDNY_V1 + 1, value8);
value8 = (u8)(txff_info->rsvd_boundary & 0xFF);
HALMAC_REG_W8(REG_BCNQ_BDNY_V1, value8);
} else {
HALMAC_REG_W16(REG_BCNQ_BDNY_V1, txff_info->rsvd_boundary);
}
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2 + 2, txff_info->rsvd_boundary);
/*20170411 Soar*/
/* SDIO sometimes use two CMD52 to do HALMAC_REG_W16 */
/* and may cause a mismatch between HW status and Reg value. */
/* A patch is to write high byte first, suggested by Argis */
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
value8 = (u8)(txff_info->rsvd_boundary >> 8 & 0xFF);
HALMAC_REG_W8(REG_BCNQ1_BDNY_V1 + 1, value8);
value8 = (u8)(txff_info->rsvd_boundary & 0xFF);
HALMAC_REG_W8(REG_BCNQ1_BDNY_V1, value8);
} else {
HALMAC_REG_W16(REG_BCNQ1_BDNY_V1, txff_info->rsvd_boundary);
}
HALMAC_REG_W32(REG_RXFF_BNDY,
adapter->hw_cfg_info.rx_fifo_size -
C2H_PKT_BUF_88XX - 1);
if (adapter->intf == HALMAC_INTERFACE_USB) {
value8 = HALMAC_REG_R8(REG_AUTO_LLT_V1);
value8 &= ~(BIT_MASK_BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM);
value8 |= (BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM);
HALMAC_REG_W8(REG_AUTO_LLT_V1, value8);
HALMAC_REG_W8(REG_AUTO_LLT_V1 + 3, BLK_DESC_NUM);
HALMAC_REG_W8_SET(REG_TXDMA_OFFSET_CHK + 1, BIT(1));
}
HALMAC_REG_W8_SET(REG_AUTO_LLT_V1, BIT_AUTO_INIT_LLT_V1);
cnt = 1000;
while (HALMAC_REG_R8(REG_AUTO_LLT_V1) & BIT_AUTO_INIT_LLT_V1) {
cnt--;
if (cnt == 0)
return HALMAC_RET_INIT_LLT_FAIL;
}
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK) {
transfer_mode = HALMAC_TRNSFER_LOOPBACK_DELAY;
HALMAC_REG_W16(REG_WMAC_LBK_BUF_HD_V1,
adapter->txff_alloc.rsvd_boundary);
} else if (mode == HALMAC_TRX_MODE_LOOPBACK) {
transfer_mode = HALMAC_TRNSFER_LOOPBACK_DIRECT;
} else {
transfer_mode = HALMAC_TRNSFER_NORMAL;
}
adapter->hw_cfg_info.trx_mode = transfer_mode;
HALMAC_REG_W8(REG_CR + 3, transfer_mode);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
enum halmac_trx_mode mode)
{
u16 cur_pg_addr;
u32 txff_size = TX_FIFO_SIZE_8822B;
u32 rxff_size = RX_FIFO_SIZE_8822B;
struct halmac_txff_allocation *info = &adapter->txff_alloc;
if (info->rx_fifo_exp_mode == HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK) {
txff_size = TX_FIFO_SIZE_RX_EXPAND_1BLK_8822B;
rxff_size = RX_FIFO_SIZE_RX_EXPAND_1BLK_8822B;
}
if (info->la_mode != HALMAC_LA_MODE_DISABLE) {
txff_size = TX_FIFO_SIZE_LA_8822B;
rxff_size = RX_FIFO_SIZE_8822B;
}
adapter->hw_cfg_info.tx_fifo_size = txff_size;
adapter->hw_cfg_info.rx_fifo_size = rxff_size;
info->tx_fifo_pg_num = (u16)(txff_size >> TX_PAGE_SIZE_SHIFT_88XX);
info->rsvd_pg_num = info->rsvd_drv_pg_num +
RSVD_PG_H2C_EXTRAINFO_NUM +
RSVD_PG_H2C_STATICINFO_NUM +
RSVD_PG_H2CQ_NUM +
RSVD_PG_CPU_INSTRUCTION_NUM +
RSVD_PG_FW_TXBUF_NUM +
RSVD_PG_CSIBUF_NUM;
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK)
info->rsvd_pg_num += RSVD_PG_DLLB_NUM;
if (info->rsvd_pg_num > info->tx_fifo_pg_num)
return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
info->acq_pg_num = info->tx_fifo_pg_num - info->rsvd_pg_num;
info->rsvd_boundary = info->tx_fifo_pg_num - info->rsvd_pg_num;
cur_pg_addr = info->tx_fifo_pg_num;
cur_pg_addr -= RSVD_PG_CSIBUF_NUM;
info->rsvd_csibuf_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_FW_TXBUF_NUM;
info->rsvd_fw_txbuf_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_CPU_INSTRUCTION_NUM;
info->rsvd_cpu_instr_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2CQ_NUM;
info->rsvd_h2cq_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2C_STATICINFO_NUM;
info->rsvd_h2c_sta_info_addr = cur_pg_addr;
cur_pg_addr -= RSVD_PG_H2C_EXTRAINFO_NUM;
info->rsvd_h2c_info_addr = cur_pg_addr;
cur_pg_addr -= info->rsvd_drv_pg_num;
info->rsvd_drv_addr = cur_pg_addr;
if (mode == HALMAC_TRX_MODE_DELAY_LOOPBACK)
info->rsvd_drv_addr -= RSVD_PG_DLLB_NUM;
if (info->rsvd_boundary != info->rsvd_drv_addr)
return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
return HALMAC_RET_SUCCESS;
}
/**
* init_protocol_cfg_8822b() - config protocol register
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_protocol_cfg_8822b(struct halmac_adapter *adapter)
{
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_W8_CLR(REG_SW_AMPDU_BURST_MODE_CTRL, BIT(6));
HALMAC_REG_W8(REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME);
HALMAC_REG_W8(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
value32 = WLAN_RTS_LEN_TH | (WLAN_RTS_TX_TIME_TH << 8) |
(WLAN_MAX_AGG_PKT_LIMIT << 16) |
(WLAN_RTS_MAX_AGG_PKT_LIMIT << 24);
HALMAC_REG_W32(REG_PROT_MODE_CTRL, value32);
HALMAC_REG_W16(REG_BAR_MODE_CTRL + 2,
WLAN_BAR_RETRY_LIMIT | WLAN_RA_TRY_RATE_AGG_LIMIT << 8);
HALMAC_REG_W8(REG_FAST_EDCA_VOVI_SETTING, WALN_FAST_EDCA_VO_TH);
HALMAC_REG_W8(REG_FAST_EDCA_VOVI_SETTING + 2, WLAN_FAST_EDCA_VI_TH);
HALMAC_REG_W8(REG_FAST_EDCA_BEBK_SETTING, WLAN_FAST_EDCA_BE_TH);
HALMAC_REG_W8(REG_FAST_EDCA_BEBK_SETTING + 2, WLAN_FAST_EDCA_BK_TH);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_h2c_8822b() - config h2c packet buffer
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_h2c_8822b(struct halmac_adapter *adapter)
{
u8 value8;
u32 value32;
u32 h2cq_addr;
u32 h2cq_size;
struct halmac_txff_allocation *txff_info = &adapter->txff_alloc;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
h2cq_addr = txff_info->rsvd_h2cq_addr << TX_PAGE_SIZE_SHIFT_88XX;
h2cq_size = RSVD_PG_H2CQ_NUM << TX_PAGE_SIZE_SHIFT_88XX;
value32 = HALMAC_REG_R32(REG_H2C_HEAD);
value32 = (value32 & 0xFFFC0000) | h2cq_addr;
HALMAC_REG_W32(REG_H2C_HEAD, value32);
value32 = HALMAC_REG_R32(REG_H2C_READ_ADDR);
value32 = (value32 & 0xFFFC0000) | h2cq_addr;
HALMAC_REG_W32(REG_H2C_READ_ADDR, value32);
value32 = HALMAC_REG_R32(REG_H2C_TAIL);
value32 &= 0xFFFC0000;
value32 |= (h2cq_addr + h2cq_size);
HALMAC_REG_W32(REG_H2C_TAIL, value32);
value8 = HALMAC_REG_R8(REG_H2C_INFO);
value8 = (u8)((value8 & 0xFC) | 0x01);
HALMAC_REG_W8(REG_H2C_INFO, value8);
value8 = HALMAC_REG_R8(REG_H2C_INFO);
value8 = (u8)((value8 & 0xFB) | 0x04);
HALMAC_REG_W8(REG_H2C_INFO, value8);
value8 = HALMAC_REG_R8(REG_TXDMA_OFFSET_CHK + 1);
value8 = (u8)((value8 & 0x7f) | 0x80);
HALMAC_REG_W8(REG_TXDMA_OFFSET_CHK + 1, value8);
adapter->h2c_info.buf_size = h2cq_size;
get_h2c_buf_free_space_88xx(adapter);
if (adapter->h2c_info.buf_size != adapter->h2c_info.buf_fs) {
PLTFM_MSG_ERR("[ERR]get h2c free space error!\n");
return HALMAC_RET_GET_H2C_SPACE_ERR;
}
PLTFM_MSG_TRACE("[TRACE]h2c fs : %d\n", adapter->h2c_info.buf_fs);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

37
hal/halmac/halmac_88xx/halmac_8822b/halmac_init_8822b.h Normal file
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@@ -0,0 +1,37 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_INIT_8822B_H_
#define _HALMAC_INIT_8822B_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
mount_api_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
enum halmac_ret_status
init_protocol_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_h2c_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_INIT_8822B_H_ */

214
hal/halmac/halmac_88xx/halmac_8822b/halmac_pcie_8822b.c Normal file
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@@ -0,0 +1,214 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pcie_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_pcie_88xx.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822B_SUPPORT
/**
* mac_pwr_switch_pcie_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]pwr = %x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_PCIE_HRPWM1_V1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_PCIE_HRPWM1_V1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/* Check if power switch is needed */
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
if (pwr == HALMAC_MAC_POWER_OFF) {
status = trxdma_check_idle_88xx(adapter);
if (status != HALMAC_RET_SUCCESS)
return status;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
{
u8 value8;
u32 value32;
u8 speed = 0;
u32 cnt = 0;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (cfg == HALMAC_PCIE_GEN1) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(0));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN1_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN1_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else if (cfg == HALMAC_PCIE_GEN2) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(1));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN2_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN2_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else {
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
return HALMAC_RET_FAIL;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_pcie_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = parse_intf_phy_88xx(adapter, pcie_gen1_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN1);
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, pcie_gen2_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN2);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* intf_tun_pcie_8822b() - pcie interface fine tuning
* @adapter : the adapter of halmac
* Author : Rick Liu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

42
hal/halmac/halmac_88xx/halmac_8822b/halmac_pcie_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_PCIE_H_
#define _HALMAC_API_8822B_PCIE_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
extern struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[];
extern struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[];
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_PCIE_H_ */

150
hal/halmac/halmac_88xx/halmac_8822b/halmac_phy_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "../../halmac_type.h"
/**
* ============ip sel item list============
* HALMAC_IP_INTF_PHY
* USB2 : usb2 phy, 1byte value
* USB3 : usb3 phy, 2byte value
* PCIE1 : pcie gen1 mdio, 2byte value
* PCIE2 : pcie gen2 mdio, 2byte value
* HALMAC_IP_SEL_MAC
* USB2, USB3, PCIE1, PCIE2 : mac ip, 1byte value
* HALMAC_IP_PCIE_DBI
* USB2 USB3 : none
* PCIE1, PCIE2 : pcie dbi, 1byte value
*/
#if HALMAC_8822B_SUPPORT
struct halmac_intf_phy_para usb2_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0xFFFF, 0x00,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para usb3_phy_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_D,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0008, 0x3596,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x002A, 0x1840,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0002, 0x60C6,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0008, 0x3597,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0009, 0x321C,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x000A, 0x9623,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0020, 0x94FF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0021, 0xFFCF,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0026, 0xC006,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x0029, 0xFF0E,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0x002A, 0x3040,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_C,
HALMAC_INTF_PHY_PLATFORM_ALL},
{0xFFFF, 0x0000,
HALMAC_IP_INTF_PHY,
HALMAC_INTF_PHY_CUT_ALL,
HALMAC_INTF_PHY_PLATFORM_ALL},
};
#endif /* HALMAC_8822B_SUPPORT*/

914
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pwr_seq_8822b.h"
#if HALMAC_8822B_SUPPORT
struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4) | BIT(7), 0},
{0x0300,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0001,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 1, HALMAC_PWR_DELAY_MS},
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT(2)), 0},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0075,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0},
{0x10C3,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(0), 0},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x10A8,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x10A9,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xef},
{0x10AA,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x0c},
{0x0068,
HALMAC_PWR_CUT_C_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0029,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xF9},
{0x0024,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0074,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x00AF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0003,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x001F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x00EF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFF1A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x30},
{0x0049,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x10C3,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0x0020,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), 0},
{0x0000,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x004A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x004F,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0046,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(6), BIT(6)},
{0x0067,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0x0046,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0062,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0081,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0044,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0040,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x90},
{0x0041,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x00},
{0x0042,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Card Enable Array */
struct halmac_wlan_pwr_cfg *card_en_flow_8822b[] = {
TRANS_CARDDIS_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_ACT_8822B,
NULL
};
/* Card Disable Array */
struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[] = {
TRANS_ACT_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_CARDDIS_8822B,
NULL
};
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT(4) | BIT(3))},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) | BIT(4)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(7), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK | HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0006,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x42},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0553,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)},
{0x0199,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)},
{0x019B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x1138,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0) | BIT(1), BIT(0) | BIT(1)},
{0x0194,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x40},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0301,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x05F8,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05F9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FA,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x05FB,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, 0xFF, 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_US},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0553,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), BIT(7)},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_SDIO,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0xFE58,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x84},
{0xFE58,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x04},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x03D9,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWR_DELAY_MS},
{0x0008,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(4), 0},
{0x0109,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_POLLING, BIT(7), 0},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1)},
{0x0100,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0002,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0)},
{0x0522,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x113C,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x03},
{0x0124,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0125,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0126,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0127,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(1), 0},
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(2), 0},
{0xFFFF,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
0,
HALMAC_PWR_CMD_END, 0, 0},
};
/* Suspend Array */
struct halmac_wlan_pwr_cfg *suspend_flow_8822b[] = {
TRANS_ACT_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_SUS_8822B,
NULL
};
/* Resume Array */
struct halmac_wlan_pwr_cfg *resume_flow_8822b[] = {
TRANS_SUS_TO_CARDEMU_8822B,
TRANS_CARDEMU_TO_ACT_8822B,
NULL
};
/* HWPDN Array - HW behavior */
struct halmac_wlan_pwr_cfg *hwpdn_flow_8822b[] = {
NULL
};
/* Enter LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_lps_flow_8822b[] = {
TRANS_ACT_TO_LPS_8822B,
NULL
};
/* Enter Deep LPS - FW behavior */
struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822b[] = {
TRANS_ACT_TO_DEEP_LPS_8822B,
NULL
};
/* Leave LPS -FW behavior */
struct halmac_wlan_pwr_cfg *leave_lps_flow_8822b[] = {
TRANS_LPS_TO_ACT_8822B,
NULL
};
#endif
#endif /* HALMAC_8822B_SUPPORT*/

40
hal/halmac/halmac_88xx/halmac_8822b/halmac_pwr_seq_8822b.h Normal file
View File

@@ -0,0 +1,40 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef HALMAC_POWER_SEQUENCE_8822B
#define HALMAC_POWER_SEQUENCE_8822B
#include "../../halmac_pwr_seq_cmd.h"
#include "../../halmac_hw_cfg.h"
#if HALMAC_8822B_SUPPORT
#define HALMAC_8822B_PWR_SEQ_VER "V24"
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[];
#if HALMAC_PLATFORM_TESTPROGRAM
extern struct halmac_wlan_pwr_cfg *suspend_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *resume_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *hwpdn_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *enter_lps_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *enter_dlps_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *leave_lps_flow_8822b[];
#endif
#endif /* HALMAC_8822B_SUPPORT*/
#endif

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hal/halmac/halmac_88xx/halmac_8822b/halmac_sdio_8822b.c Normal file
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@@ -0,0 +1,868 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_sdio_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_sdio_88xx.h"
#if HALMAC_8822B_SUPPORT
#define WLAN_ACQ_NUM_MAX 8
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt);
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt);
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first);
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num);
/**
* mac_pwr_switch_sdio_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
u32 imr_backup;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_SDIO_HRPWM1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_SDIO_HRPWM1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/*Check if power switch is needed*/
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
imr_backup = HALMAC_REG_R32(REG_SDIO_HIMR);
HALMAC_REG_W32(REG_SDIO_HIMR, 0);
if (pwr == HALMAC_MAC_POWER_OFF) {
adapter->pwr_off_flow_flag = 1;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
adapter->pwr_off_flow_flag = 0;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_tx_allowed_sdio_88xx() - check tx status
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size, include txdesc
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u16 *cur_fs = NULL;
u32 cnt;
u32 tx_agg_num;
u32 rqd_pg_num = 0;
u8 macid_cnt = 0;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!fs_info->macid_map) {
PLTFM_MSG_ERR("[ERR]halmac allocate Macid_map Fail!!\n");
return HALMAC_RET_MALLOC_FAIL;
}
PLTFM_MEMSET(fs_info->macid_map, 0x00, fs_info->macid_map_size);
tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(buf);
tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
status = chk_rqd_page_num_8822b(adapter, buf, &rqd_pg_num, &cur_fs,
&macid_cnt, tx_agg_num);
if (status != HALMAC_RET_SUCCESS)
return status;
cnt = 10;
do {
if ((u32)(*cur_fs + fs_info->pubq_pg_num) > rqd_pg_num) {
status = chk_oqt_8822b(adapter, tx_agg_num, buf,
macid_cnt);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_WARN("[WARN]oqt buffer full!!\n");
return status;
}
if (*cur_fs >= rqd_pg_num) {
*cur_fs -= (u16)rqd_pg_num;
} else {
fs_info->pubq_pg_num -=
(u16)(rqd_pg_num - *cur_fs);
*cur_fs = 0;
}
break;
}
update_sdio_free_page_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
} while (1);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_8_sdio_88xx() - read 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
u8 value8;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0) {
value8 = (u8)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_BYTE);
} else {
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
value8 = PLTFM_SDIO_CMD52_R(offset);
}
return value8;
}
/**
* halmac_reg_write_8_sdio_88xx() - write 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_16_sdio_88xx() - read 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u16 word;
u8 byte[2];
} value16 = { 0x0000 };
if ((offset & 0xFFFF0000) == 0)
return (u16)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_WORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_R) {
value16.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value16.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value16.word = rtk_le16_to_cpu(value16.word);
} else {
value16.word = PLTFM_SDIO_CMD53_R16(offset);
}
return value16.word;
}
/**
* halmac_reg_write_16_sdio_88xx() - write 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_W) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (2 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_WORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value & 0xFF00) >> 8));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W16(offset, value);
}
return status;
}
/**
* halmac_reg_read_32_sdio_88xx() - read 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} value32 = { 0x00000000 };
if ((offset & 0xFFFF0000) == 0)
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
value32.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value32.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value32.byte[2] = PLTFM_SDIO_CMD52_R(offset + 2);
value32.byte[3] = PLTFM_SDIO_CMD52_R(offset + 3);
value32.dword = rtk_le32_to_cpu(value32.dword);
} else {
value32.dword = PLTFM_SDIO_CMD53_R32(offset);
}
return value32.dword;
}
/**
* halmac_reg_write_32_sdio_88xx() - write 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (4 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_DWORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value >> 8) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 2,
(u8)((value >> 16) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 3,
(u8)((value >> 24) & 0xFF));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W32(offset, value);
}
return status;
}
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt)
{
u32 cnt = 10;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
/*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
/*no need to check non_ac_oqt_number*/
/*HI and MGQ blocked will cause protocal issue before H_OQT being full*/
switch ((enum halmac_qsel)GET_TX_DESC_QSEL(buf)) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
if (macid_cnt > WLAN_ACQ_NUM_MAX &&
tx_agg_num > OQT_ENTRY_AC_8822B) {
PLTFM_MSG_WARN("[WARN]txagg num %d > oqt entry\n",
tx_agg_num);
PLTFM_MSG_WARN("[WARN]macid cnt %d > acq max\n",
macid_cnt);
}
cnt = 10;
do {
if (fs_info->ac_empty >= macid_cnt) {
fs_info->ac_empty -= macid_cnt;
break;
}
if (fs_info->ac_oqt_num >= tx_agg_num) {
fs_info->ac_empty = 0;
fs_info->ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
if (tx_agg_num > OQT_ENTRY_NOAC_8822B)
PLTFM_MSG_WARN("[WARN]tx_agg_num %d > oqt entry\n",
tx_agg_num, OQT_ENTRY_NOAC_8822B);
cnt = 10;
do {
if (fs_info->non_ac_oqt_num >= tx_agg_num) {
fs_info->non_ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
default:
break;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 value;
u32 oqt_free_page;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
oqt_free_page = HALMAC_REG_R32(REG_SDIO_OQT_FREE_TXPG_V1);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(oqt_free_page);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page);
fs_info->ac_empty = 0;
if (fs_info->ac_oqt_num == OQT_ENTRY_AC_8822B) {
value = HALMAC_REG_R8(REG_TXPKT_EMPTY);
while (value > 0) {
value = value & (value - 1);
fs_info->ac_empty++;
};
} else {
PLTFM_MSG_TRACE("[TRACE]free_space->ac_oqt_num %d != %d\n",
fs_info->ac_oqt_num, OQT_ENTRY_AC_8822B);
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter)
{
u32 free_page = 0;
u32 free_page2 = 0;
u32 free_page3 = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 data[12] = {0};
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_SDIO_RN(REG_SDIO_FREE_TXPG, 12, data);
free_page = rtk_le32_to_cpu(*(u32 *)(data + 0));
free_page2 = rtk_le32_to_cpu(*(u32 *)(data + 4));
free_page3 = rtk_le32_to_cpu(*(u32 *)(data + 8));
fs_info->hiq_pg_num = (u16)BIT_GET_HIQ_FREEPG_V1(free_page);
fs_info->miq_pg_num = (u16)BIT_GET_MID_FREEPG_V1(free_page);
fs_info->lowq_pg_num = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
fs_info->pubq_pg_num = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
fs_info->exq_pg_num = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(free_page3);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(free_page3);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_sdio_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8821c() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* intf_tun_sdio_8822b() - sdio interface fine tuning
* @adapter : the adapter of halmac
* Author : Ivan
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_get_sdio_tx_addr_sdio_88xx() - get CMD53 addr for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @cmd53_addr : cmd53 addr value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr)
{
u32 len_unit4;
enum halmac_qsel queue_sel;
enum halmac_dma_mapping dma_mapping;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!buf) {
PLTFM_MSG_ERR("[ERR]buf is NULL!!\n");
return HALMAC_RET_DATA_BUF_NULL;
}
if (size == 0) {
PLTFM_MSG_ERR("[ERR]size is 0!!\n");
return HALMAC_RET_DATA_SIZE_INCORRECT;
}
queue_sel = (enum halmac_qsel)GET_TX_DESC_QSEL(buf);
switch (queue_sel) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
len_unit4 = (size >> 2) + ((size & (4 - 1)) ? 1 : 0);
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_HIGH;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_NORMAL;
break;
case HALMAC_DMA_MAPPING_LOW:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_LOW;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_EXTRA;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
*cmd53_addr = (*cmd53_addr << 13) |
(len_unit4 & HALMAC_SDIO_4BYTE_LEN_MASK);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt)
{
u8 flag = 0;
u8 qsel_now;
u8 macid;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
macid = (u8)GET_TX_DESC_MACID(pkt);
qsel_now = (u8)GET_TX_DESC_QSEL(pkt);
if (qsel_first == qsel_now) {
if (*(fs_info->macid_map + macid) == 0) {
*(fs_info->macid_map + macid) = 1;
(*macid_cnt)++;
}
} else {
switch ((enum halmac_qsel)qsel_now) {
case HALMAC_QSEL_VO:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO_V2)
flag = 1;
break;
case HALMAC_QSEL_VO_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO)
flag = 1;
break;
case HALMAC_QSEL_VI:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI_V2)
flag = 1;
break;
case HALMAC_QSEL_VI_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI)
flag = 1;
break;
case HALMAC_QSEL_BE:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE_V2)
flag = 1;
break;
case HALMAC_QSEL_BE_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE)
flag = 1;
break;
case HALMAC_QSEL_BK:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK_V2)
flag = 1;
break;
case HALMAC_QSEL_BK_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK)
flag = 1;
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
flag = 1;
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
if (flag == 1) {
PLTFM_MSG_ERR("[ERR]Multi-Qsel is not allowed\n");
PLTFM_MSG_ERR("[ERR]qsel = %d, %d\n",
qsel_first, qsel_now);
return HALMAC_RET_QSEL_INCORRECT;
}
if (*(fs_info->macid_map + macid + MACID_MAX_8822B) == 0) {
*(fs_info->macid_map + macid + MACID_MAX_8822B) = 1;
(*macid_cnt)++;
}
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first)
{
enum halmac_dma_mapping dma_mapping;
switch ((enum halmac_qsel)qsel_first) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
return HALMAC_RET_SUCCESS;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range: %d\n", qsel_first);
return HALMAC_RET_QSEL_INCORRECT;
}
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cur_fs = &adapter->sdio_fs.hiq_pg_num;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cur_fs = &adapter->sdio_fs.miq_pg_num;
break;
case HALMAC_DMA_MAPPING_LOW:
*cur_fs = &adapter->sdio_fs.lowq_pg_num;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cur_fs = &adapter->sdio_fs.exq_pg_num;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num)
{
u8 *pkt;
u8 qsel_first;
u32 i;
u32 pkt_size;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
pkt = buf;
qsel_first = (u8)GET_TX_DESC_QSEL(pkt);
status = chk_dma_mapping_8822b(adapter, cur_fs, qsel_first);
if (status != HALMAC_RET_SUCCESS)
return status;
for (i = 0; i < tx_agg_num; i++) {
/*QSEL parser*/
status = chk_qsel_8822b(adapter, qsel_first, pkt, macid_cnt);
if (status != HALMAC_RET_SUCCESS)
return status;
/*Page number parser*/
pkt_size = GET_TX_DESC_TXPKTSIZE(pkt) + GET_TX_DESC_OFFSET(pkt);
*rqd_pg_num += (pkt_size >> TX_PAGE_SIZE_SHIFT_88XX) +
((pkt_size & (TX_PAGE_SIZE_88XX - 1)) ? 1 : 0);
pkt += HALMAC_ALIGN(GET_TX_DESC_TXPKTSIZE(pkt) +
(GET_TX_DESC_PKT_OFFSET(pkt) << 3) +
TX_DESC_SIZE_88XX, 8);
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

66
hal/halmac/halmac_88xx/halmac_8822b/halmac_sdio_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_SDIO_H_
#define _HALMAC_API_8822B_SDIO_H_
#include "../../halmac_api.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size);
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_SDIO_H_ */

159
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_usb_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#if HALMAC_8822B_SUPPORT
/**
* mac_pwr_switch_usb_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s\n", __func__);
PLTFM_MSG_TRACE("[TRACE]%x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8821C pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(0xFE58);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(0xFE58, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA) {
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
} else {
if (BIT(0) == (HALMAC_REG_R8(REG_SYS_STATUS1 + 1) & BIT(0)))
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
/*Check if power switch is needed*/
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
if (pwr == HALMAC_MAC_POWER_OFF) {
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
return HALMAC_RET_POWER_ON_FAIL;
}
HALMAC_REG_W8_CLR(REG_SYS_STATUS1 + 1, BIT(0));
if ((HALMAC_REG_R8(REG_SW_MDIO + 3) & BIT(0)) == BIT(0))
PLTFM_MSG_ALWAYS("[ALWAYS]shall R reg twice!!\n");
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_usb_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_usb_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = parse_intf_phy_88xx(adapter, usb2_phy_param_8822b, pltfm,
HAL_INTF_PHY_USB2);
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, usb3_phy_8822b, pltfm,
HAL_INTF_PHY_USB3);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_usb_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* intf_tun_usb_8822b() - usb interface fine tuning
* @adapter : the adapter of halmac
* Author : Ivan
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_usb_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

42
hal/halmac/halmac_88xx/halmac_8822b/halmac_usb_8822b.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_USB_H_
#define _HALMAC_API_8822B_USB_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
extern struct halmac_intf_phy_para usb2_phy_param_8822b[];
extern struct halmac_intf_phy_para usb3_phy_8822b[];
enum halmac_ret_status
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
phy_cfg_usb_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_usb_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_usb_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_USB_H_ */

44
hal/halmac/halmac_88xx/halmac_88xx_cfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_88XX_CFG_H_
#define _HALMAC_88XX_CFG_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
#define TX_PAGE_SIZE_88XX 128
#define TX_PAGE_SIZE_SHIFT_88XX 7 /* 128 = 2^7 */
#define TX_ALIGN_SIZE_88XX 8
#define SDIO_TX_MAX_SIZE_88XX 31744
#define RX_BUF_FW_88XX 12288
#define TX_DESC_SIZE_88XX 48
#define RX_DESC_SIZE_88XX 24
#define H2C_PKT_SIZE_88XX 32 /* Only support 32 byte packet now */
#define H2C_PKT_HDR_SIZE_88XX 8
#define C2H_DATA_OFFSET_88XX 10
#define C2H_PKT_BUF_88XX 256
/* HW memory address */
#define OCPBASE_TXBUF_88XX 0x18780000
#define OCPBASE_DMEM_88XX 0x00200000
#define OCPBASE_EMEM_88XX 0x00100000
#endif /* HALMAC_88XX_SUPPORT */
#endif

392
hal/halmac/halmac_88xx/halmac_bb_rf_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_bb_rf_88xx.h"
#include "halmac_88xx_cfg.h"
#include "halmac_common_88xx.h"
#include "halmac_init_88xx.h"
#if HALMAC_88XX_SUPPORT
/**
* start_iqk_88xx() -trigger FW IQK
* @adapter : the adapter of halmac
* @param : IQK parameter
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
start_iqk_88xx(struct halmac_adapter *adapter, struct halmac_iqk_para *param)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.iqk_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(iqk)\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
IQK_SET_CLEAR(h2c_buf, param->clear);
IQK_SET_SEGMENT_IQK(h2c_buf, param->segment_iqk);
hdr_info.sub_cmd_id = SUB_CMD_ID_IQK;
hdr_info.content_size = 1;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.iqk_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_IQK);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* ctrl_pwr_tracking_88xx() -trigger FW power tracking
* @adapter : the adapter of halmac
* @opt : power tracking option
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
struct halmac_pwr_tracking_option *opt)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
struct halmac_pwr_tracking_para *param;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.pwr_trk_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(pwr tracking)...\n");
return HALMAC_RET_BUSY_STATE;
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
PWR_TRK_SET_TYPE(h2c_buf, opt->type);
PWR_TRK_SET_BBSWING_INDEX(h2c_buf, opt->bbswing_index);
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_A];
PWR_TRK_SET_ENABLE_A(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_A(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_A(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_A(h2c_buf, param->pwr_tracking_offset_value);
PWR_TRK_SET_ENABLE_B(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_B(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_B(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_B(h2c_buf, param->pwr_tracking_offset_value);
PWR_TRK_SET_ENABLE_C(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_C(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_C(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_C(h2c_buf, param->pwr_tracking_offset_value);
PWR_TRK_SET_ENABLE_D(h2c_buf, param->enable);
PWR_TRK_SET_TX_PWR_INDEX_D(h2c_buf, param->tx_pwr_index);
PWR_TRK_SET_TSSI_VALUE_D(h2c_buf, param->tssi_value);
PWR_TRK_SET_OFFSET_VALUE_D(h2c_buf, param->pwr_tracking_offset_value);
hdr_info.sub_cmd_id = SUB_CMD_ID_PWR_TRK;
hdr_info.content_size = 20;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.pwr_trk_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_POWER_TRACKING);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_iqk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.iqk_state.proc_status;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_pwr_trk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.pwr_trk_state.proc_status;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_psd_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status, u8 *data,
u32 *size)
{
struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
*proc_status = state->proc_status;
if (!data)
return HALMAC_RET_NULL_POINTER;
if (!size)
return HALMAC_RET_NULL_POINTER;
if (*proc_status == HALMAC_CMD_PROCESS_DONE) {
if (*size < state->data_size) {
*size = state->data_size;
return HALMAC_RET_BUFFER_TOO_SMALL;
}
*size = state->data_size;
PLTFM_MEMCPY(data, state->data, *size);
}
return HALMAC_RET_SUCCESS;
}
/**
* psd_88xx() - trigger fw psd
* @adapter : the adapter of halmac
* @start_psd : start PSD
* @end_psd : end PSD
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
psd_88xx(struct halmac_adapter *adapter, u16 start_psd, u16 end_psd)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
struct halmac_h2c_header_info hdr_info;
enum halmac_cmd_process_status *proc_status;
proc_status = &adapter->halmac_state.psd_state.proc_status;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(psd)\n");
return HALMAC_RET_BUSY_STATE;
}
if (adapter->halmac_state.psd_state.data) {
PLTFM_FREE(adapter->halmac_state.psd_state.data,
adapter->halmac_state.psd_state.data_size);
adapter->halmac_state.psd_state.data = (u8 *)NULL;
}
adapter->halmac_state.psd_state.data_size = 0;
adapter->halmac_state.psd_state.seg_size = 0;
*proc_status = HALMAC_CMD_PROCESS_SENDING;
PSD_SET_START_PSD(h2c_buf, start_psd);
PSD_SET_END_PSD(h2c_buf, end_psd);
hdr_info.sub_cmd_id = SUB_CMD_ID_PSD;
hdr_info.content_size = 4;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_PSD);
return status;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_h2c_ack_iqk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_iqk_state *state = &adapter->halmac_state.iqk_state;
enum halmac_cmd_process_status proc_status;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, &fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_h2c_ack_pwr_trk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num;
u8 fw_rc;
struct halmac_pwr_tracking_state *state;
enum halmac_cmd_process_status proc_status;
state = &adapter->halmac_state.pwr_trk_state;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
&fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_psd_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seg_id;
u8 seg_size;
u8 seq_num;
u16 total_size;
enum halmac_cmd_process_status proc_status;
struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
seq_num = (u8)PSD_DATA_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]seq num : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]seq num mismatch : h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not cmd sending\n");
return HALMAC_RET_SUCCESS;
}
total_size = (u16)PSD_DATA_GET_TOTAL_SIZE(buf);
seg_id = (u8)PSD_DATA_GET_SEGMENT_ID(buf);
seg_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(buf);
state->data_size = total_size;
if (!state->data)
state->data = (u8 *)PLTFM_MALLOC(state->data_size);
if (seg_id == 0)
state->seg_size = seg_size;
PLTFM_MEMCPY(state->data + seg_id * state->seg_size,
buf + C2H_DATA_OFFSET_88XX, seg_size);
if (PSD_DATA_GET_END_SEGMENT(buf) == _FALSE)
return HALMAC_RET_SUCCESS;
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_PSD, proc_status, state->data,
state->data_size);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

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hal/halmac/halmac_88xx/halmac_bb_rf_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_BB_RF_88XX_H_
#define _HALMAC_BB_RF_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
start_iqk_88xx(struct halmac_adapter *adapter, struct halmac_iqk_para *param);
enum halmac_ret_status
ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
struct halmac_pwr_tracking_option *opt);
enum halmac_ret_status
get_iqk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
enum halmac_ret_status
get_pwr_trk_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
enum halmac_ret_status
get_psd_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status, u8 *data,
u32 *size);
enum halmac_ret_status
psd_88xx(struct halmac_adapter *adapter, u16 start_psd, u16 end_psd);
enum halmac_ret_status
get_h2c_ack_iqk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
get_h2c_ack_pwr_trk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
get_psd_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_BB_RF_88XX_H_ */

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hal/halmac/halmac_88xx/halmac_cfg_wmac_88xx.c Normal file
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hal/halmac/halmac_88xx/halmac_cfg_wmac_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_CFG_WMAC_88XX_H_
#define _HALMAC_CFG_WMAC_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
cfg_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
union halmac_wlan_addr *addr);
enum halmac_ret_status
cfg_bssid_88xx(struct halmac_adapter *adapter, u8 port,
union halmac_wlan_addr *addr);
enum halmac_ret_status
cfg_transmitter_addr_88xx(struct halmac_adapter *adapter, u8 port,
union halmac_wlan_addr *addr);
enum halmac_ret_status
cfg_net_type_88xx(struct halmac_adapter *adapter, u8 port,
enum halmac_network_type_select net_type);
enum halmac_ret_status
cfg_tsf_rst_88xx(struct halmac_adapter *adapter, u8 port);
enum halmac_ret_status
cfg_bcn_space_88xx(struct halmac_adapter *adapter, u8 port, u32 bcn_space);
enum halmac_ret_status
rw_bcn_ctrl_88xx(struct halmac_adapter *adapter, u8 port, u8 write_en,
struct halmac_bcn_ctrl *ctrl);
enum halmac_ret_status
cfg_multicast_addr_88xx(struct halmac_adapter *adapter,
union halmac_wlan_addr *addr);
enum halmac_ret_status
cfg_operation_mode_88xx(struct halmac_adapter *adapter,
enum halmac_wireless_mode mode);
enum halmac_ret_status
cfg_ch_bw_88xx(struct halmac_adapter *adapter, u8 ch,
enum halmac_pri_ch_idx idx, enum halmac_bw bw);
enum halmac_ret_status
cfg_ch_88xx(struct halmac_adapter *adapter, u8 ch);
enum halmac_ret_status
cfg_pri_ch_idx_88xx(struct halmac_adapter *adapter, enum halmac_pri_ch_idx idx);
enum halmac_ret_status
cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw);
void
enable_bb_rf_88xx(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
cfg_la_mode_88xx(struct halmac_adapter *adapter, enum halmac_la_mode mode);
enum halmac_ret_status
cfg_rxfifo_expand_mode_88xx(struct halmac_adapter *adapter,
enum halmac_rx_fifo_expanding_mode mode);
enum halmac_ret_status
config_security_88xx(struct halmac_adapter *adapter,
struct halmac_security_setting *setting);
u8
get_used_cam_entry_num_88xx(struct halmac_adapter *adapter,
enum hal_security_type sec_type);
enum halmac_ret_status
write_cam_88xx(struct halmac_adapter *adapter, u32 idx,
struct halmac_cam_entry_info *info);
enum halmac_ret_status
read_cam_entry_88xx(struct halmac_adapter *adapter, u32 idx,
struct halmac_cam_entry_format *content);
enum halmac_ret_status
clear_cam_entry_88xx(struct halmac_adapter *adapter, u32 idx);
void
rx_shift_88xx(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
cfg_edca_para_88xx(struct halmac_adapter *adapter, enum halmac_acq_id acq_id,
struct halmac_edca_para *param);
void
rx_clk_gate_88xx(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
rx_cut_amsdu_cfg_88xx(struct halmac_adapter *adapter,
struct halmac_cut_amsdu_cfg *cfg);
enum halmac_ret_status
fast_edca_cfg_88xx(struct halmac_adapter *adapter,
struct halmac_fast_edca_cfg *cfg);
enum halmac_ret_status
get_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
union halmac_wlan_addr *addr);
#endif/* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_CFG_WMAC_88XX_H_ */

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hal/halmac/halmac_88xx/halmac_common_88xx.c Normal file
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hal/halmac/halmac_88xx/halmac_common_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_COMMON_88XX_H_
#define _HALMAC_COMMON_88XX_H_
#include "../halmac_api.h"
#include "../halmac_pwr_seq_cmd.h"
#include "../halmac_gpio_cmd.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
ofld_func_cfg_88xx(struct halmac_adapter *adapter,
struct halmac_ofld_func_info *info);
enum halmac_ret_status
dl_drv_rsvd_page_88xx(struct halmac_adapter *adapter, u8 pg_offset, u8 *buf,
u32 size);
enum halmac_ret_status
dl_rsvd_page_88xx(struct halmac_adapter *adapter, u16 pg_addr, u8 *buf,
u32 size);
enum halmac_ret_status
get_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value);
enum halmac_ret_status
set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
void *value);
enum halmac_ret_status
set_h2c_pkt_hdr_88xx(struct halmac_adapter *adapter, u8 *hdr,
struct halmac_h2c_header_info *info, u16 *seq_num);
enum halmac_ret_status
send_h2c_pkt_88xx(struct halmac_adapter *adapter, u8 *pkt);
enum halmac_ret_status
get_h2c_buf_free_space_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
get_c2h_info_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
mac_debug_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_parameter_88xx(struct halmac_adapter *adapter,
struct halmac_phy_parameter_info *info, u8 full_fifo);
enum halmac_ret_status
update_packet_88xx(struct halmac_adapter *adapter, enum halmac_packet_id pkt_id,
u8 *pkt, u32 size);
enum halmac_ret_status
bcn_ie_filter_88xx(struct halmac_adapter *adapter,
struct halmac_bcn_ie_info *info);
enum halmac_ret_status
update_datapack_88xx(struct halmac_adapter *adapter,
enum halmac_data_type data_type,
struct halmac_phy_parameter_info *info);
enum halmac_ret_status
run_datapack_88xx(struct halmac_adapter *adapter,
enum halmac_data_type data_type);
enum halmac_ret_status
send_bt_coex_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size, u8 ack);
enum halmac_ret_status
dump_fifo_88xx(struct halmac_adapter *adapter, enum hal_fifo_sel sel,
u32 start_addr, u32 size, u8 *data);
u32
get_fifo_size_88xx(struct halmac_adapter *adapter, enum hal_fifo_sel sel);
enum halmac_ret_status
set_h2c_header_88xx(struct halmac_adapter *adapter, u8 *hdr, u16 *seq, u8 ack);
enum halmac_ret_status
add_ch_info_88xx(struct halmac_adapter *adapter, struct halmac_ch_info *info);
enum halmac_ret_status
add_extra_ch_info_88xx(struct halmac_adapter *adapter,
struct halmac_ch_extra_info *info);
enum halmac_ret_status
ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
struct halmac_ch_switch_option *opt);
enum halmac_ret_status
clear_ch_info_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
chk_txdesc_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
get_version_88xx(struct halmac_adapter *adapter, struct halmac_ver *ver);
enum halmac_ret_status
p2pps_88xx(struct halmac_adapter *adapter, struct halmac_p2pps *info);
enum halmac_ret_status
query_status_88xx(struct halmac_adapter *adapter,
enum halmac_feature_id feature_id,
enum halmac_cmd_process_status *proc_status, u8 *data,
u32 *size);
enum halmac_ret_status
cfg_drv_rsvd_pg_num_88xx(struct halmac_adapter *adapter,
enum halmac_drv_rsvd_pg_num pg_num);
enum halmac_ret_status
h2c_lb_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
pwr_seq_parser_88xx(struct halmac_adapter *adapter,
struct halmac_wlan_pwr_cfg **cmd_seq);
enum halmac_ret_status
parse_intf_phy_88xx(struct halmac_adapter *adapter,
struct halmac_intf_phy_para *param,
enum halmac_intf_phy_platform pltfm,
enum hal_intf_phy intf_phy);
enum halmac_ret_status
txfifo_is_empty_88xx(struct halmac_adapter *adapter, u32 chk_num);
u8*
smart_malloc_88xx(struct halmac_adapter *adapter, u32 size, u32 *new_size);
enum halmac_ret_status
ltecoex_reg_read_88xx(struct halmac_adapter *adapter, u16 offset, u32 *value);
enum halmac_ret_status
ltecoex_reg_write_88xx(struct halmac_adapter *adapter, u16 offset, u32 value);
#endif/* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_COMMON_88XX_H_ */

1902
hal/halmac/halmac_88xx/halmac_efuse_88xx.c Normal file
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hal/halmac/halmac_88xx/halmac_efuse_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_EFUSE_88XX_H_
#define _HALMAC_EFUSE_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
dump_efuse_map_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
dump_efuse_map_bt_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_bank bank, u32 size, u8 *map);
enum halmac_ret_status
write_efuse_bt_88xx(struct halmac_adapter *adapter, u32 offset, u8 value,
enum halmac_efuse_bank bank);
enum halmac_ret_status
read_efuse_bt_88xx(struct halmac_adapter *adapter, u32 offset, u8 *value,
enum halmac_efuse_bank bank);
enum halmac_ret_status
cfg_efuse_auto_check_88xx(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
get_efuse_available_size_88xx(struct halmac_adapter *adapter, u32 *size);
enum halmac_ret_status
get_efuse_size_88xx(struct halmac_adapter *adapter, u32 *size);
enum halmac_ret_status
get_log_efuse_size_88xx(struct halmac_adapter *adapter, u32 *size);
enum halmac_ret_status
dump_log_efuse_map_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
read_logical_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 *value);
enum halmac_ret_status
write_log_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
enum halmac_ret_status
pg_efuse_by_map_88xx(struct halmac_adapter *adapter,
struct halmac_pg_efuse_info *info,
enum halmac_efuse_read_cfg cfg);
enum halmac_ret_status
mask_log_efuse_88xx(struct halmac_adapter *adapter,
struct halmac_pg_efuse_info *info);
enum halmac_ret_status
read_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size, u8 *map);
enum halmac_ret_status
write_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
enum halmac_ret_status
switch_efuse_bank_88xx(struct halmac_adapter *adapter,
enum halmac_efuse_bank bank);
enum halmac_ret_status
get_efuse_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
cnv_efuse_state_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_construct_state dest_state);
enum halmac_ret_status
get_dump_phy_efuse_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status,
u8 *data, u32 *size);
enum halmac_ret_status
get_dump_log_efuse_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status,
u8 *data, u32 *size);
enum halmac_ret_status
get_h2c_ack_phy_efuse_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
u32
get_rsvd_efuse_size_88xx(struct halmac_adapter *adapter);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_EFUSE_88XX_H_ */

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hal/halmac/halmac_88xx/halmac_flash_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_flash_88xx.h"
#include "halmac_88xx_cfg.h"
#include "halmac_common_88xx.h"
#if HALMAC_88XX_SUPPORT
/**
* download_flash_88xx() -download firmware to flash
* @adapter : the adapter of halmac
* @fw_bin : pointer to fw
* @size : fw size
* @rom_addr : flash start address where fw should be download
* Author : Pablo Chiu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 rom_addr)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status rc;
struct halmac_h2c_header_info hdr_info;
u8 value8;
u8 restore[3];
u8 h2c_buf[H2C_PKT_SIZE_88XX] = {0};
u16 seq_num = 0;
u16 h2c_info_offset;
u32 pkt_size;
u32 mem_offset;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_CR + 1);
restore[0] = value8;
value8 = (u8)(value8 | BIT(0));
HALMAC_REG_W8(REG_CR + 1, value8);
value8 = HALMAC_REG_R8(REG_BCN_CTRL);
restore[1] = value8;
value8 = (u8)((value8 & ~(BIT(3))) | BIT(4));
HALMAC_REG_W8(REG_BCN_CTRL, value8);
value8 = HALMAC_REG_R8(REG_FWHW_TXQ_CTRL + 2);
restore[2] = value8;
value8 = (u8)(value8 & ~(BIT(6)));
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, value8);
/* Download FW to Flash flow */
h2c_info_offset = adapter->txff_alloc.rsvd_h2c_info_addr -
adapter->txff_alloc.rsvd_boundary;
mem_offset = 0;
while (size != 0) {
if (size >= (DL_FLASH_RSVDPG_SIZE - 48))
pkt_size = DL_FLASH_RSVDPG_SIZE - 48;
else
pkt_size = size;
rc = dl_rsvd_page_88xx(adapter,
adapter->txff_alloc.rsvd_h2c_info_addr,
fw_bin + mem_offset, pkt_size);
if (rc != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dl rsvd pg!!\n");
return rc;
}
DOWNLOAD_FLASH_SET_SPI_CMD(h2c_buf, 0x02);
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, h2c_info_offset);
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, pkt_size);
DOWNLOAD_FLASH_SET_START_ADDR(h2c_buf, rom_addr);
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
hdr_info.content_size = 20;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
rc = send_h2c_pkt_88xx(adapter, h2c_buf);
if (rc != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c!!\n");
return rc;
}
value8 = HALMAC_REG_R8(REG_MCUTST_I);
value8 |= BIT(0);
HALMAC_REG_W8(REG_MCUTST_I, value8);
rom_addr += pkt_size;
mem_offset += pkt_size;
size -= pkt_size;
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0)
PLTFM_DELAY_US(1000);
if (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0) {
PLTFM_MSG_ERR("[ERR]dl flash!!\n");
return HALMAC_RET_DLFW_FAIL;
}
}
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, restore[2]);
HALMAC_REG_W8(REG_BCN_CTRL, restore[1]);
HALMAC_REG_W8(REG_CR + 1, restore[0]);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* read_flash_88xx() -read data from flash
* @adapter : the adapter of halmac
* @addr : flash start address where fw should be read
* Author : Pablo Chiu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
read_flash_88xx(struct halmac_adapter *adapter, u32 addr)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status;
struct halmac_h2c_header_info hdr_info;
u8 value8;
u8 restore[3];
u8 h2c_buf[H2C_PKT_SIZE_88XX] = {0};
u16 seq_num = 0;
u16 h2c_info_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
u16 rsvd_pg_addr = adapter->txff_alloc.rsvd_boundary;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_CR + 1);
restore[0] = value8;
value8 = (u8)(value8 | BIT(0));
HALMAC_REG_W8(REG_CR + 1, value8);
value8 = HALMAC_REG_R8(REG_BCN_CTRL);
restore[1] = value8;
value8 = (u8)((value8 & ~(BIT(3))) | BIT(4));
HALMAC_REG_W8(REG_BCN_CTRL, value8);
value8 = HALMAC_REG_R8(REG_FWHW_TXQ_CTRL + 2);
restore[2] = value8;
value8 = (u8)(value8 & ~(BIT(6)));
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, value8);
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, h2c_info_addr);
value8 = HALMAC_REG_R8(REG_MCUTST_I);
value8 |= BIT(0);
HALMAC_REG_W8(REG_MCUTST_I, value8);
/* Construct H2C Content */
DOWNLOAD_FLASH_SET_SPI_CMD(h2c_buf, 0x03);
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, h2c_info_addr - rsvd_pg_addr);
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, 4096);
DOWNLOAD_FLASH_SET_START_ADDR(h2c_buf, addr);
/* Fill in H2C Header */
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
hdr_info.content_size = 16;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
/* Send H2C Cmd Packet */
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c!!\n");
return status;
}
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0)
PLTFM_DELAY_US(1000);
HALMAC_REG_W16(REG_FIFOPAGE_CTRL_2, rsvd_pg_addr);
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, restore[2]);
HALMAC_REG_W8(REG_BCN_CTRL, restore[1]);
HALMAC_REG_W8(REG_CR + 1, restore[0]);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* erase_flash_88xx() -erase flash data
* @adapter : the adapter of halmac
* @erase_cmd : erase command
* @addr : flash start address where fw should be erased
* Author : Pablo Chiu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
erase_flash_88xx(struct halmac_adapter *adapter, u8 erase_cmd, u32 addr)
{
enum halmac_ret_status status;
struct halmac_h2c_header_info hdr_info;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 value8;
u8 h2c_buf[H2C_PKT_SIZE_88XX] = {0};
u16 seq_num = 0;
u32 cnt;
/* Construct H2C Content */
DOWNLOAD_FLASH_SET_SPI_CMD(h2c_buf, erase_cmd);
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, 0);
DOWNLOAD_FLASH_SET_START_ADDR(h2c_buf, addr);
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, 0);
value8 = HALMAC_REG_R8(REG_MCUTST_I);
value8 |= BIT(0);
HALMAC_REG_W8(REG_MCUTST_I, value8);
/* Fill in H2C Header */
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
hdr_info.content_size = 16;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
/* Send H2C Cmd Packet */
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS)
PLTFM_MSG_ERR("[ERR]send h2c!!\n");
cnt = 5000;
while (((HALMAC_REG_R8(REG_MCUTST_I)) & BIT(0)) != 0 && cnt != 0) {
PLTFM_DELAY_US(1000);
cnt--;
}
if (cnt == 0)
return HALMAC_RET_FAIL;
else
return HALMAC_RET_SUCCESS;
}
/**
* check_flash_88xx() -check flash data
* @adapter : the adapter of halmac
* @fw_bin : pointer to fw
* @size : fw size
* @addr : flash start address where fw should be checked
* Author : Pablo Chiu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 addr)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 value8;
u16 i;
u16 residue;
u16 pg_addr;
u32 pkt_size;
u32 start_page;
u32 cnt;
pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
while (size != 0) {
start_page = ((pg_addr << 7) >> 12) + 0x780;
residue = (pg_addr << 7) & (4096 - 1);
if (size >= DL_FLASH_RSVDPG_SIZE)
pkt_size = DL_FLASH_RSVDPG_SIZE;
else
pkt_size = size;
read_flash_88xx(adapter, addr);
cnt = 0;
while (cnt < pkt_size) {
HALMAC_REG_W16(REG_PKTBUF_DBG_CTRL, (u16)(start_page));
for (i = 0x8000 + residue; i <= 0x8FFF; i++) {
value8 = HALMAC_REG_R8(i);
if (*fw_bin != value8) {
PLTFM_MSG_ERR("[ERR]check flash!!\n");
return HALMAC_RET_FAIL;
}
fw_bin++;
cnt++;
if (cnt == pkt_size)
break;
}
residue = 0;
start_page++;
}
addr += pkt_size;
size -= pkt_size;
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

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/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_FLASH_88XX_H_
#define _HALMAC_FLASH_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 rom_addr);
enum halmac_ret_status
read_flash_88xx(struct halmac_adapter *adapter, u32 addr);
enum halmac_ret_status
erase_flash_88xx(struct halmac_adapter *adapter, u8 erase_cmd, u32 addr);
enum halmac_ret_status
check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
u32 addr);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_FLASH_88XX_H_ */

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61
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_FW_88XX_H_
#define _HALMAC_FW_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
#define HALMC_DDMA_POLLING_COUNT 1000
#endif /* HALMAC_88XX_SUPPORT */
enum halmac_ret_status
download_firmware_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size);
enum halmac_ret_status
free_download_firmware_88xx(struct halmac_adapter *adapter,
enum halmac_dlfw_mem mem_sel, u8 *fw_bin, u32 size);
enum halmac_ret_status
get_fw_version_88xx(struct halmac_adapter *adapter,
struct halmac_fw_version *ver);
enum halmac_ret_status
check_fw_status_88xx(struct halmac_adapter *adapter, u8 *fw_status);
enum halmac_ret_status
dump_fw_dmem_88xx(struct halmac_adapter *adapter, u8 *dmem, u32 *size);
enum halmac_ret_status
cfg_max_dl_size_88xx(struct halmac_adapter *adapter, u32 size);
enum halmac_ret_status
enter_cpu_sleep_mode_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
get_cpu_mode_88xx(struct halmac_adapter *adapter,
enum halmac_wlcpu_mode *mode);
enum halmac_ret_status
send_general_info_88xx(struct halmac_adapter *adapter,
struct halmac_general_info *info);
enum halmac_ret_status
drv_fwctrl_88xx(struct halmac_adapter *adapter, u8 *payload, u32 size, u8 ack);
#endif/* _HALMAC_FW_88XX_H_ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_gpio_88xx.h"
#if HALMAC_88XX_SUPPORT
/**
* pinmux_wl_led_mode_88xx() -control wlan led gpio function
* @adapter : the adapter of halmac
* @mode : wlan led mode
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_wl_led_mode_88xx(struct halmac_adapter *adapter,
enum halmac_wlled_mode mode)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_LED_CFG + 2);
value8 &= ~(BIT(6));
value8 |= BIT(3);
value8 &= ~(BIT(0) | BIT(1) | BIT(2));
switch (mode) {
case HALMAC_WLLED_MODE_TRX:
value8 |= 2;
break;
case HALMAC_WLLED_MODE_TX:
value8 |= 4;
break;
case HALMAC_WLLED_MODE_RX:
value8 |= 6;
break;
case HALMAC_WLLED_MODE_SW_CTRL:
value8 |= 0;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
HALMAC_REG_W8(REG_LED_CFG + 2, value8);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_wl_led_sw_ctrl_88xx() -control wlan led on/off
* @adapter : the adapter of halmac
* @on : on(1), off(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
void
pinmux_wl_led_sw_ctrl_88xx(struct halmac_adapter *adapter, u8 on)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_LED_CFG + 2);
value8 = (on == 0) ? value8 | BIT(3) : value8 & ~(BIT(3));
HALMAC_REG_W8(REG_LED_CFG + 2, value8);
}
/**
* pinmux_sdio_int_polarity_88xx() -control sdio int polarity
* @adapter : the adapter of halmac
* @low_active : low active(1), high active(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
void
pinmux_sdio_int_polarity_88xx(struct halmac_adapter *adapter, u8 low_active)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_SYS_SDIO_CTRL + 2);
value8 = (low_active == 0) ? value8 | BIT(3) : value8 & ~(BIT(3));
HALMAC_REG_W8(REG_SYS_SDIO_CTRL + 2, value8);
}
/**
* pinmux_gpio_mode_88xx() -control gpio io mode
* @adapter : the adapter of halmac
* @gpio_id : gpio0~15(0~15)
* @output : output(1), input(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_gpio_mode_88xx(struct halmac_adapter *adapter, u8 gpio_id, u8 output)
{
u16 value16;
u8 in_out;
u32 offset;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (gpio_id <= 7)
offset = REG_GPIO_PIN_CTRL + 2;
else if (gpio_id >= 8 && gpio_id <= 15)
offset = REG_GPIO_EXT_CTRL + 2;
else
return HALMAC_RET_WRONG_GPIO;
in_out = (output == 0) ? 0 : 1;
gpio_id &= (8 - 1);
value16 = HALMAC_REG_R16(offset);
value16 &= ~((1 << gpio_id) | (1 << gpio_id << 8));
value16 |= (in_out << gpio_id);
HALMAC_REG_W16(offset, value16);
return HALMAC_RET_SUCCESS;
}
/**
* pinmux_gpio_output_88xx() -control gpio output high/low
* @adapter : the adapter of halmac
* @gpio_id : gpio0~15(0~15)
* @high : high(1), low(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_gpio_output_88xx(struct halmac_adapter *adapter, u8 gpio_id, u8 high)
{
u8 value8;
u8 hi_low;
u32 offset;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (gpio_id <= 7)
offset = REG_GPIO_PIN_CTRL + 1;
else if (gpio_id >= 8 && gpio_id <= 15)
offset = REG_GPIO_EXT_CTRL + 1;
else
return HALMAC_RET_WRONG_GPIO;
hi_low = (high == 0) ? 0 : 1;
gpio_id &= (8 - 1);
value8 = HALMAC_REG_R8(offset);
value8 &= ~(1 << gpio_id);
value8 |= (hi_low << gpio_id);
HALMAC_REG_W8(offset, value8);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pinmux_status_88xx() -get current gpio status(high/low)
* @adapter : the adapter of halmac
* @pin_id : 0~15(0~15)
* @phigh : high(1), low(0)
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pinmux_pin_status_88xx(struct halmac_adapter *adapter, u8 pin_id, u8 *high)
{
u8 value8;
u32 offset;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (pin_id <= 7)
offset = REG_GPIO_PIN_CTRL;
else if (pin_id >= 8 && pin_id <= 15)
offset = REG_GPIO_EXT_CTRL;
else
return HALMAC_RET_WRONG_GPIO;
pin_id &= (8 - 1);
value8 = HALMAC_REG_R8(offset);
*high = (value8 & (1 << pin_id)) >> pin_id;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
pinmux_parser_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, u32 *cur_func)
{
u32 i;
u8 value8;
const struct halmac_gpio_pimux_list *cur_list = list;
enum halmac_gpio_cfg_state *state;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
state = &adapter->halmac_state.gpio_cfg_state;
if (*state == HALMAC_GPIO_CFG_STATE_BUSY)
return HALMAC_RET_BUSY_STATE;
*state = HALMAC_GPIO_CFG_STATE_BUSY;
for (i = 0; i < size; i++) {
if (gpio_id != cur_list->id) {
PLTFM_MSG_ERR("[ERR]offset:%X, value:%X, func:%X\n",
cur_list->offset, cur_list->value,
cur_list->func);
PLTFM_MSG_ERR("[ERR]id1 : %X, id2 : %X\n",
gpio_id, cur_list->id);
*state = HALMAC_GPIO_CFG_STATE_IDLE;
return HALMAC_RET_GET_PINMUX_ERR;
}
value8 = HALMAC_REG_R8(cur_list->offset);
value8 &= cur_list->msk;
if (value8 == cur_list->value) {
*cur_func = cur_list->func;
break;
}
cur_list++;
}
*state = HALMAC_GPIO_CFG_STATE_IDLE;
if (i == size)
return HALMAC_RET_GET_PINMUX_ERR;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
pinmux_switch_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func)
{
u32 i;
u8 value8;
u16 switch_func;
const struct halmac_gpio_pimux_list *cur_list = list;
enum halmac_gpio_cfg_state *state;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
state = &adapter->halmac_state.gpio_cfg_state;
if (*state == HALMAC_GPIO_CFG_STATE_BUSY)
return HALMAC_RET_BUSY_STATE;
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
switch_func = HALMAC_WL_LED;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
switch_func = HALMAC_SDIO_INT;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
case HALMAC_GPIO_FUNC_SW_IO_3:
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SW_IO_5:
case HALMAC_GPIO_FUNC_SW_IO_6:
case HALMAC_GPIO_FUNC_SW_IO_7:
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_SW_IO_9:
case HALMAC_GPIO_FUNC_SW_IO_10:
case HALMAC_GPIO_FUNC_SW_IO_11:
case HALMAC_GPIO_FUNC_SW_IO_12:
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_SW_IO_15:
switch_func = HALMAC_SW_IO;
break;
default:
return HALMAC_RET_SWITCH_CASE_ERROR;
}
for (i = 0; i < size; i++) {
if (gpio_id != cur_list->id) {
PLTFM_MSG_ERR("[ERR]offset:%X, value:%X, func:%X\n",
cur_list->offset, cur_list->value,
cur_list->func);
PLTFM_MSG_ERR("[ERR]id1 : %X, id2 : %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
if (switch_func == cur_list->func)
break;
cur_list++;
}
if (i == size) {
PLTFM_MSG_ERR("[ERR]gpio func error:%X %X\n",
gpio_id, cur_list->id);
return HALMAC_RET_GET_PINMUX_ERR;
}
*state = HALMAC_GPIO_CFG_STATE_BUSY;
cur_list = list;
for (i = 0; i < size; i++) {
value8 = HALMAC_REG_R8(cur_list->offset);
value8 &= ~(cur_list->msk);
if (switch_func == cur_list->func) {
value8 |= (cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
break;
}
value8 |= (~cur_list->value & cur_list->msk);
HALMAC_REG_W8(cur_list->offset, value8);
cur_list++;
}
*state = HALMAC_GPIO_CFG_STATE_IDLE;
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
pinmux_record_88xx(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val)
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_WL_LED:
adapter->pinmux_info.wl_led = val;
break;
case HALMAC_GPIO_FUNC_SDIO_INT:
adapter->pinmux_info.sdio_int = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
adapter->pinmux_info.sw_io_0 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
adapter->pinmux_info.sw_io_1 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
adapter->pinmux_info.sw_io_2 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
adapter->pinmux_info.sw_io_3 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
adapter->pinmux_info.sw_io_4 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
adapter->pinmux_info.sw_io_5 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
adapter->pinmux_info.sw_io_6 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
adapter->pinmux_info.sw_io_7 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
adapter->pinmux_info.sw_io_8 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
adapter->pinmux_info.sw_io_9 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
adapter->pinmux_info.sw_io_10 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
adapter->pinmux_info.sw_io_11 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
adapter->pinmux_info.sw_io_12 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
adapter->pinmux_info.sw_io_13 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
adapter->pinmux_info.sw_io_14 = val;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
adapter->pinmux_info.sw_io_15 = val;
break;
default:
return HALMAC_RET_GET_PINMUX_ERR;
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

59
hal/halmac/halmac_88xx/halmac_gpio_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_GPIO_88XX_H_
#define _HALMAC_GPIO_88XX_H_
#include "../halmac_api.h"
#include "../halmac_gpio_cmd.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
pinmux_wl_led_mode_88xx(struct halmac_adapter *adapter,
enum halmac_wlled_mode mode);
void
pinmux_wl_led_sw_ctrl_88xx(struct halmac_adapter *adapter, u8 on);
void
pinmux_sdio_int_polarity_88xx(struct halmac_adapter *adapter, u8 low_active);
enum halmac_ret_status
pinmux_gpio_mode_88xx(struct halmac_adapter *adapter, u8 gpio_id, u8 output);
enum halmac_ret_status
pinmux_gpio_output_88xx(struct halmac_adapter *adapter, u8 gpio_id, u8 high);
enum halmac_ret_status
pinmux_pin_status_88xx(struct halmac_adapter *adapter, u8 pin_id, u8 *high);
enum halmac_ret_status
pinmux_parser_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, u32 *cur_func);
enum halmac_ret_status
pinmux_switch_88xx(struct halmac_adapter *adapter,
const struct halmac_gpio_pimux_list *list, u32 size,
u32 gpio_id, enum halmac_gpio_func gpio_func);
enum halmac_ret_status
pinmux_record_88xx(struct halmac_adapter *adapter,
enum halmac_gpio_func gpio_func, u8 val);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_GPIO_88XX_H_ */

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hal/halmac/halmac_88xx/halmac_init_88xx.c Normal file
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74
hal/halmac/halmac_88xx/halmac_init_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_INIT_88XX_H_
#define _HALMAC_INIT_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
register_api_88xx(struct halmac_adapter *adapter,
struct halmac_api_registry *registry);
void
init_adapter_param_88xx(struct halmac_adapter *adapter);
void
init_adapter_dynamic_param_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
mount_api_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
pre_init_system_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
init_system_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
init_edca_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
init_wmac_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
init_mac_cfg_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
enum halmac_ret_status
reset_ofld_feature_88xx(struct halmac_adapter *adapter,
enum halmac_feature_id feature_id);
enum halmac_ret_status
verify_platform_api_88xx(struct halmac_adapter *adapter);
void
tx_desc_chksum_88xx(struct halmac_adapter *adapter, u8 enable);
enum halmac_ret_status
pg_num_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
struct halmac_pg_num *tbl);
enum halmac_ret_status
rqpn_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
struct halmac_rqpn *tbl);
void
init_ofld_feature_state_machine_88xx(struct halmac_adapter *adapter);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_INIT_88XX_H_ */

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hal/halmac/halmac_88xx/halmac_mimo_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_mimo_88xx.h"
#include "halmac_88xx_cfg.h"
#include "halmac_common_88xx.h"
#include "halmac_init_88xx.h"
#if HALMAC_88XX_SUPPORT
#define TXBF_CTRL_CFG (BIT_R_ENABLE_NDPA | BIT_USE_NDPA_PARAMETER | \
BIT_R_EN_NDPA_INT | BIT_DIS_NDP_BFEN)
static void
cfg_mu_bfee_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param);
static void
cfg_mu_bfer_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param);
static enum halmac_cmd_construct_state
fw_snding_cmd_cnstr_state_88xx(struct halmac_adapter *adapter);
static enum halmac_ret_status
cnv_fw_snding_state_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_construct_state dest_state);
static u8
snding_pkt_chk_88xx(struct halmac_adapter *adapter, u8 *pkt);
/**
* cfg_txbf_88xx() - enable/disable specific user's txbf
* @adapter : the adapter of halmac
* @userid : su bfee userid = 0 or 1 to apply TXBF
* @bw : the sounding bandwidth
* @txbf_en : 0: disable TXBF, 1: enable TXBF
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_txbf_88xx(struct halmac_adapter *adapter, u8 userid, enum halmac_bw bw,
u8 txbf_en)
{
u16 tmp42c = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (txbf_en) {
switch (bw) {
case HALMAC_BW_80:
tmp42c |= BIT_R_TXBF0_80M;
case HALMAC_BW_40:
tmp42c |= BIT_R_TXBF0_40M;
case HALMAC_BW_20:
tmp42c |= BIT_R_TXBF0_20M;
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
}
switch (userid) {
case 0:
tmp42c |= HALMAC_REG_R16(REG_TXBF_CTRL) &
~(BIT_R_TXBF0_20M | BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL, tmp42c);
break;
case 1:
tmp42c |= HALMAC_REG_R16(REG_TXBF_CTRL + 2) &
~(BIT_R_TXBF0_20M | BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL + 2, tmp42c);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* cfg_mumimo_88xx() -config mumimo
* @adapter : the adapter of halmac
* @param : parameters to configure MU PPDU Tx/Rx
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_mumimo_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param)
{
if (param->role == HAL_BFEE)
cfg_mu_bfee_88xx(adapter, param);
else
cfg_mu_bfer_88xx(adapter, param);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static void
cfg_mu_bfee_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param)
{
u8 mu_tbl_sel;
u8 tmp14c0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
tmp14c0 = HALMAC_REG_R8(REG_MU_TX_CTL) & ~BIT_MASK_R_MU_TABLE_VALID;
HALMAC_REG_W8(REG_MU_TX_CTL, (tmp14c0 | BIT(0) | BIT(1)) & ~(BIT(7)));
/*config GID valid table and user position table*/
mu_tbl_sel = HALMAC_REG_R8(REG_MU_TX_CTL + 1) & 0xF8;
HALMAC_REG_W8(REG_MU_TX_CTL + 1, mu_tbl_sel);
HALMAC_REG_W32(REG_MU_STA_GID_VLD, param->given_gid_tab[0]);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO, param->given_user_pos[0]);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO + 4, param->given_user_pos[1]);
HALMAC_REG_W8(REG_MU_TX_CTL + 1, mu_tbl_sel | 1);
HALMAC_REG_W32(REG_MU_STA_GID_VLD, param->given_gid_tab[1]);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO, param->given_user_pos[2]);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO + 4, param->given_user_pos[3]);
}
static void
cfg_mu_bfer_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param)
{
u8 i;
u8 idx;
u8 id0;
u8 id1;
u8 gid;
u8 mu_tbl_sel;
u8 mu_tbl_valid = 0;
u32 gid_valid[6] = {0};
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (param->mu_tx_en == _FALSE) {
HALMAC_REG_W8(REG_MU_TX_CTL,
HALMAC_REG_R8(REG_MU_TX_CTL) & ~(BIT(7)));
return;
}
for (idx = 0; idx < 15; idx++) {
if (idx < 5) {
/*grouping_bitmap bit0~4, MU_STA0 with MUSTA1~5*/
id0 = 0;
id1 = (u8)(idx + 1);
} else if (idx < 9) {
/*grouping_bitmap bit5~8, MU_STA1 with MUSTA2~5*/
id0 = 1;
id1 = (u8)(idx - 3);
} else if (idx < 12) {
/*grouping_bitmap bit9~11, MU_STA2 with MUSTA3~5*/
id0 = 2;
id1 = (u8)(idx - 6);
} else if (idx < 14) {
/*grouping_bitmap bit12~13, MU_STA3 with MUSTA4~5*/
id0 = 3;
id1 = (u8)(idx - 8);
} else {
/*grouping_bitmap bit14, MU_STA4 with MUSTA5*/
id0 = 4;
id1 = (u8)(idx - 9);
}
if (param->grouping_bitmap & BIT(idx)) {
/*Pair 1*/
gid = (idx << 1) + 1;
gid_valid[id0] |= (BIT(gid));
gid_valid[id1] |= (BIT(gid));
/*Pair 2*/
gid += 1;
gid_valid[id0] |= (BIT(gid));
gid_valid[id1] |= (BIT(gid));
} else {
/*Pair 1*/
gid = (idx << 1) + 1;
gid_valid[id0] &= ~(BIT(gid));
gid_valid[id1] &= ~(BIT(gid));
/*Pair 2*/
gid += 1;
gid_valid[id0] &= ~(BIT(gid));
gid_valid[id1] &= ~(BIT(gid));
}
}
/*set MU STA GID valid TABLE*/
mu_tbl_sel = HALMAC_REG_R8(REG_MU_TX_CTL + 1) & 0xF8;
for (idx = 0; idx < 6; idx++) {
HALMAC_REG_W8(REG_MU_TX_CTL + 1, idx | mu_tbl_sel);
HALMAC_REG_W32(REG_MU_STA_GID_VLD, gid_valid[idx]);
}
/*To validate the sounding successful MU STA and enable MU TX*/
for (i = 0; i < 6; i++) {
if (param->sounding_sts[i] == _TRUE)
mu_tbl_valid |= BIT(i);
}
HALMAC_REG_W8(REG_MU_TX_CTL, mu_tbl_valid | BIT(7));
}
/**
* cfg_sounding_88xx() - configure general sounding
* @adapter : the adapter of halmac
* @role : driver's role, BFer or BFee
* @rate : set ndpa tx rate if driver is BFer,
* or set csi response rate if driver is BFee
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role,
enum halmac_data_rate rate)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 tmp6dc = 0;
u8 csi_rsc = 0x1;
/*use ndpa rx rate to decide csi rate*/
tmp6dc = HALMAC_REG_R32(REG_BBPSF_CTRL) | BIT_WMAC_USE_NDPARATE
| (csi_rsc << 13);
switch (role) {
case HAL_BFER:
HALMAC_REG_W32_SET(REG_TXBF_CTRL, TXBF_CTRL_CFG);
HALMAC_REG_W8(REG_NDPA_RATE, rate);
HALMAC_REG_W8_CLR(REG_NDPA_OPT_CTRL, BIT(0) | BIT(1));
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 1, 0x2 | BIT(7));
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 2, 0x2);
break;
case HAL_BFEE:
HALMAC_REG_W8(REG_SND_PTCL_CTRL, 0xDB);
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 3, 0x26);
HALMAC_REG_W8_CLR(REG_RXFLTMAP1, BIT(4));
HALMAC_REG_W8_CLR(REG_RXFLTMAP4, BIT(4));
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
/*AP mode set tx gid to 63*/
/*STA mode set tx gid to 0*/
if (BIT_GET_NETYPE0(HALMAC_REG_R32(REG_CR)) == 0x3)
HALMAC_REG_W32(REG_BBPSF_CTRL, tmp6dc | BIT(12));
else
HALMAC_REG_W32(REG_BBPSF_CTRL, tmp6dc & ~(BIT(12)));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* del_sounding_88xx() - reset general sounding
* @adapter : the adapter of halmac
* @role : driver's role, BFer or BFee
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
del_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
switch (role) {
case HAL_BFER:
HALMAC_REG_W8(REG_TXBF_CTRL + 3, 0);
break;
case HAL_BFEE:
HALMAC_REG_W8(REG_SND_PTCL_CTRL, 0);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* su_bfee_entry_init_88xx() - config SU beamformee's registers
* @adapter : the adapter of halmac
* @userid : SU bfee userid = 0 or 1 to be added
* @paid : partial AID of this bfee
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
su_bfee_entry_init_88xx(struct halmac_adapter *adapter, u8 userid, u16 paid)
{
u16 tmp42c = 0;
u16 tmp168x = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
switch (userid) {
case 0:
tmp42c = HALMAC_REG_R16(REG_TXBF_CTRL) &
~(BIT_MASK_R_TXBF0_AID | BIT_R_TXBF0_20M |
BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL, tmp42c | paid);
HALMAC_REG_W16(REG_ASSOCIATED_BFMEE_SEL, paid);
#if HALMAC_8822C_SUPPORT
if (adapter->chip_id == HALMAC_CHIP_ID_8822C)
HALMAC_REG_W16(REG_ASSOCIATED_BFMEE_SEL, paid | BIT(9));
#endif
break;
case 1:
tmp42c = HALMAC_REG_R16(REG_TXBF_CTRL + 2) &
~(BIT_MASK_R_TXBF1_AID | BIT_R_TXBF0_20M |
BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL + 2, tmp42c | paid);
HALMAC_REG_W16(REG_ASSOCIATED_BFMEE_SEL + 2, paid | BIT(9));
break;
case 2:
tmp168x = HALMAC_REG_R16(REG_WMAC_ASSOCIATED_MU_BFMEE2);
tmp168x = BIT_CLEAR_WMAC_MU_BFEE2_AID(tmp168x);
tmp168x |= (paid | BIT(9));
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE2, tmp168x);
break;
case 3:
tmp168x = HALMAC_REG_R16(REG_WMAC_ASSOCIATED_MU_BFMEE3);
tmp168x = BIT_CLEAR_WMAC_MU_BFEE3_AID(tmp168x);
tmp168x |= (paid | BIT(9));
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE3, tmp168x);
break;
case 4:
tmp168x = HALMAC_REG_R16(REG_WMAC_ASSOCIATED_MU_BFMEE4);
tmp168x = BIT_CLEAR_WMAC_MU_BFEE4_AID(tmp168x);
tmp168x |= (paid | BIT(9));
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE4, tmp168x);
break;
case 5:
tmp168x = HALMAC_REG_R16(REG_WMAC_ASSOCIATED_MU_BFMEE5);
tmp168x = BIT_CLEAR_WMAC_MU_BFEE5_AID(tmp168x);
tmp168x |= (paid | BIT(9));
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE5, tmp168x);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* su_bfee_entry_init_88xx() - config SU beamformer's registers
* @adapter : the adapter of halmac
* @param : parameters to configure SU BFER entry
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
su_bfer_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_su_bfer_init_para *param)
{
u16 mac_addr_h;
u32 mac_addr_l;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
mac_addr_l = rtk_le32_to_cpu(param->bfer_address.addr_l_h.low);
mac_addr_h = rtk_le16_to_cpu(param->bfer_address.addr_l_h.high);
switch (param->userid) {
case 0:
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO, mac_addr_l);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER0_INFO + 4, mac_addr_h);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER0_INFO + 6, param->paid);
HALMAC_REG_W16(REG_TX_CSI_RPT_PARAM_BW20, param->csi_para);
break;
case 1:
HALMAC_REG_W32(REG_ASSOCIATED_BFMER1_INFO, mac_addr_l);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER1_INFO + 4, mac_addr_h);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER1_INFO + 6, param->paid);
HALMAC_REG_W16(REG_TX_CSI_RPT_PARAM_BW20 + 2, param->csi_para);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* mu_bfee_entry_init_88xx() - config MU beamformee's registers
* @adapter : the adapter of halmac
* @param : parameters to configure MU BFEE entry
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mu_bfee_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_mu_bfee_init_para *param)
{
u16 tmp168x = 0;
u16 tmp14c0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
tmp168x |= param->paid | BIT(9);
HALMAC_REG_W16((0x1680 + param->userid * 2), tmp168x);
tmp14c0 = HALMAC_REG_R16(REG_MU_TX_CTL) & ~(BIT(8) | BIT(9) | BIT(10));
HALMAC_REG_W16(REG_MU_TX_CTL, tmp14c0 | ((param->userid - 2) << 8));
HALMAC_REG_W32(REG_MU_STA_GID_VLD, 0);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO, param->user_position_l);
HALMAC_REG_W32(REG_MU_STA_USER_POS_INFO + 4, param->user_position_h);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* mu_bfer_entry_init_88xx() - config MU beamformer's registers
* @adapter : the adapter of halmac
* @param : parameters to configure MU BFER entry
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mu_bfer_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_mu_bfer_init_para *param)
{
u16 tmp1680 = 0;
u16 mac_addr_h;
u32 mac_addr_l;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
mac_addr_l = rtk_le32_to_cpu(param->bfer_address.addr_l_h.low);
mac_addr_h = rtk_le16_to_cpu(param->bfer_address.addr_l_h.high);
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO, mac_addr_l);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER0_INFO + 4, mac_addr_h);
HALMAC_REG_W16(REG_ASSOCIATED_BFMER0_INFO + 6, param->paid);
HALMAC_REG_W16(REG_TX_CSI_RPT_PARAM_BW20, param->csi_para);
tmp1680 = HALMAC_REG_R16(0x1680) & 0xC000;
tmp1680 |= param->my_aid | (param->csi_length_sel << 12);
HALMAC_REG_W16(0x1680, tmp1680);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* su_bfee_entry_del_88xx() - reset SU beamformee's registers
* @adapter : the adapter of halmac
* @userid : the SU BFee userid to be deleted
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
su_bfee_entry_del_88xx(struct halmac_adapter *adapter, u8 userid)
{
u16 value16;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
switch (userid) {
case 0:
value16 = HALMAC_REG_R16(REG_TXBF_CTRL);
value16 &= ~(BIT_MASK_R_TXBF0_AID | BIT_R_TXBF0_20M |
BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL, value16);
HALMAC_REG_W16(REG_ASSOCIATED_BFMEE_SEL, 0);
break;
case 1:
value16 = HALMAC_REG_R16(REG_TXBF_CTRL + 2);
value16 &= ~(BIT_MASK_R_TXBF1_AID | BIT_R_TXBF0_20M |
BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
HALMAC_REG_W16(REG_TXBF_CTRL + 2, value16);
HALMAC_REG_W16(REG_ASSOCIATED_BFMEE_SEL + 2, 0);
break;
case 2:
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE2, 0);
break;
case 3:
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE3, 0);
break;
case 4:
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE4, 0);
break;
case 5:
HALMAC_REG_W16(REG_WMAC_ASSOCIATED_MU_BFMEE5, 0);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* su_bfee_entry_del_88xx() - reset SU beamformer's registers
* @adapter : the adapter of halmac
* @userid : the SU BFer userid to be deleted
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
su_bfer_entry_del_88xx(struct halmac_adapter *adapter, u8 userid)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
switch (userid) {
case 0:
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO, 0);
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO + 4, 0);
break;
case 1:
HALMAC_REG_W32(REG_ASSOCIATED_BFMER1_INFO, 0);
HALMAC_REG_W32(REG_ASSOCIATED_BFMER1_INFO + 4, 0);
break;
default:
return HALMAC_RET_INVALID_SOUNDING_SETTING;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* mu_bfee_entry_del_88xx() - reset MU beamformee's registers
* @adapter : the adapter of halmac
* @userid : the MU STA userid to be deleted
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mu_bfee_entry_del_88xx(struct halmac_adapter *adapter, u8 userid)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W16(0x1680 + userid * 2, 0);
HALMAC_REG_W8_CLR(REG_MU_TX_CTL, BIT(userid - 2));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* mu_bfer_entry_del_88xx() -reset MU beamformer's registers
* @adapter : the adapter of halmac
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mu_bfer_entry_del_88xx(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO, 0);
HALMAC_REG_W32(REG_ASSOCIATED_BFMER0_INFO + 4, 0);
HALMAC_REG_W16(0x1680, 0);
HALMAC_REG_W8(REG_MU_TX_CTL, 0);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* cfg_csi_rate_88xx() - config CSI frame Tx rate
* @adapter : the adapter of halmac
* @rssi : rssi in decimal value
* @cur_rate : current CSI frame rate
* @fixrate_en : enable to fix CSI frame in VHT rate, otherwise legacy OFDM rate
* @new_rate : API returns the final CSI frame rate
* Author : chunchu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_csi_rate_88xx(struct halmac_adapter *adapter, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate)
{
u32 csi_cfg;
u16 cur_rrsr;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
#if HALMAC_8821C_SUPPORT
if (adapter->chip_id == HALMAC_CHIP_ID_8821C && fixrate_en) {
csi_cfg = HALMAC_REG_R32(REG_BBPSF_CTRL) & ~BITS_WMAC_CSI_RATE;
HALMAC_REG_W32(REG_BBPSF_CTRL,
csi_cfg | BIT_CSI_FORCE_RATE_EN |
BIT_CSI_RSC(1) |
BIT_WMAC_CSI_RATE(HALMAC_VHT_NSS1_MCS3));
*new_rate = HALMAC_VHT_NSS1_MCS3;
return HALMAC_RET_SUCCESS;
}
csi_cfg = HALMAC_REG_R32(REG_BBPSF_CTRL) & ~BITS_WMAC_CSI_RATE &
~BIT_CSI_FORCE_RATE_EN;
#else
csi_cfg = HALMAC_REG_R32(REG_BBPSF_CTRL) & ~BITS_WMAC_CSI_RATE;
#endif
cur_rrsr = HALMAC_REG_R16(REG_RRSR);
if (rssi >= 40) {
if (cur_rate != HALMAC_OFDM54) {
cur_rrsr |= BIT(HALMAC_OFDM54);
csi_cfg |= BIT_WMAC_CSI_RATE(HALMAC_OFDM54);
HALMAC_REG_W16(REG_RRSR, cur_rrsr);
HALMAC_REG_W32(REG_BBPSF_CTRL, csi_cfg);
}
*new_rate = HALMAC_OFDM54;
} else {
if (cur_rate != HALMAC_OFDM24) {
cur_rrsr &= ~(BIT(HALMAC_OFDM54));
csi_cfg |= BIT_WMAC_CSI_RATE(HALMAC_OFDM24);
HALMAC_REG_W16(REG_RRSR, cur_rrsr);
HALMAC_REG_W32(REG_BBPSF_CTRL, csi_cfg);
}
*new_rate = HALMAC_OFDM24;
}
return HALMAC_RET_SUCCESS;
}
/**
* fw_snding_88xx() - fw sounding control
* @adapter : the adapter of halmac
* @su_info :
* su0_en : enable/disable fw sounding
* su0_ndpa_pkt : ndpa pkt, shall include txdesc
* su0_pkt_sz : ndpa pkt size, shall include txdesc
* @mu_info : currently not in use, input NULL is acceptable
* @period : sounding period, unit is 5ms
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
fw_snding_88xx(struct halmac_adapter *adapter,
struct halmac_su_snding_info *su_info,
struct halmac_mu_snding_info *mu_info, u8 period)
{
u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
u16 seq_num;
u16 snding_info_addr;
struct halmac_h2c_header_info hdr_info;
enum halmac_cmd_process_status *proc_status;
enum halmac_ret_status status;
proc_status = &adapter->halmac_state.fw_snding_state.proc_status;
if (adapter->chip_id == HALMAC_CHIP_ID_8821C)
return HALMAC_RET_NOT_SUPPORT;
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_NO_DLFW;
if (adapter->fw_ver.h2c_version < 9)
return HALMAC_RET_FW_NO_SUPPORT;
if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_TRACE("[TRACE]Wait event(snd)\n");
return HALMAC_RET_BUSY_STATE;
}
if (su_info->su0_en == 1) {
if (!su_info->su0_ndpa_pkt)
return HALMAC_RET_NULL_POINTER;
if (su_info->su0_pkt_sz > (u32)SU0_SNDING_PKT_RSVDPG_SIZE -
adapter->hw_cfg_info.txdesc_size)
return HALMAC_RET_DATA_SIZE_INCORRECT;
if (!snding_pkt_chk_88xx(adapter, su_info->su0_ndpa_pkt))
return HALMAC_RET_TXDESC_SET_FAIL;
if (fw_snding_cmd_cnstr_state_88xx(adapter) !=
HALMAC_CMD_CNSTR_IDLE) {
PLTFM_MSG_ERR("[ERR]Not idle(snd)\n");
return HALMAC_RET_ERROR_STATE;
}
snding_info_addr = adapter->txff_alloc.rsvd_h2c_sta_info_addr +
SU0_SNDING_PKT_OFFSET;
status = dl_rsvd_page_88xx(adapter, snding_info_addr,
su_info->su0_ndpa_pkt,
su_info->su0_pkt_sz);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]dl rsvd page\n");
return status;
}
FW_SNDING_SET_SU0(h2c_buf, 1);
FW_SNDING_SET_PERIOD(h2c_buf, period);
FW_SNDING_SET_NDPA0_HEAD_PG(h2c_buf, snding_info_addr -
adapter->txff_alloc.rsvd_boundary);
} else {
if (fw_snding_cmd_cnstr_state_88xx(adapter) !=
HALMAC_CMD_CNSTR_BUSY) {
PLTFM_MSG_ERR("[ERR]Not snd(snd)\n");
return HALMAC_RET_ERROR_STATE;
}
FW_SNDING_SET_SU0(h2c_buf, 0);
}
*proc_status = HALMAC_CMD_PROCESS_SENDING;
hdr_info.sub_cmd_id = SUB_CMD_ID_FW_SNDING;
hdr_info.content_size = 8;
hdr_info.ack = _TRUE;
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
adapter->halmac_state.fw_snding_state.seq_num = seq_num;
status = send_h2c_pkt_88xx(adapter, h2c_buf);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]send h2c\n");
reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_FW_SNDING);
return status;
}
if (cnv_fw_snding_state_88xx(adapter, su_info->su0_en == 1 ?
HALMAC_CMD_CNSTR_BUSY :
HALMAC_CMD_CNSTR_IDLE)
!= HALMAC_RET_SUCCESS)
return HALMAC_RET_ERROR_STATE;
return HALMAC_RET_SUCCESS;
}
static u8
snding_pkt_chk_88xx(struct halmac_adapter *adapter, u8 *pkt)
{
u8 data_rate;
if (GET_TX_DESC_NDPA(pkt) == 0) {
PLTFM_MSG_ERR("[ERR]txdesc ndpa = 0\n");
return _FALSE;
}
data_rate = (u8)GET_TX_DESC_DATARATE(pkt);
if (!(data_rate >= HALMAC_VHT_NSS2_MCS0 &&
data_rate <= HALMAC_VHT_NSS2_MCS9)) {
if (!(data_rate >= HALMAC_MCS8 && data_rate <= HALMAC_MCS15)) {
PLTFM_MSG_ERR("[ERR]txdesc rate\n");
return _FALSE;
}
}
if (GET_TX_DESC_NAVUSEHDR(pkt) == 0) {
PLTFM_MSG_ERR("[ERR]txdesc navusehdr = 0\n");
return _FALSE;
}
if (GET_TX_DESC_USE_RATE(pkt) == 0) {
PLTFM_MSG_ERR("[ERR]txdesc userate = 0\n");
return _FALSE;
}
return _TRUE;
}
static enum halmac_cmd_construct_state
fw_snding_cmd_cnstr_state_88xx(struct halmac_adapter *adapter)
{
return adapter->halmac_state.fw_snding_state.cmd_cnstr_state;
}
enum halmac_ret_status
get_h2c_ack_fw_snding_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u8 seq_num = 0;
u8 fw_rc;
struct halmac_fw_snding_state *state;
enum halmac_cmd_process_status proc_status;
state = &adapter->halmac_state.fw_snding_state;
seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
PLTFM_MSG_TRACE("[TRACE]Seq num:h2c->%d c2h->%d\n",
state->seq_num, seq_num);
if (seq_num != state->seq_num) {
PLTFM_MSG_ERR("[ERR]Seq num mismatch:h2c->%d c2h->%d\n",
state->seq_num, seq_num);
return HALMAC_RET_SUCCESS;
}
if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
PLTFM_MSG_ERR("[ERR]not sending(snd)\n");
return HALMAC_RET_SUCCESS;
}
fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
state->fw_rc = fw_rc;
if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
proc_status = HALMAC_CMD_PROCESS_DONE;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_FW_SNDING, proc_status,
NULL, 0);
} else {
proc_status = HALMAC_CMD_PROCESS_ERROR;
state->proc_status = proc_status;
PLTFM_EVENT_SIG(HALMAC_FEATURE_FW_SNDING, proc_status,
&fw_rc, 1);
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
get_fw_snding_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status)
{
*proc_status = adapter->halmac_state.fw_snding_state.proc_status;
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
cnv_fw_snding_state_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_construct_state dest_state)
{
struct halmac_fw_snding_state *state;
state = &adapter->halmac_state.fw_snding_state;
if (state->cmd_cnstr_state != HALMAC_CMD_CNSTR_IDLE &&
state->cmd_cnstr_state != HALMAC_CMD_CNSTR_BUSY)
return HALMAC_RET_ERROR_STATE;
if (dest_state == HALMAC_CMD_CNSTR_IDLE) {
if (state->cmd_cnstr_state == HALMAC_CMD_CNSTR_IDLE)
return HALMAC_RET_ERROR_STATE;
} else if (dest_state == HALMAC_CMD_CNSTR_BUSY) {
if (state->cmd_cnstr_state == HALMAC_CMD_CNSTR_BUSY)
return HALMAC_RET_ERROR_STATE;
}
state->cmd_cnstr_state = dest_state;
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_88XX_SUPPORT */

83
hal/halmac/halmac_88xx/halmac_mimo_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_MIMO_88XX_H_
#define _HALMAC_MIMO_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
cfg_txbf_88xx(struct halmac_adapter *adapter, u8 userid, enum halmac_bw bw,
u8 txbf_en);
enum halmac_ret_status
cfg_mumimo_88xx(struct halmac_adapter *adapter,
struct halmac_cfg_mumimo_para *param);
enum halmac_ret_status
cfg_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role,
enum halmac_data_rate rate);
enum halmac_ret_status
del_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role);
enum halmac_ret_status
su_bfee_entry_init_88xx(struct halmac_adapter *adapter, u8 userid, u16 paid);
enum halmac_ret_status
su_bfer_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_su_bfer_init_para *param);
enum halmac_ret_status
mu_bfee_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_mu_bfee_init_para *param);
enum halmac_ret_status
mu_bfer_entry_init_88xx(struct halmac_adapter *adapter,
struct halmac_mu_bfer_init_para *param);
enum halmac_ret_status
su_bfee_entry_del_88xx(struct halmac_adapter *adapter, u8 userid);
enum halmac_ret_status
su_bfer_entry_del_88xx(struct halmac_adapter *adapter, u8 userid);
enum halmac_ret_status
mu_bfee_entry_del_88xx(struct halmac_adapter *adapter, u8 userid);
enum halmac_ret_status
mu_bfer_entry_del_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_csi_rate_88xx(struct halmac_adapter *adapter, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate);
enum halmac_ret_status
fw_snding_88xx(struct halmac_adapter *adapter,
struct halmac_su_snding_info *su_info,
struct halmac_mu_snding_info *mu_info, u8 period);
enum halmac_ret_status
get_h2c_ack_fw_snding_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
enum halmac_ret_status
get_fw_snding_status_88xx(struct halmac_adapter *adapter,
enum halmac_cmd_process_status *proc_status);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_MIMO_88XX_H_ */

543
hal/halmac/halmac_88xx/halmac_pcie_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pcie_88xx.h"
#if HALMAC_88XX_SUPPORT
/**
* init_pcie_cfg_88xx() - init PCIe
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_pcie_cfg_88xx(struct halmac_adapter *adapter)
{
if (adapter->intf != HALMAC_INTERFACE_PCIE)
return HALMAC_RET_WRONG_INTF;
return HALMAC_RET_SUCCESS;
}
/**
* deinit_pcie_cfg_88xx() - deinit PCIE
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
deinit_pcie_cfg_88xx(struct halmac_adapter *adapter)
{
if (adapter->intf != HALMAC_INTERFACE_PCIE)
return HALMAC_RET_WRONG_INTF;
return HALMAC_RET_SUCCESS;
}
/**
* cfg_pcie_rx_agg_88xx() - config rx aggregation
* @adapter : the adapter of halmac
* @halmac_rx_agg_mode
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_pcie_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg)
{
return HALMAC_RET_SUCCESS;
}
/**
* reg_r8_pcie_88xx() - read 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u8
reg_r8_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
{
return PLTFM_REG_R8(offset);
}
/**
* reg_w8_pcie_88xx() - write 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w8_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
{
PLTFM_REG_W8(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* reg_r16_pcie_88xx() - read 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u16
reg_r16_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
{
return PLTFM_REG_R16(offset);
}
/**
* reg_w16_pcie_88xx() - write 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w16_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u16 value)
{
PLTFM_REG_W16(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* reg_r32_pcie_88xx() - read 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
reg_r32_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
{
return PLTFM_REG_R32(offset);
}
/**
* reg_w32_pcie_88xx() - write 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w32_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u32 value)
{
PLTFM_REG_W32(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* cfg_txagg_pcie_align_88xx() -config sdio bus tx agg alignment
* @adapter : the adapter of halmac
* @enable : function enable(1)/disable(0)
* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
* Author : Soar Tu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_txagg_pcie_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* tx_allowed_pcie_88xx() - check tx status
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size, include txdesc
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
tx_allowed_pcie_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* pcie_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
* @adapter : the adapter of halmac
* @offset : register offset
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
pcie_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
{
return 0xFFFFFFFF;
}
/**
* pcie_reg_rn_88xx() - read n byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @size : register value size
* @value : register value
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* set_pcie_bulkout_num_88xx() - inform bulk-out num
* @adapter : the adapter of halmac
* @num : usb bulk-out number
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_pcie_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* get_pcie_tx_addr_88xx() - get CMD53 addr for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @cmd53_addr : cmd53 addr value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_pcie_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* get_pcie_bulkout_id_88xx() - get bulk out id for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @id : usb bulk-out id
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_pcie_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id)
{
return HALMAC_RET_NOT_SUPPORT;
}
enum halmac_ret_status
mdio_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed)
{
u8 tmp_u1b = 0;
u32 cnt = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 real_addr = 0;
HALMAC_REG_W16(REG_MDIO_V1, data);
real_addr = (addr & 0x1F);
HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
if (speed == HAL_INTF_PHY_PCIE_GEN1) {
if (addr < 0x20)
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
else
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
if (addr < 0x20)
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
else
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
} else {
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
}
HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1);
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
cnt--;
}
if (tmp_u1b) {
PLTFM_MSG_ERR("[ERR]MDIO write fail!\n");
return HALMAC_RET_FAIL;
}
return HALMAC_RET_SUCCESS;
}
u16
mdio_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
{
u16 ret = 0;
u8 tmp_u1b = 0;
u32 cnt = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 real_addr = 0;
real_addr = (addr & 0x1F);
HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
if (speed == HAL_INTF_PHY_PCIE_GEN1) {
if (addr < 0x20)
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
else
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
if (addr < 0x20)
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
else
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
} else {
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
}
HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_RFLAG_V1);
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
cnt--;
}
if (tmp_u1b) {
ret = 0xFFFF;
PLTFM_MSG_ERR("[ERR]MDIO read fail!\n");
} else {
ret = HALMAC_REG_R16(REG_MDIO_V1 + 2);
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
}
return ret;
}
enum halmac_ret_status
dbi_w32_88xx(struct halmac_adapter *adapter, u16 addr, u32 data)
{
u8 tmp_u1b = 0;
u32 cnt = 0;
u16 write_addr = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W32(REG_DBI_WDATA_V1, data);
write_addr = ((addr & 0x0ffc) | (0x000F << 12));
HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt--;
}
if (tmp_u1b) {
PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
return HALMAC_RET_FAIL;
}
return HALMAC_RET_SUCCESS;
}
u32
dbi_r32_88xx(struct halmac_adapter *adapter, u16 addr)
{
u16 read_addr = addr & 0x0ffc;
u8 tmp_u1b = 0;
u32 cnt = 0;
u32 ret = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt--;
}
if (tmp_u1b) {
ret = 0xFFFF;
PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
} else {
ret = HALMAC_REG_R32(REG_DBI_RDATA_V1);
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
}
return ret;
}
enum halmac_ret_status
dbi_w8_88xx(struct halmac_adapter *adapter, u16 addr, u8 data)
{
u8 tmp_u1b = 0;
u32 cnt = 0;
u16 write_addr = 0;
u16 remainder = addr & (4 - 1);
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W8(REG_DBI_WDATA_V1 + remainder, data);
write_addr = ((addr & 0x0ffc) | (BIT(0) << (remainder + 12)));
HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt--;
}
if (tmp_u1b) {
PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
return HALMAC_RET_FAIL;
}
return HALMAC_RET_SUCCESS;
}
u8
dbi_r8_88xx(struct halmac_adapter *adapter, u16 addr)
{
u16 read_addr = addr & 0x0ffc;
u8 tmp_u1b = 0;
u32 cnt = 0;
u8 ret = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt = 20;
while (tmp_u1b && (cnt != 0)) {
PLTFM_DELAY_US(10);
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
cnt--;
}
if (tmp_u1b) {
ret = 0xFF;
PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
} else {
ret = HALMAC_REG_R8(REG_DBI_RDATA_V1 + (addr & (4 - 1)));
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
}
return ret;
}
enum halmac_ret_status
trxdma_check_idle_88xx(struct halmac_adapter *adapter)
{
u32 cnt = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
/* Stop Tx & Rx DMA */
HALMAC_REG_W32_SET(REG_RXPKT_NUM, BIT(18));
HALMAC_REG_W16_SET(REG_PCIE_CTRL, ~(BIT(15) | BIT(8)));
/* Stop FW */
HALMAC_REG_W16_CLR(REG_SYS_FUNC_EN, BIT(10));
/* Check Tx DMA is idle */
cnt = 20;
while ((HALMAC_REG_R8(REG_SYS_CFG5) & BIT(2)) == BIT(2)) {
PLTFM_DELAY_US(10);
cnt--;
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]Chk tx idle\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
}
/* Check Rx DMA is idle */
cnt = 20;
while ((HALMAC_REG_R32(REG_RXPKT_NUM) & BIT(17)) != BIT(17)) {
PLTFM_DELAY_US(10);
cnt--;
if (cnt == 0) {
PLTFM_MSG_ERR("[ERR]Chk rx idle\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
}
return HALMAC_RET_SUCCESS;
}
void
en_ref_autok_88xx(struct halmac_adapter *adapter, u8 en)
{
if (en == 1)
adapter->pcie_refautok_en = 1;
else
adapter->pcie_refautok_en = 0;
}
#endif /* HALMAC_88XX_SUPPORT */

102
hal/halmac/halmac_88xx/halmac_pcie_88xx.h Normal file
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@@ -0,0 +1,102 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_PCIE_88XX_H_
#define _HALMAC_PCIE_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
init_pcie_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
deinit_pcie_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_pcie_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg);
u8
reg_r8_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
cfg_txagg_pcie_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size);
enum halmac_ret_status
tx_allowed_pcie_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
u32
pcie_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
pcie_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value);
enum halmac_ret_status
set_pcie_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num);
enum halmac_ret_status
get_pcie_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
enum halmac_ret_status
get_pcie_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id);
enum halmac_ret_status
mdio_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed);
u16
mdio_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed);
enum halmac_ret_status
dbi_w32_88xx(struct halmac_adapter *adapter, u16 addr, u32 data);
u32
dbi_r32_88xx(struct halmac_adapter *adapter, u16 addr);
enum halmac_ret_status
dbi_w8_88xx(struct halmac_adapter *adapter, u16 addr, u8 data);
u8
dbi_r8_88xx(struct halmac_adapter *adapter, u16 addr);
enum halmac_ret_status
trxdma_check_idle_88xx(struct halmac_adapter *adapter);
void
en_ref_autok_88xx(struct halmac_adapter *dapter, u8 en);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_PCIE_88XX_H_ */

892
hal/halmac/halmac_88xx/halmac_sdio_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_sdio_88xx.h"
#include "halmac_88xx_cfg.h"
#if HALMAC_88XX_SUPPORT
/* define the SDIO Bus CLK threshold */
/* for avoiding CMD53 fails that result from SDIO CLK sync to ana_clk fail */
#define SDIO_CLK_HIGH_SPEED_TH 50 /* 50MHz */
#define SDIO_CLK_SPEED_MAX 208 /* 208MHz */
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u8
r_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 offset);
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 offset);
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size);
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size);
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
/**
* init_sdio_cfg_88xx() - init SDIO
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_sdio_cfg_88xx(struct halmac_adapter *adapter)
{
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_R32(REG_SDIO_FREE_TXPG);
value32 = HALMAC_REG_R32(REG_SDIO_TX_CTRL) & 0xFFFF;
value32 &= ~(BIT_CMD_ERR_STOP_INT_EN | BIT_EN_MASK_TIMER |
BIT_EN_RXDMA_MASK_INT);
HALMAC_REG_W32(REG_SDIO_TX_CTRL, value32);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* deinit_sdio_cfg_88xx() - deinit SDIO
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
deinit_sdio_cfg_88xx(struct halmac_adapter *adapter)
{
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
return HALMAC_RET_SUCCESS;
}
/**
* cfg_sdio_rx_agg_88xx() - config rx aggregation
* @adapter : the adapter of halmac
* @halmac_rx_agg_mode
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_sdio_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg)
{
u8 value8;
u8 size;
u8 timeout;
u8 agg_enable;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
agg_enable = HALMAC_REG_R8(REG_TXDMA_PQ_MAP);
switch (cfg->mode) {
case HALMAC_RX_AGG_MODE_NONE:
agg_enable &= ~(BIT_RXDMA_AGG_EN);
break;
case HALMAC_RX_AGG_MODE_DMA:
case HALMAC_RX_AGG_MODE_USB:
agg_enable |= BIT_RXDMA_AGG_EN;
break;
default:
PLTFM_MSG_ERR("[ERR]unsupported mode\n");
agg_enable &= ~BIT_RXDMA_AGG_EN;
break;
}
if (cfg->threshold.drv_define == _FALSE) {
size = 0xFF;
timeout = 0x01;
} else {
size = cfg->threshold.size;
timeout = cfg->threshold.timeout;
}
value32 = HALMAC_REG_R32(REG_RXDMA_AGG_PG_TH);
if (cfg->threshold.size_limit_en == _FALSE)
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 & ~BIT_EN_PRE_CALC);
else
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 | BIT_EN_PRE_CALC);
HALMAC_REG_W8(REG_TXDMA_PQ_MAP, agg_enable);
HALMAC_REG_W16(REG_RXDMA_AGG_PG_TH,
(u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO_V1)));
value8 = HALMAC_REG_R8(REG_RXDMA_MODE);
if (0 != (agg_enable & BIT_RXDMA_AGG_EN))
HALMAC_REG_W8(REG_RXDMA_MODE, value8 | BIT_DMA_MODE);
else
HALMAC_REG_W8(REG_RXDMA_MODE, value8 & ~(BIT_DMA_MODE));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* sdio_reg_rn_88xx() - read n byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @halmac_size : register value size
* @value : register value
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
sdio_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (0 == (offset & 0xFFFF0000)) {
PLTFM_MSG_ERR("[ERR]offset 0x%x\n", offset);
return HALMAC_RET_FAIL;
}
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
PLTFM_MSG_ERR("[ERR]power off\n");
return HALMAC_RET_FAIL;
}
PLTFM_SDIO_CMD53_RN(offset, size, value);
return HALMAC_RET_SUCCESS;
}
/**
* cfg_txagg_sdio_align_88xx() -config sdio bus tx agg alignment
* @adapter : the adapter of halmac
* @enable : function enable(1)/disable(0)
* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
* Author : Soar Tu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_txagg_sdio_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size)
{
u8 i;
u8 flag = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (adapter->chip_id == HALMAC_CHIP_ID_8822B)
return HALMAC_RET_NOT_SUPPORT;
if ((align_size & 0xF000) != 0) {
PLTFM_MSG_ERR("[ERR]out of range\n");
return HALMAC_RET_FAIL;
}
for (i = 3; i <= 11; i++) {
if (align_size == 1 << i) {
flag = 1;
break;
}
}
if (flag == 0) {
PLTFM_MSG_ERR("[ERR]not 2^3 ~ 2^11\n");
return HALMAC_RET_FAIL;
}
adapter->hw_cfg_info.tx_align_size = align_size;
if (enable)
HALMAC_REG_W16(REG_RQPN_CTRL_2, 0x8000 | align_size);
else
HALMAC_REG_W16(REG_RQPN_CTRL_2, align_size);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* sdio_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
* @adapter : the adapter of halmac
* @offset : register offset
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
sdio_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
{
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
}
/**
* set_sdio_bulkout_num_88xx() - inform bulk-out num
* @adapter : the adapter of halmac
* @bulkout_num : usb bulk-out number
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_sdio_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* get_sdio_bulkout_id_88xx() - get bulk out id for the TX packet
* @adapter : the adapter of halmac
* @halmac_buf : tx packet, include txdesc
* @halmac_size : tx packet size
* @bulkout_id : usb bulk-out id
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_sdio_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* sdio_cmd53_4byte_88xx() - cmd53 only for 4byte len register IO
* @adapter : the adapter of halmac
* @enable : 1->CMD53 only use in 4byte reg, 0 : No limitation
* Author : Ivan Lin/KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
sdio_cmd53_4byte_88xx(struct halmac_adapter *adapter,
enum halmac_sdio_cmd53_4byte_mode mode)
{
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
if (adapter->api_registry.sdio_cmd53_4byte_en == 0)
return HALMAC_RET_NOT_SUPPORT;
adapter->sdio_cmd53_4byte = mode;
return HALMAC_RET_SUCCESS;
}
/**
* sdio_hw_info_88xx() - info sdio hw info
* @adapter : the adapter of halmac
* @HALMAC_SDIO_CMD53_4BYTE_MODE :
* clock_speed : sdio bus clock. Unit -> MHz
* spec_ver : sdio spec version
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
sdio_hw_info_88xx(struct halmac_adapter *adapter,
struct halmac_sdio_hw_info *info)
{
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (adapter->intf != HALMAC_INTERFACE_SDIO)
return HALMAC_RET_WRONG_INTF;
PLTFM_MSG_TRACE("[TRACE]SDIO clock:%d, spec:%d\n",
info->clock_speed, info->spec_ver);
if (info->clock_speed > SDIO_CLK_SPEED_MAX)
return HALMAC_RET_SDIO_CLOCK_ERR;
if (info->clock_speed > SDIO_CLK_HIGH_SPEED_TH)
adapter->sdio_hw_info.io_hi_speed_flag = 1;
adapter->sdio_hw_info.io_indir_flag = info->io_indir_flag;
if (info->clock_speed > SDIO_CLK_HIGH_SPEED_TH &&
adapter->sdio_hw_info.io_indir_flag == 0)
PLTFM_MSG_WARN("[WARN]SDIO clock:%d, indir access is better\n",
info->clock_speed);
adapter->sdio_hw_info.clock_speed = info->clock_speed;
adapter->sdio_hw_info.spec_ver = info->spec_ver;
adapter->sdio_hw_info.block_size = info->block_size;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
void
cfg_sdio_tx_page_threshold_88xx(struct halmac_adapter *adapter,
struct halmac_tx_page_threshold_info *info)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 threshold = info->threshold;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (info->enable == 1) {
threshold = BIT(31) | threshold;
PLTFM_MSG_TRACE("[TRACE]enable\n");
} else {
threshold = ~(BIT(31)) & threshold;
PLTFM_MSG_TRACE("[TRACE]disable\n");
}
switch (info->dma_queue_sel) {
case HALMAC_MAP2_HQ:
HALMAC_REG_W32(REG_TQPNT1, threshold);
break;
case HALMAC_MAP2_NQ:
HALMAC_REG_W32(REG_TQPNT2, threshold);
break;
case HALMAC_MAP2_LQ:
HALMAC_REG_W32(REG_TQPNT3, threshold);
break;
case HALMAC_MAP2_EXQ:
HALMAC_REG_W32(REG_TQPNT4, threshold);
break;
default:
break;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
}
enum halmac_ret_status
cnv_to_sdio_bus_offset_88xx(struct halmac_adapter *adapter, u32 *offset)
{
switch ((*offset) & 0xFFFF0000) {
case WLAN_IOREG_OFFSET:
*offset &= HALMAC_WLAN_MAC_REG_MSK;
*offset |= HALMAC_SDIO_CMD_ADDR_MAC_REG << 13;
break;
case SDIO_LOCAL_OFFSET:
*offset &= HALMAC_SDIO_LOCAL_MSK;
*offset |= HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13;
break;
default:
*offset = 0xFFFFFFFF;
PLTFM_MSG_ERR("[ERR]base address!!\n");
return HALMAC_RET_CONVERT_SDIO_OFFSET_FAIL;
}
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
leave_sdio_suspend_88xx(struct halmac_adapter *adapter)
{
u8 value8;
u32 cnt;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
value8 = HALMAC_REG_R8(REG_SDIO_HSUS_CTRL);
HALMAC_REG_W8(REG_SDIO_HSUS_CTRL, value8 & ~(BIT(0)));
cnt = 10000;
while (!(HALMAC_REG_R8(REG_SDIO_HSUS_CTRL) & 0x02)) {
cnt--;
if (cnt == 0)
return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
}
value8 = HALMAC_REG_R8(REG_HCI_OPT_CTRL + 2);
if (adapter->sdio_hw_info.spec_ver == HALMAC_SDIO_SPEC_VER_3_00)
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 2, value8 | BIT(2));
else
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 2, value8 & ~(BIT(2)));
return HALMAC_RET_SUCCESS;
}
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u8
r_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 offset)
{
u8 value8, tmp, cnt = 50;
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg);
if (status != HALMAC_RET_SUCCESS)
return status;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset);
PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8));
PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4)));
do {
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
cnt--;
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
if (((cnt & BIT(4)) == 0) && cnt == 0)
PLTFM_MSG_ERR("[ERR]sdio indirect CMD52 read\n");
value8 = PLTFM_SDIO_CMD52_R(reg_data);
return value8;
}
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 offset)
{
u8 tmp, cnt = 50;
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} value32 = { 0x00000000 };
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg);
if (status != HALMAC_RET_SUCCESS)
return status;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20));
do {
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
cnt--;
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
if (((cnt & BIT(4)) == 0) && cnt == 0)
PLTFM_MSG_ERR("[ERR]sdio indirect CMD53 read\n");
value32.dword = PLTFM_SDIO_CMD53_R32(reg_data);
return value32.dword;
}
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
{
union {
u32 dword;
u8 byte[4];
} val = { 0x00000000 };
if (adapter->pwr_off_flow_flag == 1 ||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
val.dword = rtk_le32_to_cpu(val.dword);
} else {
val.dword = r_indir_cmd53_88xx(adapter, adr);
}
return val.dword;
}
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
{
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} val = { 0x00000000 };
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
if (0 != (adr & (2 - 1))) {
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
val.byte[1] = r_indir_cmd52_88xx(adapter, adr + 1);
} else {
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
val.byte[1] = PLTFM_SDIO_CMD52_R(reg_data + 1);
}
val.dword = rtk_le32_to_cpu(val.dword);
} else {
if (0 != (adr & (2 - 1))) {
val.byte[0] = (u8)r_indir_cmd53_88xx(adapter, adr);
val.byte[1] = (u8)r_indir_cmd53_88xx(adapter, adr + 1);
val.dword = rtk_le32_to_cpu(val.dword);
} else {
val.dword = r_indir_cmd53_88xx(adapter, adr);
}
}
return val.dword;
}
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
static u32
r32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
{
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} val = { 0x00000000 };
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
if (0 != (adr & (4 - 1))) {
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
val.byte[1] = r_indir_cmd52_88xx(adapter, adr + 1);
val.byte[2] = r_indir_cmd52_88xx(adapter, adr + 2);
val.byte[3] = r_indir_cmd52_88xx(adapter, adr + 3);
} else {
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
val.byte[1] = PLTFM_SDIO_CMD52_R(reg_data + 1);
val.byte[2] = PLTFM_SDIO_CMD52_R(reg_data + 2);
val.byte[3] = PLTFM_SDIO_CMD52_R(reg_data + 3);
}
val.dword = rtk_le32_to_cpu(val.dword);
} else {
if (0 != (adr & (4 - 1))) {
val.byte[0] = (u8)r_indir_cmd53_88xx(adapter, adr);
val.byte[1] = (u8)r_indir_cmd53_88xx(adapter, adr + 1);
val.byte[2] = (u8)r_indir_cmd53_88xx(adapter, adr + 2);
val.byte[3] = (u8)r_indir_cmd53_88xx(adapter, adr + 3);
val.dword = rtk_le32_to_cpu(val.dword);
} else {
val.dword = r_indir_cmd53_88xx(adapter, adr);
}
}
return val.dword;
}
u32
r_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr,
enum halmac_io_size size)
{
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} val = { 0x00000000 };
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MUTEX_LOCK(&adapter->sdio_indir_mutex);
switch (size) {
case HALMAC_IO_BYTE:
val.dword = r8_indir_sdio_88xx(adapter, adr);
break;
case HALMAC_IO_WORD:
val.dword = r16_indir_sdio_88xx(adapter, adr);
break;
case HALMAC_IO_DWORD:
val.dword = r32_indir_sdio_88xx(adapter, adr);
break;
default:
break;
}
PLTFM_MUTEX_UNLOCK(&adapter->sdio_indir_mutex);
return val.dword;
}
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size)
{
u8 tmp, cnt = 50;
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg);
if (status != HALMAC_RET_SUCCESS)
return status;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_SDIO_CMD52_W(reg_cfg, (u8)adr);
PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(adr >> 8));
switch (size) {
case HALMAC_IO_BYTE:
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(2) | BIT(4)));
break;
case HALMAC_IO_WORD:
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
PLTFM_SDIO_CMD52_W(reg_data + 1, (u8)(val >> 8));
PLTFM_SDIO_CMD52_W(reg_cfg + 2,
(u8)(BIT(0) | BIT(2) | BIT(4)));
break;
case HALMAC_IO_DWORD:
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
PLTFM_SDIO_CMD52_W(reg_data + 1, (u8)(val >> 8));
PLTFM_SDIO_CMD52_W(reg_data + 2, (u8)(val >> 16));
PLTFM_SDIO_CMD52_W(reg_data + 3, (u8)(val >> 24));
PLTFM_SDIO_CMD52_W(reg_cfg + 2,
(u8)(BIT(1) | BIT(2) | BIT(4)));
break;
default:
break;
}
do {
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
cnt--;
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
if (((cnt & BIT(4)) == 0) && cnt == 0)
PLTFM_MSG_ERR("[ERR]sdio indirect CMD52 write\n");
return status;
}
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size)
{
u8 tmp, cnt = 50;
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
u32 value32 = 0;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg);
if (status != HALMAC_RET_SUCCESS)
return status;
status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_data);
if (status != HALMAC_RET_SUCCESS)
return status;
switch (size) {
case HALMAC_IO_BYTE:
value32 = adr | BIT(18) | BIT(20);
break;
case HALMAC_IO_WORD:
value32 = adr | BIT(16) | BIT(18) | BIT(20);
break;
case HALMAC_IO_DWORD:
value32 = adr | BIT(17) | BIT(18) | BIT(20);
break;
default:
return HALMAC_RET_FAIL;
}
PLTFM_SDIO_CMD53_W32(reg_data, val);
PLTFM_SDIO_CMD53_W32(reg_cfg, value32);
do {
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
cnt--;
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
if (((cnt & BIT(4)) == 0) && cnt == 0)
PLTFM_MSG_ERR("[ERR]sdio indirect CMD53 read\n");
return status;
}
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->pwr_off_flow_flag == 1 ||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF)
status = w_indir_cmd52_88xx(adapter, adr, val, HALMAC_IO_BYTE);
else
status = w_indir_cmd53_88xx(adapter, adr, val, HALMAC_IO_BYTE);
return status;
}
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
if (0 != (adr & (2 - 1))) {
status = w_indir_cmd52_88xx(adapter, adr, val,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd52_88xx(adapter, adr + 1, val >> 8,
HALMAC_IO_BYTE);
} else {
status = w_indir_cmd52_88xx(adapter, adr, val,
HALMAC_IO_WORD);
}
} else {
if (0 != (adr & (2 - 1))) {
status = w_indir_cmd53_88xx(adapter, adr, val,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd53_88xx(adapter, adr + 1, val >> 8,
HALMAC_IO_BYTE);
} else {
status = w_indir_cmd53_88xx(adapter, adr, val,
HALMAC_IO_WORD);
}
}
return status;
}
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
static enum halmac_ret_status
w32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
if (0 != (adr & (4 - 1))) {
status = w_indir_cmd52_88xx(adapter, adr, val,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd52_88xx(adapter, adr + 1, val >> 8,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd52_88xx(adapter, adr + 2, val >> 16,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd52_88xx(adapter, adr + 3, val >> 24,
HALMAC_IO_BYTE);
} else {
status = w_indir_cmd52_88xx(adapter, adr, val,
HALMAC_IO_DWORD);
}
} else {
if (0 != (adr & (4 - 1))) {
status = w_indir_cmd53_88xx(adapter, adr, val,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd53_88xx(adapter, adr + 1, val >> 8,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd53_88xx(adapter, adr + 2, val >> 16,
HALMAC_IO_BYTE);
if (status != HALMAC_RET_SUCCESS)
return status;
status = w_indir_cmd53_88xx(adapter, adr + 3, val >> 24,
HALMAC_IO_BYTE);
} else {
status = w_indir_cmd53_88xx(adapter, adr, val,
HALMAC_IO_DWORD);
}
}
return status;
}
enum halmac_ret_status
w_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MUTEX_LOCK(&adapter->sdio_indir_mutex);
switch (size) {
case HALMAC_IO_BYTE:
status = w8_indir_sdio_88xx(adapter, adr, val);
break;
case HALMAC_IO_WORD:
status = w16_indir_sdio_88xx(adapter, adr, val);
break;
case HALMAC_IO_DWORD:
status = w32_indir_sdio_88xx(adapter, adr, val);
break;
default:
break;
}
PLTFM_MUTEX_UNLOCK(&adapter->sdio_indir_mutex);
return status;
}
#endif /* HALMAC_88XX_SUPPORT */

79
hal/halmac/halmac_88xx/halmac_sdio_88xx.h Normal file
View File

@@ -0,0 +1,79 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_SDIO_88XX_H_
#define _HALMAC_SDIO_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
init_sdio_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
deinit_sdio_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_sdio_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg);
enum halmac_ret_status
cfg_txagg_sdio_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size);
u32
sdio_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
sdio_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value);
enum halmac_ret_status
set_sdio_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num);
enum halmac_ret_status
get_sdio_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id);
enum halmac_ret_status
sdio_cmd53_4byte_88xx(struct halmac_adapter *adapter,
enum halmac_sdio_cmd53_4byte_mode mode);
enum halmac_ret_status
sdio_hw_info_88xx(struct halmac_adapter *adapter,
struct halmac_sdio_hw_info *info);
void
cfg_sdio_tx_page_threshold_88xx(struct halmac_adapter *adapter,
struct halmac_tx_page_threshold_info *info);
enum halmac_ret_status
cnv_to_sdio_bus_offset_88xx(struct halmac_adapter *adapter, u32 *offset);
enum halmac_ret_status
leave_sdio_suspend_88xx(struct halmac_adapter *adapter);
u32
r_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr,
enum halmac_io_size size);
enum halmac_ret_status
w_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
enum halmac_io_size size);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_SDIO_88XX_H_ */

533
hal/halmac/halmac_88xx/halmac_usb_88xx.c Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_usb_88xx.h"
#if HALMAC_88XX_SUPPORT
enum usb_burst_size {
USB_BURST_SIZE_3_0 = 0x0,
USB_BURST_SIZE_2_0_HS = 0x1,
USB_BURST_SIZE_2_0_FS = 0x2,
USB_BURST_SIZE_2_0_OTHERS = 0x3,
USB_BURST_SIZE_UNDEFINE = 0x7F,
};
/**
* init_usb_cfg_88xx() - init USB
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_usb_cfg_88xx(struct halmac_adapter *adapter)
{
u8 value8 = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 |= (BIT_DMA_MODE | (0x3 << BIT_SHIFT_BURST_CNT));
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20) {
/* usb3.0 */
value8 |= (USB_BURST_SIZE_3_0 << BIT_SHIFT_BURST_SIZE);
} else {
if ((HALMAC_REG_R8(REG_USB_USBSTAT) & 0x3) == 0x1)/* usb2.0 */
value8 |= USB_BURST_SIZE_2_0_HS << BIT_SHIFT_BURST_SIZE;
else /* usb1.1 */
value8 |= USB_BURST_SIZE_2_0_FS << BIT_SHIFT_BURST_SIZE;
}
HALMAC_REG_W8(REG_RXDMA_MODE, value8);
HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK,
HALMAC_REG_R16(REG_TXDMA_OFFSET_CHK) | BIT_DROP_DATA_EN);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* deinit_usb_cfg_88xx() - deinit USB
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
deinit_usb_cfg_88xx(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
/**
* cfg_usb_rx_agg_88xx() - config rx aggregation
* @adapter : the adapter of halmac
* @halmac_rx_agg_mode
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_usb_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg)
{
u8 dma_usb_agg;
u8 size;
u8 timeout;
u8 agg_enable;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
dma_usb_agg = HALMAC_REG_R8(REG_RXDMA_AGG_PG_TH + 3);
agg_enable = HALMAC_REG_R8(REG_TXDMA_PQ_MAP);
switch (cfg->mode) {
case HALMAC_RX_AGG_MODE_NONE:
agg_enable &= ~BIT_RXDMA_AGG_EN;
break;
case HALMAC_RX_AGG_MODE_DMA:
agg_enable |= BIT_RXDMA_AGG_EN;
dma_usb_agg |= BIT(7);
break;
case HALMAC_RX_AGG_MODE_USB:
agg_enable |= BIT_RXDMA_AGG_EN;
dma_usb_agg &= ~BIT(7);
break;
default:
PLTFM_MSG_ERR("[ERR]unsupported mode\n");
agg_enable &= ~BIT_RXDMA_AGG_EN;
break;
}
if (cfg->threshold.drv_define == _FALSE) {
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20) {
/* usb3.0 */
size = 0x5;
timeout = 0xA;
} else {
/* usb2.0 */
size = 0x5;
timeout = 0x20;
}
} else {
size = cfg->threshold.size;
timeout = cfg->threshold.timeout;
}
value32 = HALMAC_REG_R32(REG_RXDMA_AGG_PG_TH);
if (cfg->threshold.size_limit_en == _FALSE)
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 & ~BIT_EN_PRE_CALC);
else
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 | BIT_EN_PRE_CALC);
HALMAC_REG_W8(REG_TXDMA_PQ_MAP, agg_enable);
HALMAC_REG_W8(REG_RXDMA_AGG_PG_TH + 3, dma_usb_agg);
HALMAC_REG_W16(REG_RXDMA_AGG_PG_TH,
(u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO_V1)));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* reg_r8_usb_88xx() - read 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u8
reg_r8_usb_88xx(struct halmac_adapter *adapter, u32 offset)
{
u8 value8;
value8 = PLTFM_REG_R8(offset);
return value8;
}
/**
* reg_w8_usb_88xx() - write 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w8_usb_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
{
PLTFM_REG_W8(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* reg_r16_usb_88xx() - read 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u16
reg_r16_usb_88xx(struct halmac_adapter *adapter, u32 offset)
{
u16 value16;
value16 = PLTFM_REG_R16(offset);
return value16;
}
/**
* reg_w16_usb_88xx() - write 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w16_usb_88xx(struct halmac_adapter *adapter, u32 offset, u16 value)
{
PLTFM_REG_W16(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* reg_r32_usb_88xx() - read 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
reg_r32_usb_88xx(struct halmac_adapter *adapter, u32 offset)
{
u32 value32;
value32 = PLTFM_REG_R32(offset);
return value32;
}
/**
* reg_w32_usb_88xx() - write 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w32_usb_88xx(struct halmac_adapter *adapter, u32 offset, u32 value)
{
PLTFM_REG_W32(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* set_usb_bulkout_num_88xx() - inform bulk-out num
* @adapter : the adapter of halmac
* @bulkout_num : usb bulk-out number
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
set_usb_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
{
adapter->bulkout_num = num;
return HALMAC_RET_SUCCESS;
}
/**
* get_usb_bulkout_id_88xx() - get bulk out id for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @id : usb bulk-out id
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_usb_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id)
{
enum halmac_qsel queue_sel;
enum halmac_dma_mapping dma_mapping;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!buf) {
PLTFM_MSG_ERR("[ERR]buf is NULL!!\n");
return HALMAC_RET_DATA_BUF_NULL;
}
if (size == 0) {
PLTFM_MSG_ERR("[ERR]size is 0!!\n");
return HALMAC_RET_DATA_SIZE_INCORRECT;
}
queue_sel = (enum halmac_qsel)GET_TX_DESC_QSEL(buf);
switch (queue_sel) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
dma_mapping = HALMAC_DMA_MAPPING_HIGH;
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*id = 0;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*id = 1;
break;
case HALMAC_DMA_MAPPING_LOW:
*id = 2;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*id = 3;
break;
default:
PLTFM_MSG_ERR("[ERR]out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* cfg_txagg_usb_align_88xx() -config sdio bus tx agg alignment
* @adapter : the adapter of halmac
* @enable : function enable(1)/disable(0)
* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
* Author : Soar Tu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
cfg_txagg_usb_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* tx_allowed_usb_88xx() - check tx status
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size, include txdesc
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
tx_allowed_usb_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* usb_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
* @adapter : the adapter of halmac
* @offset : register offset
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
usb_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
{
return 0xFFFFFFFF;
}
/**
* usb_reg_rn_88xx() - read n byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @size : register value size
* @value : register value
* Author : Soar
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
usb_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* get_usb_tx_addr_88xx() - get CMD53 addr for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @pcmd53_addr : cmd53 addr value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_usb_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr)
{
return HALMAC_RET_NOT_SUPPORT;
}
enum halmac_ret_status
set_usb_mode_88xx(struct halmac_adapter *adapter, enum halmac_usb_mode mode)
{
u32 usb_tmp;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_usb_mode cur_mode;
cur_mode = (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20) ?
HALMAC_USB_MODE_U3 : HALMAC_USB_MODE_U2;
/*check if HW supports usb2_usb3 switch*/
usb_tmp = HALMAC_REG_R32(REG_PAD_CTRL2);
if (_FALSE == (BIT_GET_USB23_SW_MODE_V1(usb_tmp) |
(usb_tmp & BIT_USB3_USB2_TRANSITION))) {
PLTFM_MSG_ERR("[ERR]u2/u3 switch\n");
return HALMAC_RET_USB2_3_SWITCH_UNSUPPORT;
}
if (mode == cur_mode) {
PLTFM_MSG_ERR("[ERR]u2/u3 unchange\n");
return HALMAC_RET_USB_MODE_UNCHANGE;
}
/* Enable IO wrapper timeout */
if (adapter->chip_id == HALMAC_CHIP_ID_8822B ||
adapter->chip_id == HALMAC_CHIP_ID_8821C)
HALMAC_REG_W8_CLR(REG_SW_MDIO + 3, BIT(0));
usb_tmp &= ~(BIT_USB23_SW_MODE_V1(0x3));
if (mode == HALMAC_USB_MODE_U2)
HALMAC_REG_W32(REG_PAD_CTRL2,
usb_tmp |
BIT_USB23_SW_MODE_V1(HALMAC_USB_MODE_U2) |
BIT_RSM_EN_V1);
else
HALMAC_REG_W32(REG_PAD_CTRL2,
usb_tmp |
BIT_USB23_SW_MODE_V1(HALMAC_USB_MODE_U3) |
BIT_RSM_EN_V1);
HALMAC_REG_W8(REG_PAD_CTRL2 + 1, 4);
HALMAC_REG_W16_SET(REG_SYS_PW_CTRL, BIT_APFM_OFFMAC);
PLTFM_DELAY_US(1000);
HALMAC_REG_W32_SET(REG_PAD_CTRL2, BIT_NO_PDN_CHIPOFF_V1);
return HALMAC_RET_SUCCESS;
}
enum halmac_ret_status
usbphy_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
if (speed == HAL_INTF_PHY_USB3) {
HALMAC_REG_W8(0xff0d, (u8)data);
HALMAC_REG_W8(0xff0e, (u8)(data >> 8));
HALMAC_REG_W8(0xff0c, addr | BIT(7));
} else if (speed == HAL_INTF_PHY_USB2) {
HALMAC_REG_W8(0xfe41, (u8)data);
HALMAC_REG_W8(0xfe40, addr);
HALMAC_REG_W8(0xfe42, 0x81);
} else {
PLTFM_MSG_ERR("[ERR]Error USB Speed !\n");
return HALMAC_RET_NOT_SUPPORT;
}
return HALMAC_RET_SUCCESS;
}
u16
usbphy_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u16 value = 0;
if (speed == HAL_INTF_PHY_USB3) {
HALMAC_REG_W8(0xff0c, addr | BIT(6));
value = (u16)(HALMAC_REG_R32(0xff0c) >> 8);
} else if (speed == HAL_INTF_PHY_USB2) {
if (addr >= 0xE0 && addr <= 0xFF)
addr -= 0x20;
if (addr >= 0xC0 && addr <= 0xDF) {
HALMAC_REG_W8(0xfe40, addr);
HALMAC_REG_W8(0xfe42, 0x81);
value = HALMAC_REG_R8(0xfe43);
} else {
PLTFM_MSG_ERR("[ERR]phy offset\n");
return HALMAC_RET_NOT_SUPPORT;
}
} else {
PLTFM_MSG_ERR("[ERR]usb speed !\n");
return HALMAC_RET_NOT_SUPPORT;
}
return value;
}
#endif /* HALMAC_88XX_SUPPORT */

87
hal/halmac/halmac_88xx/halmac_usb_88xx.h Normal file
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/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_USB_88XX_H_
#define _HALMAC_USB_88XX_H_
#include "../halmac_api.h"
#if HALMAC_88XX_SUPPORT
enum halmac_ret_status
init_usb_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
deinit_usb_cfg_88xx(struct halmac_adapter *adapter);
enum halmac_ret_status
cfg_usb_rx_agg_88xx(struct halmac_adapter *adapter,
struct halmac_rxagg_cfg *cfg);
u8
reg_r8_usb_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_usb_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_usb_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_usb_88xx(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_usb_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_usb_88xx(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
set_usb_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num);
enum halmac_ret_status
get_usb_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u8 *id);
enum halmac_ret_status
cfg_txagg_usb_align_88xx(struct halmac_adapter *adapter, u8 enable,
u16 align_size);
enum halmac_ret_status
tx_allowed_usb_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
u32
usb_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
usb_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
u8 *value);
enum halmac_ret_status
get_usb_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
enum halmac_ret_status
set_usb_mode_88xx(struct halmac_adapter *adapter, enum halmac_usb_mode mode);
enum halmac_ret_status
usbphy_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed);
u16
usbphy_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed);
#endif /* HALMAC_88XX_SUPPORT */
#endif/* _HALMAC_API_88XX_USB_H_ */