mirror of
https://github.com/RinCat/RTL88x2BU-Linux-Driver.git
synced 2024-12-24 09:01:35 +00:00
Update to 5.6.1
This commit is contained in:
parent
953142179e
commit
0644d0b316
299
Makefile
299
Makefile
@ -36,9 +36,12 @@ CONFIG_RTL8723B = n
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CONFIG_RTL8814A = n
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CONFIG_RTL8723C = n
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CONFIG_RTL8188F = n
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CONFIG_RTL8188GTV = n
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CONFIG_RTL8822B = y
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CONFIG_RTL8723D = n
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CONFIG_RTL8821C = n
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CONFIG_RTL8710B = n
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CONFIG_RTL8192F = n
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######################### Interface ###########################
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CONFIG_USB_HCI = y
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CONFIG_PCI_HCI = n
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@ -49,7 +52,6 @@ CONFIG_MP_INCLUDED = y
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CONFIG_POWER_SAVING = y
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CONFIG_USB_AUTOSUSPEND = n
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CONFIG_HW_PWRP_DETECTION = n
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CONFIG_WIFI_TEST = n
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CONFIG_BT_COEXIST = y
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CONFIG_INTEL_WIDI = n
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CONFIG_WAPI_SUPPORT = n
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@ -72,10 +74,13 @@ CONFIG_MCC_MODE = n
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CONFIG_APPEND_VENDOR_IE_ENABLE = n
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CONFIG_RTW_NAPI = y
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CONFIG_RTW_GRO = y
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CONFIG_RTW_NETIF_SG = n
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CONFIG_RTW_NETIF_SG = y
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CONFIG_TX_CSUM_OFFLOAD = n
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CONFIG_RTW_IPCAM_APPLICATION = n
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CONFIG_RTW_REPEATER_SON = n
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CONFIG_RTW_WIFI_HAL = y
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CONFIG_RTW_WIFI_HAL = n
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CONFIG_ICMP_VOQ = n
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CONFIG_IP_R_MONITOR = n #arp VOQ and high rate
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########################## Debug ###########################
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CONFIG_RTW_DEBUG = y
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# default log level is _DRV_INFO_ = 4,
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@ -83,10 +88,17 @@ CONFIG_RTW_DEBUG = y
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CONFIG_RTW_LOG_LEVEL = 4
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######################## Wake On Lan ##########################
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CONFIG_WOWLAN = n
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CONFIG_WAKEUP_TYPE = 0x7 #bit2: deauth, bit1: unicast, bit0: magic pkt.
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#bit2: deauth, bit1: unicast, bit0: magic pkt.
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CONFIG_WAKEUP_TYPE = 0x7
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#bit0: disBBRF off, #bit1: Wireless remote controller (WRC)
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CONFIG_SUSPEND_TYPE = 0
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CONFIG_WOW_STA_MIX = n
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CONFIG_GPIO_WAKEUP = n
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CONFIG_WAKEUP_GPIO_IDX = default
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CONFIG_HIGH_ACTIVE = n
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CONFIG_HIGH_ACTIVE_DEV2HST = n
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######### only for USB #########
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CONFIG_ONE_PIN_GPIO = n
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CONFIG_HIGH_ACTIVE_HST2DEV = n
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CONFIG_PNO_SUPPORT = n
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CONFIG_PNO_SET_DEBUG = n
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CONFIG_AP_WOWLAN = n
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@ -138,13 +150,16 @@ CONFIG_PLATFORM_ACTIONS_ATV5201 = n
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CONFIG_PLATFORM_ACTIONS_ATM705X = n
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CONFIG_PLATFORM_ARM_SUN50IW1P1 = n
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CONFIG_PLATFORM_ARM_RTD299X = n
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CONFIG_PLATFORM_ARM_LGE = n
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CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n
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CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n
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CONFIG_PLATFORM_ARM_WMT = n
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CONFIG_PLATFORM_TI_DM365 = n
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CONFIG_PLATFORM_MOZART = n
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CONFIG_PLATFORM_RTK119X = n
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CONFIG_PLATFORM_RTK119X_AM = n
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CONFIG_PLATFORM_RTK129X = n
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CONFIG_PLATFORM_RTK390X = n
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CONFIG_PLATFORM_NOVATEK_NT72668 = n
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CONFIG_PLATFORM_HISILICON = n
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CONFIG_PLATFORM_HISILICON_HI3798 = n
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@ -153,7 +168,8 @@ CONFIG_PLATFORM_NV_TK1_UBUNTU = n
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CONFIG_PLATFORM_RTL8197D = n
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CONFIG_PLATFORM_AML_S905 = n
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CONFIG_PLATFORM_ZTE_ZX296716 = n
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###############################################################
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########### CUSTOMER ################################
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CONFIG_CUSTOMER_HUAWEI_GENERAL = n
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CONFIG_DRVEXT_MODULE = n
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@ -736,6 +752,53 @@ endif
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endif
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########### HAL_RTL8188GTV #################################
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ifeq ($(CONFIG_RTL8188GTV), y)
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RTL871X = rtl8188gtv
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ifeq ($(CONFIG_USB_HCI), y)
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MODULE_NAME = 8188gtvu
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endif
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ifeq ($(CONFIG_SDIO_HCI), y)
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MODULE_NAME = 8189gtvs
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endif
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EXTRA_CFLAGS += -DCONFIG_RTL8188GTV
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_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
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hal/$(RTL871X)/Hal8188GTVPwrSeq.o\
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hal/$(RTL871X)/$(RTL871X)_sreset.o
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
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hal/$(RTL871X)/$(RTL871X)_phycfg.o \
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hal/$(RTL871X)/$(RTL871X)_rf6052.o \
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hal/$(RTL871X)/$(RTL871X)_dm.o \
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hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
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hal/$(RTL871X)/$(RTL871X)_cmd.o \
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hal/$(RTL871X)/hal8188gtv_fw.o
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_HAL_INTFS_FILES += \
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hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
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ifeq ($(CONFIG_PCI_HCI), y)
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
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else
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
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endif
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ifeq ($(CONFIG_USB_HCI), y)
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_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_USB.o
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endif
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ifeq ($(CONFIG_SDIO_HCI), y)
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_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_SDIO.o
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endif
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endif
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########### HAL_RTL8822B #################################
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ifeq ($(CONFIG_RTL8822B), y)
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RTL871X := rtl8822b
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@ -767,6 +830,104 @@ ifeq ($(CONFIG_SDIO_HCI), y)
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MODULE_NAME = 8821cs
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endif
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endif
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########### HAL_RTL8710B #################################
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ifeq ($(CONFIG_RTL8710B), y)
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RTL871X = rtl8710b
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ifeq ($(CONFIG_USB_HCI), y)
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MODULE_NAME = 8710bu
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MODULE_SUB_NAME = 8710bu
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endif
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EXTRA_CFLAGS += -DCONFIG_RTL8710B
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_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
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hal/$(RTL871X)/Hal8710BPwrSeq.o\
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hal/$(RTL871X)/$(RTL871X)_sreset.o
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
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hal/$(RTL871X)/$(RTL871X)_phycfg.o \
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hal/$(RTL871X)/$(RTL871X)_rf6052.o \
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hal/$(RTL871X)/$(RTL871X)_dm.o \
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hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
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hal/$(RTL871X)/$(RTL871X)_cmd.o \
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hal/$(RTL871X)/hal8710b_fw.o \
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hal/$(RTL871X)/$(RTL871X)_lps_poff.o
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_HAL_INTFS_FILES += \
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hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
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ifeq ($(CONFIG_USB_HCI), y)
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_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8710B_USB.o
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endif
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endif
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########### HAL_RTL8192F #################################
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ifeq ($(CONFIG_RTL8192F), y)
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RTL871X = rtl8192f
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ifeq ($(CONFIG_USB_HCI), y)
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MODULE_NAME = 8192fu
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MODULE_SUB_NAME = 8192fu
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endif
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ifeq ($(CONFIG_PCI_HCI), y)
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MODULE_NAME = 8192fe
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MODULE_SUB_NAME = 8192fe
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endif
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ifeq ($(CONFIG_SDIO_HCI), y)
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MODULE_NAME = 8192fs
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MODULE_SUB_NAME = 8192fs
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endif
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EXTRA_CFLAGS += -DCONFIG_RTL8192F
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_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
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hal/$(RTL871X)/Hal8192FPwrSeq.o\
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hal/$(RTL871X)/$(RTL871X)_sreset.o
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
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hal/$(RTL871X)/$(RTL871X)_phycfg.o \
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hal/$(RTL871X)/$(RTL871X)_rf6052.o \
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hal/$(RTL871X)/$(RTL871X)_dm.o \
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hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
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hal/$(RTL871X)/$(RTL871X)_cmd.o \
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hal/$(RTL871X)/hal8192f_fw.o \
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hal/$(RTL871X)/$(RTL871X)_lps_poff.o
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_HAL_INTFS_FILES += \
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hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \
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hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o
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ifeq ($(CONFIG_PCI_HCI), y)
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
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else
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_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
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endif
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ifeq ($(CONFIG_SDIO_HCI), y)
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_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_SDIO.o
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endif
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ifeq ($(CONFIG_USB_HCI), y)
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_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_USB.o
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endif
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ifeq ($(CONFIG_PCI_HCI), y)
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_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_PCIE.o
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endif
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endif
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########### AUTO_CFG #################################
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@ -809,10 +970,6 @@ ifeq ($(CONFIG_HW_PWRP_DETECTION), y)
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EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION
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endif
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ifeq ($(CONFIG_WIFI_TEST), y)
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EXTRA_CFLAGS += -DCONFIG_WIFI_TEST
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endif
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ifeq ($(CONFIG_BT_COEXIST), y)
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EXTRA_CFLAGS += -DCONFIG_BT_COEXIST
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endif
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@ -915,6 +1072,10 @@ endif
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ifeq ($(CONFIG_WOWLAN), y)
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EXTRA_CFLAGS += -DCONFIG_WOWLAN -DRTW_WAKEUP_EVENT=$(CONFIG_WAKEUP_TYPE)
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EXTRA_CFLAGS += -DRTW_SUSPEND_TYPE=$(CONFIG_SUSPEND_TYPE)
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ifeq ($(CONFIG_WOW_STA_MIX), y)
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EXTRA_CFLAGS += -DRTW_WOW_STA_MIX
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endif
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ifeq ($(CONFIG_SDIO_HCI), y)
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EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
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endif
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@ -936,11 +1097,20 @@ endif
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ifeq ($(CONFIG_GPIO_WAKEUP), y)
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EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP
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ifeq ($(CONFIG_HIGH_ACTIVE), y)
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EXTRA_CFLAGS += -DHIGH_ACTIVE=1
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else
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EXTRA_CFLAGS += -DHIGH_ACTIVE=0
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ifeq ($(CONFIG_ONE_PIN_GPIO), y)
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EXTRA_CFLAGS += -DCONFIG_RTW_ONE_PIN_GPIO
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endif
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ifeq ($(CONFIG_HIGH_ACTIVE_DEV2HST), y)
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EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=1
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else
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EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=0
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endif
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endif
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ifeq ($(CONFIG_HIGH_ACTIVE_HST2DEV), y)
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EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=1
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else
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EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=0
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endif
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ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default)
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@ -999,10 +1169,25 @@ ifeq ($(CONFIG_RTW_NETIF_SG), y)
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EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG
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endif
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ifeq ($(CONFIG_TX_CSUM_OFFLOAD), y)
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EXTRA_CFLAGS += -DCONFIG_TX_CSUM_OFFLOAD
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endif
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ifeq ($(CONFIG_ICMP_VOQ), y)
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EXTRA_CFLAGS += -DCONFIG_ICMP_VOQ
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endif
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ifeq ($(CONFIG_IP_R_MONITOR), y)
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EXTRA_CFLAGS += -DCONFIG_IP_R_MONITOR
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endif
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ifeq ($(CONFIG_RTW_WIFI_HAL), y)
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#EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL_DEBUG
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EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL
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EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_LLSTATS
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EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
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EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_RSSIMONITOR
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EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_WIFI_LOGGER
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endif
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ifeq ($(CONFIG_MP_VHT_HW_TX_MODE), y)
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@ -1620,6 +1805,32 @@ endif
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INSTALL_PREFIX :=
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endif
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ifeq ($(CONFIG_PLATFORM_ARM_RTD299X_LG), y)
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EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
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EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
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EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
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EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1
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EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
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#EXTRA_CFLAGS += -DCONFIG_FIX_HWPORT
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EXTRA_CFLAGS += -DLGE_PRIVATE
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EXTRA_CFLAGS += -DPURE_SUPPLICANT
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EXTRA_CFLAGS += -DCONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -DCONFIG_RTW_IOCTL_SET_COUNTRY
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EXTRA_CFLAGS += -DDBG_RX_DFRAME_RAW_DATA
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EXTRA_CFLAGS += -DRTW_REDUCE_SCAN_SWITCH_CH_TIME
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ARCH ?= arm
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KVER ?=
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ifneq ($(PLATFORM), WEBOS)
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$(info PLATFORM is empty)
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CROSS_COMPILE ?= /mnt/newdisk/LGE/arm-lg115x-linux-gnueabi-4.8-2016.03-x86_64/bin/arm-lg115x-linux-gnueabi-
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KSRC ?= /mnt/newdisk/LGE/linux-rockhopper_k3lp_drd4tv_423
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endif
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CROSS_COMPILE ?=
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KSRC ?= $(LINUX_SRC)
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INSTALL_PREFIX ?=
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endif
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ifeq ($(CONFIG_PLATFORM_HISILICON), y)
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EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_HISILICON
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ifeq ($(SUPPORT_CONCURRENT),y)
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@ -1639,6 +1850,7 @@ endif
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ifeq ($(CONFIG_PLATFORM_HISILICON_HI3798), y)
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EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON
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EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798
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#EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798_MV200_HDMI_DONGLE
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EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
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# default setting for Android
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EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
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@ -1647,11 +1859,13 @@ EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT
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# default setting for Android 5.x and later
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#EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
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ifeq ($(CONFIG_SDIO_HCI), y)
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EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
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_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o
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EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1
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endif
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# If system could power on and recognize Wi-Fi SDIO automatically,
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# platfrom operations are not necessary.
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#ifeq ($(CONFIG_SDIO_HCI), y)
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#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
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#_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o
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#EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1
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#endif
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ARCH ?= arm
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CROSS_COMPILE ?= /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/tools/linux/toolchains/arm-histbv310-linux/bin/arm-histbv310-linux-
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@ -1722,7 +1936,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
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EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
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# default setting for Android 4.1, 4.2
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EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
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EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
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EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
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#EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
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EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
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@ -1748,6 +1961,26 @@ MODULE_NAME := 8192eu
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endif
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||||
ifeq ($(CONFIG_PLATFORM_RTK119X_AM), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK119X_AM
|
||||
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
|
||||
EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
|
||||
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -DCONFIG_FULL_CH_IN_P2P_HANDSHAKE
|
||||
EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
|
||||
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
|
||||
|
||||
ifeq ($(CONFIG_USB_HCI), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
|
||||
endif
|
||||
|
||||
ARCH := arm
|
||||
|
||||
#CROSS_COMPILE := arm-linux-gnueabihf-
|
||||
KVER := 3.10.24
|
||||
#KSRC :=
|
||||
CROSS_COMPILE :=
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PLATFORM_RTK129X), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
|
||||
EXTRA_CFLAGS += -DRTK_129X_PLATFORM
|
||||
@ -1784,6 +2017,22 @@ CROSS_COMPILE := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/phoenix/toolchain
|
||||
KSRC := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/linux-kernel
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PLATFORM_RTK390X), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
|
||||
EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK390X
|
||||
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
|
||||
EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG
|
||||
ifeq ($(CONFIG_USB_HCI), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
|
||||
endif
|
||||
|
||||
ARCH:=rlx
|
||||
|
||||
CROSS_COMPILE:=mips-linux-
|
||||
KSRC:= /home/realtek/share/Develop/IPCAM_SDK/RealSil/rts3901_sdk_v1.2_vanilla/linux-3.10
|
||||
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PLATFORM_NOVATEK_NT72668), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_PLATFORM_NOVATEK_NT72668
|
||||
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
|
||||
@ -1879,6 +2128,15 @@ endif
|
||||
|
||||
endif
|
||||
|
||||
########### CUSTOMER ################################
|
||||
ifeq ($(CONFIG_CUSTOMER_HUAWEI_GENERAL), y)
|
||||
CONFIG_CUSTOMER_HUAWEI = y
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_CUSTOMER_HUAWEI), y)
|
||||
EXTRA_CFLAGS += -DCONFIG_HUAWEI_PROC
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_MULTIDRV), y)
|
||||
|
||||
ifeq ($(CONFIG_SDIO_HCI), y)
|
||||
@ -1930,6 +2188,7 @@ rtk_core := core/rtw_cmd.o \
|
||||
core/rtw_vht.o \
|
||||
core/rtw_pwrctrl.o \
|
||||
core/rtw_rf.o \
|
||||
core/rtw_chplan.o \
|
||||
core/rtw_recv.o \
|
||||
core/rtw_sta_mgt.o \
|
||||
core/rtw_ap.o \
|
||||
|
BIN
ReleaseNotes.pdf
Executable file → Normal file
BIN
ReleaseNotes.pdf
Executable file → Normal file
Binary file not shown.
@ -62,7 +62,7 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
if (pAdapter->registrypriv.boffefusemask)
|
||||
return FALSE;
|
||||
|
||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
@ -99,6 +99,10 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
return (IS_MASKED(8188GTV, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8822B)
|
||||
if (IS_HARDWARE_TYPE_8822B(pAdapter))
|
||||
return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
@ -107,13 +111,22 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
if (IS_HARDWARE_TYPE_8723D(pAdapter))
|
||||
return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if (IS_HARDWARE_TYPE_8710B(pAdapter))
|
||||
return (IS_MASKED(8710B, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8821C)
|
||||
if (IS_HARDWARE_TYPE_8821CU(pAdapter))
|
||||
return (IS_MASKED(8821C, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FU(pAdapter))
|
||||
return (IS_MASKED(8192F, _MUSB, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#endif /*CONFIG_USB_HCI*/
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE;
|
||||
@ -147,7 +160,13 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
return (IS_MASKED(8821C, _MPCIE, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FE(pAdapter))
|
||||
return (IS_MASKED(8192F, _MPCIE, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#endif /*CONFIG_PCI_HCI*/
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#ifdef CONFIG_RTL8188E_SDIO
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
@ -156,10 +175,14 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
if (IS_HARDWARE_TYPE_8723BS(pAdapter))
|
||||
return (IS_MASKED(8723B, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188F_SDIO
|
||||
#ifdef CONFIG_RTL8188F
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
return (IS_MASKED(8188GTV, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8192E
|
||||
if (IS_HARDWARE_TYPE_8192ES(pAdapter))
|
||||
return (IS_MASKED(8192E, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
@ -176,7 +199,11 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
|
||||
if (IS_HARDWARE_TYPE_8822B(pAdapter))
|
||||
return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FS(pAdapter))
|
||||
return (IS_MASKED(8192F, _MSDIO, Offset)) ? TRUE : FALSE;
|
||||
#endif
|
||||
#endif /*CONFIG_SDIO_HCI*/
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
@ -185,7 +212,7 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
{
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
|
||||
|
||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
GET_MASK_ARRAY(8188E, _MUSB, pArray);
|
||||
@ -214,6 +241,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
GET_MASK_ARRAY(8188F, _MUSB, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
GET_MASK_ARRAY(8188GTV, _MUSB, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8814A)
|
||||
if (IS_HARDWARE_TYPE_8814A(pAdapter))
|
||||
GET_MASK_ARRAY(8814A, _MUSB, pArray);
|
||||
@ -226,9 +257,13 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
if (IS_HARDWARE_TYPE_8821CU(pAdapter))
|
||||
GET_MASK_ARRAY(8821C, _MUSB, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FU(pAdapter))
|
||||
GET_MASK_ARRAY(8192F, _MUSB, pArray);
|
||||
#endif
|
||||
#endif /*CONFIG_USB_HCI*/
|
||||
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
GET_MASK_ARRAY(8188E, _MPCIE, pArray);
|
||||
@ -261,9 +296,13 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
if (IS_HARDWARE_TYPE_8821CE(pAdapter))
|
||||
GET_MASK_ARRAY(8821C, _MPCIE, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FE(pAdapter))
|
||||
GET_MASK_ARRAY(8192F, _MPCIE, pArray);
|
||||
#endif
|
||||
#endif /*CONFIG_PCI_HCI*/
|
||||
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
GET_MASK_ARRAY(8188E, _MSDIO, pArray);
|
||||
@ -276,6 +315,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
GET_MASK_ARRAY(8188F, _MSDIO, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
GET_MASK_ARRAY(8188GTV, _MSDIO, pArray);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192E)
|
||||
if (IS_HARDWARE_TYPE_8192ES(pAdapter))
|
||||
GET_MASK_ARRAY(8192E, _MSDIO, pArray);
|
||||
@ -292,14 +335,18 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
|
||||
if (IS_HARDWARE_TYPE_8822B(pAdapter))
|
||||
GET_MASK_ARRAY(8822B , _MSDIO, pArray);
|
||||
#endif
|
||||
#endif /*#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE*/
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FS(pAdapter))
|
||||
GET_MASK_ARRAY(8192F, _MSDIO, pArray);
|
||||
#endif
|
||||
#endif /*CONFIG_SDIO_HCI*/
|
||||
}
|
||||
|
||||
u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
|
||||
|
||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188E, _MUSB);
|
||||
@ -328,6 +375,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188F, _MUSB);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188GTV, _MUSB);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8814A)
|
||||
if (IS_HARDWARE_TYPE_8814A(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8814A, _MUSB);
|
||||
@ -340,9 +391,13 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
if (IS_HARDWARE_TYPE_8821CU(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8821C, _MUSB);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FU(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8192F, _MUSB);
|
||||
#endif
|
||||
#endif /*CONFIG_USB_HCI*/
|
||||
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188E, _MPCIE);
|
||||
@ -375,9 +430,13 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
if (IS_HARDWARE_TYPE_8821CE(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8821C, _MPCIE);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FE(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8192F, _MPCIE);
|
||||
#endif
|
||||
#endif /*CONFIG_PCI_HCI*/
|
||||
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
if (IS_HARDWARE_TYPE_8188E(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188E, _MSDIO);
|
||||
@ -390,6 +449,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
if (IS_HARDWARE_TYPE_8188F(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188F, _MSDIO);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8188GTV, _MSDIO);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192E)
|
||||
if (IS_HARDWARE_TYPE_8192ES(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8192E, _MSDIO);
|
||||
@ -406,7 +469,11 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
|
||||
if (IS_HARDWARE_TYPE_8822B(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8822B, _MSDIO);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192FS(pAdapter))
|
||||
return GET_MASK_ARRAY_LEN(8192F, _MSDIO);
|
||||
#endif
|
||||
#endif/*CONFIG_SDIO_HCI*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -577,7 +644,7 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake)
|
||||
for (bank = startBank; bank <= endBank; bank++) {
|
||||
if (!hal_EfuseSwitchToBank(padapter, bank, bPseudoTest)) {
|
||||
RTW_INFO("EFUSE_SwitchToBank() Fail!!\n");
|
||||
return;
|
||||
goto out_free_buffer;
|
||||
}
|
||||
|
||||
eFuse_Addr = bank * EFUSE_MAX_BANK_SIZE;
|
||||
@ -586,7 +653,7 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake)
|
||||
|
||||
if (efuseHeader == 0xFF && bank == startBank && Fake != TRUE) {
|
||||
RTW_INFO("Non-PGed Efuse\n");
|
||||
return;
|
||||
goto out_free_buffer;
|
||||
}
|
||||
RTW_INFO("EFUSE_REAL_CONTENT_LEN = %d\n", maprawlen);
|
||||
|
||||
@ -719,6 +786,8 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake)
|
||||
);
|
||||
}
|
||||
_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
|
||||
|
||||
out_free_buffer:
|
||||
if (eFuseWord)
|
||||
rtw_mfree((u8 *)eFuseWord, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2));
|
||||
}
|
||||
@ -1997,6 +2066,14 @@ efuse_OneByteRead(
|
||||
return bResult;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTL8710B
|
||||
/* <20171208, Peter>, Dont do the following write16(0x34) */
|
||||
if (IS_HARDWARE_TYPE_8710B(pAdapter)) {
|
||||
bResult = pAdapter->hal_func.efuse_indirect_read4(pAdapter, addr, data);
|
||||
return bResult;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
|
||||
(IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
|
||||
(IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
|
||||
@ -2687,31 +2764,6 @@ EFUSE_ShadowWrite(
|
||||
|
||||
} /* EFUSE_ShadowWrite */
|
||||
|
||||
VOID
|
||||
Efuse_InitSomeVar(
|
||||
IN PADAPTER pAdapter
|
||||
);
|
||||
VOID
|
||||
Efuse_InitSomeVar(
|
||||
IN PADAPTER pAdapter
|
||||
)
|
||||
{
|
||||
u8 i;
|
||||
|
||||
_rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE);
|
||||
_rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN);
|
||||
_rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN);
|
||||
|
||||
for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
|
||||
_rtw_memset((PVOID)&BTEfuseContent[i][0], EFUSE_MAX_HW_SIZE, 0xff);
|
||||
_rtw_memset((PVOID)&BTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
|
||||
_rtw_memset((PVOID)&BTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
|
||||
|
||||
for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
|
||||
_rtw_memset((PVOID)&fakeBTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE);
|
||||
_rtw_memset((PVOID)&fakeBTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
|
||||
_rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
|
||||
}
|
||||
#endif /* !RTW_HALMAC */
|
||||
/*-----------------------------------------------------------------------------
|
||||
* Function: efuse_ShadowRead1Byte
|
||||
|
@ -234,6 +234,259 @@ exit:
|
||||
return ret;
|
||||
}
|
||||
|
||||
void rtw_mesh_bss_peering_status(WLAN_BSSID_EX *bss, u8 *nop, u8 *accept)
|
||||
{
|
||||
u8 *ie;
|
||||
int ie_len;
|
||||
|
||||
if (nop)
|
||||
*nop = 0;
|
||||
if (accept)
|
||||
*accept = 0;
|
||||
|
||||
ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
|
||||
BSS_EX_TLV_IES_LEN(bss));
|
||||
if (!ie || ie_len != 7)
|
||||
goto exit;
|
||||
|
||||
if (nop)
|
||||
*nop = GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2);
|
||||
if (accept)
|
||||
*accept = GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2);
|
||||
|
||||
exit:
|
||||
return;
|
||||
}
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned)
|
||||
{
|
||||
bool acnode;
|
||||
u8 nop, accept;
|
||||
|
||||
rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept);
|
||||
|
||||
acnode = !nop && accept;
|
||||
|
||||
if (acnode && scanned->acnode_stime == 0) {
|
||||
scanned->acnode_stime = rtw_get_current_time();
|
||||
if (scanned->acnode_stime == 0)
|
||||
scanned->acnode_stime++;
|
||||
} else if (!acnode) {
|
||||
scanned->acnode_stime = 0;
|
||||
scanned->acnode_notify_etime = 0;
|
||||
}
|
||||
}
|
||||
|
||||
bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned)
|
||||
{
|
||||
return scanned->acnode_stime
|
||||
&& rtw_get_passing_time_ms(scanned->acnode_stime)
|
||||
> adapter->mesh_cfg.peer_sel_policy.acnode_conf_timeout_ms;
|
||||
}
|
||||
|
||||
static bool rtw_mesh_scanned_is_acnode_allow_notify(_adapter *adapter, struct wlan_network *scanned)
|
||||
{
|
||||
return scanned->acnode_notify_etime
|
||||
&& rtw_time_after(scanned->acnode_notify_etime, rtw_get_current_time());
|
||||
}
|
||||
|
||||
bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
|
||||
struct sta_priv *stapriv = &adapter->stapriv;
|
||||
bool allow = 0;
|
||||
|
||||
if (!mcfg->peer_sel_policy.acnode_prevent
|
||||
|| mcfg->max_peer_links <= 1
|
||||
|| stapriv->asoc_list_cnt < mcfg->max_peer_links)
|
||||
goto exit;
|
||||
|
||||
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
|
||||
if (rtw_mesh_cto_mgate_required(adapter))
|
||||
goto exit;
|
||||
#endif
|
||||
|
||||
allow = 1;
|
||||
|
||||
exit:
|
||||
return allow;
|
||||
}
|
||||
|
||||
static bool rtw_mesh_acnode_candidate_exist(_adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
|
||||
struct sta_priv *stapriv = &adapter->stapriv;
|
||||
struct mlme_priv *mlme = &adapter->mlmepriv;
|
||||
_queue *queue = &(mlme->scanned_queue);
|
||||
_list *head, *list;
|
||||
_irqL irqL;
|
||||
struct wlan_network *scanned = NULL;
|
||||
struct sta_info *sta = NULL;
|
||||
bool need = 0;
|
||||
|
||||
_enter_critical_bh(&(mlme->scanned_queue.lock), &irqL);
|
||||
|
||||
head = get_list_head(queue);
|
||||
list = get_next(head);
|
||||
while (!rtw_end_of_queue_search(head, list)) {
|
||||
scanned = LIST_CONTAINOR(list, struct wlan_network, list);
|
||||
list = get_next(list);
|
||||
|
||||
if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms
|
||||
&& rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)
|
||||
&& (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi)
|
||||
#if CONFIG_RTW_MACADDR_ACL
|
||||
&& rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE
|
||||
#endif
|
||||
&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 1, 1)
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
&& !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
|
||||
#endif
|
||||
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
|
||||
&& rtw_mesh_cto_mgate_network_filter(adapter, scanned)
|
||||
#endif
|
||||
) {
|
||||
need = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
_exit_critical_bh(&(mlme->scanned_queue.lock), &irqL);
|
||||
|
||||
exit:
|
||||
return need;
|
||||
}
|
||||
|
||||
static int rtw_mesh_acnode_prevent_sacrifice_chk(_adapter *adapter, struct sta_info **sac, struct sta_info *com)
|
||||
{
|
||||
struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
|
||||
int updated = 0;
|
||||
|
||||
/*
|
||||
* TODO: compare next_hop reference cnt of forwarding info
|
||||
* don't sacrifice working next_hop or choose sta with least cnt
|
||||
*/
|
||||
|
||||
if (*sac == NULL) {
|
||||
updated = 1;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
|
||||
if (mcfg->peer_sel_policy.cto_mgate_require
|
||||
&& !mcfg->dot11MeshGateAnnouncementProtocol
|
||||
) {
|
||||
if (IS_CTO_MGATE_CONF_TIMEOUT(com->plink)) {
|
||||
if (!IS_CTO_MGATE_CONF_TIMEOUT((*sac)->plink)) {
|
||||
/* blacklist > not blacklist */
|
||||
updated = 1;
|
||||
goto exit;
|
||||
}
|
||||
} else if (!IS_CTO_MGATE_CONF_DISABLED(com->plink)) {
|
||||
if (IS_CTO_MGATE_CONF_DISABLED((*sac)->plink)) {
|
||||
/* confirming > disabled */
|
||||
updated = 1;
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
exit:
|
||||
if (updated)
|
||||
*sac = com;
|
||||
|
||||
return updated;
|
||||
}
|
||||
|
||||
struct sta_info *_rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter)
|
||||
{
|
||||
struct sta_priv *stapriv = &adapter->stapriv;
|
||||
_list *head, *list;
|
||||
struct sta_info *sta, *sacrifice = NULL;
|
||||
u8 nop;
|
||||
|
||||
head = &stapriv->asoc_list;
|
||||
list = get_next(head);
|
||||
while (rtw_end_of_queue_search(head, list) == _FALSE) {
|
||||
sta = LIST_CONTAINOR(list, struct sta_info, asoc_list);
|
||||
list = get_next(list);
|
||||
|
||||
if (!sta->plink || !sta->plink->scanned) {
|
||||
rtw_warn_on(1);
|
||||
continue;
|
||||
}
|
||||
|
||||
rtw_mesh_bss_peering_status(&sta->plink->scanned->network, &nop, NULL);
|
||||
if (nop < 2)
|
||||
continue;
|
||||
|
||||
rtw_mesh_acnode_prevent_sacrifice_chk(adapter, &sacrifice, sta);
|
||||
}
|
||||
|
||||
return sacrifice;
|
||||
}
|
||||
|
||||
struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter)
|
||||
{
|
||||
struct sta_priv *stapriv = &adapter->stapriv;
|
||||
struct sta_info *sacrifice = NULL;
|
||||
|
||||
enter_critical_bh(&stapriv->asoc_list_lock);
|
||||
|
||||
sacrifice = _rtw_mesh_acnode_prevent_pick_sacrifice(adapter);
|
||||
|
||||
exit_critical_bh(&stapriv->asoc_list_lock);
|
||||
|
||||
return sacrifice;
|
||||
}
|
||||
|
||||
static void rtw_mesh_acnode_rsvd_chk(_adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
|
||||
u8 acnode_rsvd = 0;
|
||||
|
||||
if (rtw_mesh_acnode_prevent_allow_sacrifice(adapter)
|
||||
&& rtw_mesh_acnode_prevent_pick_sacrifice(adapter)
|
||||
&& rtw_mesh_acnode_candidate_exist(adapter))
|
||||
acnode_rsvd = 1;
|
||||
|
||||
if (plink_ctl->acnode_rsvd != acnode_rsvd) {
|
||||
plink_ctl->acnode_rsvd = acnode_rsvd;
|
||||
RTW_INFO(FUNC_ADPT_FMT" acnode_rsvd = %d\n", FUNC_ADPT_ARG(adapter), plink_ctl->acnode_rsvd);
|
||||
update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static void rtw_mesh_acnode_set_notify_etime(_adapter *adapter, u8 *rframe_whdr)
|
||||
{
|
||||
if (adapter->mesh_info.plink_ctl.acnode_rsvd) {
|
||||
struct wlan_network *scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, get_addr2_ptr(rframe_whdr));
|
||||
|
||||
if (rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)) {
|
||||
scanned->acnode_notify_etime = rtw_get_current_time()
|
||||
+ rtw_ms_to_systime(adapter->mesh_cfg.peer_sel_policy.acnode_notify_timeout_ms);
|
||||
if (scanned->acnode_notify_etime == 0)
|
||||
scanned->acnode_notify_etime++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
|
||||
|
||||
RTW_PRINT_SEL(sel, "%-6s %-12s %-14s\n"
|
||||
, "enable", "conf_timeout", "nofity_timeout");
|
||||
RTW_PRINT_SEL(sel, "%6u %12u %14u\n"
|
||||
, peer_sel_policy->acnode_prevent
|
||||
, peer_sel_policy->acnode_conf_timeout_ms
|
||||
, peer_sel_policy->acnode_notify_timeout_ms);
|
||||
}
|
||||
#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */
|
||||
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr)
|
||||
{
|
||||
@ -355,10 +608,9 @@ void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
|
||||
|
||||
RTW_PRINT_SEL(sel, "%-7s %-12s %-17s\n"
|
||||
, "require", "conf_timeout", "blacklist_timeout");
|
||||
RTW_PRINT_SEL(sel, "%7u %12u %17u\n"
|
||||
, peer_sel_policy->cto_mgate_require
|
||||
RTW_PRINT_SEL(sel, "%-12s %-17s\n"
|
||||
, "conf_timeout", "blacklist_timeout");
|
||||
RTW_PRINT_SEL(sel, "%12u %17u\n"
|
||||
, peer_sel_policy->cto_mgate_conf_timeout_ms
|
||||
, peer_sel_policy->cto_mgate_blacklist_timeout_ms);
|
||||
}
|
||||
@ -406,6 +658,7 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
|
||||
struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
|
||||
bool acnode = 0;
|
||||
|
||||
if (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl))
|
||||
goto exit;
|
||||
@ -413,8 +666,16 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann
|
||||
if (plink_ctl->num >= RTW_MESH_MAX_PEER_CANDIDATES)
|
||||
goto exit;
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (plink_ctl->acnode_rsvd) {
|
||||
acnode = rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned);
|
||||
if (acnode && !rtw_mesh_scanned_is_acnode_allow_notify(adapter, scanned))
|
||||
goto exit;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */
|
||||
if (plink_ctl->num >= mcfg->max_peer_links)
|
||||
if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0)
|
||||
goto exit;
|
||||
|
||||
if (rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms
|
||||
@ -433,6 +694,14 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann
|
||||
)
|
||||
goto exit;
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (acnode) {
|
||||
scanned->acnode_notify_etime = 0;
|
||||
RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(scanned->network.MacAddress));
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev
|
||||
, scanned->network.MacAddress
|
||||
@ -461,7 +730,7 @@ void rtw_mesh_peer_status_chk(_adapter *adapter)
|
||||
u8 cto_mgate, forwarding, mgate;
|
||||
#endif
|
||||
u8 flush;
|
||||
char flush_list[NUM_STA];
|
||||
s8 flush_list[NUM_STA];
|
||||
u8 flush_num = 0;
|
||||
int i;
|
||||
|
||||
@ -579,21 +848,30 @@ flush_add:
|
||||
|
||||
exit_critical_bh(&(plink_ctl->lock));
|
||||
|
||||
for (i = 0; i < flush_num; i++) {
|
||||
if (flush_num) {
|
||||
u8 sta_addr[ETH_ALEN];
|
||||
u8 updated = _FALSE;
|
||||
|
||||
for (i = 0; i < flush_num; i++) {
|
||||
sta = rtw_get_stainfo_by_offset(stapriv, flush_list[i]);
|
||||
_rtw_memcpy(sta_addr, sta->cmn.mac_addr, ETH_ALEN);
|
||||
|
||||
ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE);
|
||||
updated |= ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE);
|
||||
rtw_mesh_expire_peer(adapter, sta_addr);
|
||||
}
|
||||
|
||||
associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL);
|
||||
}
|
||||
|
||||
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
|
||||
/* loop cto_mgate_blacklist to remove ent according to scan_r */
|
||||
rtw_mesh_cto_mgate_blacklist_chk(adapter);
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
rtw_mesh_acnode_rsvd_chk(adapter);
|
||||
#endif
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
@ -651,10 +929,12 @@ u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
|
||||
u8 ret;
|
||||
u8 ret = 0;
|
||||
|
||||
ret = MLME_IS_MESH(adapter)
|
||||
&& check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE
|
||||
if (!adapter->mesh_cfg.peer_sel_policy.offch_cand)
|
||||
goto exit;
|
||||
|
||||
ret = MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)
|
||||
&& (!plink_ctl->num || rtw_mesh_offch_cto_mgate_required(adapter))
|
||||
;
|
||||
|
||||
@ -663,12 +943,12 @@ u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter)
|
||||
struct mi_state mstate_no_self;
|
||||
|
||||
rtw_mi_status_no_self(adapter, &mstate_no_self);
|
||||
if (MSTATE_STA_LD_NUM(&mstate_no_self) || MSTATE_AP_LD_NUM(&mstate_no_self)
|
||||
|| MSTATE_ADHOC_LD_NUM(&mstate_no_self) || MSTATE_MESH_LD_NUM(&mstate_no_self))
|
||||
if (MSTATE_STA_LD_NUM(&mstate_no_self))
|
||||
ret = 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
exit:
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -686,12 +966,15 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter)
|
||||
_irqL irqL;
|
||||
struct wlan_network *scanned = NULL;
|
||||
int i;
|
||||
/* statistics for candidate accept peering */
|
||||
u8 cand_ap_cnt[MAX_CHANNEL_NUM] = {0};
|
||||
u8 max_cand_ap_ch = 0;
|
||||
u8 max_cand_ap_cnt = 0;
|
||||
/* statistics for candidate including not accept peering */
|
||||
u8 cand_cnt[MAX_CHANNEL_NUM] = {0};
|
||||
u8 max_cand_ch = 0;
|
||||
u8 max_cand_cnt = 0;
|
||||
|
||||
for (i = 0; i < rfctl->max_chan_nums; i++)
|
||||
rfctl->channel_set[i].mesh_candidate_cnt = 0;
|
||||
|
||||
_enter_critical_bh(&(mlme->scanned_queue.lock), &irqL);
|
||||
|
||||
head = get_list_head(queue);
|
||||
@ -705,7 +988,7 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter)
|
||||
#if CONFIG_RTW_MACADDR_ACL
|
||||
&& rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE
|
||||
#endif
|
||||
&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 0, 1)
|
||||
&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 0, 0)
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
&& !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
|
||||
#endif
|
||||
@ -718,18 +1001,38 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter)
|
||||
if (ch_set_idx >= 0
|
||||
&& !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx])
|
||||
) {
|
||||
rfctl->channel_set[ch_set_idx].mesh_candidate_cnt++;
|
||||
if (max_cand_cnt < rfctl->channel_set[ch_set_idx].mesh_candidate_cnt) {
|
||||
max_cand_cnt = rfctl->channel_set[ch_set_idx].mesh_candidate_cnt;
|
||||
u8 nop, accept;
|
||||
|
||||
rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept);
|
||||
cand_cnt[ch_set_idx]++;
|
||||
if (max_cand_cnt < cand_cnt[ch_set_idx]) {
|
||||
max_cand_cnt = cand_cnt[ch_set_idx];
|
||||
max_cand_ch = rfctl->channel_set[ch_set_idx].ChannelNum;
|
||||
}
|
||||
if (accept) {
|
||||
cand_ap_cnt[ch_set_idx]++;
|
||||
if (max_cand_ap_cnt < cand_ap_cnt[ch_set_idx]) {
|
||||
max_cand_ap_cnt = cand_ap_cnt[ch_set_idx];
|
||||
max_cand_ap_ch = rfctl->channel_set[ch_set_idx].ChannelNum;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
_exit_critical_bh(&(mlme->scanned_queue.lock), &irqL);
|
||||
|
||||
return max_cand_ch;
|
||||
return max_cand_ap_ch ? max_cand_ap_ch : max_cand_ch;
|
||||
}
|
||||
|
||||
void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
|
||||
|
||||
RTW_PRINT_SEL(sel, "%-6s %-11s\n"
|
||||
, "enable", "find_int_ms");
|
||||
RTW_PRINT_SEL(sel, "%6u %11u\n"
|
||||
, peer_sel_policy->offch_cand, peer_sel_policy->offch_find_int_ms);
|
||||
}
|
||||
#endif /* CONFIG_RTW_MESH_OFFCH_CAND */
|
||||
|
||||
@ -737,36 +1040,24 @@ void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
|
||||
|
||||
#if CONFIG_RTW_MESH_OFFCH_CAND
|
||||
#define OFFCH_CAND_TITLE_FMT " %-17s"
|
||||
#define OFFCH_CAND_VALUE_FMT " %17u"
|
||||
#define OFFCH_CAND_TITLE_ARG , "offch_find_int_ms"
|
||||
#define OFFCH_CAND_VALUE_ARG , peer_sel_policy->offch_find_int_ms
|
||||
#else
|
||||
#define OFFCH_CAND_TITLE_FMT ""
|
||||
#define OFFCH_CAND_VALUE_FMT ""
|
||||
#define OFFCH_CAND_TITLE_ARG
|
||||
#define OFFCH_CAND_VALUE_ARG
|
||||
#endif
|
||||
|
||||
RTW_PRINT_SEL(sel,
|
||||
"%-12s"
|
||||
OFFCH_CAND_TITLE_FMT
|
||||
"\n"
|
||||
, "scanr_exp_ms"
|
||||
OFFCH_CAND_TITLE_ARG
|
||||
);
|
||||
RTW_PRINT_SEL(sel,
|
||||
"%12u"
|
||||
OFFCH_CAND_VALUE_FMT
|
||||
"\n"
|
||||
, peer_sel_policy->scanr_exp_ms
|
||||
OFFCH_CAND_VALUE_ARG
|
||||
);
|
||||
RTW_PRINT_SEL(sel, "%-12s\n", "scanr_exp_ms");
|
||||
RTW_PRINT_SEL(sel, "%12u\n", peer_sel_policy->scanr_exp_ms);
|
||||
}
|
||||
|
||||
void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
{
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
#define NSTATE_TITLE_FMT_ACN " %-5s"
|
||||
#define NSTATE_VALUE_FMT_ACN " %5d"
|
||||
#define NSTATE_TITLE_ARG_ACN , "acn"
|
||||
#define NSTATE_VALUE_ARG_ACN , (acn_ms < 99999 ? acn_ms : 99999)
|
||||
#else
|
||||
#define NSTATE_TITLE_FMT_ACN ""
|
||||
#define NSTATE_VALUE_FMT_ACN ""
|
||||
#define NSTATE_TITLE_ARG_ACN
|
||||
#define NSTATE_VALUE_ARG_ACN
|
||||
#endif
|
||||
|
||||
struct mlme_priv *mlme = &(adapter->mlmepriv);
|
||||
_queue *queue = &(mlme->scanned_queue);
|
||||
struct wlan_network *network;
|
||||
@ -777,13 +1068,16 @@ void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
u8 blocked;
|
||||
u8 established;
|
||||
s32 age_ms;
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
s32 acn_ms;
|
||||
#endif
|
||||
u8 *mesh_conf_ie;
|
||||
sint mesh_conf_ie_len;
|
||||
struct wlan_network **mesh_networks;
|
||||
u8 mesh_network_cnt = 0;
|
||||
int i;
|
||||
|
||||
mesh_networks = rtw_zvmalloc(MAX_BSS_CNT * sizeof(struct wlan_network *));
|
||||
mesh_networks = rtw_zvmalloc(mlme->max_bss_cnt * sizeof(struct wlan_network *));
|
||||
if (!mesh_networks)
|
||||
return;
|
||||
|
||||
@ -808,9 +1102,12 @@ void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
|
||||
exit_critical_bh(&queue->lock);
|
||||
|
||||
RTW_PRINT_SEL(sel, " %-17s %-3s %-4s %-5s %-32s %-3s %-3s %-3s\n"
|
||||
, "bssid", "ch", "rssi", "age", "mesh_id", "nop", "fwd", "cto");
|
||||
|
||||
RTW_PRINT_SEL(sel, " %-17s %-3s %-4s %-5s %-32s %-3s %-3s %-3s"
|
||||
NSTATE_TITLE_FMT_ACN
|
||||
"\n"
|
||||
, "bssid", "ch", "rssi", "age", "mesh_id", "nop", "fwd", "cto"
|
||||
NSTATE_TITLE_ARG_ACN
|
||||
);
|
||||
|
||||
for (i = 0; i < mesh_network_cnt; i++) {
|
||||
network = mesh_networks[i];
|
||||
@ -824,6 +1121,12 @@ void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
continue;
|
||||
|
||||
age_ms = rtw_get_passing_time_ms(network->last_scanned);
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (network->acnode_stime == 0)
|
||||
acn_ms = 0;
|
||||
else
|
||||
acn_ms = rtw_get_passing_time_ms(network->acnode_stime);
|
||||
#endif
|
||||
same_mbss = 0;
|
||||
candidate = 0;
|
||||
plink = NULL;
|
||||
@ -844,7 +1147,9 @@ void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
same_mbss = 1;
|
||||
}
|
||||
|
||||
RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %c%2u %3u %c%c \n"
|
||||
RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %c%2u %3u %c%c "
|
||||
NSTATE_VALUE_FMT_ACN
|
||||
"\n"
|
||||
, established ? 'E' : (blocked ? 'B' : (plink ? 'N' : (candidate ? 'C' : (same_mbss ? 'S' : ' '))))
|
||||
, MAC_ARG(network->network.MacAddress)
|
||||
, network->network.Configuration.DSConfig
|
||||
@ -856,10 +1161,22 @@ void dump_mesh_networks(void *sel, _adapter *adapter)
|
||||
, GET_MESH_CONF_ELE_FORWARDING(mesh_conf_ie + 2)
|
||||
, GET_MESH_CONF_ELE_CTO_MGATE(mesh_conf_ie + 2) ? 'G' : ' '
|
||||
, GET_MESH_CONF_ELE_CTO_AS(mesh_conf_ie + 2) ? 'A' : ' '
|
||||
NSTATE_VALUE_ARG_ACN
|
||||
);
|
||||
}
|
||||
|
||||
rtw_vmfree(mesh_networks, MAX_BSS_CNT * sizeof(struct wlan_network *));
|
||||
rtw_vmfree(mesh_networks, mlme->max_bss_cnt * sizeof(struct wlan_network *));
|
||||
}
|
||||
|
||||
void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset)
|
||||
{
|
||||
if (req_ch >= 5 && req_ch <= 9) {
|
||||
/* prevent secondary channel offset mismatch */
|
||||
if (*req_bw > CHANNEL_WIDTH_20) {
|
||||
*req_bw = CHANNEL_WIDTH_20;
|
||||
*req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx)
|
||||
@ -1133,37 +1450,37 @@ struct mpm_frame_info {
|
||||
};
|
||||
|
||||
/*
|
||||
* pid:0x0000 llid:0x0000 chosen_pmk:0x00000000000000000000000000000000
|
||||
* aid:0x0000 pid:0x0000 llid:0x0000 plid:0x0000 chosen_pmk:0x00000000000000000000000000000000
|
||||
* pid:0x0000 llid:0x0000 plid:0x0000 reason:0x0000 chosen_pmk:0x00000000000000000000000000000000
|
||||
* pid:00000 llid:00000 chosen_pmk:0x00000000000000000000000000000000
|
||||
* aid:00000 pid:00000 llid:00000 plid:00000 chosen_pmk:0x00000000000000000000000000000000
|
||||
* pid:00000 llid:00000 plid:00000 reason:00000 chosen_pmk:0x00000000000000000000000000000000
|
||||
*/
|
||||
#define MPM_LOG_BUF_LEN 96 /* this length is limited for legal combination */
|
||||
#define MPM_LOG_BUF_LEN 92 /* this length is limited for legal combination */
|
||||
static void rtw_mpm_info_msg(struct mpm_frame_info *mpm_info, u8 *mpm_log_buf)
|
||||
{
|
||||
int cnt = 0;
|
||||
|
||||
if (mpm_info->aid) {
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:0x%04x ", mpm_info->aid_v);
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:%u ", mpm_info->aid_v);
|
||||
if (cnt >= MPM_LOG_BUF_LEN - 1)
|
||||
goto exit;
|
||||
}
|
||||
if (mpm_info->pid) {
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:0x%04x ", mpm_info->pid_v);
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:%u ", mpm_info->pid_v);
|
||||
if (cnt >= MPM_LOG_BUF_LEN - 1)
|
||||
goto exit;
|
||||
}
|
||||
if (mpm_info->llid) {
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:0x%04x ", mpm_info->llid_v);
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:%u ", mpm_info->llid_v);
|
||||
if (cnt >= MPM_LOG_BUF_LEN - 1)
|
||||
goto exit;
|
||||
}
|
||||
if (mpm_info->plid) {
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:0x%04x ", mpm_info->plid_v);
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:%u ", mpm_info->plid_v);
|
||||
if (cnt >= MPM_LOG_BUF_LEN - 1)
|
||||
goto exit;
|
||||
}
|
||||
if (mpm_info->reason) {
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:0x%04x ", mpm_info->reason_v);
|
||||
cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:%u ", mpm_info->reason_v);
|
||||
if (cnt >= MPM_LOG_BUF_LEN - 1)
|
||||
goto exit;
|
||||
}
|
||||
@ -1345,6 +1662,40 @@ bypass_sync_bss:
|
||||
rtw_mesh_plink_set_peer_conf_timeout(adapter, peer_addr);
|
||||
|
||||
} else
|
||||
#endif
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE) {
|
||||
if (tx && mpm_info.reason && mpm_info.reason_v == WLAN_REASON_MESH_MAX_PEERS) {
|
||||
if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned)
|
||||
&& rtw_mesh_acnode_prevent_allow_sacrifice(adapter)
|
||||
) {
|
||||
struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter);
|
||||
|
||||
if (sac) {
|
||||
struct sta_priv *stapriv = &adapter->stapriv;
|
||||
_irqL irqL;
|
||||
u8 sta_addr[ETH_ALEN];
|
||||
u8 updated = _FALSE;
|
||||
|
||||
_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
|
||||
if (!rtw_is_list_empty(&sac->asoc_list)) {
|
||||
rtw_list_delete(&sac->asoc_list);
|
||||
stapriv->asoc_list_cnt--;
|
||||
STA_SET_MESH_PLINK(sac, NULL);
|
||||
}
|
||||
_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
|
||||
RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(sac->cmn.mac_addr));
|
||||
|
||||
_rtw_memcpy(sta_addr, sac->cmn.mac_addr, ETH_ALEN);
|
||||
updated = ap_free_sta(adapter, sac, 0, 0, 1);
|
||||
rtw_mesh_expire_peer(stapriv->padapter, sta_addr);
|
||||
|
||||
associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL);
|
||||
}
|
||||
}
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) {
|
||||
_irqL irqL;
|
||||
@ -1475,6 +1826,31 @@ int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len)
|
||||
return rtw_mesh_check_frames(adapter, &buf, &len, _FALSE);
|
||||
}
|
||||
|
||||
int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe)
|
||||
{
|
||||
u8 *whdr = rframe->u.hdr.rx_data;
|
||||
|
||||
#if CONFIG_RTW_MACADDR_ACL
|
||||
if (rtw_access_ctrl(adapter, get_addr2_ptr(whdr)) == _FALSE)
|
||||
return _SUCCESS;
|
||||
#endif
|
||||
|
||||
if (!rtw_mesh_plink_get(adapter, get_addr2_ptr(whdr))) {
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
rtw_mesh_acnode_set_notify_etime(adapter, whdr);
|
||||
#endif
|
||||
|
||||
if (adapter_to_rfctl(adapter)->offch_state == OFFCHS_NONE)
|
||||
issue_probereq(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, get_addr2_ptr(whdr));
|
||||
|
||||
/* only peer being added (checked by notify conditions) is allowed */
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
||||
rtw_cfg80211_rx_mframe(adapter, rframe, NULL);
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
||||
unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe)
|
||||
{
|
||||
unsigned int ret = _FAIL;
|
||||
@ -1578,6 +1954,10 @@ bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss)
|
||||
int ie_len;
|
||||
bool updated = 0;
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
accept_peerings |= plink_ctl->acnode_rsvd;
|
||||
#endif
|
||||
|
||||
ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, BSS_EX_TLV_IES_LEN(bss));
|
||||
if (!ie || ie_len != 7) {
|
||||
rtw_warn_on(1);
|
||||
@ -1945,6 +2325,9 @@ void dump_mesh_plink_ctl(void *sel, _adapter *adapter)
|
||||
int i;
|
||||
|
||||
RTW_PRINT_SEL(sel, "num:%u\n", plink_ctl->num);
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
RTW_PRINT_SEL(sel, "acnode_rsvd:%u\n", plink_ctl->acnode_rsvd);
|
||||
#endif
|
||||
|
||||
for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
|
||||
ent = &plink_ctl->ent[i];
|
||||
@ -2076,6 +2459,10 @@ int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, str
|
||||
goto exit;
|
||||
|
||||
rtw_ap_parse_sta_wmm_ie(adapter, sta, tlv_ies, tlv_ieslen);
|
||||
#ifdef CONFIG_RTS_FULL_BW
|
||||
/*check vendor IE*/
|
||||
rtw_parse_sta_vendor_ie_8812(adapter, sta, tlv_ies, tlv_ieslen);
|
||||
#endif/*CONFIG_RTS_FULL_BW*/
|
||||
|
||||
rtw_ap_parse_sta_ht_ie(adapter, sta, &elems);
|
||||
rtw_ap_parse_sta_vht_ie(adapter, sta, &elems);
|
||||
@ -2103,7 +2490,8 @@ int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, str
|
||||
_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
|
||||
if (rtw_is_list_empty(&sta->asoc_list)) {
|
||||
STA_SET_MESH_PLINK(sta, plink);
|
||||
sta->expire_to = mcfg->plink_timeout / 2;
|
||||
/* TBD: up layer timeout mechanism */
|
||||
/* sta->expire_to = mcfg->plink_timeout / 2; */
|
||||
rtw_list_insert_tail(&sta->asoc_list, &stapriv->asoc_list);
|
||||
stapriv->asoc_list_cnt++;
|
||||
}
|
||||
@ -2587,13 +2975,58 @@ static int rtw_mesh_decache(_adapter *adapter, const u8 *msa, u32 seq)
|
||||
return rtw_mrc_check(adapter, msa, seq);
|
||||
}
|
||||
|
||||
#ifndef RTW_MESH_SCAN_RESULT_EXP_MS
|
||||
#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef RTW_MESH_ACNODE_PREVENT
|
||||
#define RTW_MESH_ACNODE_PREVENT 0
|
||||
#endif
|
||||
#ifndef RTW_MESH_ACNODE_CONF_TIMEOUT_MS
|
||||
#define RTW_MESH_ACNODE_CONF_TIMEOUT_MS (20 * 1000)
|
||||
#endif
|
||||
#ifndef RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS
|
||||
#define RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS (2 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef RTW_MESH_OFFCH_CAND
|
||||
#define RTW_MESH_OFFCH_CAND 1
|
||||
#endif
|
||||
#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS
|
||||
#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef RTW_MESH_PEER_CONF_TIMEOUT_MS
|
||||
#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000)
|
||||
#endif
|
||||
#ifndef RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS
|
||||
#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef RTW_MESH_CTO_MGATE_REQUIRE
|
||||
#define RTW_MESH_CTO_MGATE_REQUIRE 0
|
||||
#endif
|
||||
#ifndef RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS
|
||||
#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000)
|
||||
#endif
|
||||
#ifndef RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS
|
||||
#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000)
|
||||
#endif
|
||||
|
||||
void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg)
|
||||
{
|
||||
struct mesh_peer_sel_policy *sel_policy = &mcfg->peer_sel_policy;
|
||||
|
||||
sel_policy->scanr_exp_ms = RTW_MESH_SCAN_RESULT_EXP_MS;
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
sel_policy->acnode_prevent = RTW_MESH_ACNODE_PREVENT;
|
||||
sel_policy->acnode_conf_timeout_ms = RTW_MESH_ACNODE_CONF_TIMEOUT_MS;
|
||||
sel_policy->acnode_notify_timeout_ms = RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS;
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_OFFCH_CAND
|
||||
sel_policy->offch_cand = RTW_MESH_OFFCH_CAND;
|
||||
sel_policy->offch_find_int_ms = RTW_MESH_OFFCH_CAND_FIND_INT_MS;
|
||||
#endif
|
||||
|
||||
@ -2603,7 +3036,7 @@ void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg)
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
|
||||
sel_policy->cto_mgate_require = 0;
|
||||
sel_policy->cto_mgate_require = RTW_MESH_CTO_MGATE_REQUIRE;
|
||||
sel_policy->cto_mgate_conf_timeout_ms = RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS;
|
||||
sel_policy->cto_mgate_blacklist_timeout_ms = RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS;
|
||||
#endif
|
||||
@ -2635,6 +3068,10 @@ void rtw_mesh_cfg_init(_adapter *adapter)
|
||||
mcfg->dot11MeshHWMPconfirmationInterval = RTW_MESH_ROOT_CONFIRMATION_INTERVAL;
|
||||
mcfg->path_gate_timeout_factor = 3;
|
||||
rtw_mesh_cfg_init_peer_sel_policy(mcfg);
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
mcfg->sane_metric_delta = RTW_MESH_SANE_METRIC_DELTA;
|
||||
mcfg->max_root_add_chk_cnt = RTW_MESH_MAX_ROOT_ADD_CHK_CNT;
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
|
||||
mcfg->b2u_flags_msrc = 0;
|
||||
@ -3337,7 +3774,8 @@ endlookup:
|
||||
#define RTW_MESH_DECACHE_BMC 1
|
||||
#define RTW_MESH_DECACHE_UC 0
|
||||
|
||||
#define RTW_MESH_FORWARD_MDA_SELF_COND 1
|
||||
#define RTW_MESH_FORWARD_MDA_SELF_COND 0
|
||||
#define DBG_RTW_MESH_FORWARD_MDA_SELF_COND 0
|
||||
int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
|
||||
, const u8 *mda, const u8 *msa
|
||||
, const u8 *da, const u8 *sa
|
||||
@ -3457,37 +3895,52 @@ int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
|
||||
} else {
|
||||
/* mDA is self */
|
||||
#if RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
u8 is_da_self = da == mda || _rtw_memcmp(da, adapter_mac_addr(adapter), ETH_ALEN);
|
||||
|
||||
if (is_da_self) {
|
||||
if (da == mda
|
||||
|| _rtw_memcmp(da, adapter_mac_addr(adapter), ETH_ALEN)
|
||||
) {
|
||||
/* DA is self, indicate */
|
||||
act |= RTW_RX_MSDU_ACT_INDICATE;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
/* DA is not self */
|
||||
if (rtw_mesh_nexthop_lookup(adapter, da, msa, fwd_ra) == _SUCCESS) {
|
||||
if (rtw_get_iface_by_macddr(adapter, da)) {
|
||||
/* DA is buddy, indicate */
|
||||
act |= RTW_RX_MSDU_ACT_INDICATE;
|
||||
#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is buddy("ADPT_FMT")\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da), ADPT_ARG(rtw_get_iface_by_macddr(adapter, da)));
|
||||
#endif
|
||||
goto exit;
|
||||
}
|
||||
|
||||
/* DA is not self or buddy */
|
||||
if (rtw_mesh_nexthop_lookup(adapter, da, msa, fwd_ra) == 0) {
|
||||
/* DA is known in fwd info */
|
||||
if (!mcfg->dot11MeshForwarding) {
|
||||
/* path error to? */
|
||||
#ifdef DBG_RX_DROP_FRAME
|
||||
#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") not self, !dot11MeshForwarding\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
|
||||
#endif
|
||||
goto exit;
|
||||
}
|
||||
mda = da;
|
||||
#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO(FUNC_ADPT_FMT" fwd to DA("MAC_FMT"), fwd_RA("MAC_FMT")\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(fwd_ra));
|
||||
#endif
|
||||
goto fwd_chk;
|
||||
}
|
||||
|
||||
rtw_rcu_read_lock();
|
||||
mppath = rtw_mpp_path_lookup(adapter, da);
|
||||
if (mppath && _rtw_memcmp(mppath->mpp, adapter_mac_addr(adapter), ETH_ALEN) == _FALSE) {
|
||||
/* DA is reached by the other gate */
|
||||
if (mppath) {
|
||||
if (_rtw_memcmp(mppath->mpp, adapter_mac_addr(adapter), ETH_ALEN) == _FALSE) {
|
||||
/* DA is proxied by others */
|
||||
if (!mcfg->dot11MeshForwarding) {
|
||||
/* path error to? */
|
||||
#ifdef DBG_RX_DROP_FRAME
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is reached by proxy("MAC_FMT"), !dot11MeshForwarding\n"
|
||||
#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), !dot11MeshForwarding\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp));
|
||||
#endif
|
||||
rtw_rcu_read_unlock();
|
||||
@ -3499,15 +3952,33 @@ int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
|
||||
rtw_rcu_read_unlock();
|
||||
|
||||
/* resolve RA */
|
||||
if (rtw_mesh_nexthop_lookup(adapter, mda, msa, fwd_ra) != _SUCCESS) {
|
||||
if (rtw_mesh_nexthop_lookup(adapter, mda, msa, fwd_ra) != 0) {
|
||||
minfo->mshstats.dropped_frames_no_route++;
|
||||
#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), RA resolve fail\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp));
|
||||
#endif
|
||||
goto exit;
|
||||
}
|
||||
#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), fwd_RA("MAC_FMT")\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp), MAC_ARG(fwd_ra));
|
||||
#endif
|
||||
goto fwd_chk; /* forward to other gate */
|
||||
} else {
|
||||
#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by self\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
rtw_rcu_read_unlock();
|
||||
|
||||
if (!mppath) {
|
||||
#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
|
||||
RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") unknown\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
|
||||
#endif
|
||||
/* DA is unknown */
|
||||
#if 0 /* TODO: flags with AE bit */
|
||||
rtw_mesh_path_error_tx(adapter
|
||||
@ -3521,7 +3992,7 @@ int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
|
||||
|
||||
/*
|
||||
* indicate to DS for both cases:
|
||||
* 1.) DA is reached by self
|
||||
* 1.) DA is proxied by self
|
||||
* 2.) DA is unknown
|
||||
*/
|
||||
#endif /* RTW_MESH_FORWARD_MDA_SELF_COND */
|
||||
|
@ -19,12 +19,6 @@
|
||||
#error "CONFIG_RTW_MESH can't be enabled when CONFIG_AP_MODE is not defined\n"
|
||||
#endif
|
||||
|
||||
#ifndef RTW_MESH_SCAN_RESULT_EXP_MS
|
||||
#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000)
|
||||
#endif
|
||||
#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS
|
||||
#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000)
|
||||
#endif
|
||||
#define RTW_MESH_TTL 31
|
||||
#define RTW_MESH_PERR_MIN_INT 100
|
||||
#define RTW_MESH_DEFAULT_ELEMENT_TTL 31
|
||||
@ -39,6 +33,9 @@
|
||||
#define RTW_MESH_PATH_REFRESH_TIME 1000
|
||||
#define RTW_MESH_ROOT_INTERVAL 5000
|
||||
|
||||
#define RTW_MESH_SANE_METRIC_DELTA 100
|
||||
#define RTW_MESH_MAX_ROOT_ADD_CHK_CNT 2
|
||||
|
||||
#define RTW_MESH_PLINK_UNKNOWN 0
|
||||
#define RTW_MESH_PLINK_LISTEN 1
|
||||
#define RTW_MESH_PLINK_OPN_SNT 2
|
||||
@ -107,6 +104,8 @@ extern const char *_rtw_mesh_ps_str[];
|
||||
|
||||
#define RTW_PREQ_Q_F_START 0x1
|
||||
#define RTW_PREQ_Q_F_REFRESH 0x2
|
||||
#define RTW_PREQ_Q_F_CHK 0x4
|
||||
#define RTW_PREQ_Q_F_PEER_AKA 0x8
|
||||
struct rtw_mesh_preq_queue {
|
||||
_list list;
|
||||
u8 dst[ETH_ALEN];
|
||||
@ -242,6 +241,10 @@ struct mesh_plink_pool {
|
||||
u8 num; /* current ent being used */
|
||||
struct mesh_plink_ent ent[RTW_MESH_MAX_PEER_CANDIDATES];
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
u8 acnode_rsvd;
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
_queue peer_blacklist;
|
||||
#endif
|
||||
@ -250,16 +253,18 @@ struct mesh_plink_pool {
|
||||
#endif
|
||||
};
|
||||
|
||||
#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000)
|
||||
#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000)
|
||||
#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000)
|
||||
#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000)
|
||||
|
||||
struct mesh_peer_sel_policy {
|
||||
u32 scanr_exp_ms;
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
u8 acnode_prevent;
|
||||
u32 acnode_conf_timeout_ms;
|
||||
u32 acnode_notify_timeout_ms;
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_OFFCH_CAND
|
||||
u32 offch_find_int_ms; /* 0 means no offch find by driver */
|
||||
u8 offch_cand;
|
||||
u32 offch_find_int_ms; /* 0 means no offch find triggerred by driver self*/
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
@ -293,6 +298,11 @@ struct mesh_peer_sel_policy {
|
||||
|| ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \
|
||||
)
|
||||
|
||||
/**
|
||||
* @sane_metric_delta: Controlling if trigger additional path check mechanism
|
||||
* @max_root_add_chk_cnt: The retry cnt to send additional root confirmation
|
||||
* PREQ through old(last) path
|
||||
*/
|
||||
struct rtw_mesh_cfg {
|
||||
u8 max_peer_links; /* peering limit */
|
||||
u32 plink_timeout; /* seconds */
|
||||
@ -315,6 +325,10 @@ struct rtw_mesh_cfg {
|
||||
u32 dot11MeshHWMPactivePathToRootTimeout;
|
||||
u16 dot11MeshHWMProotInterval;
|
||||
u8 path_gate_timeout_factor;
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
u16 sane_metric_delta;
|
||||
u8 max_root_add_chk_cnt;
|
||||
#endif
|
||||
|
||||
struct mesh_peer_sel_policy peer_sel_policy;
|
||||
|
||||
@ -370,6 +384,8 @@ struct rtw_mesh_info {
|
||||
int mpp_paths_generation;
|
||||
|
||||
int num_gates;
|
||||
struct rtw_mesh_path *max_addr_gate;
|
||||
bool max_addr_gate_is_larger_than_self;
|
||||
|
||||
struct rtw_mesh_stats mshstats;
|
||||
|
||||
@ -401,9 +417,18 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann
|
||||
|
||||
void rtw_mesh_peer_status_chk(_adapter *adapter);
|
||||
|
||||
#if CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned);
|
||||
bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned);
|
||||
bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter);
|
||||
struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter);
|
||||
void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter);
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_OFFCH_CAND
|
||||
u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter);
|
||||
u8 rtw_mesh_select_operating_ch(_adapter *adapter);
|
||||
void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter);
|
||||
#endif
|
||||
|
||||
#if CONFIG_RTW_MESH_PEER_BLACKLIST
|
||||
@ -427,10 +452,13 @@ void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter);
|
||||
void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter);
|
||||
void dump_mesh_networks(void *sel, _adapter *adapter);
|
||||
|
||||
void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset);
|
||||
|
||||
int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx);
|
||||
int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len);
|
||||
int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len);
|
||||
|
||||
int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe);
|
||||
unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe);
|
||||
|
||||
bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss);
|
||||
|
BIN
core/mesh/rtw_mesh.o
Normal file
BIN
core/mesh/rtw_mesh.o
Normal file
Binary file not shown.
@ -826,16 +826,18 @@ static void rtw_hwmp_prep_frame_process(_adapter *adapter,
|
||||
target_addr = RTW_PREP_IE_TARGET_ADDR(prep_elem);
|
||||
path = rtw_mesh_path_lookup(adapter, target_addr);
|
||||
if (path && path->gate_asked) {
|
||||
flags = RTW_PREP_IE_FLAGS(prep_elem);
|
||||
if (flags & BIT(7)) {
|
||||
enter_critical_bh(&path->state_lock);
|
||||
path->gate_asked = false;
|
||||
exit_critical_bh(&path->state_lock);
|
||||
flags = RTW_PREP_IE_FLAGS(prep_elem);
|
||||
if ((flags & BIT(7)) && !(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG)) {
|
||||
if (!(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG)) {
|
||||
enter_critical_bh(&path->state_lock);
|
||||
rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
|
||||
exit_critical_bh(&path->state_lock);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
rtw_rcu_read_unlock();
|
||||
return;
|
||||
@ -1000,9 +1002,26 @@ static void rtw_hwmp_rann_frame_process(_adapter *adapter,
|
||||
rtw_root_path_confirmation_jiffies(adapter)) ||
|
||||
rtw_time_before(rtw_get_current_time(), path->last_preq_to_root))) &&
|
||||
!(path->flags & RTW_MESH_PATH_FIXED) && (ttl != 0)) {
|
||||
u8 preq_node_flag = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH;
|
||||
|
||||
RTW_HWMP_DBG("time to refresh root path "MAC_FMT"\n",
|
||||
MAC_ARG(originator_addr));
|
||||
rtw_mesh_queue_preq(path, RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH);
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
if (RTW_SN_LT(path->sn, originator_sn) &&
|
||||
(path->rann_metric + mshcfg->sane_metric_delta < metric) &&
|
||||
_rtw_memcmp(bcast_addr, path->rann_snd_addr, ETH_ALEN) == _FALSE) {
|
||||
RTW_HWMP_DBG("Trigger additional check for root "
|
||||
"confirm PREQ. rann_snd_addr = "MAC_FMT
|
||||
"add_chk_rann_snd_addr= "MAC_FMT"\n",
|
||||
MAC_ARG(mgmt->addr2),
|
||||
MAC_ARG(path->rann_snd_addr));
|
||||
_rtw_memcpy(path->add_chk_rann_snd_addr,
|
||||
path->rann_snd_addr, ETH_ALEN);
|
||||
preq_node_flag |= RTW_PREQ_Q_F_CHK;
|
||||
|
||||
}
|
||||
#endif
|
||||
rtw_mesh_queue_preq(path, preq_node_flag);
|
||||
path->last_preq_to_root = rtw_get_current_time();
|
||||
}
|
||||
|
||||
@ -1138,6 +1157,13 @@ static u32 rtw_hwmp_route_info_get(_adapter *adapter,
|
||||
path->exp_time = rtw_time_after(path->exp_time, exp_time)
|
||||
? path->exp_time : exp_time;
|
||||
rtw_mesh_path_activate(path);
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
if (path->is_root && (action == RTW_MPATH_PREP)) {
|
||||
_rtw_memcpy(path->rann_snd_addr,
|
||||
mgmt->addr2, ETH_ALEN);
|
||||
path->rann_metric = new_metric;
|
||||
}
|
||||
#endif
|
||||
exit_critical_bh(&path->state_lock);
|
||||
rtw_mesh_path_tx_pending(path);
|
||||
} else
|
||||
@ -1184,6 +1210,15 @@ static u32 rtw_hwmp_route_info_get(_adapter *adapter,
|
||||
return process ? new_metric : 0;
|
||||
}
|
||||
|
||||
static void rtw_mesh_rx_hwmp_frame_cnts(_adapter *adapter, u8 *addr)
|
||||
{
|
||||
struct sta_info *sta;
|
||||
|
||||
sta = rtw_get_stainfo(&adapter->stapriv, addr);
|
||||
if (sta)
|
||||
sta->sta_stats.rx_hwmp_pkts++;
|
||||
}
|
||||
|
||||
void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe)
|
||||
{
|
||||
struct mesh_plink_ent *plink = NULL;
|
||||
@ -1200,6 +1235,8 @@ void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe)
|
||||
if (!plink || plink->plink_state != RTW_MESH_PLINK_ESTAB)
|
||||
return;
|
||||
|
||||
rtw_mesh_rx_hwmp_frame_cnts(adapter, get_addr2_ptr(pframe));
|
||||
|
||||
/* Mesh action frame IE offset = 2 */
|
||||
attrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr);
|
||||
left = frame_len - attrib->hdrlen - attrib->iv_len - attrib->icv_len - 2;
|
||||
@ -1276,6 +1313,12 @@ void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags)
|
||||
preq_node->flags = flags;
|
||||
|
||||
path->flags |= RTW_MESH_PATH_REQ_QUEUED;
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
if (flags & RTW_PREQ_Q_F_CHK)
|
||||
path->flags |= RTW_MESH_PATH_ROOT_ADD_CHK;
|
||||
#endif
|
||||
if (flags & RTW_PREQ_Q_F_PEER_AKA)
|
||||
path->flags |= RTW_MESH_PATH_PEER_AKA;
|
||||
_rtw_spinunlock(&path->state_lock);
|
||||
|
||||
rtw_list_insert_tail(&preq_node->list, &minfo->preq_queue.list);
|
||||
@ -1291,7 +1334,27 @@ void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags)
|
||||
rtw_mesh_work(&adapter->mesh_work);
|
||||
} else
|
||||
rtw_mod_timer(&adapter->mesh_path_timer, minfo->last_preq +
|
||||
rtw_min_preq_int_jiff(adapter));
|
||||
rtw_min_preq_int_jiff(adapter) + 1);
|
||||
}
|
||||
|
||||
static const u8 *rtw_hwmp_preq_da(struct rtw_mesh_path *path,
|
||||
BOOLEAN is_root_add_chk, BOOLEAN da_is_peer)
|
||||
{
|
||||
const u8 *da;
|
||||
|
||||
if (da_is_peer)
|
||||
da = path->dst;
|
||||
else if (path->is_root)
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
da = is_root_add_chk ? path->add_chk_rann_snd_addr:
|
||||
path->rann_snd_addr;
|
||||
#else
|
||||
da = path->rann_snd_addr;
|
||||
#endif
|
||||
else
|
||||
da = bcast_addr;
|
||||
|
||||
return da;
|
||||
}
|
||||
|
||||
void rtw_mesh_path_start_discovery(_adapter *adapter)
|
||||
@ -1304,6 +1367,8 @@ void rtw_mesh_path_start_discovery(_adapter *adapter)
|
||||
const u8 *da;
|
||||
u32 lifetime;
|
||||
u8 flags = 0;
|
||||
BOOLEAN is_root_add_chk = _FALSE;
|
||||
BOOLEAN da_is_peer;
|
||||
|
||||
enter_critical_bh(&minfo->mesh_preq_queue_lock);
|
||||
if (!minfo->preq_queue_len ||
|
||||
@ -1368,8 +1433,14 @@ void rtw_mesh_path_start_discovery(_adapter *adapter)
|
||||
else
|
||||
target_flags &= ~RTW_IEEE80211_PREQ_TO_FLAG;
|
||||
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
is_root_add_chk = !!(path->flags & RTW_MESH_PATH_ROOT_ADD_CHK);
|
||||
#endif
|
||||
da_is_peer = !!(path->flags & RTW_MESH_PATH_PEER_AKA);
|
||||
exit_critical_bh(&path->state_lock);
|
||||
da = (path->is_root) ? path->rann_snd_addr : bcast_addr;
|
||||
|
||||
da = rtw_hwmp_preq_da(path, is_root_add_chk, da_is_peer);
|
||||
|
||||
#ifdef CONFIG_RTW_MESH_ON_DMD_GANN
|
||||
flags = (mshcfg->dot11MeshGateAnnouncementProtocol)
|
||||
? RTW_IEEE80211_PREQ_IS_GATE_FLAG : 0;
|
||||
@ -1389,7 +1460,10 @@ void rtw_mesh_path_timer(void *ctx)
|
||||
struct rtw_mesh_path *path = (void *) ctx;
|
||||
_adapter *adapter = path->adapter;
|
||||
int ret;
|
||||
|
||||
u8 retry = 0;
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
|
||||
#endif
|
||||
/* TBD: Proctect for suspend */
|
||||
#if 0
|
||||
if (suspending)
|
||||
@ -1398,18 +1472,30 @@ void rtw_mesh_path_timer(void *ctx)
|
||||
enter_critical_bh(&path->state_lock);
|
||||
if (path->flags & RTW_MESH_PATH_RESOLVED ||
|
||||
(!(path->flags & RTW_MESH_PATH_RESOLVING))) {
|
||||
path->flags &= ~(RTW_MESH_PATH_RESOLVING | RTW_MESH_PATH_RESOLVED);
|
||||
path->flags &= ~(RTW_MESH_PATH_RESOLVING |
|
||||
RTW_MESH_PATH_RESOLVED |
|
||||
RTW_MESH_PATH_ROOT_ADD_CHK |
|
||||
RTW_MESH_PATH_PEER_AKA);
|
||||
exit_critical_bh(&path->state_lock);
|
||||
} else if (path->discovery_retries < rtw_max_preq_retries(adapter)) {
|
||||
++path->discovery_retries;
|
||||
path->discovery_timeout *= 2;
|
||||
path->flags &= ~RTW_MESH_PATH_REQ_QUEUED;
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
if (path->discovery_retries > mshcfg->max_root_add_chk_cnt)
|
||||
path->flags &= ~RTW_MESH_PATH_ROOT_ADD_CHK;
|
||||
#endif
|
||||
if (path->gate_asked)
|
||||
retry |= RTW_PREQ_Q_F_REFRESH;
|
||||
|
||||
exit_critical_bh(&path->state_lock);
|
||||
rtw_mesh_queue_preq(path, 0);
|
||||
rtw_mesh_queue_preq(path, retry);
|
||||
} else {
|
||||
path->flags &= ~(RTW_MESH_PATH_RESOLVING |
|
||||
RTW_MESH_PATH_RESOLVED |
|
||||
RTW_MESH_PATH_REQ_QUEUED);
|
||||
RTW_MESH_PATH_REQ_QUEUED |
|
||||
RTW_MESH_PATH_ROOT_ADD_CHK |
|
||||
RTW_MESH_PATH_PEER_AKA);
|
||||
path->exp_time = rtw_get_current_time();
|
||||
exit_critical_bh(&path->state_lock);
|
||||
if (!path->is_gate && rtw_mesh_gate_num(adapter) > 0) {
|
||||
@ -1515,10 +1601,19 @@ void rtw_mesh_work_hdl(_workitem *work)
|
||||
{
|
||||
_adapter *adapter = container_of(work, _adapter, mesh_work);
|
||||
|
||||
if (adapter->mesh_info.preq_queue_len &&
|
||||
rtw_time_after(rtw_get_current_time(),
|
||||
adapter->mesh_info.last_preq + rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPpreqMinInterval)))
|
||||
while(adapter->mesh_info.preq_queue_len) {
|
||||
if (rtw_time_after(rtw_get_current_time(),
|
||||
adapter->mesh_info.last_preq + rtw_min_preq_int_jiff(adapter)))
|
||||
/* It will consume preq_queue_len */
|
||||
rtw_mesh_path_start_discovery(adapter);
|
||||
else {
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
|
||||
rtw_mod_timer(&adapter->mesh_path_timer,
|
||||
minfo->last_preq + rtw_min_preq_int_jiff(adapter) + 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (rtw_test_and_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags))
|
||||
rtw_ieee80211_mesh_rootpath(adapter);
|
||||
|
BIN
core/mesh/rtw_mesh_hwmp.o
Normal file
BIN
core/mesh/rtw_mesh_hwmp.o
Normal file
Binary file not shown.
@ -374,6 +374,15 @@ int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath)
|
||||
ori_num_gates = minfo->num_gates;
|
||||
minfo->num_gates++;
|
||||
rtw_hlist_add_head_rcu(&mpath->gate_list, &tbl->known_gates);
|
||||
|
||||
if (ori_num_gates == 0
|
||||
|| rtw_macaddr_is_larger(mpath->dst, minfo->max_addr_gate->dst)
|
||||
) {
|
||||
minfo->max_addr_gate = mpath;
|
||||
minfo->max_addr_gate_is_larger_than_self =
|
||||
rtw_macaddr_is_larger(mpath->dst, adapter_mac_addr(mpath->adapter));
|
||||
}
|
||||
|
||||
_rtw_spinunlock(&tbl->gates_lock);
|
||||
|
||||
exit_critical_bh(&mpath->state_lock);
|
||||
@ -414,6 +423,23 @@ void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath)
|
||||
rtw_hlist_del_rcu(&mpath->gate_list);
|
||||
ori_num_gates = minfo->num_gates;
|
||||
minfo->num_gates--;
|
||||
|
||||
if (ori_num_gates == 1) {
|
||||
minfo->max_addr_gate = NULL;
|
||||
minfo->max_addr_gate_is_larger_than_self = 0;
|
||||
} else if (minfo->max_addr_gate == mpath) {
|
||||
struct rtw_mesh_path *gate, *max_addr_gate = NULL;
|
||||
rtw_hlist_node *node;
|
||||
|
||||
rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
|
||||
if (!max_addr_gate || rtw_macaddr_is_larger(gate->dst, max_addr_gate->dst))
|
||||
max_addr_gate = gate;
|
||||
}
|
||||
minfo->max_addr_gate = max_addr_gate;
|
||||
minfo->max_addr_gate_is_larger_than_self =
|
||||
rtw_macaddr_is_larger(max_addr_gate->dst, adapter_mac_addr(mpath->adapter));
|
||||
}
|
||||
|
||||
exit_critical_bh(&tbl->gates_lock);
|
||||
|
||||
if (ori_num_gates == 1)
|
||||
@ -458,6 +484,45 @@ int rtw_mesh_gate_num(_adapter *adapter)
|
||||
return adapter->mesh_info.num_gates;
|
||||
}
|
||||
|
||||
bool rtw_mesh_is_primary_gate(_adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
|
||||
return mcfg->dot11MeshGateAnnouncementProtocol
|
||||
&& !minfo->max_addr_gate_is_larger_than_self;
|
||||
}
|
||||
|
||||
void dump_known_gates(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_info *minfo = &adapter->mesh_info;
|
||||
struct rtw_mesh_table *tbl;
|
||||
struct rtw_mesh_path *gate;
|
||||
rtw_hlist_node *node;
|
||||
|
||||
if (!rtw_mesh_gate_num(adapter))
|
||||
goto exit;
|
||||
|
||||
rtw_rcu_read_lock();
|
||||
|
||||
tbl = minfo->mesh_paths;
|
||||
if (!tbl)
|
||||
goto unlock;
|
||||
|
||||
RTW_PRINT_SEL(sel, "num:%d\n", rtw_mesh_gate_num(adapter));
|
||||
|
||||
rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
|
||||
RTW_PRINT_SEL(sel, "%c"MAC_FMT"\n"
|
||||
, gate == minfo->max_addr_gate ? '*' : ' '
|
||||
, MAC_ARG(gate->dst));
|
||||
}
|
||||
|
||||
unlock:
|
||||
rtw_rcu_read_unlock();
|
||||
exit:
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
struct rtw_mesh_path *rtw_mesh_path_new(_adapter *adapter,
|
||||
const u8 *dst)
|
||||
@ -574,6 +639,34 @@ int rtw_mpp_path_add(_adapter *adapter,
|
||||
return ret;
|
||||
}
|
||||
|
||||
void dump_mpp(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct rtw_mesh_path *mpath;
|
||||
int idx = 0;
|
||||
char dst[ETH_ALEN];
|
||||
char mpp[ETH_ALEN];
|
||||
|
||||
RTW_PRINT_SEL(sel, "%-17s %-17s\n", "dst", "mpp");
|
||||
|
||||
do {
|
||||
rtw_rcu_read_lock();
|
||||
|
||||
mpath = rtw_mpp_path_lookup_by_idx(adapter, idx);
|
||||
if (mpath) {
|
||||
_rtw_memcpy(dst, mpath->dst, ETH_ALEN);
|
||||
_rtw_memcpy(mpp, mpath->mpp, ETH_ALEN);
|
||||
}
|
||||
|
||||
rtw_rcu_read_unlock();
|
||||
|
||||
if (mpath) {
|
||||
RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT"\n"
|
||||
, MAC_ARG(dst), MAC_ARG(mpp));
|
||||
}
|
||||
|
||||
idx++;
|
||||
} while (mpath);
|
||||
}
|
||||
|
||||
/**
|
||||
* rtw_mesh_plink_broken - deactivates paths and sends perr when a link breaks
|
||||
|
@ -38,6 +38,10 @@
|
||||
* already queued up, waiting for the discovery process to start.
|
||||
* @RTW_MESH_PATH_DELETED: the mesh path has been deleted and should no longer
|
||||
* be used
|
||||
* @RTW_MESH_PATH_ROOT_ADD_CHK: root additional check in root mode.
|
||||
* With this flag, It will try the last used rann_snd_addr
|
||||
* @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep
|
||||
* alive mechanism. PREQ's da = path dst
|
||||
*
|
||||
* RTW_MESH_PATH_RESOLVED is used by the mesh path timer to
|
||||
* decide when to stop or cancel the mesh path discovery.
|
||||
@ -50,6 +54,8 @@ enum rtw_mesh_path_flags {
|
||||
RTW_MESH_PATH_RESOLVED = BIT(4),
|
||||
RTW_MESH_PATH_REQ_QUEUED = BIT(5),
|
||||
RTW_MESH_PATH_DELETED = BIT(6),
|
||||
RTW_MESH_PATH_ROOT_ADD_CHK = BIT(7),
|
||||
RTW_MESH_PATH_PEER_AKA = BIT(8),
|
||||
};
|
||||
|
||||
/**
|
||||
@ -111,6 +117,9 @@ struct rtw_mesh_path {
|
||||
enum rtw_mesh_path_flags flags;
|
||||
_lock state_lock;
|
||||
u8 rann_snd_addr[ETH_ALEN];
|
||||
#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
|
||||
u8 add_chk_rann_snd_addr[ETH_ALEN];
|
||||
#endif
|
||||
u32 rann_metric;
|
||||
unsigned long last_preq_to_root;
|
||||
bool is_root;
|
||||
@ -153,6 +162,8 @@ struct rtw_mesh_path *rtw_mpp_path_lookup(_adapter *adapter,
|
||||
const u8 *dst);
|
||||
int rtw_mpp_path_add(_adapter *adapter,
|
||||
const u8 *dst, const u8 *mpp);
|
||||
void dump_mpp(void *sel, _adapter *adapter);
|
||||
|
||||
struct rtw_mesh_path *
|
||||
rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx);
|
||||
struct rtw_mesh_path *
|
||||
@ -168,6 +179,8 @@ void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath);
|
||||
bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr);
|
||||
int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath);
|
||||
int rtw_mesh_gate_num(_adapter *adapter);
|
||||
bool rtw_mesh_is_primary_gate(_adapter *adapter);
|
||||
void dump_known_gates(void *sel, _adapter *adapter);
|
||||
|
||||
void rtw_mesh_plink_broken(struct sta_info *sta);
|
||||
|
||||
|
BIN
core/mesh/rtw_mesh_pathtbl.o
Normal file
BIN
core/mesh/rtw_mesh_pathtbl.o
Normal file
Binary file not shown.
1167
core/rtw_ap.c
1167
core/rtw_ap.c
File diff suppressed because it is too large
Load Diff
@ -1071,7 +1071,7 @@ static u8 _bfer_set_entry_gid(PADAPTER adapter, u8 *addr, u8 *gid, u8 *position)
|
||||
struct beamformer_entry bfer;
|
||||
|
||||
memset(&bfer, 0, sizeof(bfer));
|
||||
memcpy(bfer.mac_addr, addr, 6);
|
||||
memcpy(bfer.mac_addr, addr, ETH_ALEN);
|
||||
|
||||
/* Parsing Membership Status Array */
|
||||
memcpy(bfer.gid_valid, gid, 8);
|
||||
@ -3047,7 +3047,7 @@ void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf)
|
||||
struct sta_info *psta = (PVOID)pbuf;
|
||||
u16 staIdx = psta->cmn.mac_id;
|
||||
|
||||
beamforming_enter(pDM_Odm, staIdx);
|
||||
beamforming_enter(pDM_Odm, staIdx, adapter_mac_addr(psta->padapter));
|
||||
break;
|
||||
}
|
||||
case BEAMFORMING_CTRL_LEAVE:
|
||||
|
@ -301,7 +301,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#ifdef SUPPORT_RX_UNI2MCAST
|
||||
static void convert_ipv6_mac_to_mc(struct sk_buff *skb)
|
||||
{
|
||||
struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
|
||||
@ -319,6 +319,7 @@ static void convert_ipv6_mac_to_mc(struct sk_buff *skb)
|
||||
#endif
|
||||
}
|
||||
#endif /* CL_IPV6_PASS */
|
||||
#endif /* SUPPORT_RX_UNI2MCAST */
|
||||
|
||||
|
||||
static __inline__ int __nat25_network_hash(unsigned char *networkAddr)
|
||||
|
@ -437,7 +437,6 @@ u8 rtw_btcoex_LPS_Leave(PADAPTER padapter)
|
||||
|
||||
if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
|
||||
rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "BTCOEX");
|
||||
LPS_RF_ON_check(padapter, 100);
|
||||
pwrpriv->bpower_saving = _FALSE;
|
||||
}
|
||||
|
||||
|
@ -26,6 +26,11 @@ void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter)
|
||||
hal_btcoex_wifionly_scan_notify(padapter);
|
||||
}
|
||||
|
||||
void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter)
|
||||
{
|
||||
hal_btcoex_wifionly_connect_notify(padapter);
|
||||
}
|
||||
|
||||
void rtw_btcoex_wifionly_hw_config(PADAPTER padapter)
|
||||
{
|
||||
hal_btcoex_wifionly_hw_config(padapter);
|
||||
|
1184
core/rtw_chplan.c
Normal file
1184
core/rtw_chplan.c
Normal file
File diff suppressed because it is too large
Load Diff
179
core/rtw_chplan.h
Normal file
179
core/rtw_chplan.h
Normal file
@ -0,0 +1,179 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2018 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __RTW_CHPLAN_H__
|
||||
#define __RTW_CHPLAN_H__
|
||||
|
||||
enum rtw_chplan_id {
|
||||
/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */
|
||||
RTW_CHPLAN_FCC = 0x00,
|
||||
RTW_CHPLAN_IC = 0x01,
|
||||
RTW_CHPLAN_ETSI = 0x02,
|
||||
RTW_CHPLAN_SPAIN = 0x03,
|
||||
RTW_CHPLAN_FRANCE = 0x04,
|
||||
RTW_CHPLAN_MKK = 0x05,
|
||||
RTW_CHPLAN_MKK1 = 0x06,
|
||||
RTW_CHPLAN_ISRAEL = 0x07,
|
||||
RTW_CHPLAN_TELEC = 0x08,
|
||||
RTW_CHPLAN_GLOBAL_DOAMIN = 0x09,
|
||||
RTW_CHPLAN_WORLD_WIDE_13 = 0x0A,
|
||||
RTW_CHPLAN_TAIWAN = 0x0B,
|
||||
RTW_CHPLAN_CHINA = 0x0C,
|
||||
RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D,
|
||||
RTW_CHPLAN_KOREA = 0x0E,
|
||||
RTW_CHPLAN_TURKEY = 0x0F,
|
||||
RTW_CHPLAN_JAPAN = 0x10,
|
||||
RTW_CHPLAN_FCC_NO_DFS = 0x11,
|
||||
RTW_CHPLAN_JAPAN_NO_DFS = 0x12,
|
||||
RTW_CHPLAN_WORLD_WIDE_5G = 0x13,
|
||||
RTW_CHPLAN_TAIWAN_NO_DFS = 0x14,
|
||||
|
||||
/* ===== 0x20 ~ 0x7F, new channel plan ===== */
|
||||
RTW_CHPLAN_WORLD_NULL = 0x20,
|
||||
RTW_CHPLAN_ETSI1_NULL = 0x21,
|
||||
RTW_CHPLAN_FCC1_NULL = 0x22,
|
||||
RTW_CHPLAN_MKK1_NULL = 0x23,
|
||||
RTW_CHPLAN_ETSI2_NULL = 0x24,
|
||||
RTW_CHPLAN_FCC1_FCC1 = 0x25,
|
||||
RTW_CHPLAN_WORLD_ETSI1 = 0x26,
|
||||
RTW_CHPLAN_MKK1_MKK1 = 0x27,
|
||||
RTW_CHPLAN_WORLD_KCC1 = 0x28,
|
||||
RTW_CHPLAN_WORLD_FCC2 = 0x29,
|
||||
RTW_CHPLAN_FCC2_NULL = 0x2A,
|
||||
RTW_CHPLAN_IC1_IC2 = 0x2B,
|
||||
RTW_CHPLAN_MKK2_NULL = 0x2C,
|
||||
RTW_CHPLAN_WORLD_CHILE1= 0x2D,
|
||||
RTW_CHPLAN_WORLD1_WORLD1 = 0x2E,
|
||||
RTW_CHPLAN_WORLD_CHILE2 = 0x2F,
|
||||
RTW_CHPLAN_WORLD_FCC3 = 0x30,
|
||||
RTW_CHPLAN_WORLD_FCC4 = 0x31,
|
||||
RTW_CHPLAN_WORLD_FCC5 = 0x32,
|
||||
RTW_CHPLAN_WORLD_FCC6 = 0x33,
|
||||
RTW_CHPLAN_FCC1_FCC7 = 0x34,
|
||||
RTW_CHPLAN_WORLD_ETSI2 = 0x35,
|
||||
RTW_CHPLAN_WORLD_ETSI3 = 0x36,
|
||||
RTW_CHPLAN_MKK1_MKK2 = 0x37,
|
||||
RTW_CHPLAN_MKK1_MKK3 = 0x38,
|
||||
RTW_CHPLAN_FCC1_NCC1 = 0x39,
|
||||
RTW_CHPLAN_ETSI1_ETSI1 = 0x3A,
|
||||
RTW_CHPLAN_ETSI1_ACMA1 = 0x3B,
|
||||
RTW_CHPLAN_ETSI1_ETSI6 = 0x3C,
|
||||
RTW_CHPLAN_ETSI1_ETSI12 = 0x3D,
|
||||
RTW_CHPLAN_KCC1_KCC2 = 0x3E,
|
||||
RTW_CHPLAN_FCC1_NCC2 = 0x40,
|
||||
RTW_CHPLAN_GLOBAL_NULL = 0x41,
|
||||
RTW_CHPLAN_ETSI1_ETSI4 = 0x42,
|
||||
RTW_CHPLAN_FCC1_FCC2 = 0x43,
|
||||
RTW_CHPLAN_FCC1_NCC3 = 0x44,
|
||||
RTW_CHPLAN_WORLD_ACMA1 = 0x45,
|
||||
RTW_CHPLAN_FCC1_FCC8 = 0x46,
|
||||
RTW_CHPLAN_WORLD_ETSI6 = 0x47,
|
||||
RTW_CHPLAN_WORLD_ETSI7 = 0x48,
|
||||
RTW_CHPLAN_WORLD_ETSI8 = 0x49,
|
||||
RTW_CHPLAN_WORLD_ETSI9 = 0x50,
|
||||
RTW_CHPLAN_WORLD_ETSI10 = 0x51,
|
||||
RTW_CHPLAN_WORLD_ETSI11 = 0x52,
|
||||
RTW_CHPLAN_FCC1_NCC4 = 0x53,
|
||||
RTW_CHPLAN_WORLD_ETSI12 = 0x54,
|
||||
RTW_CHPLAN_FCC1_FCC9 = 0x55,
|
||||
RTW_CHPLAN_WORLD_ETSI13 = 0x56,
|
||||
RTW_CHPLAN_FCC1_FCC10 = 0x57,
|
||||
RTW_CHPLAN_MKK2_MKK4 = 0x58,
|
||||
RTW_CHPLAN_WORLD_ETSI14 = 0x59,
|
||||
RTW_CHPLAN_FCC1_FCC5 = 0x60,
|
||||
RTW_CHPLAN_FCC2_FCC7 = 0x61,
|
||||
RTW_CHPLAN_FCC2_FCC1 = 0x62,
|
||||
RTW_CHPLAN_WORLD_ETSI15 = 0x63,
|
||||
RTW_CHPLAN_MKK2_MKK5 = 0x64,
|
||||
RTW_CHPLAN_ETSI1_ETSI16 = 0x65,
|
||||
RTW_CHPLAN_FCC1_FCC14 = 0x66,
|
||||
RTW_CHPLAN_FCC1_FCC12 = 0x67,
|
||||
RTW_CHPLAN_FCC2_FCC14 = 0x68,
|
||||
RTW_CHPLAN_FCC2_FCC12 = 0x69,
|
||||
RTW_CHPLAN_ETSI1_ETSI17 = 0x6A,
|
||||
RTW_CHPLAN_WORLD_FCC16 = 0x6B,
|
||||
RTW_CHPLAN_WORLD_FCC13 = 0x6C,
|
||||
RTW_CHPLAN_FCC2_FCC15 = 0x6D,
|
||||
RTW_CHPLAN_WORLD_FCC12 = 0x6E,
|
||||
RTW_CHPLAN_NULL_ETSI8 = 0x6F,
|
||||
RTW_CHPLAN_NULL_ETSI18 = 0x70,
|
||||
RTW_CHPLAN_NULL_ETSI17 = 0x71,
|
||||
RTW_CHPLAN_NULL_ETSI19 = 0x72,
|
||||
RTW_CHPLAN_WORLD_FCC7 = 0x73,
|
||||
RTW_CHPLAN_FCC2_FCC17 = 0x74,
|
||||
RTW_CHPLAN_WORLD_ETSI20 = 0x75,
|
||||
RTW_CHPLAN_FCC2_FCC11 = 0x76,
|
||||
RTW_CHPLAN_WORLD_ETSI21 = 0x77,
|
||||
RTW_CHPLAN_FCC1_FCC18 = 0x78,
|
||||
RTW_CHPLAN_MKK2_MKK1 = 0x79,
|
||||
|
||||
RTW_CHPLAN_MAX,
|
||||
RTW_CHPLAN_REALTEK_DEFINE = 0x7F,
|
||||
RTW_CHPLAN_UNSPECIFIED = 0xFF,
|
||||
};
|
||||
|
||||
u8 rtw_chplan_get_default_regd(u8 id);
|
||||
bool rtw_chplan_is_empty(u8 id);
|
||||
#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan))
|
||||
#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20)
|
||||
|
||||
struct _RT_CHANNEL_INFO;
|
||||
u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set);
|
||||
|
||||
#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF)
|
||||
|
||||
#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */
|
||||
#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */
|
||||
#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */
|
||||
#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */
|
||||
#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */
|
||||
#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */
|
||||
#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */
|
||||
#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */
|
||||
#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */
|
||||
#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */
|
||||
#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */
|
||||
|
||||
struct country_chplan {
|
||||
char alpha2[2];
|
||||
u8 chplan;
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
u8 en_11ac;
|
||||
#endif
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
u16 def_module_flags; /* RTW_MODULE_RTLXXX */
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac)
|
||||
#else
|
||||
#define COUNTRY_CHPLAN_EN_11AC(_ent) 0
|
||||
#endif
|
||||
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags)
|
||||
#else
|
||||
#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0
|
||||
#endif
|
||||
|
||||
const struct country_chplan *rtw_get_chplan_from_country(const char *country_code);
|
||||
|
||||
void dump_country_chplan(void *sel, const struct country_chplan *ent);
|
||||
void dump_country_chplan_map(void *sel);
|
||||
void dump_chplan_id_list(void *sel);
|
||||
void dump_chplan_test(void *sel);
|
||||
void dump_chplan_ver(void *sel);
|
||||
|
||||
#endif /* __RTW_CHPLAN_H__ */
|
1244
core/rtw_cmd.c
1244
core/rtw_cmd.c
File diff suppressed because it is too large
Load Diff
1285
core/rtw_debug.c
1285
core/rtw_debug.c
File diff suppressed because it is too large
Load Diff
@ -127,6 +127,19 @@ int rtw_get_bit_value_from_ieee_value(u8 val)
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
uint rtw_get_cckrate_size(u8 *rate, u32 rate_length)
|
||||
{
|
||||
int i = 0;
|
||||
while(i < rate_length){
|
||||
RTW_DBG("%s, rate[%d]=%u\n", __FUNCTION__, i, rate[i]);
|
||||
if (((rate[i] & 0x7f) == 2) || ((rate[i] & 0x7f) == 4) ||
|
||||
((rate[i] & 0x7f) == 11) || ((rate[i] & 0x7f) == 22))
|
||||
i++;
|
||||
else
|
||||
break;
|
||||
}
|
||||
return i;
|
||||
}
|
||||
|
||||
uint rtw_is_cckrates_included(u8 *rate)
|
||||
{
|
||||
@ -381,6 +394,52 @@ exit:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Returns: remove size OR _FAIL: not updated*/
|
||||
int rtw_remove_ie_g_rate(u8 *ie, uint *ie_len, uint offset, u8 eid)
|
||||
{
|
||||
int ret = _FAIL;
|
||||
u8 *tem_target_ie;
|
||||
u8 *target_ie;
|
||||
u32 target_ielen,temp_target_ielen,cck_rate_size,rm_size;
|
||||
u8 *start;
|
||||
uint search_len;
|
||||
u8 *remain_ies;
|
||||
uint remain_len;
|
||||
if (!ie || !ie_len || *ie_len <= offset)
|
||||
goto exit;
|
||||
|
||||
start = ie + offset;
|
||||
search_len = *ie_len - offset;
|
||||
|
||||
while (1) {
|
||||
tem_target_ie=rtw_get_ie(start,eid,&temp_target_ielen,search_len);
|
||||
|
||||
/*if(tem_target_ie)
|
||||
RTW_INFO("%s, tem_target_ie=%u\n", __FUNCTION__,*tem_target_ie);*/
|
||||
if (tem_target_ie && temp_target_ielen) {
|
||||
cck_rate_size = rtw_get_cckrate_size((tem_target_ie+2), temp_target_ielen);
|
||||
rm_size = temp_target_ielen - cck_rate_size;
|
||||
RTW_DBG("%s,cck_rate_size=%u rm_size=%u\n", __FUNCTION__, cck_rate_size, rm_size);
|
||||
temp_target_ielen=temp_target_ielen + 2;/*org size of Supposrted Rates(include id + length)*/
|
||||
/*RTW_INFO("%s, temp_target_ielen=%u\n", __FUNCTION__,temp_target_ielen);*/
|
||||
remain_ies = tem_target_ie + temp_target_ielen;
|
||||
remain_len = search_len - (remain_ies - start);
|
||||
target_ielen=cck_rate_size;/*discount g mode rate 6, 9 12,18Mbps,id , length*/
|
||||
*(tem_target_ie+1)=target_ielen;/*set new length to Supposrted Rates*/
|
||||
target_ie=tem_target_ie+target_ielen + 2;/*set target ie to address of rate 6Mbps */
|
||||
|
||||
_rtw_memmove(target_ie, remain_ies, remain_len);
|
||||
*ie_len = *ie_len - rm_size;
|
||||
ret = rm_size;
|
||||
|
||||
start = target_ie;
|
||||
search_len = remain_len;
|
||||
} else
|
||||
break;
|
||||
}
|
||||
exit:
|
||||
return ret;
|
||||
}
|
||||
void rtw_set_supported_rate(u8 *SupportedRates, uint mode)
|
||||
{
|
||||
|
||||
@ -496,7 +555,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv)
|
||||
|
||||
#ifdef CONFIG_80211N_HT
|
||||
/* HT Cap. */
|
||||
if (((pregistrypriv->wireless_mode & WIRELESS_11_5N) || (pregistrypriv->wireless_mode & WIRELESS_11_24N))
|
||||
if (is_supported_ht(pregistrypriv->wireless_mode)
|
||||
&& (pregistrypriv->ht_enable == _TRUE)) {
|
||||
/* todo: */
|
||||
}
|
||||
@ -677,7 +736,6 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis
|
||||
|
||||
int rtw_rsne_info_parse(const u8 *ie, uint ie_len, struct rsne_info *info)
|
||||
{
|
||||
int i;
|
||||
const u8 *pos = ie;
|
||||
u16 cnt;
|
||||
|
||||
@ -819,7 +877,7 @@ exit:
|
||||
int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len)
|
||||
{
|
||||
int len = 0;
|
||||
u8 authmode, i;
|
||||
u8 authmode;
|
||||
uint cnt;
|
||||
u8 wapi_oui1[4] = {0x0, 0x14, 0x72, 0x01};
|
||||
u8 wapi_oui2[4] = {0x0, 0x14, 0x72, 0x02};
|
||||
@ -862,7 +920,7 @@ int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len)
|
||||
|
||||
int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len)
|
||||
{
|
||||
u8 authmode, sec_idx, i;
|
||||
u8 authmode, sec_idx;
|
||||
u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
|
||||
uint cnt;
|
||||
|
||||
@ -1543,10 +1601,6 @@ void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len)
|
||||
|
||||
void dump_ht_cap_ie(void *sel, const u8 *ie, u32 ie_len)
|
||||
{
|
||||
const u8 *pos = ie;
|
||||
u16 id;
|
||||
u16 len;
|
||||
|
||||
const u8 *ht_cap_ie;
|
||||
sint ht_cap_ielen;
|
||||
|
||||
@ -1580,10 +1634,6 @@ void dump_ht_op_ie_content(void *sel, const u8 *buf, u32 buf_len)
|
||||
|
||||
void dump_ht_op_ie(void *sel, const u8 *ie, u32 ie_len)
|
||||
{
|
||||
const u8 *pos = ie;
|
||||
u16 id;
|
||||
u16 len;
|
||||
|
||||
const u8 *ht_op_ie;
|
||||
sint ht_op_ielen;
|
||||
|
||||
@ -1841,7 +1891,7 @@ u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len)
|
||||
PNDIS_802_11_VARIABLE_IEs pIE;
|
||||
u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 };
|
||||
int i = 0;
|
||||
int j = 0, len = 0;
|
||||
int len = 0;
|
||||
|
||||
while (i < in_len) {
|
||||
pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie + i);
|
||||
|
@ -419,9 +419,13 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int
|
||||
|
||||
ret = _rtw_write_port(adapter, addr, cnt, pmem);
|
||||
|
||||
if (ret == _SUCCESS)
|
||||
if (ret == _SUCCESS) {
|
||||
ret = rtw_sctx_wait(&sctx, __func__);
|
||||
|
||||
if (ret != _SUCCESS)
|
||||
pxmitbuf->sctx = NULL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -42,7 +42,9 @@ u8 rtw_validate_bssid(u8 *bssid)
|
||||
|
||||
u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid)
|
||||
{
|
||||
#ifdef CONFIG_VALIDATE_SSID
|
||||
u8 i;
|
||||
#endif
|
||||
u8 ret = _TRUE;
|
||||
|
||||
|
||||
@ -106,10 +108,17 @@ u8 rtw_do_join(_adapter *padapter)
|
||||
if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
|
||||
|| rtw_to_roam(padapter) > 0
|
||||
) {
|
||||
u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
|
||||
|
||||
if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC) ){
|
||||
/* submit site_survey_cmd */
|
||||
ret = rtw_sitesurvey_cmd(padapter, &parm);
|
||||
if (_SUCCESS != ret) {
|
||||
if (_SUCCESS != ret)
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
} else {
|
||||
/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY)*/
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
ret = _FAIL;
|
||||
}
|
||||
} else {
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
@ -155,26 +164,22 @@ u8 rtw_do_join(_adapter *padapter)
|
||||
/* can't associate ; reset under-linking */
|
||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
|
||||
|
||||
#if 0
|
||||
if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) {
|
||||
if (_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) {
|
||||
/* for funk to do roaming */
|
||||
/* funk will reconnect, but funk will not sitesurvey before reconnect */
|
||||
if (pmlmepriv->sitesurveyctrl.traffic_busy == _FALSE)
|
||||
rtw_sitesurvey_cmd(padapter, &parm);
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
/* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */
|
||||
/* we try to issue sitesurvey firstly */
|
||||
if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
|
||||
|| rtw_to_roam(padapter) > 0
|
||||
) {
|
||||
/* RTW_INFO("rtw_do_join() when no desired bss in scanning queue\n"); */
|
||||
u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
|
||||
|
||||
if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC)){
|
||||
/* RTW_INFO(("rtw_do_join() when no desired bss in scanning queue\n"); */
|
||||
ret = rtw_sitesurvey_cmd(padapter, &parm);
|
||||
if (_SUCCESS != ret) {
|
||||
if (_SUCCESS != ret)
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
} else {
|
||||
/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY) {
|
||||
} else {*/
|
||||
ret = _FAIL;
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
}
|
||||
} else {
|
||||
@ -307,7 +312,7 @@ u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid)
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
|
||||
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
|
||||
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
|
||||
@ -344,7 +349,6 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
|
||||
{
|
||||
_irqL irqL;
|
||||
u8 status = _SUCCESS;
|
||||
u32 cur_time = 0;
|
||||
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct wlan_network *pnetwork = &pmlmepriv->cur_network;
|
||||
@ -379,7 +383,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
|
||||
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
|
||||
@ -400,7 +404,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
|
||||
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
|
||||
@ -442,7 +446,6 @@ u8 rtw_set_802_11_connect(_adapter *padapter, u8 *bssid, NDIS_802_11_SSID *ssid)
|
||||
{
|
||||
_irqL irqL;
|
||||
u8 status = _SUCCESS;
|
||||
u32 cur_time = 0;
|
||||
bool bssid_valid = _TRUE;
|
||||
bool ssid_valid = _TRUE;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
@ -538,7 +541,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
|
||||
|
||||
if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
|
||||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
|
||||
if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) {
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
|
||||
@ -612,7 +615,7 @@ u8 rtw_set_802_11_disassociate(_adapter *padapter)
|
||||
rtw_disassoc_cmd(padapter, 0, 0);
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
/* modify for CONFIG_IEEE80211W, none 11w can use it */
|
||||
rtw_free_assoc_resources_cmd(padapter);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
if (_FAIL == rtw_pwr_wakeup(padapter))
|
||||
RTW_INFO("%s(): rtw_pwr_wakeup fail !!!\n", __FUNCTION__);
|
||||
}
|
||||
@ -768,10 +771,13 @@ exit:
|
||||
*/
|
||||
u16 rtw_get_cur_max_rate(_adapter *adapter)
|
||||
{
|
||||
int j;
|
||||
int i = 0;
|
||||
u16 rate = 0, max_rate = 0;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network;
|
||||
int sta_bssrate_len = 0;
|
||||
unsigned char sta_bssrate[NumRates];
|
||||
struct sta_info *psta = NULL;
|
||||
u8 short_GI = 0;
|
||||
#ifdef CONFIG_80211N_HT
|
||||
@ -811,16 +817,38 @@ u16 rtw_get_cur_max_rate(_adapter *adapter)
|
||||
else
|
||||
#endif /* CONFIG_80211N_HT */
|
||||
{
|
||||
/*station mode show :station && ap support rate; softap :show ap support rate*/
|
||||
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
|
||||
get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/
|
||||
|
||||
|
||||
while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) {
|
||||
rate = pcur_bss->SupportedRates[i] & 0x7F;
|
||||
rate = pcur_bss->SupportedRates[i] & 0x7F;/*AP support rates*/
|
||||
/*RTW_INFO("%s rate=%02X \n", __func__, rate);*/
|
||||
|
||||
/*check STA support rate or not */
|
||||
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
|
||||
for (j = 0; j < sta_bssrate_len; j++) {
|
||||
/* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */
|
||||
if ((rate | IEEE80211_BASIC_RATE_MASK)
|
||||
== (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) {
|
||||
if (rate > max_rate) {
|
||||
max_rate = rate;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
|
||||
if (rate > max_rate)
|
||||
max_rate = rate;
|
||||
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
max_rate = max_rate * 10 / 2;
|
||||
}
|
||||
|
||||
return max_rate;
|
||||
}
|
||||
|
||||
@ -850,9 +878,6 @@ int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode)
|
||||
*/
|
||||
int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan)
|
||||
{
|
||||
struct registry_priv *pregistrypriv = &adapter->registrypriv;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
|
||||
/* handle by cmd_thread to sync with scan operation */
|
||||
return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1);
|
||||
}
|
||||
|
154
core/rtw_mi.c
154
core/rtw_mi.c
@ -27,6 +27,7 @@ void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw)
|
||||
iface_state->union_offset = offset;
|
||||
}
|
||||
|
||||
#ifdef DBG_IFACE_STATUS
|
||||
#ifdef CONFIG_P2P
|
||||
static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter)
|
||||
{
|
||||
@ -46,6 +47,8 @@ static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter)
|
||||
return p2p_listen_scan_state;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter)
|
||||
{
|
||||
u8 rst = _TRUE;
|
||||
@ -104,9 +107,8 @@ u8 rtw_mi_stayin_union_band_chk(_adapter *adapter)
|
||||
}
|
||||
|
||||
/* Find union about ch, bw, ch_offset of all linked/linking interfaces */
|
||||
int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self)
|
||||
int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
_adapter *iface;
|
||||
struct mlme_ext_priv *mlmeext;
|
||||
int i;
|
||||
@ -124,6 +126,9 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
if (!iface || !(ifbmp & BIT(iface->iface_id)))
|
||||
continue;
|
||||
|
||||
mlmeext = &iface->mlmeextpriv;
|
||||
|
||||
if (!check_fwstate(&iface->mlmepriv, _FW_LINKED | _FW_UNDER_LINKING))
|
||||
@ -132,9 +137,6 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
|
||||
if (check_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING))
|
||||
continue;
|
||||
|
||||
if (include_self == _FALSE && adapter == iface)
|
||||
continue;
|
||||
|
||||
if (num == 0) {
|
||||
ch_ret = mlmeext->cur_channel;
|
||||
bw_ret = mlmeext->cur_bwmode;
|
||||
@ -173,22 +175,17 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
|
||||
|
||||
inline int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
|
||||
{
|
||||
return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 1);
|
||||
return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, ch, bw, offset);
|
||||
}
|
||||
|
||||
inline int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
|
||||
{
|
||||
return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 0);
|
||||
return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), ch, bw, offset);
|
||||
}
|
||||
|
||||
#define MI_STATUS_SELF_ONLY 0
|
||||
#define MI_STATUS_OTHERS_ONLY 1
|
||||
#define MI_STATUS_ALL 2
|
||||
|
||||
/* For now, not return union_ch/bw/offset */
|
||||
void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
|
||||
void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
_adapter *iface;
|
||||
int i;
|
||||
|
||||
@ -196,10 +193,7 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
|
||||
if (target_sel == MI_STATUS_SELF_ONLY && iface != adapter)
|
||||
continue;
|
||||
if (target_sel == MI_STATUS_OTHERS_ONLY && iface == adapter)
|
||||
if (!iface || !(ifbmp & BIT(iface->iface_id)))
|
||||
continue;
|
||||
|
||||
if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) {
|
||||
@ -211,6 +205,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
|
||||
if (iface->tdlsinfo.link_established == _TRUE)
|
||||
MSTATE_TDLS_LD_NUM(mstate)++;
|
||||
#endif
|
||||
#ifdef CONFIG_P2P
|
||||
if (MLME_IS_GC(iface))
|
||||
MSTATE_P2P_GC_NUM(mstate)++;
|
||||
#endif
|
||||
}
|
||||
if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING) == _TRUE)
|
||||
MSTATE_STA_LG_NUM(mstate)++;
|
||||
@ -221,6 +219,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
|
||||
MSTATE_AP_NUM(mstate)++;
|
||||
if (iface->stapriv.asoc_sta_count > 2)
|
||||
MSTATE_AP_LD_NUM(mstate)++;
|
||||
#ifdef CONFIG_P2P
|
||||
if (MLME_IS_GO(iface))
|
||||
MSTATE_P2P_GO_NUM(mstate)++;
|
||||
#endif
|
||||
} else
|
||||
MSTATE_AP_STARTING_NUM(mstate)++;
|
||||
#endif
|
||||
@ -262,23 +264,26 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
|
||||
MSTATE_ROCH_NUM(mstate)++;
|
||||
#endif
|
||||
#endif /* CONFIG_IOCTL_CFG80211 */
|
||||
|
||||
#ifdef CONFIG_P2P
|
||||
if (MLME_IS_PD(iface))
|
||||
MSTATE_P2P_DV_NUM(mstate)++;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
inline void rtw_mi_status(_adapter *adapter, struct mi_state *mstate)
|
||||
{
|
||||
return _rtw_mi_status(adapter, mstate, MI_STATUS_ALL);
|
||||
return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, mstate);
|
||||
}
|
||||
|
||||
inline void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate)
|
||||
{
|
||||
return _rtw_mi_status(adapter, mstate, MI_STATUS_OTHERS_ONLY);
|
||||
return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), mstate);
|
||||
}
|
||||
|
||||
inline void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate)
|
||||
{
|
||||
return _rtw_mi_status(adapter, mstate, MI_STATUS_SELF_ONLY);
|
||||
return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), BIT(adapter->iface_id), mstate);
|
||||
}
|
||||
|
||||
/* For now, not handle union_ch/bw/offset */
|
||||
@ -332,7 +337,9 @@ void dump_mi_status(void *sel, struct dvobj_priv *dvobj)
|
||||
RTW_PRINT_SEL(sel, "linked_mesh_num:%d\n", DEV_MESH_LD_NUM(dvobj));
|
||||
#endif
|
||||
#ifdef CONFIG_P2P
|
||||
RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", rtw_mi_stay_in_p2p_mode(dvobj_get_primary_adapter(dvobj)));
|
||||
RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", DEV_P2P_DV_NUM(dvobj));
|
||||
RTW_PRINT_SEL(sel, "p2p_gc_num:%d\n", DEV_P2P_GC_NUM(dvobj));
|
||||
RTW_PRINT_SEL(sel, "p2p_go_num:%d\n", DEV_P2P_GO_NUM(dvobj));
|
||||
#endif
|
||||
RTW_PRINT_SEL(sel, "scan_num:%d\n", DEV_SCAN_NUM(dvobj));
|
||||
RTW_PRINT_SEL(sel, "under_wps_num:%d\n", DEV_WPS_NUM(dvobj));
|
||||
@ -360,9 +367,7 @@ inline void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state)
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
struct mi_state *iface_state = &dvobj->iface_state;
|
||||
struct mi_state tmp_mstate;
|
||||
u8 i;
|
||||
u8 u_ch, u_offset, u_bw;
|
||||
_adapter *iface;
|
||||
|
||||
if (state == WIFI_MONITOR_STATE
|
||||
|| state == 0xFFFFFFFF
|
||||
@ -748,6 +753,30 @@ void rtw_mi_buddy_intf_stop(_adapter *adapter)
|
||||
_rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_intf_stop);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_NEW_NETDEV_HDL
|
||||
static u8 _rtw_mi_hal_iface_init(_adapter *padapter, void *data)
|
||||
{
|
||||
if (rtw_hal_iface_init(padapter) == _SUCCESS)
|
||||
return _TRUE;
|
||||
return _FALSE;
|
||||
}
|
||||
u8 rtw_mi_hal_iface_init(_adapter *padapter)
|
||||
{
|
||||
int i;
|
||||
_adapter *iface;
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
||||
|
||||
u8 ret = _TRUE;
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
if (iface && iface->netif_up)
|
||||
rtw_hal_iface_init(padapter);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static u8 _rtw_mi_suspend_free_assoc_resource(_adapter *padapter, void *data)
|
||||
{
|
||||
return rtw_suspend_free_assoc_resource(padapter);
|
||||
@ -864,7 +893,6 @@ u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data)
|
||||
if (check_sc_interval) {
|
||||
/* Miracast can't do AP scan*/
|
||||
passtime = rtw_get_passing_time_ms(pmlmepriv->lastscantime);
|
||||
pmlmepriv->lastscantime = rtw_get_current_time();
|
||||
if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) {
|
||||
RTW_INFO(ADPT_FMT" bBusyTraffic == _TRUE\n", ADPT_ARG(padapter));
|
||||
return _TRUE;
|
||||
@ -1089,20 +1117,6 @@ u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter)
|
||||
return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dynamic_check_timer_handlder);
|
||||
}
|
||||
|
||||
static u8 _rtw_mi_dev_unload(_adapter *adapter, void *data)
|
||||
{
|
||||
rtw_dev_unload(adapter);
|
||||
return _TRUE;
|
||||
}
|
||||
u8 rtw_mi_dev_unload(_adapter *padapter)
|
||||
{
|
||||
return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_dev_unload);
|
||||
}
|
||||
u8 rtw_mi_buddy_dev_unload(_adapter *padapter)
|
||||
{
|
||||
return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dev_unload);
|
||||
}
|
||||
|
||||
static u8 _rtw_mi_dynamic_chk_wk_hdl(_adapter *adapter, void *data)
|
||||
{
|
||||
rtw_iface_dynamic_chk_wk_hdl(adapter);
|
||||
@ -1176,7 +1190,7 @@ static u8 _rtw_mi_tx_beacon_hdl(_adapter *adapter, void *data)
|
||||
) {
|
||||
adapter->mlmepriv.update_bcn = _TRUE;
|
||||
#ifndef CONFIG_INTERRUPT_BASED_TXBCN
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING)
|
||||
tx_beacon_hdl(adapter, NULL);
|
||||
#endif
|
||||
#endif
|
||||
@ -1262,7 +1276,7 @@ _adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id)
|
||||
return dvobj->padapters[iface_id];
|
||||
}
|
||||
|
||||
_adapter *rtw_get_iface_by_macddr(_adapter *padapter, u8 *mac_addr)
|
||||
_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr)
|
||||
{
|
||||
int i;
|
||||
_adapter *iface = NULL;
|
||||
@ -1354,9 +1368,10 @@ void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union
|
||||
static s32 _rtw_mi_buddy_clone_bcmc_packet(_adapter *adapter, union recv_frame *precvframe, u8 *pphy_status, union recv_frame *pcloneframe)
|
||||
{
|
||||
s32 ret = _SUCCESS;
|
||||
#ifdef CONFIG_SKB_ALLOCATED
|
||||
u8 *pbuf = precvframe->u.hdr.rx_data;
|
||||
#endif
|
||||
struct rx_pkt_attrib *pattrib = NULL;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
|
||||
|
||||
if (pcloneframe) {
|
||||
pcloneframe->u.hdr.adapter = adapter;
|
||||
@ -1451,6 +1466,45 @@ _adapter *rtw_mi_get_ap_adapter(_adapter *padapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
int i;
|
||||
_adapter *iface = NULL;
|
||||
u8 ifbmp = 0;
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
if (!iface)
|
||||
continue;
|
||||
|
||||
if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface))
|
||||
ifbmp |= BIT(i);
|
||||
}
|
||||
|
||||
return ifbmp;
|
||||
}
|
||||
|
||||
u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
int i;
|
||||
_adapter *iface = NULL;
|
||||
u8 ifbmp = 0;
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
if (!iface)
|
||||
continue;
|
||||
|
||||
if (CHK_MLME_STATE(iface, WIFI_AP_STATE | WIFI_MESH_STATE)
|
||||
&& MLME_IS_ASOC(iface))
|
||||
ifbmp |= BIT(i);
|
||||
}
|
||||
|
||||
return ifbmp;
|
||||
}
|
||||
|
||||
void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b)
|
||||
{
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
@ -1476,3 +1530,19 @@ void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b)
|
||||
#endif
|
||||
}
|
||||
|
||||
u8 rtw_mi_get_assoc_if_num(_adapter *adapter)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
u8 n_assoc_iface = 0;
|
||||
#if 1
|
||||
u8 i;
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
|
||||
n_assoc_iface++;
|
||||
}
|
||||
#else
|
||||
n_assoc_iface = DEV_STA_LD_NUM(dvobj) + DEV_AP_NUM(dvobj) + DEV_ADHOC_NUM(dvobj) + DEV_MESH_NUM(dvobj);
|
||||
#endif
|
||||
return n_assoc_iface;
|
||||
}
|
||||
|
483
core/rtw_mlme.c
483
core/rtw_mlme.c
@ -27,10 +27,6 @@ void rtw_init_mlme_timer(_adapter *padapter)
|
||||
rtw_init_timer(&(pmlmepriv->assoc_timer), padapter, rtw_join_timeout_handler, padapter);
|
||||
rtw_init_timer(&(pmlmepriv->scan_to_timer), padapter, rtw_scan_timeout_handler, padapter);
|
||||
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
rtw_init_timer(&(pmlmepriv->dfs_master_timer), padapter, rtw_dfs_master_timer_hdl, padapter);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SET_SCAN_DENY_TIMER
|
||||
rtw_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter, rtw_set_scan_deny_timer_hdl, padapter);
|
||||
#endif
|
||||
@ -47,6 +43,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
u8 *pbuf;
|
||||
struct wlan_network *pnetwork;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
|
||||
sint res = _SUCCESS;
|
||||
|
||||
|
||||
@ -65,11 +62,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
pmlmepriv->nic_hdl = (u8 *)padapter;
|
||||
|
||||
pmlmepriv->pscanned = NULL;
|
||||
/*pmlmepriv->fw_state = WIFI_STATION_STATE; */ /*Must sync with rtw_wdev_alloc()*/
|
||||
/*init_fwstate(pmlmepriv, WIFI_STATION_STATE);*/
|
||||
init_fwstate(pmlmepriv, WIFI_NULL_STATE);/*assigned interface role(STA/AP) must after execute set_opmode*/
|
||||
|
||||
/* wdev->iftype = NL80211_IFTYPE_STATION*/
|
||||
init_fwstate(pmlmepriv, WIFI_STATION_STATE);
|
||||
pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown;
|
||||
pmlmepriv->scan_mode = SCAN_ACTIVE; /* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */
|
||||
|
||||
@ -81,7 +74,15 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
|
||||
_rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID));
|
||||
|
||||
pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network)));
|
||||
if (padapter->registrypriv.max_bss_cnt != 0)
|
||||
pmlmepriv->max_bss_cnt = padapter->registrypriv.max_bss_cnt;
|
||||
else if (rfctl->max_chan_nums <= MAX_CHANNEL_NUM_2G)
|
||||
pmlmepriv->max_bss_cnt = MAX_BSS_CNT;
|
||||
else
|
||||
pmlmepriv->max_bss_cnt = MAX_BSS_CNT + MAX_BSS_CNT;
|
||||
|
||||
|
||||
pbuf = rtw_zvmalloc(pmlmepriv->max_bss_cnt * (sizeof(struct wlan_network)));
|
||||
|
||||
if (pbuf == NULL) {
|
||||
res = _FAIL;
|
||||
@ -91,7 +92,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
|
||||
pnetwork = (struct wlan_network *)pbuf;
|
||||
|
||||
for (i = 0; i < MAX_BSS_CNT; i++) {
|
||||
for (i = 0; i < pmlmepriv->max_bss_cnt; i++) {
|
||||
_rtw_init_listhead(&(pnetwork->list));
|
||||
|
||||
rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue));
|
||||
@ -110,7 +111,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
#ifdef CONFIG_LAYER2_ROAMING
|
||||
#define RTW_ROAM_SCAN_RESULT_EXP_MS (5*1000)
|
||||
#define RTW_ROAM_RSSI_DIFF_TH 10
|
||||
#define RTW_ROAM_SCAN_INTERVAL_MS (10*1000)
|
||||
#define RTW_ROAM_SCAN_INTERVAL (5) /* 5*(2 second)*/
|
||||
#define RTW_ROAM_RSSI_THRESHOLD 70
|
||||
|
||||
pmlmepriv->roam_flags = 0
|
||||
@ -125,9 +126,10 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
|
||||
|
||||
pmlmepriv->roam_scanr_exp_ms = RTW_ROAM_SCAN_RESULT_EXP_MS;
|
||||
pmlmepriv->roam_rssi_diff_th = RTW_ROAM_RSSI_DIFF_TH;
|
||||
pmlmepriv->roam_scan_int_ms = RTW_ROAM_SCAN_INTERVAL_MS;
|
||||
pmlmepriv->roam_scan_int = RTW_ROAM_SCAN_INTERVAL;
|
||||
pmlmepriv->roam_rssi_threshold = RTW_ROAM_RSSI_THRESHOLD;
|
||||
pmlmepriv->need_to_roam = _FALSE;
|
||||
pmlmepriv->last_roaming = rtw_get_current_time();
|
||||
#endif /* CONFIG_LAYER2_ROAMING */
|
||||
|
||||
#ifdef CONFIG_RTW_80211R
|
||||
@ -295,6 +297,7 @@ exit:
|
||||
|
||||
void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
|
||||
{
|
||||
_adapter *adapter = mlme_to_adapter(pmlmepriv);
|
||||
if (NULL == pmlmepriv) {
|
||||
rtw_warn_on(1);
|
||||
goto exit;
|
||||
@ -305,7 +308,7 @@ void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
|
||||
rtw_mfree_mlme_priv_lock(pmlmepriv);
|
||||
|
||||
if (pmlmepriv->free_bss_buf)
|
||||
rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network));
|
||||
rtw_vmfree(pmlmepriv->free_bss_buf, pmlmepriv->max_bss_cnt * sizeof(struct wlan_network));
|
||||
}
|
||||
exit:
|
||||
return;
|
||||
@ -382,6 +385,11 @@ struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv) /* (_queue
|
||||
pnetwork->network_type = 0;
|
||||
pnetwork->fixed = _FALSE;
|
||||
pnetwork->last_scanned = rtw_get_current_time();
|
||||
#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
pnetwork->acnode_stime = 0;
|
||||
pnetwork->acnode_notify_etime = 0;
|
||||
#endif
|
||||
|
||||
pnetwork->aid = 0;
|
||||
pnetwork->join_res = 0;
|
||||
|
||||
@ -740,7 +748,7 @@ struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_n
|
||||
|
||||
if (plist == phead)
|
||||
found = NULL;
|
||||
exit:
|
||||
|
||||
return found;
|
||||
}
|
||||
|
||||
@ -792,14 +800,15 @@ struct wlan_network *rtw_get_oldest_wlan_network(_queue *scanned_queue)
|
||||
void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src,
|
||||
_adapter *padapter, bool update_ie)
|
||||
{
|
||||
#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1
|
||||
u8 ss_ori = dst->PhyInfo.SignalStrength;
|
||||
u8 sq_ori = dst->PhyInfo.SignalQuality;
|
||||
u8 ss_smp = src->PhyInfo.SignalStrength;
|
||||
long rssi_smp = src->Rssi;
|
||||
#endif
|
||||
long rssi_ori = dst->Rssi;
|
||||
|
||||
u8 ss_smp = src->PhyInfo.SignalStrength;
|
||||
u8 sq_smp = src->PhyInfo.SignalQuality;
|
||||
long rssi_smp = src->Rssi;
|
||||
|
||||
u8 ss_final;
|
||||
u8 sq_final;
|
||||
long rssi_final;
|
||||
@ -932,13 +941,12 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
_list *plist, *phead;
|
||||
ULONG bssid_ex_sz;
|
||||
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
|
||||
struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
|
||||
#ifdef CONFIG_P2P
|
||||
struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
|
||||
#endif /* CONFIG_P2P */
|
||||
_queue *queue = &(pmlmepriv->scanned_queue);
|
||||
struct wlan_network *pnetwork = NULL;
|
||||
struct wlan_network *oldest = NULL;
|
||||
struct wlan_network *choice = NULL;
|
||||
int target_find = 0;
|
||||
u8 feature = 0;
|
||||
bool update_ie = _FALSE;
|
||||
@ -979,22 +987,27 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
}
|
||||
|
||||
if (rtw_roam_flags(adapter)) {
|
||||
/* TODO: don't select netowrk in the same ess as oldest if it's new enough*/
|
||||
/* TODO: don't select netowrk in the same ess as choice if it's new enough*/
|
||||
}
|
||||
if (pnetwork->fixed) {
|
||||
plist = get_next(plist);
|
||||
continue;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RSSI_PRIORITY
|
||||
if ((oldest == NULL) || (pnetwork->network.PhyInfo.SignalStrength < oldest->network.PhyInfo.SignalStrength))
|
||||
if ((choice == NULL) || (pnetwork->network.PhyInfo.SignalStrength < choice->network.PhyInfo.SignalStrength))
|
||||
#ifdef CONFIG_RTW_MESH
|
||||
if (!MLME_IS_MESH(adapter) || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE
|
||||
if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
|
||||
|| !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network))
|
||||
#endif
|
||||
oldest = pnetwork;
|
||||
choice = pnetwork;
|
||||
#else
|
||||
if (oldest == NULL || rtw_time_after(oldest->last_scanned, pnetwork->last_scanned))
|
||||
if (choice == NULL || rtw_time_after(choice->last_scanned, pnetwork->last_scanned))
|
||||
#ifdef CONFIG_RTW_MESH
|
||||
if (!MLME_IS_MESH(adapter) || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE
|
||||
if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
|
||||
|| !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network))
|
||||
#endif
|
||||
oldest = pnetwork;
|
||||
choice = pnetwork;
|
||||
#endif
|
||||
plist = get_next(plist);
|
||||
|
||||
@ -1006,9 +1019,9 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
/* if (rtw_end_of_queue_search(phead,plist)== _TRUE) { */
|
||||
if (!target_find) {
|
||||
if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) {
|
||||
/* If there are no more slots, expire the oldest */
|
||||
/* list_del_init(&oldest->list); */
|
||||
pnetwork = oldest;
|
||||
/* If there are no more slots, expire the choice */
|
||||
/* list_del_init(&choice->list); */
|
||||
pnetwork = choice;
|
||||
if (pnetwork == NULL)
|
||||
goto unlock_scan_queue;
|
||||
|
||||
@ -1028,6 +1041,10 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
/* variable initialize */
|
||||
pnetwork->fixed = _FALSE;
|
||||
pnetwork->last_scanned = rtw_get_current_time();
|
||||
#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
pnetwork->acnode_stime = 0;
|
||||
pnetwork->acnode_notify_etime = 0;
|
||||
#endif
|
||||
|
||||
pnetwork->network_type = 0;
|
||||
pnetwork->aid = 0;
|
||||
@ -1064,6 +1081,9 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
* be already expired. In this case we do the same as we found a new
|
||||
* net and call the new_net handler
|
||||
*/
|
||||
#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
systime last_scanned = pnetwork->last_scanned;
|
||||
#endif
|
||||
|
||||
pnetwork->last_scanned = rtw_get_current_time();
|
||||
|
||||
@ -1080,9 +1100,24 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
|
||||
else
|
||||
update_ie = _FALSE;
|
||||
|
||||
#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
|
||||
|| pnetwork->network.Configuration.DSConfig != target->Configuration.DSConfig
|
||||
|| rtw_get_passing_time_ms(last_scanned) > adapter->mesh_cfg.peer_sel_policy.scanr_exp_ms
|
||||
|| !rtw_bss_is_same_mbss(&pnetwork->network, target)
|
||||
) {
|
||||
pnetwork->acnode_stime = 0;
|
||||
pnetwork->acnode_notify_etime = 0;
|
||||
}
|
||||
#endif
|
||||
update_network(&(pnetwork->network), target, adapter, update_ie);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
|
||||
if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter))
|
||||
rtw_mesh_update_scanned_acnode_status(adapter, pnetwork);
|
||||
#endif
|
||||
|
||||
unlock_scan_queue:
|
||||
_exit_critical_bh(&queue->lock, &irqL);
|
||||
|
||||
@ -1100,12 +1135,9 @@ unlock_scan_queue:
|
||||
void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork);
|
||||
void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork)
|
||||
{
|
||||
_irqL irqL;
|
||||
struct mlme_priv *pmlmepriv = &(((_adapter *)adapter)->mlmepriv);
|
||||
bool update_ie;
|
||||
/* _queue *queue = &(pmlmepriv->scanned_queue); */
|
||||
|
||||
|
||||
/* _enter_critical_bh(&queue->lock, &irqL); */
|
||||
|
||||
#if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO)
|
||||
@ -1347,12 +1379,14 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter));
|
||||
|
||||
if (rtw_to_roam(adapter) != 0) {
|
||||
u8 ssc_chk = rtw_sitesurvey_condition_check(adapter, _FALSE);
|
||||
|
||||
rtw_init_sitesurvey_parm(adapter, &parm);
|
||||
_rtw_memcpy(&parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
|
||||
parm.ssid_num = 1;
|
||||
|
||||
if (rtw_dec_to_roam(adapter) == 0
|
||||
|| (ssc_chk != SS_ALLOW && ssc_chk != SS_DENY_BUSY_TRAFFIC)
|
||||
|| _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm)
|
||||
) {
|
||||
rtw_set_to_roam(adapter, 0);
|
||||
@ -1363,7 +1397,7 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
RTW_INFO("change to widi listen\n");
|
||||
}
|
||||
#endif /* CONFIG_INTEL_WIDI */
|
||||
rtw_free_assoc_resources(adapter, 1);
|
||||
rtw_free_assoc_resources(adapter, _TRUE);
|
||||
rtw_indicate_disconnect(adapter, 0, _FALSE);
|
||||
} else
|
||||
pmlmepriv->to_join = _TRUE;
|
||||
@ -1430,15 +1464,138 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
|
||||
ch = rtw_mesh_select_operating_ch(adapter);
|
||||
if (ch && pmlmepriv->cur_network.network.Configuration.DSConfig != ch) {
|
||||
/* trigger channel switch with bw specified by upper layer */
|
||||
rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ch, adapter->mlmepriv.ori_bw, -1);
|
||||
u8 ifbmp = rtw_mi_get_ap_mesh_ifbmp(adapter);
|
||||
|
||||
if (ifbmp) {
|
||||
/* switch to selected channel */
|
||||
rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ifbmp, 0, ch, REQ_BW_ORI, REQ_OFFSET_NONE);
|
||||
issue_probereq_ex(adapter, &pmlmepriv->cur_network.network.mesh_id, NULL, 0, 0, 0, 0);
|
||||
} else
|
||||
rtw_warn_on(1);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_RTW_MESH */
|
||||
}
|
||||
|
||||
u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval)
|
||||
{
|
||||
u8 ss_condition = SS_ALLOW;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
#ifdef DBG_LA_MODE
|
||||
struct registry_priv *registry_par = &adapter->registrypriv;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MP_INCLUDED
|
||||
if (rtw_mp_mode_check(adapter)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") MP mode block Scan request\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_MP_MODE;
|
||||
goto _exit;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DBG_LA_MODE
|
||||
if(registry_par->la_mode_en == 1 && MLME_IS_ASOC(adapter)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") LA debug mode block Scan request\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_LA_MODE;
|
||||
goto _exit;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTW_REPEATER_SON
|
||||
if (adapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) {
|
||||
RTW_INFO("%s ("ADPT_FMT") blocking scan for under rson scanning process\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_RSON_SCANING;
|
||||
goto _exit;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
if (adapter_wdev_data(adapter)->block_scan == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") wdev_priv.block_scan is set\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BLOCK_SCAN;
|
||||
goto _exit;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (adapter_to_dvobj(adapter)->scan_deny == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") tpt mode, scan deny!\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BLOCK_SCAN;
|
||||
goto _exit;
|
||||
}
|
||||
|
||||
if (rtw_is_scan_deny(adapter)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan deny\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BY_DRV;
|
||||
goto _exit;
|
||||
}
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)){
|
||||
if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!! AP mode process WPS\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_SELF_AP_UNDER_WPS;
|
||||
goto _exit;
|
||||
} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under linking (fwstate=0x%x)\n",
|
||||
caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
|
||||
ss_condition = SS_DENY_SELF_AP_UNDER_LINKING;
|
||||
goto _exit;
|
||||
} else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under survey (fwstate=0x%x)\n",
|
||||
caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
|
||||
ss_condition = SS_DENY_SELF_AP_UNDER_SURVEY;
|
||||
goto _exit;
|
||||
}
|
||||
} else {
|
||||
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under linking (fwstate=0x%x)\n",
|
||||
caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
|
||||
ss_condition = SS_DENY_SELF_STA_UNDER_LINKING;
|
||||
goto _exit;
|
||||
} else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under survey (fwstate=0x%x)\n",
|
||||
caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
|
||||
ss_condition = SS_DENY_SELF_STA_UNDER_SURVEY;
|
||||
goto _exit;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_LINKING | WIFI_UNDER_WPS)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under linking or wps\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BUDDY_UNDER_LINK_WPS;
|
||||
goto _exit;
|
||||
|
||||
} else if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_SURVEY)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under survey\n", caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BUDDY_UNDER_SURVEY;
|
||||
goto _exit;
|
||||
}
|
||||
#endif /* CONFIG_CONCURRENT_MODE */
|
||||
|
||||
if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!! BusyTraffic\n",
|
||||
caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BUSY_TRAFFIC;
|
||||
goto _exit;
|
||||
}
|
||||
/*
|
||||
* Rule for Android.
|
||||
* If scan interval > BUSY_TRAFFIC_SCAN_DENY_PERIOD,
|
||||
* it is a periodical background scan.
|
||||
* Skip background scan when other interface is busy.
|
||||
*/
|
||||
if ((rtw_get_passing_time_ms(pmlmepriv->lastscantime) > BUSY_TRAFFIC_SCAN_DENY_PERIOD)
|
||||
&& rtw_mi_buddy_busy_traffic_check(adapter, _FALSE)) {
|
||||
RTW_INFO("%s ("ADPT_FMT") : scan abort!! others BusyTraffic\n",
|
||||
caller, ADPT_ARG(adapter));
|
||||
ss_condition = SS_DENY_BUSY_TRAFFIC;
|
||||
goto _exit;
|
||||
}
|
||||
|
||||
_exit :
|
||||
return ss_condition;
|
||||
}
|
||||
|
||||
void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf)
|
||||
{
|
||||
|
||||
@ -1492,12 +1649,11 @@ void rtw_reset_rx_info(_adapter *adapter)
|
||||
/*
|
||||
*rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock
|
||||
*/
|
||||
void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
|
||||
void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue)
|
||||
{
|
||||
_irqL irqL;
|
||||
struct wlan_network *pwlan = NULL;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
struct sta_priv *pstapriv = &adapter->stapriv;
|
||||
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
|
||||
|
||||
|
||||
@ -1544,26 +1700,27 @@ void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
|
||||
if (lock_scanned_queue)
|
||||
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS) || (pmlmepriv->wpa_phase == _TRUE)){
|
||||
RTW_INFO("Dont free disconnecting network of scanned_queue due to uner %s %s phase\n\n",
|
||||
check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ? "WPS" : "",
|
||||
(pmlmepriv->wpa_phase == _TRUE) ? "WPA" : "");
|
||||
} else {
|
||||
pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network);
|
||||
if ((pwlan) && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) {
|
||||
if (pwlan) {
|
||||
pwlan->fixed = _FALSE;
|
||||
|
||||
RTW_INFO("free disconnecting network of scanned_queue\n");
|
||||
RTW_INFO("Free disconnecting network of scanned_queue\n");
|
||||
rtw_free_network_nolock(adapter, pwlan);
|
||||
#ifdef CONFIG_P2P
|
||||
if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
|
||||
rtw_mi_set_scan_deny(adapter, 2000);
|
||||
rtw_set_scan_deny(adapter, 2000);
|
||||
/* rtw_clear_scan_deny(adapter); */
|
||||
}
|
||||
#endif /* CONFIG_P2P */
|
||||
} else {
|
||||
if (pwlan == NULL)
|
||||
RTW_INFO("free disconnecting network of scanned_queue failed due to pwlan== NULL\n\n");
|
||||
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
|
||||
RTW_INFO("donot free disconnecting network of scanned_queue when WIFI_UNDER_WPS\n\n");
|
||||
} else
|
||||
RTW_ERR("Free disconnecting network of scanned_queue failed due to pwlan == NULL\n\n");
|
||||
}
|
||||
|
||||
|
||||
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count == 1))
|
||||
/*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) {
|
||||
if (pwlan)
|
||||
@ -1586,9 +1743,6 @@ void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
|
||||
void rtw_indicate_connect(_adapter *padapter)
|
||||
{
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
||||
|
||||
|
||||
|
||||
pmlmepriv->to_join = _FALSE;
|
||||
|
||||
@ -1625,14 +1779,17 @@ void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generate
|
||||
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
|
||||
#ifdef CONFIG_WAPI_SUPPORT
|
||||
struct sta_info *psta;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
#endif
|
||||
u8 *wps_ie = NULL;
|
||||
uint wpsie_len = 0;
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
|
||||
pmlmepriv->wpa_phase = _TRUE;
|
||||
|
||||
|
||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS);
|
||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_OP_CH_SWITCHING | WIFI_UNDER_KEY_HANDSHAKE);
|
||||
|
||||
/* force to clear cur_network_scanned's SELECTED REGISTRAR */
|
||||
if (pmlmepriv->cur_network_scanned) {
|
||||
@ -1761,7 +1918,6 @@ static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms)
|
||||
void rtw_scan_wait_completed(_adapter *adapter)
|
||||
{
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
|
||||
struct ss_res *ss = &pmlmeext->sitesurvey_res;
|
||||
|
||||
_rtw_wait_scan_done(adapter, _FALSE, ss->scan_timeout_ms);
|
||||
@ -1842,6 +1998,10 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
|
||||
struct recv_reorder_ctrl *preorder_ctrl;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
||||
#ifdef CONFIG_RTS_FULL_BW
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
|
||||
#endif/*CONFIG_RTS_FULL_BW*/
|
||||
|
||||
psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress);
|
||||
if (psta == NULL)
|
||||
@ -1927,7 +2087,9 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
|
||||
#ifdef CONFIG_RTW_80211K
|
||||
_rtw_memcpy(&psta->rm_en_cap, pnetwork->network.PhyInfo.rm_en_cap, 5);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTS_FULL_BW
|
||||
rtw_parse_sta_vendor_ie_8812(padapter, psta, BSS_EX_TLV_IES(&cur_network->network), BSS_EX_TLV_IES_LEN(&cur_network->network));
|
||||
#endif
|
||||
return psta;
|
||||
|
||||
}
|
||||
@ -1937,12 +2099,12 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
|
||||
static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork)
|
||||
{
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
||||
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
|
||||
sint tmp_fw_state = 0x0;
|
||||
|
||||
RTW_INFO("%s\n", __FUNCTION__);
|
||||
|
||||
|
||||
|
||||
/* why not use ptarget_wlan?? */
|
||||
_rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length);
|
||||
/* some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs */
|
||||
@ -1976,13 +2138,15 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *
|
||||
|
||||
switch (pnetwork->network.InfrastructureMode) {
|
||||
case Ndis802_11Infrastructure:
|
||||
/* Check encryption */
|
||||
if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
|
||||
tmp_fw_state = tmp_fw_state | WIFI_UNDER_KEY_HANDSHAKE;
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
|
||||
tmp_fw_state = tmp_fw_state | WIFI_UNDER_WPS;
|
||||
|
||||
init_fwstate(pmlmepriv, WIFI_STATION_STATE | tmp_fw_state);
|
||||
|
||||
if (pmlmepriv->fw_state & WIFI_UNDER_WPS)
|
||||
/*pmlmepriv->fw_state = WIFI_STATION_STATE|WIFI_UNDER_WPS;*/
|
||||
init_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_UNDER_WPS);
|
||||
else
|
||||
/*pmlmepriv->fw_state = WIFI_STATION_STATE;*/
|
||||
init_fwstate(pmlmepriv, WIFI_STATION_STATE);
|
||||
break;
|
||||
case Ndis802_11IBSS:
|
||||
/*pmlmepriv->fw_state = WIFI_ADHOC_STATE;*/
|
||||
@ -2010,9 +2174,9 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *
|
||||
* if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL).
|
||||
*/
|
||||
/* #define REJOIN */
|
||||
void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
|
||||
void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status)
|
||||
{
|
||||
_irqL irqL, irqL2;
|
||||
_irqL irqL;
|
||||
static u8 retry = 0;
|
||||
struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
|
||||
struct sta_priv *pstapriv = &adapter->stapriv;
|
||||
@ -2052,9 +2216,8 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
|
||||
the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN);
|
||||
|
||||
pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network);
|
||||
if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) {
|
||||
goto ignore_joinbss_callback;
|
||||
}
|
||||
if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX))
|
||||
goto exit;
|
||||
|
||||
_enter_critical_bh(&pmlmepriv->lock, &irqL);
|
||||
|
||||
@ -2136,9 +2299,10 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
|
||||
|
||||
} else if (pnetwork->join_res == -4) {
|
||||
rtw_reset_securitypriv(adapter);
|
||||
pmlmepriv->join_status = status;
|
||||
_set_timer(&pmlmepriv->assoc_timer, 1);
|
||||
|
||||
/* rtw_free_assoc_resources(adapter, 1); */
|
||||
/* rtw_free_assoc_resources(adapter, _TRUE); */
|
||||
|
||||
if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE) {
|
||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
|
||||
@ -2161,9 +2325,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
|
||||
rtw_indicate_connect(adapter);
|
||||
} else {
|
||||
#endif
|
||||
|
||||
pmlmepriv->join_status = status;
|
||||
_set_timer(&pmlmepriv->assoc_timer, 1);
|
||||
/* rtw_free_assoc_resources(adapter, 1); */
|
||||
/* rtw_free_assoc_resources(adapter, _TRUE); */
|
||||
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
|
||||
|
||||
#ifdef REJOIN
|
||||
@ -2174,6 +2338,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
|
||||
|
||||
ignore_joinbss_callback:
|
||||
_exit_critical_bh(&pmlmepriv->lock, &irqL);
|
||||
|
||||
exit:
|
||||
return;
|
||||
}
|
||||
|
||||
void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
@ -2423,6 +2590,9 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
#endif
|
||||
|
||||
exit:
|
||||
#ifdef CONFIG_RTS_FULL_BW
|
||||
rtw_set_rts_bw(adapter);
|
||||
#endif/*CONFIG_RTS_FULL_BW*/
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2688,11 +2858,7 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
u8 *pibss = NULL;
|
||||
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
|
||||
struct stadel_event *pstadel = (struct stadel_event *)pbuf;
|
||||
struct sta_priv *pstapriv = &adapter->stapriv;
|
||||
struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
|
||||
RTW_INFO("%s(mac_id=%d)=" MAC_FMT "\n", __func__, pstadel->mac_id, MAC_ARG(pstadel->macaddr));
|
||||
rtw_sta_mstatus_disc_rpt(adapter, pstadel->mac_id);
|
||||
@ -2711,8 +2877,10 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
if (psta)
|
||||
rtw_wfd_st_switch(psta, 0);
|
||||
|
||||
if (MLME_IS_MESH(adapter))
|
||||
return;
|
||||
if (MLME_IS_MESH(adapter)) {
|
||||
rtw_free_stainfo(adapter, psta);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (MLME_IS_AP(adapter)) {
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
@ -2723,7 +2891,9 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */
|
||||
#endif /* CONFIG_IOCTL_CFG80211 */
|
||||
|
||||
return;
|
||||
rtw_free_stainfo(adapter, psta);
|
||||
|
||||
goto exit;
|
||||
}
|
||||
|
||||
mlmeext_sta_del_event_callback(adapter);
|
||||
@ -2766,18 +2936,9 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
|
||||
rtw_free_uc_swdec_pending_queue(adapter);
|
||||
|
||||
rtw_free_assoc_resources(adapter, 1);
|
||||
rtw_free_assoc_resources(adapter, _TRUE);
|
||||
rtw_free_mlme_priv_ie_data(pmlmepriv);
|
||||
|
||||
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
|
||||
/* remove the network entry in scanned_queue */
|
||||
pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
|
||||
if ((pwlan) && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) {
|
||||
pwlan->fixed = _FALSE;
|
||||
rtw_free_network_nolock(adapter, pwlan);
|
||||
}
|
||||
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
|
||||
|
||||
rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated);
|
||||
#ifdef CONFIG_INTEL_WIDI
|
||||
if (!rtw_to_roam(adapter))
|
||||
@ -2831,8 +2992,11 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
|
||||
}
|
||||
|
||||
_exit_critical_bh(&pmlmepriv->lock, &irqL2);
|
||||
|
||||
|
||||
exit:
|
||||
#ifdef CONFIG_RTS_FULL_BW
|
||||
rtw_set_rts_bw(adapter);
|
||||
#endif/*CONFIG_RTS_FULL_BW*/
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -2913,7 +3077,7 @@ void rtw_join_timeout_handler(void *ctx)
|
||||
rtw_ft_clr_flags(adapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN);
|
||||
rtw_ft_reset_status(adapter);
|
||||
#endif
|
||||
rtw_indicate_disconnect(adapter, 0, _FALSE);
|
||||
rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -2921,16 +3085,18 @@ void rtw_join_timeout_handler(void *ctx)
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
rtw_indicate_disconnect(adapter, 0, _FALSE);
|
||||
rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
|
||||
free_scanqueue(pmlmepriv);/* ??? */
|
||||
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
/* indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED */
|
||||
rtw_cfg80211_indicate_disconnect(adapter, 0, _FALSE);
|
||||
rtw_cfg80211_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
|
||||
#endif /* CONFIG_IOCTL_CFG80211 */
|
||||
|
||||
}
|
||||
|
||||
pmlmepriv->join_status = 0; /* reset */
|
||||
|
||||
_exit_critical_bh(&pmlmepriv->lock, &irqL);
|
||||
|
||||
|
||||
@ -2972,10 +3138,11 @@ void rtw_scan_timeout_handler(void *ctx)
|
||||
|
||||
void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason)
|
||||
{
|
||||
#if defined(CONFIG_RTW_MESH) && defined(CONFIG_DFS_MASTER)
|
||||
#if CONFIG_RTW_MESH_OFFCH_CAND
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||
struct mlme_priv *mlme = &adapter->mlmepriv;
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
#endif
|
||||
#endif
|
||||
u8 u_ch;
|
||||
u32 interval_ms = 0xffffffff; /* 0xffffffff: special value to make min() works well, also means no auto scan */
|
||||
|
||||
@ -3006,7 +3173,6 @@ void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason)
|
||||
#endif
|
||||
#endif /* CONFIG_RTW_MESH */
|
||||
|
||||
exit:
|
||||
if (interval_ms == 0xffffffff)
|
||||
interval_ms = 0;
|
||||
|
||||
@ -3019,8 +3185,25 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason)
|
||||
struct sitesurvey_parm parm;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
int i;
|
||||
#if 1
|
||||
u8 ssc_chk;
|
||||
|
||||
ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
|
||||
if( ssc_chk == SS_DENY_BUSY_TRAFFIC) {
|
||||
#ifdef CONFIG_LAYER2_ROAMING
|
||||
if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE)
|
||||
RTW_INFO(FUNC_ADPT_FMT" need to roam, don't care BusyTraffic\n", FUNC_ADPT_ARG(padapter));
|
||||
else
|
||||
#endif
|
||||
RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter));
|
||||
goto exit;
|
||||
}
|
||||
else if (ssc_chk != SS_ALLOW)
|
||||
goto exit;
|
||||
|
||||
if (!rtw_is_adapter_up(padapter))
|
||||
goto exit;
|
||||
#else
|
||||
if (rtw_is_scan_deny(padapter))
|
||||
goto exit;
|
||||
|
||||
@ -3052,6 +3235,7 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason)
|
||||
RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n", FUNC_ADPT_ARG(padapter));
|
||||
goto exit;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
RTW_INFO(FUNC_ADPT_FMT" reason:0x%02x\n", FUNC_ADPT_ARG(padapter), reason);
|
||||
@ -3195,7 +3379,8 @@ static void collect_sta_traffic_statistics(_adapter *adapter)
|
||||
{
|
||||
struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
|
||||
struct sta_info *sta;
|
||||
u16 curr_tx_mbytes = 0, curr_rx_mbytes = 0;
|
||||
u64 curr_tx_bytes = 0, curr_rx_bytes = 0;
|
||||
u32 curr_tx_mbytes = 0, curr_rx_mbytes = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
|
||||
@ -3210,16 +3395,24 @@ static void collect_sta_traffic_statistics(_adapter *adapter)
|
||||
if (sta->sta_stats.last_rx_mc_bytes > sta->sta_stats.rx_mc_bytes)
|
||||
sta->sta_stats.last_rx_mc_bytes = sta->sta_stats.rx_mc_bytes;
|
||||
|
||||
curr_tx_mbytes = ((sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes) >> 20) / 2; /*MBps*/
|
||||
curr_rx_mbytes = ((sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes) >> 20) / 2; /*MBps*/
|
||||
sta->sta_stats.tx_tp_mbytes = curr_tx_mbytes;
|
||||
sta->sta_stats.rx_tp_mbytes = curr_rx_mbytes;
|
||||
curr_tx_bytes = sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes;
|
||||
curr_rx_bytes = sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes;
|
||||
sta->sta_stats.tx_tp_kbits = (curr_tx_bytes * 8 / 2) >> 10;/*Kbps*/
|
||||
sta->sta_stats.rx_tp_kbits = (curr_rx_bytes * 8 / 2) >> 10;/*Kbps*/
|
||||
|
||||
sta->sta_stats.smooth_tx_tp_kbits = (sta->sta_stats.smooth_tx_tp_kbits * 6 / 10) + (sta->sta_stats.tx_tp_kbits * 4 / 10);/*Kbps*/
|
||||
sta->sta_stats.smooth_rx_tp_kbits = (sta->sta_stats.smooth_rx_tp_kbits * 6 / 10) + (sta->sta_stats.rx_tp_kbits * 4 / 10);/*Kbps*/
|
||||
|
||||
curr_tx_mbytes = (curr_tx_bytes / 2) >> 20;/*MBps*/
|
||||
curr_rx_mbytes = (curr_rx_bytes / 2) >> 20;/*MBps*/
|
||||
|
||||
sta->cmn.tx_moving_average_tp =
|
||||
(sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10);
|
||||
(sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10); /*MBps*/
|
||||
|
||||
sta->cmn.rx_moving_average_tp =
|
||||
(sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10);
|
||||
(sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10); /*MBps*/
|
||||
|
||||
rtw_collect_bcn_info(sta->padapter);
|
||||
|
||||
if (adapter->bsta_tp_dump)
|
||||
dump_sta_traffic(RTW_DBGDUMP, adapter, sta);
|
||||
@ -3270,8 +3463,8 @@ static void collect_traffic_statistics(_adapter *padapter)
|
||||
pdvobjpriv->traffic_stat.last_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes;
|
||||
pdvobjpriv->traffic_stat.last_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes;
|
||||
|
||||
pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);
|
||||
pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);
|
||||
pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/
|
||||
pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/
|
||||
|
||||
#ifdef DBG_TRAFFIC_STATISTIC
|
||||
RTW_INFO("\n========================\n");
|
||||
@ -3281,8 +3474,8 @@ static void collect_traffic_statistics(_adapter *padapter)
|
||||
RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes);
|
||||
RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes);
|
||||
|
||||
RTW_INFO("cur_tx_tp:%d\n", pdvobjpriv->traffic_stat.cur_tx_tp);
|
||||
RTW_INFO("cur_rx_tp:%d\n", pdvobjpriv->traffic_stat.cur_rx_tp);
|
||||
RTW_INFO("cur_tx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_tx_tp);
|
||||
RTW_INFO("cur_rx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_rx_tp);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTW_NAPI
|
||||
@ -3368,8 +3561,15 @@ static int rtw_check_roaming_candidate(struct mlme_priv *mlme
|
||||
{
|
||||
int updated = _FALSE;
|
||||
_adapter *adapter = container_of(mlme, _adapter, mlmepriv);
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||
RT_CHANNEL_INFO *chset = rfctl->channel_set;
|
||||
u8 ch = competitor->network.Configuration.DSConfig;
|
||||
|
||||
if (rtw_chset_search_ch(adapter_to_chset(adapter), competitor->network.Configuration.DSConfig) < 0)
|
||||
if (rtw_chset_search_ch(chset, ch) < 0)
|
||||
goto exit;
|
||||
if (IS_DFS_SLAVE_WITH_RD(rfctl)
|
||||
&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
|
||||
&& rtw_chset_is_ch_non_ocp(chset, ch))
|
||||
goto exit;
|
||||
|
||||
#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT))
|
||||
@ -3449,8 +3649,6 @@ int rtw_select_roaming_candidate(struct mlme_priv *mlme)
|
||||
_queue *queue = &(mlme->scanned_queue);
|
||||
struct wlan_network *pnetwork = NULL;
|
||||
struct wlan_network *candidate = NULL;
|
||||
u8 bSupportAntDiv = _FALSE;
|
||||
|
||||
|
||||
if (mlme->cur_network_scanned == NULL) {
|
||||
rtw_warn_on(1);
|
||||
@ -3540,8 +3738,15 @@ static int rtw_check_join_candidate(struct mlme_priv *mlme
|
||||
{
|
||||
int updated = _FALSE;
|
||||
_adapter *adapter = container_of(mlme, _adapter, mlmepriv);
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||
RT_CHANNEL_INFO *chset = rfctl->channel_set;
|
||||
u8 ch = competitor->network.Configuration.DSConfig;
|
||||
|
||||
if (rtw_chset_search_ch(adapter_to_chset(adapter), competitor->network.Configuration.DSConfig) < 0)
|
||||
if (rtw_chset_search_ch(chset, ch) < 0)
|
||||
goto exit;
|
||||
if (IS_DFS_SLAVE_WITH_RD(rfctl)
|
||||
&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
|
||||
&& rtw_chset_is_ch_non_ocp(chset, ch))
|
||||
goto exit;
|
||||
|
||||
#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT))
|
||||
@ -3631,8 +3836,9 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
|
||||
_queue *queue = &(pmlmepriv->scanned_queue);
|
||||
struct wlan_network *pnetwork = NULL;
|
||||
struct wlan_network *candidate = NULL;
|
||||
#ifdef CONFIG_ANTENNA_DIVERSITY
|
||||
u8 bSupportAntDiv = _FALSE;
|
||||
|
||||
#endif
|
||||
|
||||
adapter = (_adapter *)pmlmepriv->nic_hdl;
|
||||
|
||||
@ -3703,7 +3909,7 @@ candidate_exist:
|
||||
{
|
||||
rtw_disassoc_cmd(adapter, 0, 0);
|
||||
rtw_indicate_disconnect(adapter, 0, _FALSE);
|
||||
rtw_free_assoc_resources(adapter, 0);
|
||||
rtw_free_assoc_resources_cmd(adapter, _TRUE, 0);
|
||||
}
|
||||
}
|
||||
|
||||
@ -3778,7 +3984,6 @@ sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint ke
|
||||
struct cmd_obj *pcmd;
|
||||
struct setkey_parm *psetkeyparm;
|
||||
struct cmd_priv *pcmdpriv = &(adapter->cmdpriv);
|
||||
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
|
||||
sint res = _SUCCESS;
|
||||
|
||||
|
||||
@ -4131,16 +4336,13 @@ exit:
|
||||
|
||||
sint rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie)
|
||||
{
|
||||
u8 authmode = 0x0, securitytype, match;
|
||||
u8 sec_ie[255], uncst_oui[4], bkup_ie[255];
|
||||
u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
|
||||
uint ielength = 0, cnt, remove_cnt;
|
||||
u8 authmode = 0x0;
|
||||
uint ielength = 0;
|
||||
int iEntry;
|
||||
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
struct security_priv *psecuritypriv = &adapter->securitypriv;
|
||||
uint ndisauthmode = psecuritypriv->ndisauthtype;
|
||||
uint ndissecuritytype = psecuritypriv->ndisencryptstatus;
|
||||
|
||||
if ((ndisauthmode == Ndis802_11AuthModeWPA) || (ndisauthmode == Ndis802_11AuthModeWPAPSK))
|
||||
authmode = _WPA_IE_ID_;
|
||||
@ -4405,7 +4607,7 @@ void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len)
|
||||
padapter->mlmepriv.qospriv.qos_option = 1;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_80211N_HT)
|
||||
/* the fucntion is >= passive_level */
|
||||
unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel)
|
||||
{
|
||||
@ -4449,6 +4651,8 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
|
||||
}
|
||||
|
||||
if (cbw40_enable) {
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
|
||||
RT_CHANNEL_INFO *chset = rfctl->channel_set;
|
||||
u8 oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
|
||||
if (in_ie == NULL) {
|
||||
@ -4481,11 +4685,17 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
|
||||
/* adjust bw to fit in channel plan setting */
|
||||
if (oper_bw == CHANNEL_WIDTH_40
|
||||
&& oper_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE /* check this because TDLS has no info to set offset */
|
||||
&& !rtw_chset_is_chbw_valid(adapter_to_chset(padapter), channel, oper_bw, oper_offset)
|
||||
&& (!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset)
|
||||
|| (IS_DFS_SLAVE_WITH_RD(rfctl)
|
||||
&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
|
||||
&& rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset))
|
||||
)
|
||||
) {
|
||||
oper_bw = CHANNEL_WIDTH_20;
|
||||
oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
rtw_warn_on(!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), channel, oper_bw, oper_offset));
|
||||
rtw_warn_on(!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset));
|
||||
if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)))
|
||||
rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset));
|
||||
}
|
||||
|
||||
if (oper_bw == CHANNEL_WIDTH_40) {
|
||||
@ -4624,7 +4834,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
/* IOT action suggested by Yu Chen 2017/3/3 */
|
||||
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
|
||||
!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
|
||||
!pvhtpriv->ap_is_mu_bfer)
|
||||
rf_num = (rf_num >= 2 ? 2 : rf_num);
|
||||
#endif
|
||||
SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, rf_num);
|
||||
@ -4792,6 +5002,7 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel)
|
||||
/* */
|
||||
pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TDLS
|
||||
void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
@ -4824,6 +5035,7 @@ void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitfra
|
||||
}
|
||||
#endif /* CONFIG_TDLS */
|
||||
|
||||
#ifdef CONFIG_80211N_HT
|
||||
void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
{
|
||||
u8 issued;
|
||||
@ -4874,7 +5086,7 @@ void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif /* CONFIG_80211N_HT */
|
||||
void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len)
|
||||
{
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
@ -4983,14 +5195,11 @@ bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset)
|
||||
struct registry_priv *regsty = adapter_to_regsty(adapter);
|
||||
u8 allowed_bw;
|
||||
|
||||
if (req_ch <= 14) {
|
||||
if (req_ch < 14)
|
||||
allowed_bw = REGSTY_BW_2G(regsty);
|
||||
if (MLME_IS_MESH(adapter)) {
|
||||
/* prevent secondary channel offset mismatch */
|
||||
if (req_ch >= 5 && req_ch <= 9)
|
||||
else if (req_ch == 14)
|
||||
allowed_bw = CHANNEL_WIDTH_20;
|
||||
}
|
||||
} else
|
||||
else
|
||||
allowed_bw = REGSTY_BW_5G(regsty);
|
||||
|
||||
allowed_bw = hal_largest_bw(adapter, allowed_bw);
|
||||
@ -5121,3 +5330,17 @@ inline void rtw_wfd_st_switch(struct sta_info *sta, bool on)
|
||||
rtw_st_ctl_unregister(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD);
|
||||
#endif
|
||||
}
|
||||
|
||||
void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx)
|
||||
{
|
||||
RTW_PRINT_SEL(sel, "%s ARP da="MAC_FMT", sa="MAC_FMT"\n"
|
||||
, tx ? "send" : "recv", MAC_ARG(da), MAC_ARG(sa));
|
||||
RTW_PRINT_SEL(sel, "htype=%u, ptype=0x%04x, hlen=%u, plen=%u, oper=%u\n"
|
||||
, GET_ARP_HTYPE(arp), GET_ARP_PTYPE(arp), GET_ARP_HLEN(arp)
|
||||
, GET_ARP_PLEN(arp), GET_ARP_OPER(arp));
|
||||
RTW_PRINT_SEL(sel, "sha="MAC_FMT", spa="IP_FMT"\n"
|
||||
, MAC_ARG(ARP_SENDER_MAC_ADDR(arp)), IP_ARG(ARP_SENDER_IP_ADDR(arp)));
|
||||
RTW_PRINT_SEL(sel, "tha="MAC_FMT", tpa="IP_FMT"\n"
|
||||
, MAC_ARG(ARP_TARGET_MAC_ADDR(arp)), IP_ARG(ARP_TARGET_IP_ADDR(arp)));
|
||||
}
|
||||
|
||||
|
1587
core/rtw_mlme_ext.c
1587
core/rtw_mlme_ext.c
File diff suppressed because it is too large
Load Diff
372
core/rtw_mp.c
372
core/rtw_mp.c
@ -120,7 +120,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv)
|
||||
|
||||
pmp_priv->channel = 1;
|
||||
pmp_priv->bandwidth = CHANNEL_WIDTH_20;
|
||||
pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
|
||||
pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
pmp_priv->rateidx = RATE_1M;
|
||||
pmp_priv->txpoweridx = 0x2A;
|
||||
|
||||
@ -147,6 +147,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv)
|
||||
pmp_priv->bloopback = _FALSE;
|
||||
|
||||
pmp_priv->bloadefusemap = _FALSE;
|
||||
pmp_priv->brx_filter_beacon = _FALSE;
|
||||
|
||||
pnetwork = &pmp_priv->mp_network.network;
|
||||
_rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
|
||||
@ -222,6 +223,7 @@ static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
|
||||
#endif
|
||||
|
||||
#ifdef PLATFORM_LINUX
|
||||
#if 0
|
||||
static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
|
||||
{
|
||||
int i, res;
|
||||
@ -263,6 +265,7 @@ _exit_init_mp_priv:
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
|
||||
{
|
||||
@ -298,6 +301,11 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
|
||||
|
||||
pattrib->pktlen = 1500;
|
||||
|
||||
if (pHalData->rf_type == RF_2T2R)
|
||||
pattrib->raid = RATEID_IDX_BGN_40M_2SS;
|
||||
else
|
||||
pattrib->raid = RATEID_IDX_BGN_40M_1SS;
|
||||
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if (pHalData->rf_type == RF_1T1R)
|
||||
pattrib->raid = RATEID_IDX_VHT_1SS;
|
||||
@ -363,7 +371,7 @@ void free_mp_priv(struct mp_priv *pmp_priv)
|
||||
pmp_priv->pmp_xmtframe_buf = NULL;
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
static VOID PHY_IQCalibrate_default(
|
||||
IN PADAPTER pAdapter,
|
||||
IN BOOLEAN bReCovery
|
||||
@ -386,7 +394,7 @@ static VOID PHY_SetRFPathSwitch_default(
|
||||
{
|
||||
RTW_INFO("%s\n", __func__);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void mpt_InitHWConfig(PADAPTER Adapter)
|
||||
{
|
||||
@ -453,8 +461,8 @@ void mpt_InitHWConfig(PADAPTER Adapter)
|
||||
else if (IS_HARDWARE_TYPE_8821C(Adapter))
|
||||
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000);
|
||||
#endif /* CONFIG_RTL8821C */
|
||||
#ifdef CONFIG_RTL8188F
|
||||
else if (IS_HARDWARE_TYPE_8188F(Adapter)) {
|
||||
#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
|
||||
else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) {
|
||||
if (IS_A_CUT(hal->version_id) || IS_B_CUT(hal->version_id)) {
|
||||
RTW_INFO("%s() Active large power detection\n", __func__);
|
||||
phy_active_large_power_detection_8188f(&(GET_HAL_DATA(Adapter)->odmpriv));
|
||||
@ -504,6 +512,10 @@ static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
|
||||
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
|
||||
#ifdef CONFIG_RTL8188F
|
||||
bmain = PHY_QueryRFPathSwitch_8188F(padapter);
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8188GTV(padapter)) {
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
bmain = PHY_QueryRFPathSwitch_8188GTV(padapter);
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
@ -554,9 +566,13 @@ static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
|
||||
#ifdef CONFIG_RTL8703B
|
||||
phy_set_rf_path_switch_8703b(phydm, bMain);
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
|
||||
#ifdef CONFIG_RTL8188F
|
||||
} else if (IS_HARDWARE_TYPE_8188F(padapter) || IS_HARDWARE_TYPE_8188GTV(padapter)) {
|
||||
#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
|
||||
phy_set_rf_path_switch_8188f(phydm, bMain);
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8192F(padapter)) {
|
||||
#ifdef CONFIG_RTL8192F
|
||||
phy_set_rf_path_switch_8192f(padapter, bMain);
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
@ -575,11 +591,10 @@ static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
|
||||
|
||||
|
||||
static void phy_switch_rf_path_set(PADAPTER padapter , u8 *prf_set_State) {
|
||||
|
||||
#ifdef CONFIG_RTL8821C
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
struct dm_struct *p_dm = &pHalData->odmpriv;
|
||||
|
||||
#ifdef CONFIG_RTL8821C
|
||||
if (IS_HARDWARE_TYPE_8821C(padapter)) {
|
||||
config_phydm_set_ant_path(p_dm, *prf_set_State, p_dm->current_ant_num_8821c);
|
||||
/* Do IQK when switching to BTG/WLG, requested by RF Binson */
|
||||
@ -619,7 +634,6 @@ MPT_InitializeAdapter(
|
||||
s32 rtStatus = _SUCCESS;
|
||||
PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx;
|
||||
u32 ledsetting;
|
||||
struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;
|
||||
|
||||
pMptCtx->bMptDrvUnload = _FALSE;
|
||||
pMptCtx->bMassProdTest = _FALSE;
|
||||
@ -826,6 +840,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
|
||||
else if (pDM_Odm->support_ic_type == ODM_RTL8723D) {
|
||||
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
|
||||
SetTxPower(padapter);
|
||||
} else if (pDM_Odm->support_ic_type == ODM_RTL8192F) {
|
||||
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl);
|
||||
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_B, chnl);
|
||||
} else {
|
||||
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
|
||||
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_B, chnl);
|
||||
@ -842,7 +859,6 @@ u32 mp_join(PADAPTER padapter, u8 mode)
|
||||
WLAN_BSSID_EX bssid;
|
||||
struct sta_info *psta;
|
||||
u32 length;
|
||||
u8 val8, join_type;
|
||||
_irqL irqL;
|
||||
s32 res = _SUCCESS;
|
||||
|
||||
@ -853,9 +869,6 @@ u32 mp_join(PADAPTER padapter, u8 mode)
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
|
||||
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
struct wireless_dev *pwdev = padapter->rtw_wdev;
|
||||
#endif /* #ifdef CONFIG_IOCTL_CFG80211 */
|
||||
/* 1. initialize a new WLAN_BSSID_EX */
|
||||
_rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
|
||||
RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__,
|
||||
@ -894,7 +907,7 @@ u32 mp_join(PADAPTER padapter, u8 mode)
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
|
||||
rtw_disassoc_cmd(padapter, 500, 0);
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
|
||||
}
|
||||
pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
|
||||
/*pmlmepriv->fw_state = WIFI_MP_STATE;*/
|
||||
@ -962,6 +975,9 @@ end_of_mp_start_test:
|
||||
s32 mp_start_test(PADAPTER padapter)
|
||||
{
|
||||
struct mp_priv *pmppriv = &padapter->mppriv;
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
PHAL_DATA_TYPE hal;
|
||||
#endif
|
||||
s32 res = _SUCCESS;
|
||||
|
||||
padapter->registrypriv.mp_mode = 1;
|
||||
@ -985,6 +1001,9 @@ s32 mp_start_test(PADAPTER padapter)
|
||||
#ifdef CONFIG_RTL8188F
|
||||
rtl8188f_InitHalDm(padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
rtl8188gtv_InitHalDm(padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188E
|
||||
rtl8188e_InitHalDm(padapter);
|
||||
#endif
|
||||
@ -992,6 +1011,13 @@ s32 mp_start_test(PADAPTER padapter)
|
||||
rtl8723d_InitHalDm(padapter);
|
||||
#endif /* CONFIG_RTL8723D */
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
hal = GET_HAL_DATA(padapter);
|
||||
hal->pci_backdoor_ctrl = 0;
|
||||
rtw_pci_aspm_config(padapter);
|
||||
#endif
|
||||
|
||||
|
||||
/* 3 0. update mp_priv */
|
||||
|
||||
if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) {
|
||||
@ -1031,6 +1057,10 @@ void mp_stop_test(PADAPTER padapter)
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
|
||||
struct sta_info *psta;
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
struct registry_priv *registry_par = &padapter->registrypriv;
|
||||
PHAL_DATA_TYPE hal;
|
||||
#endif
|
||||
|
||||
_irqL irqL;
|
||||
|
||||
@ -1044,7 +1074,7 @@ void mp_stop_test(PADAPTER padapter)
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
|
||||
/* 3 2. clear psta used in mp test mode.
|
||||
* rtw_free_assoc_resources(padapter, 1); */
|
||||
* rtw_free_assoc_resources(padapter, _TRUE); */
|
||||
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
|
||||
if (psta)
|
||||
rtw_free_stainfo(padapter, psta);
|
||||
@ -1062,6 +1092,12 @@ end_of_mp_stop_test:
|
||||
|
||||
_exit_critical_bh(&pmlmepriv->lock, &irqL);
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
hal = GET_HAL_DATA(padapter);
|
||||
hal->pci_backdoor_ctrl = registry_par->pci_aspm_config;
|
||||
rtw_pci_aspm_config(padapter);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8812A
|
||||
rtl8812_InitHalDm(padapter);
|
||||
#endif
|
||||
@ -1077,6 +1113,9 @@ end_of_mp_stop_test:
|
||||
#ifdef CONFIG_RTL8188F
|
||||
rtl8188f_InitHalDm(padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
rtl8188gtv_InitHalDm(padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8723D
|
||||
rtl8723d_InitHalDm(padapter);
|
||||
#endif
|
||||
@ -1142,6 +1181,7 @@ static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Ch
|
||||
* 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3.
|
||||
*
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if 0
|
||||
static void mpt_SwitchRfSetting(PADAPTER pAdapter)
|
||||
{
|
||||
hal_mpt_SwitchRfSetting(pAdapter);
|
||||
@ -1153,6 +1193,7 @@ static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
|
||||
{
|
||||
hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
|
||||
|
||||
@ -1231,6 +1272,7 @@ s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
|
||||
return hal_mpt_SetThermalMeter(pAdapter, target_ther);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void TriggerRFThermalMeter(PADAPTER pAdapter)
|
||||
{
|
||||
hal_mpt_TriggerRFThermalMeter(pAdapter);
|
||||
@ -1240,6 +1282,7 @@ static u8 ReadRFThermalMeter(PADAPTER pAdapter)
|
||||
{
|
||||
return hal_mpt_ReadRFThermalMeter(pAdapter);
|
||||
}
|
||||
#endif
|
||||
|
||||
void GetThermalMeter(PADAPTER pAdapter, u8 *value)
|
||||
{
|
||||
@ -1313,7 +1356,7 @@ static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
|
||||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCIE_HCI
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
static u8 check_nic_enough_desc(_adapter *padapter, struct pkt_attrib *pattrib)
|
||||
{
|
||||
u32 prio;
|
||||
@ -1373,7 +1416,7 @@ static thread_return mp_xmit_packet_thread(thread_context context)
|
||||
RTW_INFO("%s:pkTx Start\n", __func__);
|
||||
while (1) {
|
||||
pxmitframe = alloc_mp_xmitframe(pxmitpriv);
|
||||
#ifdef CONFIG_PCIE_HCI
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
if(check_nic_enough_desc(padapter, &pmptx->attrib) == _FALSE) {
|
||||
rtw_usleep_os(1000);
|
||||
continue;
|
||||
@ -1487,7 +1530,7 @@ void fill_tx_desc_8814a(PADAPTER padapter)
|
||||
|
||||
u32 pkt_size = pattrib->last_txcmdsz;
|
||||
s32 bmcast = IS_MCAST(pattrib->ra);
|
||||
u8 data_rate, pwr_status, offset;
|
||||
u8 offset;
|
||||
|
||||
/* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */
|
||||
SET_TX_DESC_LAST_SEG_8814A(pDesc, 1);
|
||||
@ -1741,6 +1784,37 @@ void fill_tx_desc_8188f(PADAPTER padapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
void fill_tx_desc_8188gtv(PADAPTER padapter)
|
||||
{
|
||||
struct mp_priv *pmp_priv = &padapter->mppriv;
|
||||
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
|
||||
u8 *ptxdesc = pmp_priv->tx.desc;
|
||||
|
||||
SET_TX_DESC_AGG_BREAK_8188GTV(ptxdesc, 1);
|
||||
SET_TX_DESC_MACID_8188GTV(ptxdesc, pattrib->mac_id);
|
||||
SET_TX_DESC_QUEUE_SEL_8188GTV(ptxdesc, pattrib->qsel);
|
||||
|
||||
SET_TX_DESC_RATE_ID_8188GTV(ptxdesc, pattrib->raid);
|
||||
SET_TX_DESC_SEQ_8188GTV(ptxdesc, pattrib->seqnum);
|
||||
SET_TX_DESC_HWSEQ_EN_8188GTV(ptxdesc, 1);
|
||||
SET_TX_DESC_USE_RATE_8188GTV(ptxdesc, 1);
|
||||
SET_TX_DESC_DISABLE_FB_8188GTV(ptxdesc, 1);
|
||||
|
||||
if (pmp_priv->preamble)
|
||||
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
|
||||
SET_TX_DESC_DATA_SHORT_8188GTV(ptxdesc, 1);
|
||||
|
||||
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
|
||||
SET_TX_DESC_DATA_BW_8188GTV(ptxdesc, 1);
|
||||
|
||||
SET_TX_DESC_TX_RATE_8188GTV(ptxdesc, pmp_priv->rateidx);
|
||||
|
||||
SET_TX_DESC_DATA_RATE_FB_LIMIT_8188GTV(ptxdesc, 0x1F);
|
||||
SET_TX_DESC_RTS_RATE_FB_LIMIT_8188GTV(ptxdesc, 0xF);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
void fill_tx_desc_8723d(PADAPTER padapter)
|
||||
{
|
||||
@ -1773,6 +1847,70 @@ void fill_tx_desc_8723d(PADAPTER padapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
void fill_tx_desc_8710b(PADAPTER padapter)
|
||||
{
|
||||
struct mp_priv *pmp_priv = &padapter->mppriv;
|
||||
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
|
||||
u8 *ptxdesc = pmp_priv->tx.desc;
|
||||
|
||||
SET_TX_DESC_BK_8710B(ptxdesc, 1);
|
||||
SET_TX_DESC_MACID_8710B(ptxdesc, pattrib->mac_id);
|
||||
SET_TX_DESC_QUEUE_SEL_8710B(ptxdesc, pattrib->qsel);
|
||||
|
||||
SET_TX_DESC_RATE_ID_8710B(ptxdesc, pattrib->raid);
|
||||
SET_TX_DESC_SEQ_8710B(ptxdesc, pattrib->seqnum);
|
||||
SET_TX_DESC_HWSEQ_EN_8710B(ptxdesc, 1);
|
||||
SET_TX_DESC_USE_RATE_8710B(ptxdesc, 1);
|
||||
SET_TX_DESC_DISABLE_FB_8710B(ptxdesc, 1);
|
||||
|
||||
if (pmp_priv->preamble) {
|
||||
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
|
||||
SET_TX_DESC_DATA_SHORT_8710B(ptxdesc, 1);
|
||||
}
|
||||
|
||||
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
|
||||
SET_TX_DESC_DATA_BW_8710B(ptxdesc, 1);
|
||||
|
||||
SET_TX_DESC_TX_RATE_8710B(ptxdesc, pmp_priv->rateidx);
|
||||
|
||||
SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(ptxdesc, 0x1F);
|
||||
SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(ptxdesc, 0xF);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
void fill_tx_desc_8192f(PADAPTER padapter)
|
||||
{
|
||||
struct mp_priv *pmp_priv = &padapter->mppriv;
|
||||
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
|
||||
u8 *ptxdesc = pmp_priv->tx.desc;
|
||||
|
||||
SET_TX_DESC_BK_8192F(ptxdesc, 1);
|
||||
SET_TX_DESC_MACID_8192F(ptxdesc, pattrib->mac_id);
|
||||
SET_TX_DESC_QUEUE_SEL_8192F(ptxdesc, pattrib->qsel);
|
||||
|
||||
SET_TX_DESC_RATE_ID_8192F(ptxdesc, pattrib->raid);
|
||||
SET_TX_DESC_SEQ_8192F(ptxdesc, pattrib->seqnum);
|
||||
SET_TX_DESC_HWSEQ_EN_8192F(ptxdesc, 1);
|
||||
SET_TX_DESC_USE_RATE_8192F(ptxdesc, 1);
|
||||
SET_TX_DESC_DISABLE_FB_8192F(ptxdesc, 1);
|
||||
|
||||
if (pmp_priv->preamble) {
|
||||
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
|
||||
SET_TX_DESC_DATA_SHORT_8192F(ptxdesc, 1);
|
||||
}
|
||||
|
||||
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
|
||||
SET_TX_DESC_DATA_BW_8192F(ptxdesc, 1);
|
||||
|
||||
SET_TX_DESC_TX_RATE_8192F(ptxdesc, pmp_priv->rateidx);
|
||||
|
||||
SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(ptxdesc, 0x1F);
|
||||
SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(ptxdesc, 0xF);
|
||||
}
|
||||
|
||||
#endif
|
||||
static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
|
||||
{
|
||||
|
||||
@ -1790,8 +1928,8 @@ static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
|
||||
|
||||
void SetPacketTx(PADAPTER padapter)
|
||||
{
|
||||
u8 *ptr, *pkt_start, *pkt_end, *fctrl;
|
||||
u32 pkt_size, offset, startPlace, i;
|
||||
u8 *ptr, *pkt_start, *pkt_end;
|
||||
u32 pkt_size, i;
|
||||
struct rtw_ieee80211_hdr *hdr;
|
||||
u8 payload;
|
||||
s32 bmcast;
|
||||
@ -1885,10 +2023,24 @@ void SetPacketTx(PADAPTER padapter)
|
||||
fill_tx_desc_8188f(padapter);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
if (IS_HARDWARE_TYPE_8188GTV(padapter))
|
||||
fill_tx_desc_8188gtv(padapter);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
if (IS_HARDWARE_TYPE_8723D(padapter))
|
||||
fill_tx_desc_8723d(padapter);
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
if (IS_HARDWARE_TYPE_8192F(padapter))
|
||||
fill_tx_desc_8192f(padapter);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if (IS_HARDWARE_TYPE_8710B(padapter))
|
||||
fill_tx_desc_8710b(padapter);
|
||||
#endif
|
||||
|
||||
/* 3 4. make wlan header, make_wlanhdr() */
|
||||
hdr = (struct rtw_ieee80211_hdr *)pkt_start;
|
||||
@ -1984,6 +2136,7 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
|
||||
write_bbreg(pAdapter, 0x550, BIT3, bEnable);
|
||||
#endif
|
||||
rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
|
||||
pmppriv->brx_filter_beacon = _TRUE;
|
||||
|
||||
} else {
|
||||
pHalData->ReceiveConfig |= RCR_ADF;
|
||||
@ -2053,6 +2206,167 @@ u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter)
|
||||
return OFDM_cnt + CCK_cnt + HT_cnt;
|
||||
}
|
||||
|
||||
struct psd_init_regs {
|
||||
/* 3 wire */
|
||||
int reg_88c;
|
||||
int reg_c00;
|
||||
int reg_e00;
|
||||
int reg_1800;
|
||||
int reg_1a00;
|
||||
/* cck */
|
||||
int reg_800;
|
||||
int reg_808;
|
||||
};
|
||||
|
||||
static int rtw_mp_psd_init(PADAPTER padapter, struct psd_init_regs *regs)
|
||||
{
|
||||
HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter);
|
||||
|
||||
switch (phal_data->rf_type) {
|
||||
/* 1R */
|
||||
case RF_1T1R:
|
||||
if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
|
||||
/* 11AC 1R PSD Setting 3wire & cck off */
|
||||
regs->reg_c00 = rtw_read32(padapter, 0xC00);
|
||||
phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
|
||||
regs->reg_808 = rtw_read32(padapter, 0x808);
|
||||
phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
|
||||
} else {
|
||||
/* 11N 3-wire off 1 */
|
||||
regs->reg_88c = rtw_read32(padapter, 0x88C);
|
||||
phy_set_bb_reg(padapter, 0x88C, 0x300000, 0x3);
|
||||
/* 11N CCK off */
|
||||
regs->reg_800 = rtw_read32(padapter, 0x800);
|
||||
phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
|
||||
}
|
||||
break;
|
||||
|
||||
/* 2R */
|
||||
case RF_1T2R:
|
||||
case RF_2T2R:
|
||||
if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
|
||||
/* 11AC 2R PSD Setting 3wire & cck off */
|
||||
regs->reg_c00 = rtw_read32(padapter, 0xC00);
|
||||
regs->reg_e00 = rtw_read32(padapter, 0xE00);
|
||||
phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
|
||||
regs->reg_808 = rtw_read32(padapter, 0x808);
|
||||
phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
|
||||
} else {
|
||||
/* 11N 3-wire off 2 */
|
||||
regs->reg_88c = rtw_read32(padapter, 0x88C);
|
||||
phy_set_bb_reg(padapter, 0x88C, 0xF00000, 0xF);
|
||||
/* 11N CCK off */
|
||||
regs->reg_800 = rtw_read32(padapter, 0x800);
|
||||
phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
|
||||
}
|
||||
break;
|
||||
|
||||
/* 3R */
|
||||
case RF_2T3R:
|
||||
case RF_3T3R:
|
||||
if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
|
||||
/* 11AC 3R PSD Setting 3wire & cck off */
|
||||
regs->reg_c00 = rtw_read32(padapter, 0xC00);
|
||||
regs->reg_e00 = rtw_read32(padapter, 0xE00);
|
||||
regs->reg_1800 = rtw_read32(padapter, 0x1800);
|
||||
phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
|
||||
regs->reg_808 = rtw_read32(padapter, 0x808);
|
||||
phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
|
||||
} else {
|
||||
RTW_ERR("%s: 11n don't support 3R\n", __func__);
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
|
||||
/* 4R */
|
||||
case RF_2T4R:
|
||||
case RF_3T4R:
|
||||
case RF_4T4R:
|
||||
if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
|
||||
/* 11AC 4R PSD Setting 3wire & cck off */
|
||||
regs->reg_c00 = rtw_read32(padapter, 0xC00);
|
||||
regs->reg_e00 = rtw_read32(padapter, 0xE00);
|
||||
regs->reg_1800 = rtw_read32(padapter, 0x1800);
|
||||
regs->reg_1a00 = rtw_read32(padapter, 0x1A00);
|
||||
phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
|
||||
phy_set_bb_reg(padapter, 0x1A00, 0x3, 0x00);
|
||||
regs->reg_808 = rtw_read32(padapter, 0x808);
|
||||
phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
|
||||
} else {
|
||||
RTW_ERR("%s: 11n don't support 4R\n", __func__);
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
RTW_ERR("%s: unknown %d rf type\n", __func__, phal_data->rf_type);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Set PSD points, 0=128, 1=256, 2=512, 3=1024 */
|
||||
if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC))
|
||||
phy_set_bb_reg(padapter, 0x910, 0xC000, 3);
|
||||
else
|
||||
phy_set_bb_reg(padapter, 0x808, 0xC000, 3);
|
||||
|
||||
RTW_INFO("%s: set %d rf type done\n", __func__, phal_data->rf_type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtw_mp_psd_close(PADAPTER padapter, struct psd_init_regs *regs)
|
||||
{
|
||||
HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter);
|
||||
|
||||
|
||||
if (!hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
|
||||
/* 11n 3wire restore */
|
||||
rtw_write32(padapter, 0x88C, regs->reg_88c);
|
||||
/* 11n cck restore */
|
||||
rtw_write32(padapter, 0x800, regs->reg_800);
|
||||
RTW_INFO("%s: restore %d rf type\n", __func__, phal_data->rf_type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 11ac 3wire restore */
|
||||
switch (phal_data->rf_type) {
|
||||
case RF_1T1R:
|
||||
rtw_write32(padapter, 0xC00, regs->reg_c00);
|
||||
break;
|
||||
case RF_1T2R:
|
||||
case RF_2T2R:
|
||||
rtw_write32(padapter, 0xC00, regs->reg_c00);
|
||||
rtw_write32(padapter, 0xE00, regs->reg_e00);
|
||||
break;
|
||||
case RF_2T3R:
|
||||
case RF_3T3R:
|
||||
rtw_write32(padapter, 0xC00, regs->reg_c00);
|
||||
rtw_write32(padapter, 0xE00, regs->reg_e00);
|
||||
rtw_write32(padapter, 0x1800, regs->reg_1800);
|
||||
break;
|
||||
case RF_2T4R:
|
||||
case RF_3T4R:
|
||||
case RF_4T4R:
|
||||
rtw_write32(padapter, 0xC00, regs->reg_c00);
|
||||
rtw_write32(padapter, 0xE00, regs->reg_e00);
|
||||
rtw_write32(padapter, 0x1800, regs->reg_1800);
|
||||
rtw_write32(padapter, 0x1A00, regs->reg_1a00);
|
||||
break;
|
||||
default:
|
||||
RTW_WARN("%s: unknown %d rf type\n", __func__, phal_data->rf_type);
|
||||
break;
|
||||
}
|
||||
|
||||
/* 11ac cck restore */
|
||||
rtw_write32(padapter, 0x808, regs->reg_808);
|
||||
RTW_INFO("%s: restore %d rf type done\n", __func__, phal_data->rf_type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* reg 0x808[9:0]: FFT data x
|
||||
* reg 0x808[22]: 0 --> 1 to get 1 FFT data y
|
||||
* reg 0x8B4[15:0]: FFT data y report */
|
||||
@ -2102,7 +2416,8 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
|
||||
{
|
||||
u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
|
||||
u32 psd_data = 0;
|
||||
|
||||
struct psd_init_regs regs = {};
|
||||
int psd_analysis = 0;
|
||||
|
||||
#ifdef PLATFORM_LINUX
|
||||
if (!netif_running(pAdapter->pnetdev)) {
|
||||
@ -2118,6 +2433,11 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
|
||||
psd_pts = 128;
|
||||
psd_start = 64;
|
||||
psd_stop = 128;
|
||||
} else if (strncmp(data, "analysis,", 9) == 0) {
|
||||
if (rtw_mp_psd_init(pAdapter, ®s) != 0)
|
||||
return 0;
|
||||
psd_analysis = 1;
|
||||
sscanf(data + 9, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
|
||||
} else
|
||||
sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
|
||||
|
||||
@ -2139,6 +2459,9 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
|
||||
rtw_mdelay_os(100);
|
||||
#endif
|
||||
|
||||
if (psd_analysis)
|
||||
rtw_mp_psd_close(pAdapter, ®s);
|
||||
|
||||
return strlen(data) + 1;
|
||||
}
|
||||
|
||||
@ -2735,7 +3058,6 @@ ULONG mpt_ProQueryCalTxPower(
|
||||
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx);
|
||||
|
||||
ULONG TxPower = 1;
|
||||
u1Byte rate = 0;
|
||||
struct txpwr_idx_comp tic;
|
||||
u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
|
||||
|
||||
@ -2746,9 +3068,13 @@ ULONG mpt_ProQueryCalTxPower(
|
||||
, TxPower, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias);
|
||||
|
||||
pAdapter->mppriv.txpoweridx = (u8)TxPower;
|
||||
if (RfPath == RF_PATH_A)
|
||||
pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower;
|
||||
else if (RfPath == RF_PATH_B)
|
||||
pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower;
|
||||
else if (RfPath == RF_PATH_C)
|
||||
pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower;
|
||||
else if (RfPath == RF_PATH_D)
|
||||
pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)TxPower;
|
||||
hal_mpt_SetTxPower(pAdapter);
|
||||
|
||||
|
@ -103,43 +103,16 @@ void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
|
||||
_RTW_PRINT_SEL(sel, "INVALID\n");
|
||||
}
|
||||
|
||||
#define RTW_ADAPTIVITY_DML_DISABLE 0
|
||||
#define RTW_ADAPTIVITY_DML_ENABLE 1
|
||||
|
||||
void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct registry_priv *regsty = &adapter->registrypriv;
|
||||
|
||||
RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DML_");
|
||||
|
||||
if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE)
|
||||
_RTW_PRINT_SEL(sel, "DISABLE\n");
|
||||
else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE)
|
||||
_RTW_PRINT_SEL(sel, "ENABLE\n");
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "INVALID\n");
|
||||
}
|
||||
|
||||
void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter)
|
||||
{
|
||||
struct registry_priv *regsty = &adapter->registrypriv;
|
||||
|
||||
RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff);
|
||||
}
|
||||
|
||||
void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
|
||||
{
|
||||
rtw_odm_adaptivity_ver_msg(sel, adapter);
|
||||
rtw_odm_adaptivity_en_msg(sel, adapter);
|
||||
rtw_odm_adaptivity_mode_msg(sel, adapter);
|
||||
rtw_odm_adaptivity_dml_msg(sel, adapter);
|
||||
rtw_odm_adaptivity_dc_backoff_msg(sel, adapter);
|
||||
}
|
||||
|
||||
bool rtw_odm_adaptivity_needed(_adapter *adapter)
|
||||
{
|
||||
struct registry_priv *regsty = &adapter->registrypriv;
|
||||
struct mlme_priv *mlme = &adapter->mlmepriv;
|
||||
bool ret = _FALSE;
|
||||
|
||||
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
|
||||
@ -154,32 +127,20 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
|
||||
|
||||
rtw_odm_adaptivity_config_msg(sel, adapter);
|
||||
|
||||
RTW_PRINT_SEL(sel, "%10s %16s %16s %22s %12s\n"
|
||||
, "th_l2h_ini", "th_edcca_hl_diff", "th_l2h_ini_mode2", "th_edcca_hl_diff_mode2", "edcca_enable");
|
||||
RTW_PRINT_SEL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n"
|
||||
RTW_PRINT_SEL(sel, "%10s %16s\n"
|
||||
, "th_l2h_ini", "th_edcca_hl_diff");
|
||||
RTW_PRINT_SEL(sel, "0x%-8x %-16d\n"
|
||||
, (u8)odm->th_l2h_ini
|
||||
, odm->th_edcca_hl_diff
|
||||
, (u8)odm->th_l2h_ini_mode2
|
||||
, odm->th_edcca_hl_diff_mode2
|
||||
, odm->edcca_enable
|
||||
);
|
||||
|
||||
RTW_PRINT_SEL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag");
|
||||
RTW_PRINT_SEL(sel, "%-15x %-9x\n"
|
||||
, odm->adaptivity_enable
|
||||
, odm->adaptivity_flag
|
||||
);
|
||||
}
|
||||
|
||||
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff, s8 th_l2h_ini_mode2, s8 th_edcca_hl_diff_mode2, u8 edcca_enable)
|
||||
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff)
|
||||
{
|
||||
struct dm_struct *odm = adapter_to_phydm(adapter);
|
||||
|
||||
odm->th_l2h_ini = th_l2h_ini;
|
||||
odm->th_edcca_hl_diff = th_edcca_hl_diff;
|
||||
odm->th_l2h_ini_mode2 = th_l2h_ini_mode2;
|
||||
odm->th_edcca_hl_diff_mode2 = th_edcca_hl_diff_mode2;
|
||||
odm->edcca_enable = edcca_enable;
|
||||
}
|
||||
|
||||
void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
|
||||
@ -217,10 +178,10 @@ void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type)
|
||||
}
|
||||
}
|
||||
|
||||
inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
|
||||
inline u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj)
|
||||
{
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
struct dm_struct *pDM_Odm = adapter_to_phydm(adapter);
|
||||
struct dm_struct *pDM_Odm = dvobj_to_phydm(dvobj);
|
||||
|
||||
return pDM_Odm->dfs_region_domain;
|
||||
#else
|
||||
@ -228,10 +189,10 @@ inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
|
||||
#endif
|
||||
}
|
||||
|
||||
inline u8 rtw_odm_dfs_domain_unknown(_adapter *adapter)
|
||||
inline u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj)
|
||||
{
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
return rtw_odm_get_dfs_domain(adapter) == PHYDM_DFS_DOMAIN_UNKNOWN;
|
||||
return rtw_odm_get_dfs_domain(dvobj) == PHYDM_DFS_DOMAIN_UNKNOWN;
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
@ -258,6 +219,11 @@ inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
|
||||
{
|
||||
return phydm_radar_detect(adapter_to_phydm(adapter));
|
||||
}
|
||||
|
||||
inline u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj)
|
||||
{
|
||||
return phydm_dfs_polling_time(dvobj_to_phydm(dvobj));
|
||||
}
|
||||
#endif /* CONFIG_DFS_MASTER */
|
||||
|
||||
void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
|
||||
@ -301,7 +267,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
|
||||
*/
|
||||
|
||||
if ((*phys & 0xf) == 0) {
|
||||
struct phy_status_rpt_jaguar2_type0 *phys_t0 = (struct phy_status_rpt_jaguar2_type0 *)phys;
|
||||
struct phy_sts_rpt_jgr2_type0 *phys_t0 = (struct phy_sts_rpt_jgr2_type0 *)phys;
|
||||
|
||||
if (DBG_RX_PHYSTATUS_CHINFO) {
|
||||
RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n"
|
||||
@ -314,7 +280,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
|
||||
}
|
||||
|
||||
} else if ((*phys & 0xf) == 1) {
|
||||
struct phy_status_rpt_jaguar2_type1 *phys_t1 = (struct phy_status_rpt_jaguar2_type1 *)phys;
|
||||
struct phy_sts_rpt_jgr2_type1 *phys_t1 = (struct phy_sts_rpt_jgr2_type1 *)phys;
|
||||
u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc;
|
||||
u8 pkt_cch = 0;
|
||||
u8 pkt_bw = CHANNEL_WIDTH_20;
|
||||
@ -435,7 +401,7 @@ type1_end:
|
||||
attrib->ch = pkt_cch;
|
||||
|
||||
} else {
|
||||
struct phy_status_rpt_jaguar2_type2 *phys_t2 = (struct phy_status_rpt_jaguar2_type2 *)phys;
|
||||
struct phy_sts_rpt_jgr2_type2 *phys_t2 = (struct phy_sts_rpt_jgr2_type2 *)phys;
|
||||
|
||||
if (DBG_RX_PHYSTATUS_CHINFO) {
|
||||
RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n"
|
||||
|
@ -290,7 +290,6 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
|
||||
unsigned short *fctrl;
|
||||
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
|
||||
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
|
||||
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
|
||||
@ -2807,8 +2806,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
|
||||
u8 attr_content = 0x00;
|
||||
u32 attr_contentlen = 0;
|
||||
u8 operatingch_info[5] = { 0x00 };
|
||||
uint ch_cnt = 0;
|
||||
u8 ch_content[100] = { 0x00 };
|
||||
u8 groupid[38];
|
||||
u16 cap_attr;
|
||||
u8 peer_ch_list[100] = { 0x00 };
|
||||
@ -2974,7 +2971,9 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
|
||||
|
||||
u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
|
||||
{
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
_adapter *padapter = pwdinfo->padapter;
|
||||
#endif
|
||||
u8 *ies;
|
||||
u32 ies_len;
|
||||
u8 *p2p_ie;
|
||||
@ -3097,8 +3096,6 @@ void p2p_concurrent_handler(_adapter *padapter);
|
||||
void restore_p2p_state_handler(_adapter *padapter)
|
||||
{
|
||||
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
|
||||
|
||||
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL))
|
||||
rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE);
|
||||
@ -3295,16 +3292,15 @@ u8 roch_stay_in_cur_chan(_adapter *padapter)
|
||||
if (iface) {
|
||||
pmlmepriv = &iface->mlmepriv;
|
||||
|
||||
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS) == _TRUE) {
|
||||
RTW_ERR(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS (mlme state:0x%x)\n",
|
||||
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE) == _TRUE) {
|
||||
RTW_INFO(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE (mlme state:0x%x)\n",
|
||||
ADPT_ARG(iface), get_fwstate(&iface->mlmepriv));
|
||||
rst = _TRUE;
|
||||
break;
|
||||
}
|
||||
#ifdef CONFIG_AP_MODE
|
||||
if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) {
|
||||
if (rtw_ap_sta_linking_state_check(iface) == _TRUE) {
|
||||
RTW_ERR(ADPT_FMT"- SoftAP/Mesh -have sta under linking\n", ADPT_ARG(iface));
|
||||
if (rtw_ap_sta_states_check(iface) == _TRUE) {
|
||||
rst = _TRUE;
|
||||
break;
|
||||
}
|
||||
@ -3322,8 +3318,12 @@ static int ro_ch_handler(_adapter *adapter, u8 *buf)
|
||||
struct p2p_roch_parm *roch_parm = (struct p2p_roch_parm *)buf;
|
||||
struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
|
||||
struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &adapter->cfg80211_wdinfo;
|
||||
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
#ifdef RTW_ROCH_BACK_OP
|
||||
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
|
||||
#endif
|
||||
#endif
|
||||
u8 ready_on_channel = _FALSE;
|
||||
u8 remain_ch;
|
||||
unsigned int duration;
|
||||
@ -3442,6 +3442,7 @@ static int cancel_ro_ch_handler(_adapter *padapter, u8 *buf)
|
||||
|
||||
#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE)
|
||||
_cancel_timer_ex(&pwdinfo->ap_p2p_switch_timer);
|
||||
ATOMIC_SET(&pwdev_priv->switch_ch_to, 1);
|
||||
#endif
|
||||
|
||||
if (rtw_mi_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) {
|
||||
@ -3503,6 +3504,7 @@ static void ro_ch_timer_process(void *FunctionContext)
|
||||
p2p_cancel_roch_cmd(adapter, 0, NULL, 0);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch)
|
||||
{
|
||||
u8 *ies, *p2p_ie;
|
||||
@ -3533,7 +3535,9 @@ static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32
|
||||
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
|
||||
static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch)
|
||||
{
|
||||
u8 *ies, *p2p_ie;
|
||||
@ -3577,11 +3581,12 @@ static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u
|
||||
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
|
||||
static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len)
|
||||
{
|
||||
bool fit = _FALSE;
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
u8 *ies, *p2p_ie;
|
||||
u32 ies_len, p2p_ielen;
|
||||
u8 union_ch = rtw_mi_get_union_chan(padapter);
|
||||
@ -3623,14 +3628,14 @@ static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame
|
||||
/* Get the next P2P IE */
|
||||
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
|
||||
}
|
||||
#endif
|
||||
|
||||
return fit;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_P2P_INVITE_IOT)
|
||||
static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len)
|
||||
{
|
||||
bool fit = _FALSE;
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
u8 *ies, *p2p_ie;
|
||||
u32 ies_len, p2p_ielen;
|
||||
u8 union_ch = rtw_mi_get_union_chan(padapter);
|
||||
@ -3659,13 +3664,13 @@ static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_b
|
||||
/* Get the next P2P IE */
|
||||
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
|
||||
}
|
||||
#endif
|
||||
|
||||
return fit;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len)
|
||||
{
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
u8 *ies, *p2p_ie;
|
||||
u32 ies_len, p2p_ielen;
|
||||
u8 union_ch = rtw_mi_get_union_chan(padapter);
|
||||
@ -3728,8 +3733,8 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WFD
|
||||
u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe)
|
||||
@ -3813,8 +3818,6 @@ u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe)
|
||||
bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe)
|
||||
{
|
||||
#define DBG_XFRAME_DEL_WFD_IE 0
|
||||
|
||||
_adapter *adapter = xframe->padapter;
|
||||
u8 *frame = xframe->buf_addr + TXDESC_OFFSET;
|
||||
u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr);
|
||||
u8 *frame_tail = frame + xframe->attrib.pktlen;
|
||||
@ -3861,12 +3864,9 @@ bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe)
|
||||
void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe)
|
||||
{
|
||||
_adapter *adapter = xframe->padapter;
|
||||
u8 *frame = xframe->buf_addr + TXDESC_OFFSET;
|
||||
u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr);
|
||||
u8 *frame_tail = frame + xframe->attrib.pktlen;
|
||||
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
struct wifidirect_info *wdinfo = &adapter->wdinfo;
|
||||
struct mlme_priv *mlme = &adapter->mlmepriv;
|
||||
#endif
|
||||
u8 build = 0;
|
||||
u8 del = 0;
|
||||
|
||||
@ -3874,7 +3874,7 @@ void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe)
|
||||
del = 1;
|
||||
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
if (_TRUE == wdinfo->wfd_info->wfd_enable)
|
||||
if (wdinfo->wfd_info->wfd_enable == _TRUE)
|
||||
#endif
|
||||
del = build = 1;
|
||||
|
||||
@ -3894,7 +3894,6 @@ u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len)
|
||||
int w_sz = 0;
|
||||
u8 ch_cnt = 0;
|
||||
u8 ch_list[40];
|
||||
bool continuous = _FALSE;
|
||||
|
||||
pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen);
|
||||
if (pattr != NULL) {
|
||||
@ -4353,7 +4352,6 @@ void rtw_init_cfg80211_wifidirect_info(_adapter *padapter)
|
||||
s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf)
|
||||
{
|
||||
int ret = H2C_SUCCESS;
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
|
||||
switch (intCmdType) {
|
||||
case P2P_FIND_PHASE_WK:
|
||||
@ -4430,7 +4428,6 @@ int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength)
|
||||
u8 p2p_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */
|
||||
u32 attr_contentlen = 0;
|
||||
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
|
||||
|
||||
if (IELength <= _BEACON_IE_OFFSET_)
|
||||
@ -4553,7 +4550,6 @@ void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state)
|
||||
{
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
u32 ps_deny = 0;
|
||||
|
||||
/* Pre action for p2p state */
|
||||
@ -4731,7 +4727,6 @@ static void pre_tx_scan_timer_process(void *FunctionContext)
|
||||
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
|
||||
_irqL irqL;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
u8 _status = 0;
|
||||
|
||||
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
|
||||
return;
|
||||
@ -5045,7 +5040,6 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
|
||||
#ifdef CONFIG_WFD
|
||||
struct wifi_display_info *pwfd_info = &padapter->wfd_info;
|
||||
#endif
|
||||
u8 union_ch = 0;
|
||||
pwdinfo = &padapter->wdinfo;
|
||||
|
||||
pwdinfo->padapter = padapter;
|
||||
@ -5060,6 +5054,8 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
|
||||
&& pwdinfo->driver_interface != DRIVER_CFG80211
|
||||
) {
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
u8 union_ch = 0;
|
||||
|
||||
if (rtw_mi_check_status(padapter, MI_LINKED))
|
||||
union_ch = rtw_mi_get_union_chan(padapter);
|
||||
|
||||
@ -5195,6 +5191,14 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
|
||||
pwdinfo->p2p_info.scan_op_ch_only = 0;
|
||||
}
|
||||
|
||||
void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role)
|
||||
{
|
||||
if (wdinfo->role != role) {
|
||||
wdinfo->role = role;
|
||||
rtw_mi_update_iface_status(&(wdinfo->padapter->mlmepriv), 0);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DBG_P2P
|
||||
|
||||
/**
|
||||
@ -5343,9 +5347,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
|
||||
if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) {
|
||||
u8 channel, ch_offset;
|
||||
u16 bwmode;
|
||||
|
||||
#if defined(CONFIG_CONCURRENT_MODE) && (!defined(RTW_P2P_GROUP_INTERFACE) || !RTW_P2P_GROUP_INTERFACE)
|
||||
/* Commented by Albert 2011/12/30 */
|
||||
/* The driver just supports 1 P2P group operation. */
|
||||
|
@ -18,13 +18,13 @@
|
||||
#include <hal_data.h>
|
||||
#include <hal_com_h2c.h>
|
||||
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
int rtw_fw_ps_state(PADAPTER padapter)
|
||||
{
|
||||
struct dvobj_priv *psdpriv = padapter->dvobj;
|
||||
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
|
||||
int ret = _FAIL, dont_care = 0;
|
||||
u16 fw_ps_state = 0;
|
||||
u32 start_time;
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
struct registry_priv *registry_par = &padapter->registrypriv;
|
||||
|
||||
@ -40,6 +40,15 @@ int rtw_fw_ps_state(PADAPTER padapter)
|
||||
, rtw_is_drv_stopped(padapter) ? "True" : "False");
|
||||
goto exit_fw_ps_state;
|
||||
}
|
||||
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state);
|
||||
if ((fw_ps_state & BIT_LPS_STATUS) == 0)
|
||||
ret = _SUCCESS;
|
||||
else {
|
||||
pdbgpriv->dbg_poll_fail_cnt++;
|
||||
RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state);
|
||||
}
|
||||
#else
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care);
|
||||
{
|
||||
/* 4. if 0x88[7]=1, driver set cmd to leave LPS/IPS. */
|
||||
@ -58,13 +67,13 @@ int rtw_fw_ps_state(PADAPTER padapter)
|
||||
RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
exit_fw_ps_state:
|
||||
_exit_pwrlock(&pwrpriv->check_32k_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /*DBG_CHECK_FW_PS_STATE*/
|
||||
#ifdef CONFIG_IPS
|
||||
void _ips_enter(_adapter *padapter)
|
||||
{
|
||||
@ -144,8 +153,10 @@ int _ips_leave(_adapter *padapter)
|
||||
int ips_leave(_adapter *padapter)
|
||||
{
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
struct dvobj_priv *psdpriv = padapter->dvobj;
|
||||
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
|
||||
#endif
|
||||
int ret;
|
||||
|
||||
if (!is_primary_adapter(padapter))
|
||||
@ -263,9 +274,6 @@ exit:
|
||||
*/
|
||||
void rtw_ps_processor(_adapter *padapter)
|
||||
{
|
||||
#ifdef CONFIG_P2P
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
#endif /* CONFIG_P2P */
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
struct dvobj_priv *psdpriv = padapter->dvobj;
|
||||
@ -398,9 +406,69 @@ void pwr_state_check_handler(void *ctx)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LPS
|
||||
#ifdef CONFIG_CHECK_LEAVE_LPS
|
||||
#ifdef CONFIG_LPS_CHK_BY_TP
|
||||
void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta)
|
||||
{
|
||||
struct stainfo_stats *pstats = &sta->sta_stats;
|
||||
u64 cur_acc_tx_bytes = 0, cur_acc_rx_bytes = 0;
|
||||
u32 tx_tp_kbyte = 0, rx_tp_kbyte = 0;
|
||||
u32 tx_tp_th = 0, rx_tp_th = 0;
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
u8 leave_lps = _FALSE;
|
||||
|
||||
if (tx) { /* from tx */
|
||||
cur_acc_tx_bytes = pstats->tx_bytes - pstats->acc_tx_bytes;
|
||||
tx_tp_kbyte = cur_acc_tx_bytes >> 10;
|
||||
tx_tp_th = pwrpriv->lps_tx_tp_th * 1024 / 8 * 2; /*KBytes @2s*/
|
||||
|
||||
if (tx_tp_kbyte >= tx_tp_th ||
|
||||
padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod >= pwrpriv->lps_tx_pkts){
|
||||
if (pwrpriv->bLeisurePs
|
||||
&& (pwrpriv->pwr_mode != PS_MODE_ACTIVE)
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
&& (rtw_btcoex_IsBtControlLps(padapter) == _FALSE)
|
||||
#endif
|
||||
) {
|
||||
leave_lps = _TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
} else { /* from rx path */
|
||||
cur_acc_rx_bytes = pstats->rx_bytes - pstats->acc_rx_bytes;
|
||||
rx_tp_kbyte = cur_acc_rx_bytes >> 10;
|
||||
rx_tp_th = pwrpriv->lps_rx_tp_th * 1024 / 8 * 2;
|
||||
|
||||
if (rx_tp_kbyte>= rx_tp_th ||
|
||||
padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod >= pwrpriv->lps_rx_pkts) {
|
||||
if (pwrpriv->bLeisurePs
|
||||
&& (pwrpriv->pwr_mode != PS_MODE_ACTIVE)
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
&& (rtw_btcoex_IsBtControlLps(padapter) == _FALSE)
|
||||
#endif
|
||||
) {
|
||||
leave_lps = _TRUE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (leave_lps) {
|
||||
#ifdef DBG_LPS_CHK_BY_TP
|
||||
RTW_INFO("leave lps via %s, ", tx ? "Tx" : "Rx");
|
||||
if (tx)
|
||||
RTW_INFO("Tx = %d [%d] (KB)\n", tx_tp_kbyte, tx_tp_th);
|
||||
else
|
||||
RTW_INFO("Rx = %d [%d] (KB)\n", rx_tp_kbyte, rx_tp_th);
|
||||
#endif
|
||||
pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th;
|
||||
/* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); */
|
||||
rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, 1);
|
||||
}
|
||||
}
|
||||
#endif /*CONFIG_LPS_CHK_BY_TP*/
|
||||
|
||||
void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
|
||||
{
|
||||
#ifdef CONFIG_CHECK_LEAVE_LPS
|
||||
static systime start_time = 0;
|
||||
static u32 xmit_cnt = 0;
|
||||
u8 bLeaveLPS = _FALSE;
|
||||
@ -450,48 +518,63 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
|
||||
/* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); */
|
||||
rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, tx ? 0 : 1);
|
||||
}
|
||||
#endif /* CONFIG_CHECK_LEAVE_LPS */
|
||||
}
|
||||
#endif /* CONFIG_CHECK_LEAVE_LPS */
|
||||
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
|
||||
#define LPS_CPWM_TIMEOUT_MS 10 /*ms*/
|
||||
#define LPS_RPWM_RETRY_CNT 3
|
||||
|
||||
u8 rtw_cpwm_polling(_adapter *adapter, u8 rpwm, u8 cpwm_orig)
|
||||
{
|
||||
u8 result = _FAIL;
|
||||
u8 cpwm_now;
|
||||
u8 poll_cnt = 0;
|
||||
u8 rst = _FAIL;
|
||||
u8 cpwm_now = 0;
|
||||
systime start_time;
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
struct debug_priv *pdbgpriv = &(adapter_to_dvobj(adapter)->drv_dbg);
|
||||
#endif
|
||||
|
||||
/*RTW_INFO("%s.....\n", __func__);*/
|
||||
pwrpriv->rpwm_retry = 0;
|
||||
|
||||
do {
|
||||
start_time = rtw_get_current_time();
|
||||
|
||||
/* polling cpwm */
|
||||
do {
|
||||
rtw_msleep_os(1);
|
||||
poll_cnt++;
|
||||
cpwm_now = 0;
|
||||
rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now);
|
||||
|
||||
if ((cpwm_orig ^ cpwm_now) & 0x80) {
|
||||
pwrpriv->cpwm = PS_STATE_S4;
|
||||
pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
|
||||
rst = _SUCCESS;
|
||||
break;
|
||||
}
|
||||
} while (rtw_get_passing_time_ms(start_time) < LPS_CPWM_TIMEOUT_MS && !RTW_CANNOT_RUN(adapter));
|
||||
|
||||
if (rst == _SUCCESS)
|
||||
break;
|
||||
else {
|
||||
/* rpwm retry */
|
||||
cpwm_orig = cpwm_now;
|
||||
rpwm &= ~PS_TOGGLE;
|
||||
rpwm |= pwrpriv->tog;
|
||||
rtw_hal_set_hwreg(adapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
|
||||
pwrpriv->tog += 0x80;
|
||||
}
|
||||
} while (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT && !RTW_CANNOT_RUN(adapter));
|
||||
|
||||
if (rst == _SUCCESS) {
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
RTW_INFO("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
|
||||
, __func__, poll_cnt, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR));
|
||||
RTW_INFO("%s: polling cpwm OK! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
|
||||
, __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR));
|
||||
if (rtw_fw_ps_state(adapter) == _FAIL) {
|
||||
RTW_INFO("leave 32k but fw state in 32k\n");
|
||||
pdbgpriv->dbg_rpwm_toogle_cnt++;
|
||||
}
|
||||
#endif /* DBG_CHECK_FW_PS_STATE */
|
||||
result = _SUCCESS;
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
|
||||
RTW_ERR("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x\n"
|
||||
, __func__, poll_cnt, cpwm_orig, cpwm_now);
|
||||
} else {
|
||||
RTW_ERR("%s: polling cpwm timeout! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x\n"
|
||||
, __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now);
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
if (rtw_fw_ps_state(adapter) == _FAIL) {
|
||||
RTW_INFO("rpwm timeout and fw ps state in 32k\n");
|
||||
@ -502,10 +585,9 @@ u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
|
||||
#ifdef CONFIG_LPS_RPWM_TIMER
|
||||
_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
|
||||
#endif /* CONFIG_LPS_RPWM_TIMER */
|
||||
break;
|
||||
}
|
||||
} while (1);
|
||||
return result;
|
||||
|
||||
return rst;
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
@ -517,15 +599,13 @@ u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
|
||||
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
|
||||
*
|
||||
*/
|
||||
void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
u8 rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
{
|
||||
u8 rpwm;
|
||||
u8 rpwm = 0xFF;
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
u8 cpwm_orig;
|
||||
#endif
|
||||
struct dvobj_priv *psdpriv = padapter->dvobj;
|
||||
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
|
||||
|
||||
pslv = PS_STATE(pslv);
|
||||
|
||||
@ -541,7 +621,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
#endif
|
||||
|| (pwrpriv->lps_level == LPS_NORMAL)
|
||||
) {
|
||||
return;
|
||||
return rpwm;
|
||||
}
|
||||
}
|
||||
|
||||
@ -550,12 +630,12 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
|
||||
pwrpriv->cpwm = PS_STATE_S4;
|
||||
|
||||
return;
|
||||
return rpwm;
|
||||
}
|
||||
|
||||
if (rtw_is_drv_stopped(padapter))
|
||||
if (pslv < PS_STATE_S2)
|
||||
return;
|
||||
return rpwm;
|
||||
|
||||
rpwm = pslv | pwrpriv->tog;
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
@ -573,9 +653,16 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING)
|
||||
if (rpwm & PS_ACK)
|
||||
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS);
|
||||
if (rpwm & PS_ACK) {
|
||||
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
|
||||
if (pwrpriv->wowlan_mode != _TRUE &&
|
||||
pwrpriv->wowlan_ap_mode != _TRUE &&
|
||||
pwrpriv->wowlan_p2p_mode != _TRUE)
|
||||
#endif
|
||||
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS);
|
||||
}
|
||||
#endif /* CONFIG_LPS_RPWM_TIMER & !CONFIG_DETECT_CPWM_BY_POLLING */
|
||||
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
|
||||
|
||||
pwrpriv->tog += 0x80;
|
||||
@ -584,13 +671,13 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
/* No LPS 32K, No Ack */
|
||||
if (rpwm & PS_ACK) {
|
||||
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
|
||||
rtw_cpwm_polling(padapter, cpwm_orig);
|
||||
rtw_cpwm_polling(padapter, rpwm, cpwm_orig);
|
||||
#else
|
||||
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
|
||||
if (pwrpriv->wowlan_mode == _TRUE ||
|
||||
pwrpriv->wowlan_ap_mode == _TRUE ||
|
||||
pwrpriv->wowlan_p2p_mode == _TRUE)
|
||||
rtw_cpwm_polling(padapter, cpwm_orig);
|
||||
rtw_cpwm_polling(padapter, rpwm, cpwm_orig);
|
||||
#endif /*#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)*/
|
||||
#endif /*#ifdef CONFIG_DETECT_CPWM_BY_POLLING*/
|
||||
} else
|
||||
@ -599,6 +686,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
|
||||
pwrpriv->cpwm = pslv;
|
||||
}
|
||||
|
||||
return rpwm;
|
||||
}
|
||||
|
||||
u8 PS_RDY_CHECK(_adapter *padapter)
|
||||
@ -606,12 +694,6 @@ u8 PS_RDY_CHECK(_adapter *padapter)
|
||||
u32 delta_ms;
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
#ifdef CONFIG_P2P
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
#ifdef CONFIG_IOCTL_CFG80211
|
||||
struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;
|
||||
#endif /* CONFIG_IOCTL_CFG80211 */
|
||||
#endif /* CONFIG_P2P */
|
||||
|
||||
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
|
||||
if (_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_mode)
|
||||
@ -642,6 +724,9 @@ u8 PS_RDY_CHECK(_adapter *padapter)
|
||||
/* TDLS link is established. */
|
||||
|| (padapter->tdlsinfo.link_established == _TRUE)
|
||||
#endif /* CONFIG_TDLS */
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
|| adapter_to_rfctl(padapter)->radar_detect_enabled
|
||||
#endif
|
||||
)
|
||||
return _FALSE;
|
||||
|
||||
@ -777,9 +862,14 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
|
||||
void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg)
|
||||
{
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
|
||||
struct dvobj_priv *psdpriv = padapter->dvobj;
|
||||
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
|
||||
#endif
|
||||
#ifdef CONFIG_WMMPS_STA
|
||||
struct registry_priv *pregistrypriv = &padapter->registrypriv;
|
||||
#endif
|
||||
#ifdef CONFIG_P2P
|
||||
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
|
||||
#endif /* CONFIG_P2P */
|
||||
@ -907,11 +997,18 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_WOWLAN
|
||||
if (pwrpriv->wowlan_mode == _TRUE)
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode));
|
||||
#endif /* CONFIG_WOWLAN */
|
||||
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_LPS_STATE_CHK, (u8 *)(&ps_mode));
|
||||
|
||||
|
||||
#ifdef CONFIG_LPS_PG
|
||||
if (pwrpriv->lps_level == LPS_PG) {
|
||||
lps_pg_hdl_id = LPS_PG_RESEND_H2C;
|
||||
lps_pg_hdl_id = LPS_PG_PHYDM_EN;
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
|
||||
}
|
||||
#endif
|
||||
@ -936,6 +1033,9 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
|
||||
#ifdef CONFIG_P2P_WOWLAN
|
||||
|| (_TRUE == pwrpriv->wowlan_p2p_mode)
|
||||
#endif /* CONFIG_P2P_WOWLAN */
|
||||
#ifdef CONFIG_WOWLAN
|
||||
|| WOWLAN_IS_STA_MIX_MODE(padapter)
|
||||
#endif /* CONFIG_WOWLAN */
|
||||
) {
|
||||
u8 pslv;
|
||||
|
||||
@ -974,12 +1074,24 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
|
||||
pwrpriv->pwr_mode = ps_mode;
|
||||
pwrpriv->smart_ps = smart_ps;
|
||||
pwrpriv->bcn_ant_mode = bcn_ant_mode;
|
||||
#ifdef CONFIG_LPS_PG
|
||||
if (pwrpriv->lps_level == LPS_PG) {
|
||||
lps_pg_hdl_id = LPS_PG_PHYDM_DIS;
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WMMPS_STA
|
||||
pwrpriv->wmm_smart_ps = pregistrypriv->wmm_smart_ps;
|
||||
#endif /* CONFIG_WMMPS_STA */
|
||||
|
||||
|
||||
if (check_fwstate(pmlmepriv, _FW_LINKED))
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
|
||||
#ifdef CONFIG_WOWLAN
|
||||
if (pwrpriv->wowlan_mode == _TRUE)
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode));
|
||||
#endif /* CONFIG_WOWLAN */
|
||||
|
||||
#ifdef CONFIG_P2P_PS
|
||||
/* Set CTWindow after LPS */
|
||||
@ -1015,42 +1127,6 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Return:
|
||||
* 0: Leave OK
|
||||
* -1: Timeout
|
||||
* -2: Other error
|
||||
*/
|
||||
s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms)
|
||||
{
|
||||
systime start_time;
|
||||
u8 bAwake = _FALSE;
|
||||
s32 err = 0;
|
||||
|
||||
|
||||
start_time = rtw_get_current_time();
|
||||
while (1) {
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
|
||||
if (_TRUE == bAwake)
|
||||
break;
|
||||
|
||||
if (rtw_is_surprise_removed(padapter)) {
|
||||
err = -2;
|
||||
RTW_INFO("%s: device surprise removed!!\n", __FUNCTION__);
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtw_get_passing_time_ms(start_time) > delay_ms) {
|
||||
err = -1;
|
||||
RTW_INFO("%s: Wait for FW LPS leave more than %u ms!!!\n", __FUNCTION__, delay_ms);
|
||||
break;
|
||||
}
|
||||
rtw_usleep_os(100);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Enter the leisure power save mode.
|
||||
@ -1059,11 +1135,11 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
||||
struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
|
||||
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
|
||||
int n_assoc_iface = 0;
|
||||
int i;
|
||||
char buf[32] = {0};
|
||||
|
||||
#ifdef DBG_LA_MODE
|
||||
struct registry_priv *registry_par = &(padapter->registrypriv);
|
||||
#endif
|
||||
|
||||
/* RTW_INFO("+LeisurePSEnter\n"); */
|
||||
if (GET_HAL_DATA(padapter)->bFWReady == _FALSE)
|
||||
@ -1074,12 +1150,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
|
||||
return;
|
||||
#endif
|
||||
|
||||
/* Skip lps enter request if number of assocated adapters is not 1 */
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
|
||||
n_assoc_iface++;
|
||||
#ifdef DBG_LA_MODE
|
||||
if(registry_par->la_mode_en == 1) {
|
||||
RTW_INFO("%s LA debug mode lps_leave \n", __func__);
|
||||
return;
|
||||
}
|
||||
if (n_assoc_iface != 1)
|
||||
#endif
|
||||
/* Skip lps enter request if number of assocated adapters is not 1 */
|
||||
if (rtw_mi_get_assoc_if_num(padapter) != 1)
|
||||
return;
|
||||
|
||||
#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
|
||||
@ -1093,6 +1171,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CLIENT_PORT_CFG
|
||||
if ((rtw_hal_get_port(padapter) == CLT_PORT_INVALID) ||
|
||||
get_clt_num(padapter) > MAX_CLIENT_PORT_NUM){
|
||||
RTW_ERR(ADPT_FMT" cannot get client port or clt num(%d) over than 4\n", ADPT_ARG(padapter), get_clt_num(padapter));
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_P2P_PS
|
||||
if (padapter->wdinfo.p2p_ps_mode == P2P_PS_NOA) {
|
||||
return;/* supporting p2p client ps NOA via H2C_8723B_P2P_PS_OFFLOAD */
|
||||
@ -1136,10 +1222,10 @@ void LPS_Leave(PADAPTER padapter, const char *msg)
|
||||
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
||||
struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
|
||||
u32 start_time;
|
||||
u8 bAwake = _FALSE;
|
||||
char buf[32] = {0};
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
|
||||
#endif
|
||||
|
||||
|
||||
/* RTW_INFO("+LeisurePSLeave\n"); */
|
||||
@ -1163,9 +1249,6 @@ void LPS_Leave(PADAPTER padapter, const char *msg)
|
||||
#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS
|
||||
pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time);
|
||||
#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
|
||||
|
||||
if (pwrpriv->pwr_mode == PS_MODE_ACTIVE)
|
||||
LPS_RF_ON_check(padapter, LPS_LEAVE_TIMEOUT_MS);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1198,15 +1281,13 @@ void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en)
|
||||
void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
|
||||
{
|
||||
PADAPTER pri_padapter = GET_PRIMARY_ADAPTER(Adapter);
|
||||
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
|
||||
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter);
|
||||
struct dvobj_priv *psdpriv = Adapter->dvobj;
|
||||
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
#ifndef CONFIG_DETECT_CPWM_BY_POLLING
|
||||
u8 cpwm_orig, cpwm_now;
|
||||
systime start_time;
|
||||
u8 cpwm_orig;
|
||||
#endif /* CONFIG_DETECT_CPWM_BY_POLLING */
|
||||
|
||||
u8 rpwm;
|
||||
#endif
|
||||
|
||||
RTW_INFO("%s.....\n", __FUNCTION__);
|
||||
|
||||
@ -1229,46 +1310,15 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
|
||||
cpwm_orig = 0;
|
||||
rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_orig);
|
||||
#endif /* CONFIG_DETECT_CPWM_BY_POLLING */
|
||||
rtw_set_rpwm(Adapter, PS_STATE_S4);
|
||||
rpwm = rtw_set_rpwm(Adapter, PS_STATE_S4);
|
||||
|
||||
#ifndef CONFIG_DETECT_CPWM_BY_POLLING
|
||||
|
||||
start_time = rtw_get_current_time();
|
||||
|
||||
/* polling cpwm */
|
||||
do {
|
||||
rtw_mdelay_os(1);
|
||||
|
||||
rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_now);
|
||||
if ((cpwm_orig ^ cpwm_now) & 0x80) {
|
||||
pwrpriv->cpwm = PS_STATE_S4;
|
||||
pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
RTW_INFO("%s: polling cpwm OK! cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n"
|
||||
, __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(Adapter, REG_CR));
|
||||
if (rtw_fw_ps_state(Adapter) == _FAIL) {
|
||||
RTW_INFO("%s: leave 32k but fw state in 32k\n", __FUNCTION__);
|
||||
pdbgpriv->dbg_rpwm_toogle_cnt++;
|
||||
}
|
||||
#endif /* DBG_CHECK_FW_PS_STATE */
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
|
||||
RTW_INFO("%s: polling cpwm timeout! cpwm_orig=%02x, cpwm_now=%02x\n", __FUNCTION__, cpwm_orig, cpwm_now);
|
||||
#ifdef DBG_CHECK_FW_PS_STATE
|
||||
if (rtw_fw_ps_state(Adapter) == _FAIL) {
|
||||
RTW_INFO("rpwm timeout and fw ps state in 32k\n");
|
||||
pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
|
||||
}
|
||||
#endif /* DBG_CHECK_FW_PS_STATE */
|
||||
break;
|
||||
}
|
||||
} while (1);
|
||||
if (rpwm != 0xFF && rpwm & PS_ACK)
|
||||
rtw_cpwm_polling(Adapter, rpwm, cpwm_orig);
|
||||
#endif /* CONFIG_DETECT_CPWM_BY_POLLING */
|
||||
|
||||
_exit_pwrlock(&pwrpriv->lock);
|
||||
#endif
|
||||
#endif/*CONFIG_LPS_LCLK*/
|
||||
|
||||
#ifdef CONFIG_P2P_PS
|
||||
p2p_ps_wk_cmd(pri_padapter, P2P_PS_DISABLE, 0);
|
||||
@ -1308,31 +1358,25 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
|
||||
void LeaveAllPowerSaveMode(IN PADAPTER Adapter)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
|
||||
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
|
||||
u8 enqueue = 0;
|
||||
int n_assoc_iface = 0;
|
||||
int i;
|
||||
|
||||
|
||||
/* RTW_INFO("%s.....\n",__FUNCTION__); */
|
||||
|
||||
#ifndef CONFIG_NEW_NETDEV_HDL
|
||||
if (_FALSE == Adapter->bup) {
|
||||
RTW_INFO(FUNC_ADPT_FMT ": bup=%d Skip!\n",
|
||||
FUNC_ADPT_ARG(Adapter), Adapter->bup);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(Adapter));*/
|
||||
|
||||
if (rtw_is_surprise_removed(Adapter)) {
|
||||
RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter));
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
|
||||
n_assoc_iface++;
|
||||
}
|
||||
|
||||
if (n_assoc_iface) {
|
||||
if (rtw_mi_get_assoc_if_num(Adapter)) {
|
||||
/* connect */
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
enqueue = 1;
|
||||
@ -1413,7 +1457,7 @@ void LPS_Leave_check(
|
||||
break;
|
||||
|
||||
if (rtw_get_passing_time_ms(start_time) > 100) {
|
||||
RTW_INFO("Wait for cpwm event than 100 ms!!!\n");
|
||||
RTW_ERR("Wait for cpwm event than 100 ms!!!\n");
|
||||
break;
|
||||
}
|
||||
rtw_msleep_os(1);
|
||||
@ -1509,6 +1553,9 @@ static void rtw_cpwm_chk_fail_debug(_adapter *padapter)
|
||||
|
||||
RTW_INFO("[PS-DBG] Reg_10FC =0x%08x\n", cpu_state);
|
||||
RTW_INFO("[PS-DBG] Reg_10F8 =0x%08x\n", rtw_read32(padapter, 0x10F8));
|
||||
RTW_INFO("[PS-DBG] Reg_11F8 =0x%08x\n", rtw_read32(padapter, 0x11F8));
|
||||
RTW_INFO("[PS-DBG] Reg_4A4 =0x%08x\n", rtw_read32(padapter, 0x4A4));
|
||||
RTW_INFO("[PS-DBG] Reg_4A8 =0x%08x\n", rtw_read32(padapter, 0x4A8));
|
||||
|
||||
if (cpu_state == CPU_EXCEPTION_CODE) {
|
||||
RTW_INFO("[PS-DBG] Reg_48C =0x%08x\n", rtw_read32(padapter, 0x48C));
|
||||
@ -1518,6 +1565,14 @@ static void rtw_cpwm_chk_fail_debug(_adapter *padapter)
|
||||
RTW_INFO("[PS-DBG] Reg_49C =0x%08x\n", rtw_read32(padapter, 0x49C));
|
||||
RTW_INFO("[PS-DBG] Reg_4A0 =0x%08x\n", rtw_read32(padapter, 0x4A0));
|
||||
RTW_INFO("[PS-DBG] Reg_1BC =0x%08x\n", rtw_read32(padapter, 0x1BC));
|
||||
|
||||
RTW_INFO("[PS-DBG] Reg_008 =0x%08x\n", rtw_read32(padapter, 0x08));
|
||||
RTW_INFO("[PS-DBG] Reg_2F0 =0x%08x\n", rtw_read32(padapter, 0x2F0));
|
||||
RTW_INFO("[PS-DBG] Reg_2F4 =0x%08x\n", rtw_read32(padapter, 0x2F4));
|
||||
RTW_INFO("[PS-DBG] Reg_2F8 =0x%08x\n", rtw_read32(padapter, 0x2F8));
|
||||
RTW_INFO("[PS-DBG] Reg_2FC =0x%08x\n", rtw_read32(padapter, 0x2FC));
|
||||
|
||||
rtw_dump_fifo(RTW_DBGDUMP, padapter, 5, 0, 3072);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -1543,6 +1598,18 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work)
|
||||
RTW_INFO("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT) {
|
||||
u8 rpwm = (pwrpriv->rpwm | pwrpriv->tog | PS_ACK);
|
||||
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
|
||||
|
||||
pwrpriv->tog += 0x80;
|
||||
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
pwrpriv->rpwm_retry = 0;
|
||||
_exit_pwrlock(&pwrpriv->lock);
|
||||
|
||||
#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C))
|
||||
@ -2030,9 +2097,12 @@ void rtw_unregister_evt_alive(PADAPTER padapter)
|
||||
void rtw_init_pwrctrl_priv(PADAPTER padapter)
|
||||
{
|
||||
struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
|
||||
#ifdef CONFIG_WOWLAN
|
||||
struct registry_priv *registry_par = &padapter->registrypriv;
|
||||
|
||||
#endif
|
||||
#ifdef CONFIG_GPIO_WAKEUP
|
||||
u8 val8 = 0;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CONCURRENT_MODE)
|
||||
if (!is_primary_adapter(padapter))
|
||||
@ -2052,6 +2122,15 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
|
||||
pwrctrlpriv->lps_enter_cnts = 0;
|
||||
pwrctrlpriv->lps_leave_cnts = 0;
|
||||
pwrctrlpriv->bips_processing = _FALSE;
|
||||
#ifdef CONFIG_LPS_CHK_BY_TP
|
||||
pwrctrlpriv->lps_chk_by_tp = padapter->registrypriv.lps_chk_by_tp;
|
||||
pwrctrlpriv->lps_tx_tp_th = LPS_TX_TP_TH;
|
||||
pwrctrlpriv->lps_rx_tp_th = LPS_RX_TP_TH;
|
||||
pwrctrlpriv->lps_bi_tp_th = LPS_BI_TP_TH;
|
||||
pwrctrlpriv->lps_chk_cnt = pwrctrlpriv->lps_chk_cnt_th = LPS_TP_CHK_CNT;
|
||||
pwrctrlpriv->lps_tx_pkts = LPS_CHK_PKTS_TX;
|
||||
pwrctrlpriv->lps_rx_pkts = LPS_CHK_PKTS_RX;
|
||||
#endif
|
||||
|
||||
pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode;
|
||||
pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode;
|
||||
@ -2096,6 +2175,7 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
|
||||
pwrctrlpriv->dtim = 0;
|
||||
|
||||
pwrctrlpriv->tog = 0x80;
|
||||
pwrctrlpriv->rpwm_retry = 0;
|
||||
|
||||
#ifdef CONFIG_LPS_LCLK
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&pwrctrlpriv->rpwm));
|
||||
@ -2131,8 +2211,12 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
|
||||
|
||||
#ifdef CONFIG_GPIO_WAKEUP
|
||||
/*default low active*/
|
||||
pwrctrlpriv->is_high_active = HIGH_ACTIVE;
|
||||
|
||||
pwrctrlpriv->is_high_active = HIGH_ACTIVE_DEV2HST;
|
||||
pwrctrlpriv->hst2dev_high_active = HIGH_ACTIVE_HST2DEV;
|
||||
#ifdef CONFIG_RTW_ONE_PIN_GPIO
|
||||
rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
|
||||
rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
|
||||
#else
|
||||
#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE
|
||||
if (pwrctrlpriv->is_high_active == 0)
|
||||
rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
|
||||
@ -2140,11 +2224,11 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
|
||||
rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, 0);
|
||||
#else
|
||||
val8 = (pwrctrlpriv->is_high_active == 0) ? 1 : 0;
|
||||
rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
|
||||
rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8);
|
||||
RTW_INFO("%s: set GPIO_%d %d as default.\n",
|
||||
__func__, WAKEUP_GPIO_IDX, val8);
|
||||
#endif /*CONFIG_WAKEUP_GPIO_INPUT_MODE*/
|
||||
#endif /* CONFIG_RTW_ONE_PIN_GPIO */
|
||||
#endif /* CONFIG_GPIO_WAKEUP */
|
||||
|
||||
#ifdef CONFIG_WOWLAN
|
||||
@ -2412,9 +2496,9 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
|
||||
struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
|
||||
struct mlme_priv *pmlmepriv;
|
||||
int ret = _SUCCESS;
|
||||
int i;
|
||||
systime start = rtw_get_current_time();
|
||||
|
||||
/*RTW_INFO(FUNC_ADPT_FMT "===>\n", FUNC_ADPT_ARG(padapter));*/
|
||||
/* for LPS */
|
||||
LeaveAllPowerSaveMode(padapter);
|
||||
|
||||
@ -2550,6 +2634,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
|
||||
exit:
|
||||
if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time))
|
||||
pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms);
|
||||
/*RTW_INFO(FUNC_ADPT_FMT "<===\n", FUNC_ADPT_ARG(padapter));*/
|
||||
return ret;
|
||||
|
||||
}
|
||||
@ -2612,8 +2697,6 @@ int rtw_pm_set_ips(_adapter *padapter, u8 mode)
|
||||
void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason)
|
||||
{
|
||||
struct pwrctrl_priv *pwrpriv;
|
||||
s32 ret;
|
||||
|
||||
|
||||
/* RTW_INFO("+" FUNC_ADPT_FMT ": Request PS deny for %d (0x%08X)\n",
|
||||
* FUNC_ADPT_ARG(padapter), reason, BIT(reason)); */
|
||||
@ -2672,3 +2755,38 @@ u32 rtw_ps_deny_get(PADAPTER padapter)
|
||||
|
||||
return deny;
|
||||
}
|
||||
|
||||
static void _rtw_ssmps(_adapter *adapter, struct sta_info *sta)
|
||||
{
|
||||
struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
if (MLME_IS_STA(adapter)) {
|
||||
issue_action_SM_PS_wait_ack(adapter , get_my_bssid(&(pmlmeinfo->network)),
|
||||
sta->cmn.sm_ps, 3 , 1);
|
||||
}
|
||||
else if (MLME_IS_AP(adapter)) {
|
||||
|
||||
}
|
||||
rtw_phydm_ra_registed(adapter, sta);
|
||||
}
|
||||
void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta)
|
||||
{
|
||||
if (sta->cmn.sm_ps == SM_PS_STATIC)
|
||||
return;
|
||||
|
||||
RTW_INFO(ADPT_FMT" STA [" MAC_FMT "]\n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
|
||||
|
||||
sta->cmn.sm_ps = SM_PS_STATIC;
|
||||
_rtw_ssmps(adapter, sta);
|
||||
}
|
||||
void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta)
|
||||
{
|
||||
if (sta->cmn.sm_ps == SM_PS_DISABLE)
|
||||
return;
|
||||
|
||||
RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] \n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
|
||||
sta->cmn.sm_ps = SM_PS_DISABLE;
|
||||
_rtw_ssmps(adapter, sta);
|
||||
}
|
||||
|
||||
|
199
core/rtw_recv.c
199
core/rtw_recv.c
@ -44,6 +44,17 @@ u8 signal_stat_calc_profile[SIGNAL_STAT_CALC_PROFILE_MAX][2] = {
|
||||
|
||||
#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
|
||||
|
||||
u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
|
||||
u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
|
||||
static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37};
|
||||
static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3};
|
||||
#ifdef CONFIG_TDLS
|
||||
static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe);
|
||||
#endif
|
||||
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
|
||||
{
|
||||
|
||||
@ -814,12 +825,10 @@ sint recv_decache(union recv_frame *precv_frame, u16 *tid_rxseq)
|
||||
sint recv_ucast_pn_decache(union recv_frame *precv_frame);
|
||||
sint recv_ucast_pn_decache(union recv_frame *precv_frame)
|
||||
{
|
||||
_adapter *padapter = precv_frame->u.hdr.adapter;
|
||||
struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
|
||||
struct sta_info *sta = precv_frame->u.hdr.psta;
|
||||
struct stainfo_rxcache *prxcache = &sta->sta_recvpriv.rxcache;
|
||||
u8 *pdata = precv_frame->u.hdr.rx_data;
|
||||
u32 data_len = precv_frame->u.hdr.len;
|
||||
sint tid = precv_frame->u.hdr.attrib.priority;
|
||||
u64 tmp_iv_hdr = 0;
|
||||
u64 curr_pn = 0, pkt_pn = 0;
|
||||
@ -854,7 +863,6 @@ sint recv_bcast_pn_decache(union recv_frame *precv_frame)
|
||||
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
||||
struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
|
||||
u8 *pdata = precv_frame->u.hdr.rx_data;
|
||||
u32 data_len = precv_frame->u.hdr.len;
|
||||
u64 tmp_iv_hdr = 0;
|
||||
u64 curr_pn = 0, pkt_pn = 0;
|
||||
u8 key_id;
|
||||
@ -883,8 +891,6 @@ void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, stru
|
||||
#ifdef CONFIG_AP_MODE
|
||||
unsigned char pwrbit;
|
||||
u8 *ptr = precv_frame->u.hdr.rx_data;
|
||||
struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
|
||||
pwrbit = GetPwrMgt(ptr);
|
||||
|
||||
@ -912,7 +918,6 @@ void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struc
|
||||
{
|
||||
#ifdef CONFIG_AP_MODE
|
||||
struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
|
||||
#ifdef CONFIG_TDLS
|
||||
if (!(psta->tdls_sta_state & TDLS_LINKED_STATE)) {
|
||||
@ -1088,8 +1093,6 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
|
||||
struct stainfo_stats *pstats = NULL;
|
||||
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
|
||||
struct recv_priv *precvpriv = &padapter->recvpriv;
|
||||
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
sz = get_recvframe_len(prframe);
|
||||
precvpriv->rx_bytes += sz;
|
||||
@ -1128,11 +1131,19 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
|
||||
#ifdef CONFIG_DYNAMIC_SOML
|
||||
rtw_dyn_soml_byte_update(padapter, pattrib->data_rate, sz);
|
||||
#endif
|
||||
#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP)
|
||||
if (adapter_to_pwrctl(padapter)->lps_chk_by_tp)
|
||||
traffic_check_for_leave_lps_by_tp(padapter, _FALSE, psta);
|
||||
#endif /* CONFIG_LPS */
|
||||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CHECK_LEAVE_LPS
|
||||
#ifdef CONFIG_LPS_CHK_BY_TP
|
||||
if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp)
|
||||
#endif
|
||||
traffic_check_for_leave_lps(padapter, _FALSE, 0);
|
||||
#endif /* CONFIG_LPS */
|
||||
#endif /* CONFIG_CHECK_LEAVE_LPS */
|
||||
|
||||
}
|
||||
|
||||
@ -1364,12 +1375,14 @@ sint ap2sta_data_frame(
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" BSSID="MAC_FMT", mybssid="MAC_FMT"\n"
|
||||
, FUNC_ADPT_ARG(adapter), MAC_ARG(pattrib->bssid), MAC_ARG(mybssid));
|
||||
#endif
|
||||
|
||||
if (!bmcast) {
|
||||
#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
if (!bmcast
|
||||
&& !IS_RADAR_DETECTED(adapter_to_rfctl(adapter))
|
||||
) {
|
||||
RTW_INFO(ADPT_FMT" -issue_deauth to the nonassociated ap=" MAC_FMT " for the reason(7)\n", ADPT_ARG(adapter), MAC_ARG(pattrib->bssid));
|
||||
issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
|
||||
}
|
||||
|
||||
#endif
|
||||
ret = _FAIL;
|
||||
goto exit;
|
||||
}
|
||||
@ -1475,21 +1488,13 @@ sint sta2ap_data_frame(
|
||||
|
||||
*psta = rtw_get_stainfo(pstapriv, pattrib->ta);
|
||||
if (*psta == NULL) {
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||
|
||||
/* prevent RX tasklet blocks cmd_thread */
|
||||
if (rfctl->radar_detected == 1)
|
||||
goto bypass_deauth7;
|
||||
#endif
|
||||
|
||||
if (!IS_RADAR_DETECTED(adapter_to_rfctl(adapter))) {
|
||||
#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src));
|
||||
|
||||
issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
|
||||
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
bypass_deauth7:
|
||||
#endif
|
||||
}
|
||||
|
||||
ret = RTW_RX_HANDLED;
|
||||
goto exit;
|
||||
}
|
||||
@ -1531,8 +1536,10 @@ bypass_deauth7:
|
||||
ret = RTW_RX_HANDLED;
|
||||
goto exit;
|
||||
}
|
||||
#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src));
|
||||
issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
|
||||
#endif
|
||||
ret = RTW_RX_HANDLED;
|
||||
goto exit;
|
||||
}
|
||||
@ -2017,7 +2024,9 @@ sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame)
|
||||
#endif
|
||||
mgt_dispatcher(padapter, precv_frame);
|
||||
|
||||
#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH)
|
||||
exit:
|
||||
#endif
|
||||
return _SUCCESS;
|
||||
|
||||
}
|
||||
@ -2028,7 +2037,6 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
|
||||
struct sta_info *psta = NULL;
|
||||
u8 *ptr = precv_frame->u.hdr.rx_data;
|
||||
struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
|
||||
struct sta_priv *pstapriv = &adapter->stapriv;
|
||||
struct security_priv *psecuritypriv = &adapter->securitypriv;
|
||||
sint ret = _SUCCESS;
|
||||
|
||||
@ -2083,7 +2091,9 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTW_MESH
|
||||
pre_validate_status_chk:
|
||||
#endif
|
||||
if (ret == _FAIL) {
|
||||
#ifdef DBG_RX_DROP_FRAME
|
||||
RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" case:%d, res:%d, ra="MAC_FMT", ta="MAC_FMT"\n"
|
||||
@ -2473,6 +2483,11 @@ exiting:
|
||||
}
|
||||
|
||||
#else
|
||||
static u8 SNAP_ETH_TYPE_APPLETALK_DDP[2] = {0x80, 0x9b};
|
||||
/* Datagram Delivery Protocol */
|
||||
static u8 SNAP_HDR_APPLETALK_DDP[3] = {0x08, 0x00, 0x07};
|
||||
static u8 oui_8021h[] = {0x00, 0x00, 0xf8};
|
||||
static u8 oui_rfc1042[] = {0x00, 0x00, 0x00};
|
||||
|
||||
sint wlanhdr_to_ethhdr(union recv_frame *precvframe)
|
||||
{
|
||||
@ -2745,7 +2760,7 @@ union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *prec
|
||||
struct sta_priv *pstapriv;
|
||||
_list *phead;
|
||||
union recv_frame *prtnframe = NULL;
|
||||
_queue *pfree_recv_queue, *pdefrag_q;
|
||||
_queue *pfree_recv_queue, *pdefrag_q = NULL;
|
||||
|
||||
|
||||
pstapriv = &padapter->stapriv;
|
||||
@ -2764,6 +2779,7 @@ union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *prec
|
||||
u8 type = GetFrameType(pfhdr->rx_data);
|
||||
if (type != WIFI_DATA_TYPE) {
|
||||
psta = rtw_get_bcmc_stainfo(padapter);
|
||||
if (psta)
|
||||
pdefrag_q = &psta->sta_recvpriv.defrag_q;
|
||||
} else
|
||||
pdefrag_q = NULL;
|
||||
@ -2845,6 +2861,13 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
|
||||
_adapter *adapter = rframe->u.hdr.adapter;
|
||||
struct recv_priv *recvpriv = &adapter->recvpriv;
|
||||
struct ethhdr *ehdr = (struct ethhdr *)ehdr_pos;
|
||||
#ifdef DBG_IP_R_MONITOR
|
||||
int i;
|
||||
struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
|
||||
#endif/*DBG_IP_R_MONITOR*/
|
||||
int ret = _FAIL;
|
||||
|
||||
#ifdef CONFIG_WAPI_SUPPORT
|
||||
@ -2861,7 +2884,11 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
|
||||
rtw_st_ctl_rx(rframe->u.hdr.psta, ehdr_pos);
|
||||
|
||||
if (ntohs(ehdr->h_proto) == 0x888e)
|
||||
RTW_PRINT("recv eapol packet\n");
|
||||
parsing_eapol_packet(adapter, ehdr_pos + ETH_HLEN, rframe->u.hdr.psta, 0);
|
||||
#ifdef DBG_ARP_DUMP
|
||||
else if (ntohs(ehdr->h_proto) == ETH_P_ARP)
|
||||
dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0);
|
||||
#endif
|
||||
|
||||
if (recvpriv->sink_udpport > 0)
|
||||
rtw_sink_rtp_seq_dbg(adapter, ehdr_pos);
|
||||
@ -2882,6 +2909,25 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DBG_IP_R_MONITOR
|
||||
#define LEN_ARP_OP_HDR 7 /*ARP OERATION */
|
||||
if (ntohs(ehdr->h_proto) == ETH_P_ARP) {
|
||||
|
||||
if(check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE){
|
||||
if(_rtw_memcmp(pattrib->src, cur_network->network.MacAddress, ETH_ALEN)){
|
||||
if(ehdr_pos[ETHERNET_HEADER_SIZE+LEN_ARP_OP_HDR] == 2) {
|
||||
RTW_INFO("%s,[DBG_ARP] Rx ARP RSP Packet with Dst= "MAC_FMT" ;SeqNum = %d !\n",
|
||||
__FUNCTION__, MAC_ARG(pattrib->dst), pattrib->seq_num);
|
||||
for(i=0;i<(pkt_len -ETHERNET_HEADER_SIZE);i++)
|
||||
RTW_INFO("0x%x ",ehdr_pos[i+ETHERNET_HEADER_SIZE]);
|
||||
RTW_INFO("\n");
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif/*DBG_IP_R_MONITOR*/
|
||||
|
||||
#ifdef CONFIG_AUTO_AP_MODE
|
||||
if (ntohs(ehdr->h_proto) == 0x8899)
|
||||
rtw_auto_ap_rx_msg_dump(adapter, rframe, ehdr_pos);
|
||||
@ -2889,7 +2935,9 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
|
||||
|
||||
ret = _SUCCESS;
|
||||
|
||||
#ifdef CONFIG_WAPI_SUPPORT
|
||||
exit:
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -2918,6 +2966,7 @@ static void recv_free_fwd_resource(_adapter *adapter, struct xmit_frame *fwd_fra
|
||||
#endif /* CONFIG_RTW_MESH */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTW_MESH
|
||||
static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt
|
||||
, u8 act, struct xmit_frame *fwd_frame, _list *b2u_list)
|
||||
{
|
||||
@ -2935,7 +2984,6 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTW_MESH
|
||||
#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
|
||||
if (!rtw_is_list_empty(b2u_list)) {
|
||||
_list *list = get_next(b2u_list);
|
||||
@ -2959,7 +3007,6 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_RTW_MESH */
|
||||
|
||||
if (fwd_frame) {
|
||||
fwd_frame->pkt = fwd_pkt;
|
||||
@ -2974,6 +3021,7 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt
|
||||
exit:
|
||||
return;
|
||||
}
|
||||
#endif /* CONFIG_RTW_MESH */
|
||||
|
||||
int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
|
||||
{
|
||||
@ -3110,7 +3158,6 @@ move_to_next:
|
||||
|
||||
static int recv_process_mpdu(_adapter *padapter, union recv_frame *prframe)
|
||||
{
|
||||
struct recv_priv *precvpriv = &padapter->recvpriv;
|
||||
_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
|
||||
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
|
||||
int ret;
|
||||
@ -3467,7 +3514,6 @@ static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ct
|
||||
static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe)
|
||||
{
|
||||
_irqL irql;
|
||||
int retval = _SUCCESS;
|
||||
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
|
||||
struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl;
|
||||
_queue *ppending_recvframe_queue = preorder_ctrl ? &preorder_ctrl->pending_recvframe_queue : NULL;
|
||||
@ -3686,7 +3732,6 @@ static sint MPwlanhdr_to_ethhdr(union recv_frame *precvframe)
|
||||
|
||||
sint ret = _SUCCESS;
|
||||
_adapter *adapter = precvframe->u.hdr.adapter;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
|
||||
u8 *ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */
|
||||
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
|
||||
@ -3754,7 +3799,6 @@ int mp_recv_frame(_adapter *padapter, union recv_frame *rframe)
|
||||
{
|
||||
int ret = _SUCCESS;
|
||||
struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
|
||||
struct recv_priv *precvpriv = &padapter->recvpriv;
|
||||
_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
|
||||
#ifdef CONFIG_MP_INCLUDED
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
@ -3932,8 +3976,6 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
#endif
|
||||
|
||||
sint ret = _SUCCESS;
|
||||
_adapter *adapter = precvframe->u.hdr.adapter;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
|
||||
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
@ -4004,9 +4046,9 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
rt_len += 1;
|
||||
|
||||
/* rate */
|
||||
if (pattrib->data_rate < 12) {
|
||||
if (pattrib->data_rate <= DESC_RATE54M) {
|
||||
rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RATE);
|
||||
if (pattrib->data_rate < 4) {
|
||||
if (pattrib->data_rate <= DESC_RATE11M) {
|
||||
/* CCK */
|
||||
hdr_buf[rt_len] = data_rate[pattrib->data_rate];
|
||||
} else {
|
||||
@ -4031,8 +4073,8 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
else
|
||||
tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ);
|
||||
|
||||
if (pattrib->data_rate < 12) {
|
||||
if (pattrib->data_rate < 4) {
|
||||
if (pattrib->data_rate <= DESC_RATE54M) {
|
||||
if (pattrib->data_rate <= DESC_RATE11M) {
|
||||
/* CCK */
|
||||
tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_CCK);
|
||||
} else {
|
||||
@ -4075,7 +4117,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
rt_len += 2;
|
||||
|
||||
/* MCS information */
|
||||
if (pattrib->data_rate >= 12 && pattrib->data_rate < 44) {
|
||||
if (pattrib->data_rate >= DESC_RATEMCS0 && pattrib->data_rate <= DESC_RATEMCS31) {
|
||||
rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_MCS);
|
||||
/* known, flag */
|
||||
hdr_buf[rt_len] |= BIT1; /* MCS index known */
|
||||
@ -4100,7 +4142,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
}
|
||||
|
||||
/* VHT */
|
||||
if (pattrib->data_rate >= 44 && pattrib->data_rate < 84) {
|
||||
if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) {
|
||||
rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_VHT);
|
||||
|
||||
/* known 16 bit, flag 8 bit */
|
||||
@ -4142,16 +4184,16 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
rt_len += 1;
|
||||
|
||||
/* mcs_nss */
|
||||
if (pattrib->data_rate >= 44 && pattrib->data_rate < 54) {
|
||||
if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS1MCS9) {
|
||||
hdr_buf[rt_len] |= 1;
|
||||
hdr_buf[rt_len] |= data_rate[pattrib->data_rate] << 4;
|
||||
} else if (pattrib->data_rate >= 54 && pattrib->data_rate < 64) {
|
||||
} else if (pattrib->data_rate >= DESC_RATEVHTSS2MCS0 && pattrib->data_rate <= DESC_RATEVHTSS2MCS9) {
|
||||
hdr_buf[rt_len + 1] |= 2;
|
||||
hdr_buf[rt_len + 1] |= data_rate[pattrib->data_rate] << 4;
|
||||
} else if (pattrib->data_rate >= 64 && pattrib->data_rate < 74) {
|
||||
} else if (pattrib->data_rate >= DESC_RATEVHTSS3MCS0 && pattrib->data_rate <= DESC_RATEVHTSS3MCS9) {
|
||||
hdr_buf[rt_len + 2] |= 3;
|
||||
hdr_buf[rt_len + 2] |= data_rate[pattrib->data_rate] << 4;
|
||||
} else if (pattrib->data_rate >= 74 && pattrib->data_rate < 84) {
|
||||
} else if (pattrib->data_rate >= DESC_RATEVHTSS4MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) {
|
||||
hdr_buf[rt_len + 3] |= 4;
|
||||
hdr_buf[rt_len + 3] |= data_rate[pattrib->data_rate] << 4;
|
||||
}
|
||||
@ -4182,6 +4224,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
ptr = skb_push(pskb, rt_len);
|
||||
if (ptr) {
|
||||
rtap_hdr->it_len = cpu_to_le16(rt_len);
|
||||
rtap_hdr->it_present = cpu_to_le32(rtap_hdr->it_present);
|
||||
memcpy(ptr, rtap_hdr, rt_len);
|
||||
} else
|
||||
ret = _FAIL;
|
||||
@ -4193,8 +4236,6 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
|
||||
int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe)
|
||||
{
|
||||
int ret = _SUCCESS;
|
||||
struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
|
||||
struct recv_priv *precvpriv = &padapter->recvpriv;
|
||||
_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
|
||||
_pkt *pskb = NULL;
|
||||
|
||||
@ -4204,13 +4245,14 @@ int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe)
|
||||
pskb->data = rframe->u.hdr.rx_data;
|
||||
skb_set_tail_pointer(pskb, rframe->u.hdr.len);
|
||||
|
||||
#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
/* fill radiotap header */
|
||||
if (fill_radiotap_hdr(padapter, rframe, (u8 *)pskb) == _FAIL) {
|
||||
ret = _FAIL;
|
||||
rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */
|
||||
goto exit;
|
||||
}
|
||||
|
||||
#endif
|
||||
/* write skb information to recv frame */
|
||||
skb_reset_mac_header(pskb);
|
||||
rframe->u.hdr.len = pskb->len;
|
||||
@ -4240,8 +4282,9 @@ exit:
|
||||
int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe)
|
||||
{
|
||||
int ret = _SUCCESS;
|
||||
#ifdef DBG_RX_COUNTER_DUMP
|
||||
struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
|
||||
struct recv_priv *precvpriv = &padapter->recvpriv;
|
||||
#endif
|
||||
_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
|
||||
|
||||
#ifdef DBG_RX_COUNTER_DUMP
|
||||
@ -4388,7 +4431,10 @@ int recv_func(_adapter *padapter, union recv_frame *rframe)
|
||||
struct recv_priv *recvpriv = &padapter->recvpriv;
|
||||
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
||||
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
|
||||
|
||||
#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
u8 type;
|
||||
u8 *ptr = rframe->u.hdr.rx_data;
|
||||
#endif
|
||||
if (check_fwstate(mlmepriv, WIFI_MONITOR_STATE)) {
|
||||
/* monitor mode */
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24))
|
||||
@ -4397,7 +4443,18 @@ int recv_func(_adapter *padapter, union recv_frame *rframe)
|
||||
ret = _SUCCESS;
|
||||
goto exit;
|
||||
} else
|
||||
|
||||
{}
|
||||
#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
type = GetFrameType(ptr);
|
||||
if ((type == WIFI_DATA_TYPE)&& check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
|
||||
struct wlan_network *cur_network = &(mlmepriv->cur_network);
|
||||
if ( _rtw_memcmp(get_addr2_ptr(ptr), cur_network->network.MacAddress, ETH_ALEN)==0) {
|
||||
recv_frame_monitor(padapter, rframe);
|
||||
ret = _SUCCESS;
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/* check if need to handle uc_swdec_pending_queue*/
|
||||
if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) {
|
||||
union recv_frame *pending_frame;
|
||||
@ -4584,10 +4641,11 @@ set_timer:
|
||||
|
||||
static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe)
|
||||
{
|
||||
u32 last_rssi, tmp_val;
|
||||
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
|
||||
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
|
||||
struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data;
|
||||
#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
|
||||
u32 last_rssi, tmp_val;
|
||||
#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
|
||||
|
||||
/* RTW_INFO("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->recv_signal_power,pattrib->signal_strength); */
|
||||
@ -4634,10 +4692,11 @@ static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe)
|
||||
|
||||
static void rx_process_link_qual(_adapter *padapter, union recv_frame *prframe)
|
||||
{
|
||||
u32 last_evm = 0, tmpVal;
|
||||
struct rx_pkt_attrib *pattrib;
|
||||
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
|
||||
struct signal_stat *signal_stat;
|
||||
#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
|
||||
u32 last_evm = 0, tmpVal;
|
||||
#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
|
||||
|
||||
if (prframe == NULL || padapter == NULL)
|
||||
@ -4791,20 +4850,35 @@ void rx_query_phy_status(
|
||||
|
||||
{
|
||||
precvframe->u.hdr.psta = NULL;
|
||||
if (padapter->registrypriv.mp_mode != 1) {
|
||||
if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid)
|
||||
|| (MLME_IS_MESH(padapter) && psta)
|
||||
|| padapter->registrypriv.mp_mode == 1
|
||||
) {
|
||||
|| (MLME_IS_MESH(padapter) && psta)) {
|
||||
if (psta) {
|
||||
precvframe->u.hdr.psta = psta;
|
||||
rx_process_phy_info(padapter, precvframe);
|
||||
}
|
||||
} else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) {
|
||||
|
||||
if (psta)
|
||||
precvframe->u.hdr.psta = psta;
|
||||
rx_process_phy_info(padapter, precvframe);
|
||||
}
|
||||
} else {
|
||||
#ifdef CONFIG_MP_INCLUDED
|
||||
if (padapter->mppriv.brx_filter_beacon == _TRUE) {
|
||||
if (pkt_info.is_packet_beacon) {
|
||||
RTW_INFO("in MP Rx is_packet_beacon\n");
|
||||
if (psta)
|
||||
precvframe->u.hdr.psta = psta;
|
||||
rx_process_phy_info(padapter, precvframe);
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
if (psta)
|
||||
precvframe->u.hdr.psta = psta;
|
||||
rx_process_phy_info(padapter, precvframe);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
rtw_odm_parse_rx_phy_status_chinfo(precvframe, pphy_status);
|
||||
@ -4854,9 +4928,9 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
|
||||
u8 *pbuf = precvframe->u.hdr.rx_data;
|
||||
u8 *pda = get_ra(pbuf);
|
||||
u8 ra_is_bmc = IS_MCAST(pda);
|
||||
_adapter *primary_padapter = precvframe->u.hdr.adapter;
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
_adapter *iface = NULL;
|
||||
_adapter *primary_padapter = precvframe->u.hdr.adapter;
|
||||
|
||||
#ifdef CONFIG_MP_INCLUDED
|
||||
if (rtw_mp_mode_check(primary_padapter))
|
||||
@ -4866,6 +4940,10 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
|
||||
if (ra_is_bmc == _FALSE) { /*unicast packets*/
|
||||
iface = rtw_get_iface_by_macddr(primary_padapter , pda);
|
||||
if (NULL == iface) {
|
||||
#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
|
||||
if (_rtw_memcmp(pda, adapter_pno_mac_addr(primary_padapter),
|
||||
ETH_ALEN) != _TRUE)
|
||||
#endif
|
||||
RTW_INFO("%s [WARN] Cannot find appropriate adapter - mac_addr : "MAC_FMT"\n", __func__, MAC_ARG(pda));
|
||||
/*rtw_warn_on(1);*/
|
||||
} else
|
||||
@ -4874,7 +4952,7 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
|
||||
rtw_mi_buddy_clone_bcmc_packet(primary_padapter, precvframe, pphy_status);
|
||||
bypass_concurrent_hdl:
|
||||
#endif /* CONFIG_CONCURRENT_MODE */
|
||||
|
||||
if (primary_padapter->registrypriv.mp_mode != 1) {
|
||||
/* skip unnecessary bmc data frame for primary adapter */
|
||||
if (ra_is_bmc == _TRUE && GetFrameType(pbuf) == WIFI_DATA_TYPE
|
||||
&& !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter)
|
||||
@ -4882,6 +4960,7 @@ bypass_concurrent_hdl:
|
||||
rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue);
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
|
||||
if (pphy_status)
|
||||
rx_query_phy_status(precvframe, pphy_status);
|
||||
@ -4897,11 +4976,13 @@ thread_return rtw_recv_thread(thread_context context)
|
||||
_adapter *adapter = (_adapter *)context;
|
||||
struct recv_priv *recvpriv = &adapter->recvpriv;
|
||||
s32 err = _SUCCESS;
|
||||
#ifdef RTW_RECV_THREAD_HIGH_PRIORITY
|
||||
#ifdef PLATFORM_LINUX
|
||||
struct sched_param param = { .sched_priority = 1 };
|
||||
|
||||
sched_setscheduler(current, SCHED_FIFO, ¶m);
|
||||
#endif /* PLATFORM_LINUX */
|
||||
#endif /*RTW_RECV_THREAD_HIGH_PRIORITY*/
|
||||
thread_enter("RTW_RECV_THREAD");
|
||||
|
||||
RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter));
|
||||
|
545
core/rtw_rf.c
545
core/rtw_rf.c
@ -204,7 +204,6 @@ struct center_chs_ent_t center_chs_5g_by_bw[] = {
|
||||
*/
|
||||
u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset)
|
||||
{
|
||||
int i;
|
||||
u8 t_cch = 0;
|
||||
|
||||
if (bw == CHANNEL_WIDTH_20) {
|
||||
@ -470,7 +469,6 @@ bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo)
|
||||
u8 c_ch;
|
||||
u32 freq;
|
||||
u32 hi_ret = 0, lo_ret = 0;
|
||||
int i;
|
||||
bool valid = _FALSE;
|
||||
|
||||
if (hi)
|
||||
@ -567,471 +565,6 @@ const u8 _rf_type_to_rf_rx_cnt[] = {
|
||||
1, /*RF_TYPE_MAX*/
|
||||
};
|
||||
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val)
|
||||
#else
|
||||
#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val)
|
||||
#endif
|
||||
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val)
|
||||
#else
|
||||
#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val)
|
||||
#endif
|
||||
|
||||
/* has def_module_flags specified, used by common map and HAL dfference map */
|
||||
#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \
|
||||
{.alpha2 = (_alpha2), .chplan = (_chplan) \
|
||||
COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \
|
||||
COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
|
||||
|
||||
#include "../platform/custom_country_chplan.h"
|
||||
|
||||
#elif RTW_DEF_MODULE_REGULATORY_CERT
|
||||
|
||||
/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */
|
||||
static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */
|
||||
COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */
|
||||
static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */
|
||||
static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */
|
||||
static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */
|
||||
static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */
|
||||
static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */
|
||||
static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */
|
||||
static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */
|
||||
static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */
|
||||
static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */
|
||||
static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = {
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* rtw_def_module_get_chplan_from_country -
|
||||
* @country_code: string of country code
|
||||
* @return:
|
||||
* Return NULL for case referring to common map
|
||||
*/
|
||||
static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code)
|
||||
{
|
||||
const struct country_chplan *ent = NULL;
|
||||
const struct country_chplan *hal_map = NULL;
|
||||
u16 hal_map_sz = 0;
|
||||
int i;
|
||||
|
||||
/* TODO: runtime selection for multi driver */
|
||||
#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2)
|
||||
hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU)
|
||||
hal_map = RTL8821AU_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF)
|
||||
hal_map = RTL8812AENF_NGFF_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC)
|
||||
hal_map = RTL8812AEBT_HMC_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2)
|
||||
hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2)
|
||||
hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216)
|
||||
hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2)
|
||||
hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630)
|
||||
hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE)
|
||||
hal_map = RTL8822BE_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE)
|
||||
hal_map = RTL8821CE_country_chplan_exc_map;
|
||||
hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan);
|
||||
#endif
|
||||
|
||||
if (hal_map == NULL || hal_map_sz == 0)
|
||||
goto exit;
|
||||
|
||||
for (i = 0; i < hal_map_sz; i++) {
|
||||
if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) {
|
||||
ent = &hal_map[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
exit:
|
||||
return ent;
|
||||
}
|
||||
#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */
|
||||
|
||||
static const struct country_chplan country_chplan_map[] = {
|
||||
COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */
|
||||
COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0x7FB), /* United Arab Emirates */
|
||||
COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */
|
||||
COUNTRY_CHPLAN_ENT("AG", 0x26, 1, 0x000), /* Antigua & Barbuda */
|
||||
COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */
|
||||
COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */
|
||||
COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */
|
||||
COUNTRY_CHPLAN_ENT("AN", 0x26, 1, 0x7F1), /* Netherlands Antilles */
|
||||
COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */
|
||||
COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */
|
||||
COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */
|
||||
COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x000), /* American Samoa */
|
||||
COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */
|
||||
COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */
|
||||
COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0x0B0), /* Aruba */
|
||||
COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */
|
||||
COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */
|
||||
COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x650), /* Barbados */
|
||||
COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */
|
||||
COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */
|
||||
COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */
|
||||
COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */
|
||||
COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0x7F1), /* Bahrain */
|
||||
COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */
|
||||
COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */
|
||||
COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */
|
||||
COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */
|
||||
COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */
|
||||
COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x620), /* Bahamas */
|
||||
COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0x6F1), /* Botswana */
|
||||
COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */
|
||||
COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x000), /* Belize */
|
||||
COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */
|
||||
COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */
|
||||
COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */
|
||||
COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */
|
||||
COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */
|
||||
COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */
|
||||
COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0x7F1), /* Cote d'Ivoire */
|
||||
COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */
|
||||
COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */
|
||||
COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */
|
||||
COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */
|
||||
COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0x7F1), /* Colombia */
|
||||
COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0x7F1), /* Costa Rica */
|
||||
COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */
|
||||
COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */
|
||||
COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */
|
||||
COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */
|
||||
COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */
|
||||
COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */
|
||||
COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */
|
||||
COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x000), /* Dominica */
|
||||
COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0x7F1), /* Dominican Republic */
|
||||
COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */
|
||||
COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0x7F1), /* Ecuador */
|
||||
COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */
|
||||
COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */
|
||||
COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */
|
||||
COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */
|
||||
COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */
|
||||
COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */
|
||||
COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */
|
||||
COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x600), /* Fiji */
|
||||
COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */
|
||||
COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x000), /* Micronesia, Federated States of (USA) */
|
||||
COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */
|
||||
COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */
|
||||
COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */
|
||||
COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */
|
||||
COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0x0B0), /* Grenada */
|
||||
COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */
|
||||
COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */
|
||||
COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */
|
||||
COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */
|
||||
COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */
|
||||
COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */
|
||||
COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */
|
||||
COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */
|
||||
COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */
|
||||
COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */
|
||||
COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */
|
||||
COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */
|
||||
COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0x7F1), /* Guatemala */
|
||||
COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x600), /* Guam (USA) */
|
||||
COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */
|
||||
COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */
|
||||
COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0x7FB), /* Hong Kong */
|
||||
COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */
|
||||
COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */
|
||||
COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */
|
||||
COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x650), /* Haiti */
|
||||
COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */
|
||||
COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */
|
||||
COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */
|
||||
COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */
|
||||
COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */
|
||||
COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */
|
||||
COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */
|
||||
COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */
|
||||
COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */
|
||||
COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */
|
||||
COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */
|
||||
COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0x7F1), /* Jamaica */
|
||||
COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */
|
||||
COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */
|
||||
COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */
|
||||
COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */
|
||||
COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */
|
||||
COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */
|
||||
COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x000), /* Saint Kitts and Nevis */
|
||||
COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0x7FB), /* South Korea */
|
||||
COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */
|
||||
COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x000), /* Cayman Islands (UK) */
|
||||
COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */
|
||||
COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */
|
||||
COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */
|
||||
COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x000), /* Saint Lucia */
|
||||
COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */
|
||||
COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */
|
||||
COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */
|
||||
COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */
|
||||
COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */
|
||||
COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */
|
||||
COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */
|
||||
COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */
|
||||
COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */
|
||||
COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */
|
||||
COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */
|
||||
COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */
|
||||
COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x000), /* Saint Martin */
|
||||
COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */
|
||||
COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x000), /* Marshall Islands (USA) */
|
||||
COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */
|
||||
COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */
|
||||
COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */
|
||||
COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */
|
||||
COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x600), /* Macau */
|
||||
COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x000), /* Northern Mariana Islands (USA) */
|
||||
COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */
|
||||
COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */
|
||||
COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */
|
||||
COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */
|
||||
COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */
|
||||
COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */
|
||||
COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */
|
||||
COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */
|
||||
COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */
|
||||
COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */
|
||||
COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */
|
||||
COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */
|
||||
COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */
|
||||
COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */
|
||||
COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */
|
||||
COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0x7F1), /* Nicaragua */
|
||||
COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */
|
||||
COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */
|
||||
COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0x6F0), /* Nepal */
|
||||
COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */
|
||||
COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */
|
||||
COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */
|
||||
COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */
|
||||
COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0x7F1), /* Panama */
|
||||
COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0x7F1), /* Peru */
|
||||
COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */
|
||||
COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0x7F1), /* Papua New Guinea */
|
||||
COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0x7F1), /* Philippines */
|
||||
COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */
|
||||
COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */
|
||||
COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */
|
||||
COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0x7F1), /* Puerto Rico */
|
||||
COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */
|
||||
COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x000), /* Palau */
|
||||
COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0x7F1), /* Paraguay */
|
||||
COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0x7F9), /* Qatar */
|
||||
COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */
|
||||
COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */
|
||||
COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */
|
||||
COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */
|
||||
COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */
|
||||
COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0x7FB), /* Saudi Arabia */
|
||||
COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */
|
||||
COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x690), /* Seychelles */
|
||||
COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */
|
||||
COUNTRY_CHPLAN_ENT("SG", 0x26, 1, 0x7FB), /* Singapore */
|
||||
COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */
|
||||
COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */
|
||||
COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */
|
||||
COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */
|
||||
COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */
|
||||
COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */
|
||||
COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */
|
||||
COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */
|
||||
COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */
|
||||
COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x680), /* Sao Tome and Principe */
|
||||
COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */
|
||||
COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x000), /* Sint Marteen */
|
||||
COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */
|
||||
COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */
|
||||
COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */
|
||||
COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */
|
||||
COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */
|
||||
COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0x7F1), /* Thailand */
|
||||
COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */
|
||||
COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */
|
||||
COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */
|
||||
COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */
|
||||
COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */
|
||||
COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */
|
||||
COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0x3F1), /* Trinidad & Tobago */
|
||||
COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */
|
||||
COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */
|
||||
COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */
|
||||
COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */
|
||||
COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */
|
||||
COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */
|
||||
COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */
|
||||
COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */
|
||||
COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x010), /* Saint Vincent and the Grenadines */
|
||||
COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */
|
||||
COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x000), /* United States Virgin Islands (USA) */
|
||||
COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0x7F1), /* Vietnam */
|
||||
COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */
|
||||
COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */
|
||||
COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x000), /* Samoa */
|
||||
COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */
|
||||
COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */
|
||||
COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0x7F1), /* South Africa */
|
||||
COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */
|
||||
COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */
|
||||
};
|
||||
|
||||
/*
|
||||
* rtw_get_chplan_from_country -
|
||||
* @country_code: string of country code
|
||||
*
|
||||
* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given
|
||||
*/
|
||||
const struct country_chplan *rtw_get_chplan_from_country(const char *country_code)
|
||||
{
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
const struct country_chplan *exc_ent = NULL;
|
||||
#endif
|
||||
const struct country_chplan *ent = NULL;
|
||||
const struct country_chplan *map = NULL;
|
||||
u16 map_sz = 0;
|
||||
char code[2];
|
||||
int i;
|
||||
|
||||
code[0] = alpha_to_upper(country_code[0]);
|
||||
code[1] = alpha_to_upper(country_code[1]);
|
||||
|
||||
#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
|
||||
map = CUSTOMIZED_country_chplan_map;
|
||||
map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan);
|
||||
#else
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
exc_ent = rtw_def_module_get_chplan_from_country(code);
|
||||
#endif
|
||||
map = country_chplan_map;
|
||||
map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);
|
||||
#endif
|
||||
|
||||
for (i = 0; i < map_sz; i++) {
|
||||
if (strncmp(code, map[i].alpha2, 2) == 0) {
|
||||
ent = &map[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
exit:
|
||||
#if RTW_DEF_MODULE_REGULATORY_CERT
|
||||
if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT))
|
||||
exc_ent = ent = NULL;
|
||||
if (exc_ent)
|
||||
ent = exc_ent;
|
||||
#endif
|
||||
|
||||
return ent;
|
||||
}
|
||||
|
||||
const char *const _regd_str[] = {
|
||||
"NONE",
|
||||
"FCC",
|
||||
@ -1161,7 +694,6 @@ struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *co
|
||||
break;
|
||||
}
|
||||
|
||||
exit:
|
||||
if (match)
|
||||
return ent;
|
||||
else
|
||||
@ -1341,13 +873,13 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
|
||||
ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
|
||||
cur = get_next(cur);
|
||||
|
||||
sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) < 4 ? 5 - strlen(ent->regd_name) : 1);
|
||||
sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) >= 6 ? 1 : 6 - strlen(ent->regd_name));
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt
|
||||
, strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : ""
|
||||
, ent->regd_name);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
}
|
||||
sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) < 4 ? 5 - strlen(regd_str(TXPWR_LMT_WW)) : 1);
|
||||
sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(regd_str(TXPWR_LMT_WW)));
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt
|
||||
, strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : ""
|
||||
, regd_str(TXPWR_LMT_WW));
|
||||
@ -1394,46 +926,42 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
|
||||
ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
|
||||
cur = get_next(cur);
|
||||
lmt = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0);
|
||||
if (lmt == MAX_POWER_INDEX) {
|
||||
sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
|
||||
if (lmt == hal_spec->txgi_max) {
|
||||
sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else {
|
||||
if (lmt == -1) { /* -0.5 */
|
||||
sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5");
|
||||
} else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
|
||||
sprintf(fmt, "%%%zus-0.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 4 : 1);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else if (lmt % 2) { /* n.5 */
|
||||
sprintf(fmt, "%%%zud.5 ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) - 1 : 3);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
|
||||
} else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
|
||||
sprintf(fmt, "%%%zud.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 2 : 3);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else { /* n */
|
||||
sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
|
||||
} else { /* d */
|
||||
sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
}
|
||||
}
|
||||
}
|
||||
lmt = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
|
||||
if (lmt == MAX_POWER_INDEX) {
|
||||
sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
|
||||
if (lmt == hal_spec->txgi_max) {
|
||||
sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else {
|
||||
if (lmt == -1) { /* -0.5 */
|
||||
sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5");
|
||||
} else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
|
||||
sprintf(fmt, "%%%zus-0.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 4 : 1);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else if (lmt % 2) { /* n.5 */
|
||||
sprintf(fmt, "%%%zud.5 ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) - 1 : 3);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
|
||||
} else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
|
||||
sprintf(fmt, "%%%zud.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 2 : 3);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
} else { /* n */
|
||||
sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
|
||||
} else { /* d */
|
||||
sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
|
||||
snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
|
||||
_RTW_PRINT_SEL(sel, "%s", tmp_str);
|
||||
}
|
||||
}
|
||||
|
||||
/* dump limit offset of each path */
|
||||
for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
|
||||
@ -1450,8 +978,8 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
|
||||
ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
|
||||
cur = get_next(cur);
|
||||
lmt_offset = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, path, rs, ntx_idx, ch, 0);
|
||||
if (lmt_offset == MAX_POWER_INDEX) {
|
||||
*(lmt_idx + i * RF_PATH_MAX + path) = MAX_POWER_INDEX;
|
||||
if (lmt_offset == hal_spec->txgi_max) {
|
||||
*(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max;
|
||||
_RTW_PRINT_SEL(sel, "%3s ", "NA");
|
||||
} else {
|
||||
*(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
|
||||
@ -1460,7 +988,7 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
|
||||
i++;
|
||||
}
|
||||
lmt_offset = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, ntx_idx, ch, 0);
|
||||
if (lmt_offset == MAX_POWER_INDEX)
|
||||
if (lmt_offset == hal_spec->txgi_max)
|
||||
_RTW_PRINT_SEL(sel, "%3s ", "NA");
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
|
||||
@ -1502,6 +1030,7 @@ release_lock:
|
||||
void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
|
||||
, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
|
||||
{
|
||||
struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)));
|
||||
struct txpwr_lmt_ent *ent;
|
||||
_irqL irqL;
|
||||
_list *cur, *head;
|
||||
@ -1540,13 +1069,13 @@ void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name,
|
||||
for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
|
||||
for (m = 0; m < CENTER_CH_2G_NUM; ++m)
|
||||
for (l = 0; l < MAX_TX_COUNT; ++l)
|
||||
ent->lmt_2g[j][k][m][l] = MAX_POWER_INDEX;
|
||||
ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max;
|
||||
#ifdef CONFIG_IEEE80211_BAND_5GHZ
|
||||
for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
|
||||
for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
|
||||
for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
|
||||
for (l = 0; l < MAX_TX_COUNT; ++l)
|
||||
ent->lmt_5g[j][k][m][l] = MAX_POWER_INDEX;
|
||||
ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max;
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -1563,7 +1092,7 @@ chk_lmt_val:
|
||||
else
|
||||
goto release_lock;
|
||||
|
||||
if (pre_lmt != MAX_POWER_INDEX)
|
||||
if (pre_lmt != hal_spec->txgi_max)
|
||||
RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
|
||||
, regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
|
||||
, band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
|
||||
@ -1684,7 +1213,6 @@ s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch)
|
||||
s8 kfree_offset = 0;
|
||||
|
||||
#ifdef CONFIG_RF_POWER_TRIM
|
||||
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
|
||||
struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
|
||||
s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
|
||||
|
||||
@ -1710,7 +1238,9 @@ exit:
|
||||
|
||||
void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
|
||||
{
|
||||
#if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C)
|
||||
u8 write_value;
|
||||
#endif
|
||||
u8 target_path = 0;
|
||||
u32 val32 = 0;
|
||||
|
||||
@ -1749,6 +1279,12 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
|
||||
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
|
||||
break;
|
||||
#endif /* CONFIG_RTL8188F */
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
case RTL8188GTV:
|
||||
write_value = RF_TX_GAIN_OFFSET_8188GTV(offset);
|
||||
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
|
||||
break;
|
||||
#endif /* CONFIG_RTL8188GTV */
|
||||
#ifdef CONFIG_RTL8192E
|
||||
case RTL8192E:
|
||||
write_value = RF_TX_GAIN_OFFSET_8192E(offset);
|
||||
@ -1762,10 +1298,11 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
|
||||
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
|
||||
break;
|
||||
#endif /* CONFIG_RTL8821A */
|
||||
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
|
||||
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
|
||||
case RTL8814A:
|
||||
case RTL8822B:
|
||||
case RTL8821C:
|
||||
case RTL8192F:
|
||||
RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
|
||||
break;
|
||||
#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
|
||||
|
@ -430,40 +430,17 @@ int issue_null_reply(struct rm_obj *prm)
|
||||
int ready_for_scan(struct rm_obj *prm)
|
||||
{
|
||||
_adapter *padapter = prm->psta->padapter;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
|
||||
|
||||
if (rtw_is_scan_deny(padapter))
|
||||
return _FALSE;
|
||||
u8 ssc_chk;
|
||||
|
||||
if (!rtw_is_adapter_up(padapter))
|
||||
return _FALSE;
|
||||
|
||||
if (rtw_mi_busy_traffic_check(padapter, _FALSE))
|
||||
return _FALSE;
|
||||
ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)
|
||||
&& check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
|
||||
RTW_INFO(FUNC_ADPT_FMT" WIFI_AP_STATE && WIFI_UNDER_WPS\n",
|
||||
FUNC_ADPT_ARG(padapter));
|
||||
return _FALSE;
|
||||
}
|
||||
if (check_fwstate(pmlmepriv,
|
||||
(_FW_UNDER_SURVEY | _FW_UNDER_LINKING)) == _TRUE) {
|
||||
RTW_INFO(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n",
|
||||
FUNC_ADPT_ARG(padapter));
|
||||
return _FALSE;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
if (rtw_mi_buddy_check_fwstate(padapter,
|
||||
(_FW_UNDER_SURVEY | _FW_UNDER_LINKING | WIFI_UNDER_WPS))) {
|
||||
RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n",
|
||||
FUNC_ADPT_ARG(padapter));
|
||||
return _FALSE;
|
||||
}
|
||||
#endif
|
||||
if (ssc_chk == SS_ALLOW)
|
||||
return _SUCCESS;
|
||||
|
||||
return _FALSE;
|
||||
}
|
||||
|
||||
int rm_sitesurvey(struct rm_obj *prm)
|
||||
|
@ -656,8 +656,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid)
|
||||
case RM_EV_start_meas:
|
||||
if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) {
|
||||
/* resotre measurement start time */
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64);
|
||||
prm->meas_start_time = val64;
|
||||
prm->meas_start_time = rtw_hal_get_tsftr_by_port(padapter
|
||||
, rtw_hal_get_port(padapter));
|
||||
|
||||
switch (prm->q.m_type) {
|
||||
case bcn_req:
|
||||
@ -741,8 +741,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid)
|
||||
case RM_EV_state_out:
|
||||
rm_cancel_clock(prm);
|
||||
/* resotre measurement end time */
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64);
|
||||
_rtw_memcpy(&prm->meas_end_time, (char *)&val64, sizeof(u64));
|
||||
prm->meas_end_time = rtw_hal_get_tsftr_by_port(padapter
|
||||
, rtw_hal_get_port(padapter));
|
||||
|
||||
val8 = 0; /* Disable free run counter */
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_FREECNT, &val8);
|
||||
|
@ -555,7 +555,7 @@ void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op)
|
||||
RTW_INFO("change to widi listen\n");
|
||||
}
|
||||
#endif /* CONFIG_INTEL_WIDI */
|
||||
rtw_free_assoc_resources(padapter, 1);
|
||||
rtw_free_assoc_resources(padapter, _TRUE);
|
||||
rtw_indicate_disconnect(padapter, 0, _FALSE);
|
||||
} else
|
||||
pmlmepriv->to_join = _TRUE;
|
||||
|
@ -982,13 +982,6 @@ static void next_key(u8 *key, sint round);
|
||||
static void byte_sub(u8 *in, u8 *out);
|
||||
static void shift_row(u8 *in, u8 *out);
|
||||
static void mix_column(u8 *in, u8 *out);
|
||||
#ifndef PLATFORM_FREEBSD
|
||||
static void add_round_key(u8 *shiftrow_in,
|
||||
u8 *mcol_in,
|
||||
u8 *block_in,
|
||||
sint round,
|
||||
u8 *out);
|
||||
#endif /* PLATFORM_FREEBSD */
|
||||
static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext);
|
||||
|
||||
|
||||
@ -1929,7 +1922,6 @@ u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe)
|
||||
|
||||
|
||||
sint length;
|
||||
u32 prwskeylen;
|
||||
u8 *pframe, *prwskey; /* , *payload,*iv */
|
||||
struct sta_info *stainfo;
|
||||
struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
|
||||
@ -2139,6 +2131,7 @@ BIP_exit:
|
||||
#endif /* CONFIG_IEEE80211W */
|
||||
|
||||
#ifndef PLATFORM_FREEBSD
|
||||
#if defined(CONFIG_TDLS)
|
||||
/* compress 512-bits */
|
||||
static int sha256_compress(struct sha256_state *md, unsigned char *buf)
|
||||
{
|
||||
@ -2319,7 +2312,9 @@ static u8 os_strlen(const char *s)
|
||||
p++;
|
||||
return p - s;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TDLS) || defined(CONFIG_RTW_MESH_AEK)
|
||||
static int os_memcmp(const void *s1, const void *s2, u8 n)
|
||||
{
|
||||
const unsigned char *p1 = s1, *p2 = s2;
|
||||
@ -2337,6 +2332,7 @@ static int os_memcmp(const void *s1, const void *s2, u8 n)
|
||||
|
||||
return *p1 - *p2;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104)
|
||||
@ -2347,6 +2343,7 @@ static int os_memcmp(const void *s1, const void *s2, u8 n)
|
||||
* @len: Lengths of the data blocks
|
||||
* @mac: Buffer for the hash (32 bytes)
|
||||
*/
|
||||
#if defined(CONFIG_TDLS)
|
||||
static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
|
||||
u8 *addr[], size_t *len, u8 *mac)
|
||||
{
|
||||
@ -2408,6 +2405,7 @@ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
|
||||
_len[1] = 32;
|
||||
sha256_vector(2, _addr, _len, mac);
|
||||
}
|
||||
#endif /* CONFIG_TDLS */
|
||||
#endif /* PLATFORM_FREEBSD */
|
||||
/**
|
||||
* sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2)
|
||||
@ -2423,6 +2421,7 @@ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
|
||||
* given key.
|
||||
*/
|
||||
#ifndef PLATFORM_FREEBSD /* Baron */
|
||||
#if defined(CONFIG_TDLS)
|
||||
static void sha256_prf(u8 *key, size_t key_len, char *label,
|
||||
u8 *data, size_t data_len, u8 *buf, size_t buf_len)
|
||||
{
|
||||
@ -2459,6 +2458,7 @@ static void sha256_prf(u8 *key, size_t key_len, char *label,
|
||||
counter++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif /* PLATFORM_FREEBSD Baron */
|
||||
|
||||
/* AES tables*/
|
||||
|
@ -47,10 +47,9 @@ u8 sreset_get_wifi_status(_adapter *padapter)
|
||||
#if defined(DBG_CONFIG_ERROR_DETECT)
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
|
||||
|
||||
u8 status = WIFI_STATUS_SUCCESS;
|
||||
u32 val32 = 0;
|
||||
_irqL irqL;
|
||||
|
||||
if (psrtpriv->silent_reset_inprogress == _TRUE)
|
||||
return status;
|
||||
val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
|
||||
@ -104,11 +103,9 @@ bool sreset_inprogress(_adapter *padapter)
|
||||
|
||||
void sreset_restore_security_station(_adapter *padapter)
|
||||
{
|
||||
u8 EntryId = 0;
|
||||
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
struct sta_info *psta;
|
||||
struct security_priv *psecuritypriv = &(padapter->securitypriv);
|
||||
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
|
||||
|
||||
{
|
||||
@ -147,25 +144,6 @@ void sreset_restore_network_station(_adapter *padapter)
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
u8 doiqk = _FALSE;
|
||||
|
||||
#if 0
|
||||
{
|
||||
/* ======================================================= */
|
||||
/* reset related register of Beacon control */
|
||||
|
||||
/* set MSR to nolink */
|
||||
Set_MSR(padapter, _HW_STATE_NOLINK_);
|
||||
/* reject all data frame */
|
||||
rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
|
||||
/* reset TSF */
|
||||
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
|
||||
|
||||
/* disable update TSF */
|
||||
SetBcnCtrlReg(padapter, BIT(4), 0);
|
||||
|
||||
/* ======================================================= */
|
||||
}
|
||||
#endif
|
||||
|
||||
rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY);
|
||||
|
||||
{
|
||||
@ -173,6 +151,7 @@ void sreset_restore_network_station(_adapter *padapter)
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* TH=1 => means that invalidate usb rx aggregation */
|
||||
/* TH=0 => means that validate usb rx aggregation, use init value. */
|
||||
#ifdef CONFIG_80211N_HT
|
||||
if (mlmepriv->htpriv.ht_option) {
|
||||
if (padapter->registrypriv.wifi_spec == 1)
|
||||
threshold = 1;
|
||||
@ -183,6 +162,7 @@ void sreset_restore_network_station(_adapter *padapter)
|
||||
threshold = 1;
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
|
||||
}
|
||||
#endif /* CONFIG_80211N_HT */
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -200,8 +180,9 @@ void sreset_restore_network_station(_adapter *padapter)
|
||||
|
||||
{
|
||||
u8 join_type = 0;
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
|
||||
|
||||
rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING);
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
|
||||
}
|
||||
|
||||
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
|
||||
@ -217,8 +198,6 @@ void sreset_restore_network_station(_adapter *padapter)
|
||||
void sreset_restore_network_status(_adapter *padapter)
|
||||
{
|
||||
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
|
||||
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
|
||||
RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
|
||||
|
@ -498,7 +498,7 @@ static void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
|
||||
/* struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */
|
||||
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr)
|
||||
{
|
||||
_irqL irqL, irqL2;
|
||||
_irqL irqL2;
|
||||
s32 index;
|
||||
_list *phash_list;
|
||||
struct sta_info *psta;
|
||||
@ -595,6 +595,7 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr)
|
||||
#endif
|
||||
/* init for the sequence number of received management frame */
|
||||
psta->RxMgmtFrameSeqNum = 0xffff;
|
||||
_rtw_memset(&psta->sta_stats, 0, sizeof(struct stainfo_stats));
|
||||
|
||||
rtw_alloc_macid(pstapriv->padapter, psta);
|
||||
|
||||
|
@ -439,7 +439,7 @@ void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
|
||||
}
|
||||
|
||||
if (ptdls_sta->flags & WLAN_STA_HT) {
|
||||
if (padapter->registrypriv.ht_enable == _TRUE) {
|
||||
if (padapter->registrypriv.ht_enable == _TRUE && is_supported_ht(padapter->registrypriv.wireless_mode) ) {
|
||||
ptdls_sta->htpriv.ht_option = _TRUE;
|
||||
ptdls_sta->qos_option = _TRUE;
|
||||
} else {
|
||||
@ -559,7 +559,7 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
|
||||
|
||||
if (ptdls_sta->flags & WLAN_STA_VHT) {
|
||||
if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv)
|
||||
&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
|
||||
&& is_supported_vht(padapter->registrypriv.wireless_mode)
|
||||
&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)))
|
||||
ptdls_sta->vhtpriv.vht_option = _TRUE;
|
||||
else
|
||||
@ -2374,7 +2374,7 @@ int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame)
|
||||
if (psta_ap == NULL)
|
||||
goto exit;
|
||||
dst = pIE->data + 12;
|
||||
if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE))
|
||||
if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, ETH_ALEN) == _FALSE))
|
||||
goto exit;
|
||||
break;
|
||||
default:
|
||||
@ -2853,7 +2853,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
|
||||
&& REGSTY_IS_11AC_ENABLE(pregistrypriv)
|
||||
&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
|
||||
&& is_supported_vht(pregistrypriv->wireless_mode)
|
||||
&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
|
||||
) {
|
||||
pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
|
||||
@ -2948,7 +2948,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
|
||||
&& REGSTY_IS_11AC_ENABLE(pregistrypriv)
|
||||
&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
|
||||
&& is_supported_vht(pregistrypriv->wireless_mode)
|
||||
&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
|
||||
) {
|
||||
pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
|
||||
@ -3025,7 +3025,7 @@ void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitfr
|
||||
if ((padapter->mlmepriv.htpriv.ht_option == _TRUE)
|
||||
&& (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14)
|
||||
&& REGSTY_IS_11AC_ENABLE(pregistrypriv)
|
||||
&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
|
||||
&& is_supported_vht(pregistrypriv->wireless_mode)
|
||||
&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
|
||||
) {
|
||||
pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel);
|
||||
|
122
core/rtw_vht.c
122
core/rtw_vht.c
@ -61,10 +61,6 @@ void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len)
|
||||
|
||||
void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len)
|
||||
{
|
||||
const u8 *pos = ie;
|
||||
u16 id;
|
||||
u16 len;
|
||||
|
||||
const u8 *vht_cap_ie;
|
||||
sint vht_cap_ielen;
|
||||
|
||||
@ -99,10 +95,6 @@ void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len)
|
||||
|
||||
void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len)
|
||||
{
|
||||
const u8 *pos = ie;
|
||||
u16 id;
|
||||
u16 len;
|
||||
|
||||
const u8 *vht_op_ie;
|
||||
sint vht_op_ielen;
|
||||
|
||||
@ -490,6 +482,83 @@ void update_hw_vht_param(_adapter *padapter)
|
||||
rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len));
|
||||
}
|
||||
|
||||
#ifdef ROKU_PRIVATE
|
||||
u8 VHT_get_ss_from_map(u8 *vht_mcs_map)
|
||||
{
|
||||
u8 i, j;
|
||||
u8 ss = 0;
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
if (vht_mcs_map[i] != 0xff) {
|
||||
for (j = 0; j < 8; j += 2) {
|
||||
if (((vht_mcs_map[i] >> j) & 0x03) == 0x03)
|
||||
break;
|
||||
ss++;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return ss;
|
||||
}
|
||||
|
||||
void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
|
||||
{
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap;
|
||||
u8 cur_stbc_cap_infra_ap = 0;
|
||||
u16 cur_beamform_cap_infra_ap = 0;
|
||||
u8 *pcap_mcs;
|
||||
u8 *pcap_mcs_tx;
|
||||
u8 Rx_ss = 0, Tx_ss = 0;
|
||||
|
||||
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
if (pIE == NULL)
|
||||
return;
|
||||
|
||||
pmlmeinfo->ht_vht_received |= BIT(1);
|
||||
|
||||
pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data);
|
||||
|
||||
if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data))
|
||||
SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX);
|
||||
if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data))
|
||||
SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX);
|
||||
pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap;
|
||||
|
||||
/*store ap info for channel bandwidth*/
|
||||
pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data);
|
||||
|
||||
/*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/
|
||||
if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data))
|
||||
SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
|
||||
if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data))
|
||||
SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
|
||||
if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data))
|
||||
SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
|
||||
if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data))
|
||||
SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
|
||||
pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap;
|
||||
|
||||
/*store information about vht_mcs_set*/
|
||||
pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data);
|
||||
pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data);
|
||||
_rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2);
|
||||
_rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2);
|
||||
|
||||
Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap);
|
||||
Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap);
|
||||
if (Rx_ss >= Tx_ss) {
|
||||
pvhtpriv->number_of_streams_infra_ap = Rx_ss;
|
||||
} else{
|
||||
pvhtpriv->number_of_streams_infra_ap = Tx_ss;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* ROKU_PRIVATE */
|
||||
|
||||
void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
|
||||
{
|
||||
struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
|
||||
@ -621,17 +690,21 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta)
|
||||
struct sta_info *psta = (struct sta_info *)sta;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv;
|
||||
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
||||
struct registry_priv *regsty = adapter_to_regsty(padapter);
|
||||
u8 target_bw;
|
||||
u8 target_rxss, current_rxss;
|
||||
u8 update_ra = _FALSE;
|
||||
u8 tx_nss = 0, rf_type = RF_1T1R;
|
||||
struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
|
||||
|
||||
if (pvhtpriv->vht_option == _FALSE)
|
||||
return;
|
||||
|
||||
target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe);
|
||||
target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1);
|
||||
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
|
||||
tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
|
||||
target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1));
|
||||
|
||||
if (target_bw != psta->cmn.bw_mode) {
|
||||
if (hal_is_bw_support(padapter, target_bw)
|
||||
@ -720,7 +793,7 @@ u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw)
|
||||
|
||||
u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
|
||||
{
|
||||
u8 bw, rf_type, rf_num, rx_stbc_nss = 0;
|
||||
u8 bw, rf_num, rx_stbc_nss = 0;
|
||||
u16 HighestRate;
|
||||
u8 *pcap, *pcap_mcs;
|
||||
u32 len = 0;
|
||||
@ -738,19 +811,19 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
|
||||
rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
|
||||
rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
|
||||
|
||||
RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n.", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset);
|
||||
RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset);
|
||||
|
||||
if ((max_recvbuf_sz - rx_packet_offset) >= 11454) {
|
||||
SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n.", __FUNCTION__, __LINE__);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__);
|
||||
} else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) {
|
||||
SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n.", __FUNCTION__, __LINE__);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__);
|
||||
} else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) {
|
||||
SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n.", __FUNCTION__, __LINE__);
|
||||
RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__);
|
||||
} else
|
||||
RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n.", __FUNCTION__, __LINE__);
|
||||
RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__);
|
||||
|
||||
/* B2 B3 Supported Channel Width Set */
|
||||
if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) {
|
||||
@ -811,10 +884,11 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
|
||||
rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
|
||||
|
||||
/* IOT action suggested by Yu Chen 2017/3/3 */
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
|
||||
!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
|
||||
!pvhtpriv->ap_is_mu_bfer)
|
||||
rf_num = (rf_num >= 2 ? 2 : rf_num);
|
||||
|
||||
#endif
|
||||
/* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */
|
||||
SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num);
|
||||
/* B20 SU Beamformee Capable */
|
||||
@ -859,6 +933,8 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
|
||||
|
||||
u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len)
|
||||
{
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
|
||||
RT_CHANNEL_INFO *chset = rfctl->channel_set;
|
||||
u32 ielen;
|
||||
u8 max_bw;
|
||||
u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
@ -920,7 +996,11 @@ u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_le
|
||||
oper_bw = rtw_min(oper_bw, max_bw);
|
||||
|
||||
/* try downgrage bw to fit in channel plan setting */
|
||||
while (!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), oper_ch, oper_bw, oper_offset)) {
|
||||
while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset)
|
||||
|| (IS_DFS_SLAVE_WITH_RD(rfctl)
|
||||
&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
|
||||
&& rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset))
|
||||
) {
|
||||
oper_bw--;
|
||||
if (oper_bw == CHANNEL_WIDTH_20) {
|
||||
oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
|
||||
@ -930,7 +1010,9 @@ u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_le
|
||||
}
|
||||
}
|
||||
|
||||
rtw_warn_on(!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), oper_ch, oper_bw, oper_offset));
|
||||
rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset));
|
||||
if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)))
|
||||
rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset));
|
||||
|
||||
/* update VHT_OP_IE */
|
||||
if (oper_bw < CHANNEL_WIDTH_80) {
|
||||
|
@ -1065,7 +1065,7 @@ void wapi_test_set_key(struct _adapter *padapter, u8 *buf)
|
||||
void wapi_test_init(struct _adapter *padapter)
|
||||
{
|
||||
u8 keybuf[100];
|
||||
u8 mac_addr[6] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70};
|
||||
u8 mac_addr[ETH_ALEN] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70};
|
||||
u8 UskDataKey[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f};
|
||||
u8 UskMicKey[16] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
|
||||
u8 UskId = 0;
|
||||
@ -1091,7 +1091,7 @@ void wapi_test_init(struct _adapter *padapter)
|
||||
keybuf[2] = 1; /* AE */
|
||||
keybuf[3] = 0; /* not update */
|
||||
|
||||
memcpy(keybuf + 4, mac_addr, 6);
|
||||
memcpy(keybuf + 4, mac_addr, ETH_ALEN);
|
||||
memcpy(keybuf + 10, UskDataKey, 16);
|
||||
memcpy(keybuf + 26, UskMicKey, 16);
|
||||
keybuf[42] = UskId;
|
||||
@ -1103,7 +1103,7 @@ void wapi_test_init(struct _adapter *padapter)
|
||||
keybuf[2] = 0; /* AE */
|
||||
keybuf[3] = 0; /* not update */
|
||||
|
||||
memcpy(keybuf + 4, mac_addr, 6);
|
||||
memcpy(keybuf + 4, mac_addr, ETH_ALEN);
|
||||
memcpy(keybuf + 10, UskDataKey, 16);
|
||||
memcpy(keybuf + 26, UskMicKey, 16);
|
||||
keybuf[42] = UskId;
|
||||
@ -1116,7 +1116,7 @@ void wapi_test_init(struct _adapter *padapter)
|
||||
keybuf[1] = 1; /* Enable TX */
|
||||
keybuf[2] = 1; /* AE */
|
||||
keybuf[3] = 0; /* not update */
|
||||
memcpy(keybuf + 4, mac_addr, 6);
|
||||
memcpy(keybuf + 4, mac_addr, ETH_ALEN);
|
||||
memcpy(keybuf + 10, MskDataKey, 16);
|
||||
memcpy(keybuf + 26, MskMicKey, 16);
|
||||
keybuf[42] = MskId;
|
||||
@ -1127,7 +1127,7 @@ void wapi_test_init(struct _adapter *padapter)
|
||||
keybuf[1] = 1; /* Enable TX */
|
||||
keybuf[2] = 0; /* AE */
|
||||
keybuf[3] = 0; /* not update */
|
||||
memcpy(keybuf + 4, mac_addr, 6);
|
||||
memcpy(keybuf + 4, mac_addr, ETH_ALEN);
|
||||
memcpy(keybuf + 10, MskDataKey, 16);
|
||||
memcpy(keybuf + 26, MskMicKey, 16);
|
||||
keybuf[42] = MskId;
|
||||
|
File diff suppressed because it is too large
Load Diff
138
core/rtw_xmit.c
138
core/rtw_xmit.c
@ -471,7 +471,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
||||
struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
|
||||
u8 fix_bw = 0xFF;
|
||||
u16 bmp_cck_ofdm = 0;
|
||||
u32 bmp_ht = 0;
|
||||
@ -504,7 +503,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_
|
||||
|
||||
/* TODO: mlmeext->tx_rate*/
|
||||
|
||||
exit:
|
||||
if (r_bmp_cck_ofdm)
|
||||
*r_bmp_cck_ofdm = bmp_cck_ofdm;
|
||||
if (r_bmp_ht)
|
||||
@ -938,6 +936,8 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
|
||||
pattrib->stbc = psta->cmn.stbc_en;
|
||||
|
||||
#ifdef CONFIG_80211N_HT
|
||||
if(padapter->registrypriv.ht_enable &&
|
||||
is_supported_ht(padapter->registrypriv.wireless_mode)) {
|
||||
pattrib->ht_en = psta->htpriv.ht_option;
|
||||
pattrib->ch_offset = psta->htpriv.ch_offset;
|
||||
pattrib->ampdu_en = _FALSE;
|
||||
@ -957,6 +957,7 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
|
||||
pattrib->amsdu_ampdu_en = _FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_80211N_HT */
|
||||
/* if(pattrib->ht_en && psta->htpriv.ampdu_enable) */
|
||||
/* { */
|
||||
@ -970,10 +971,13 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
|
||||
|
||||
pattrib->raid = psta->cmn.ra_info.rate_id;
|
||||
#ifdef CONFIG_80211N_HT
|
||||
if(padapter->registrypriv.ht_enable &&
|
||||
is_supported_ht(padapter->registrypriv.wireless_mode)) {
|
||||
pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta);
|
||||
pattrib->ht_en = psta->htpriv.ht_option;
|
||||
pattrib->ch_offset = psta->htpriv.ch_offset;
|
||||
pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode);
|
||||
}
|
||||
#endif /* CONFIG_80211N_HT */
|
||||
}
|
||||
#endif /* CONFIG_TDLS */
|
||||
@ -1185,6 +1189,15 @@ static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib)
|
||||
UserPriority = 7;
|
||||
}
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ICMP_VOQ
|
||||
if(pattrib->icmp_pkt==1)/*use VO queue to send icmp packet*/
|
||||
UserPriority = 7;
|
||||
#endif
|
||||
#ifdef CONFIG_IP_R_MONITOR
|
||||
if (pattrib->ether_type == ETH_P_ARP)
|
||||
UserPriority = 7;
|
||||
#endif/*CONFIG_IP_R_MONITOR*/
|
||||
pattrib->priority = UserPriority;
|
||||
pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
|
||||
pattrib->subtype = WIFI_QOS_DATA_TYPE;
|
||||
@ -1277,15 +1290,45 @@ exit:
|
||||
inline u8 rtw_get_hwseq_no(_adapter *padapter)
|
||||
{
|
||||
u8 hwseq_num = 0;
|
||||
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
|
||||
hwseq_num = padapter->iface_id;
|
||||
if (hwseq_num > 3)
|
||||
hwseq_num = 3;
|
||||
#else
|
||||
if (!is_primary_adapter(padapter))
|
||||
hwseq_num = 1;
|
||||
/* else */
|
||||
/* hwseq_num = 2; */
|
||||
#endif
|
||||
#endif /* CONFIG_CONCURRENT_MODE */
|
||||
return hwseq_num;
|
||||
}
|
||||
#ifdef CONFIG_LPS
|
||||
#define LPS_PT_NORMAL 0
|
||||
#define LPS_PT_SP 1/* only DHCP packets is as SPECIAL_PACKET*/
|
||||
#define LPS_PT_ICMP 2
|
||||
|
||||
/*If EAPOL , ARP , OR DHCP packet, driver must be in active mode.*/
|
||||
static u8 _rtw_lps_chk_packet_type(struct pkt_attrib *pattrib)
|
||||
{
|
||||
u8 pkt_type = LPS_PT_NORMAL; /*normal data frame*/
|
||||
|
||||
#ifdef CONFIG_WAPI_SUPPORT
|
||||
if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
|
||||
pkt_type = LPS_PT_SP;
|
||||
#else /* !CONFIG_WAPI_SUPPORT */
|
||||
|
||||
#ifndef CONFIG_LPS_NOT_LEAVE_FOR_ICMP
|
||||
if (pattrib->icmp_pkt == 1)
|
||||
pkt_type = LPS_PT_ICMP;
|
||||
else
|
||||
#endif
|
||||
if (pattrib->dhcp_pkt == 1)
|
||||
pkt_type = LPS_PT_SP;
|
||||
#endif
|
||||
return pkt_type;
|
||||
}
|
||||
#endif
|
||||
static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib)
|
||||
{
|
||||
uint i;
|
||||
@ -1295,12 +1338,13 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
|
||||
|
||||
sint bmcast;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
struct qos_priv *pqospriv = &pmlmepriv->qospriv;
|
||||
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
||||
sint res = _SUCCESS;
|
||||
|
||||
#ifdef CONFIG_LPS
|
||||
u8 pkt_type = 0;
|
||||
#endif
|
||||
|
||||
DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib);
|
||||
|
||||
@ -1441,29 +1485,34 @@ get_sta_info:
|
||||
}
|
||||
|
||||
} else if (0x888e == pattrib->ether_type)
|
||||
RTW_PRINT("send eapol packet\n");
|
||||
parsing_eapol_packet(padapter, pktfile.cur_addr, psta, 1);
|
||||
#ifdef DBG_ARP_DUMP
|
||||
else if (pattrib->ether_type == ETH_P_ARP) {
|
||||
u8 arp[28] = {0};
|
||||
|
||||
_rtw_pktfile_read(&pktfile, arp, 28);
|
||||
dump_arp_pkt(RTW_DBGDUMP, etherhdr.h_dest, etherhdr.h_source, arp, 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
|
||||
rtw_mi_set_scan_deny(padapter, 3000);
|
||||
|
||||
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) &&
|
||||
pattrib->ether_type == ETH_P_ARP &&
|
||||
!IS_MCAST(pattrib->dst)) {
|
||||
rtw_mi_set_scan_deny(padapter, 1000);
|
||||
rtw_mi_scan_abort(padapter, _FALSE); /*rtw_scan_abort_no_wait*/
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LPS
|
||||
/* If EAPOL , ARP , OR DHCP packet, driver must be in active mode. */
|
||||
#ifdef CONFIG_WAPI_SUPPORT
|
||||
if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
|
||||
#else /* !CONFIG_WAPI_SUPPORT */
|
||||
#if 0
|
||||
if ((pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
|
||||
#else /* only ICMP/DHCP packets is as SPECIAL_PACKET, and leave LPS when tx IMCP/DHCP packets. */
|
||||
/* if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) */
|
||||
if (pattrib->icmp_pkt == 1)
|
||||
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1);
|
||||
else if (pattrib->dhcp_pkt == 1)
|
||||
#endif
|
||||
#endif
|
||||
{
|
||||
pkt_type = _rtw_lps_chk_packet_type(pattrib);
|
||||
|
||||
if (pkt_type == LPS_PT_SP) {/*packet is as SPECIAL_PACKET*/
|
||||
DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active);
|
||||
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1);
|
||||
}
|
||||
} else if (pkt_type == LPS_PT_ICMP)
|
||||
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1);
|
||||
#endif /* CONFIG_LPS */
|
||||
|
||||
#ifdef CONFIG_BEAMFORMING
|
||||
@ -1544,7 +1593,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
u8 *pframe, *payload, mic[8];
|
||||
struct mic_data micdata;
|
||||
/* struct sta_info *stainfo; */
|
||||
struct qos_priv *pqospriv = &(padapter->mlmepriv.qospriv);
|
||||
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
||||
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
||||
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
||||
@ -1628,7 +1676,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
|
||||
}
|
||||
|
||||
/* if(pqospriv->qos_option==1) */
|
||||
if (pattrib->qos_en)
|
||||
priority[0] = (u8)pxmitframe->attrib.priority;
|
||||
|
||||
@ -2516,7 +2563,7 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
|
||||
|
||||
xmitframe_swencrypt(padapter, pxmitframe);
|
||||
|
||||
pattrib->vcs_mode = NONE_VCS;
|
||||
update_attrib_vcs_info(padapter, pxmitframe);
|
||||
|
||||
exit:
|
||||
return res;
|
||||
@ -3160,11 +3207,15 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz
|
||||
pstats->tx_pkts += pkt_num;
|
||||
|
||||
pstats->tx_bytes += sz;
|
||||
#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP)
|
||||
if (adapter_to_pwrctl(padapter)->lps_chk_by_tp)
|
||||
traffic_check_for_leave_lps_by_tp(padapter, _TRUE, psta);
|
||||
#endif /* CONFIG_LPS */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CHECK_LEAVE_LPS
|
||||
/* traffic_check_for_leave_lps(padapter, _TRUE); */
|
||||
#endif /* CONFIG_LPS */
|
||||
#endif /* CONFIG_CHECK_LEAVE_LPS */
|
||||
|
||||
}
|
||||
}
|
||||
@ -3201,9 +3252,6 @@ static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv,
|
||||
} else
|
||||
RTW_INFO("%s fail, no xmitbuf available !!!\n", __func__);
|
||||
|
||||
exit:
|
||||
|
||||
|
||||
return pxmitbuf;
|
||||
}
|
||||
|
||||
@ -3734,10 +3782,6 @@ struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame)
|
||||
struct registry_priv *pregpriv = &padapter->registrypriv;
|
||||
int i, inx[4];
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* int j, tmp, acirp_cnt[4]; */
|
||||
#endif
|
||||
|
||||
inx[0] = 0;
|
||||
inx[1] = 1;
|
||||
inx[2] = 2;
|
||||
@ -3792,10 +3836,6 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi
|
||||
_adapter *padapter = pxmitpriv->adapter;
|
||||
struct registry_priv *pregpriv = &padapter->registrypriv;
|
||||
int i, inx[4];
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* int j, tmp, acirp_cnt[4]; */
|
||||
#endif
|
||||
|
||||
|
||||
inx[0] = 0;
|
||||
inx[1] = 1;
|
||||
@ -3803,7 +3843,7 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi
|
||||
inx[3] = 3;
|
||||
|
||||
if (pregpriv->wifi_spec == 1) {
|
||||
int j, tmp, acirp_cnt[4];
|
||||
int j;
|
||||
#if 0
|
||||
if (flags < XMIT_QUEUE_ENTRY) {
|
||||
/* priority exchange according to the completed xmitbuf flags. */
|
||||
@ -3966,7 +4006,6 @@ s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
struct sta_info *psta;
|
||||
struct tx_servq *ptxservq;
|
||||
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
|
||||
sint res = _SUCCESS;
|
||||
|
||||
@ -4114,7 +4153,6 @@ void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry)
|
||||
int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb)
|
||||
{
|
||||
struct sk_buff *skb = *pskb;
|
||||
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
||||
_irqL irqL;
|
||||
/* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */
|
||||
{
|
||||
@ -4379,9 +4417,10 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
|
||||
u8 dummybuf[32];
|
||||
int len = skb->len, rtap_len;
|
||||
|
||||
if (skb)
|
||||
|
||||
rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize);
|
||||
|
||||
#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
|
||||
if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header)))
|
||||
goto fail;
|
||||
|
||||
@ -4400,7 +4439,7 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
|
||||
}
|
||||
_rtw_pktfile_read(&pktfile, dummybuf, rtap_len-sizeof(struct ieee80211_radiotap_header));
|
||||
len = len - rtap_len;
|
||||
|
||||
#endif
|
||||
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
|
||||
if (pmgntframe == NULL) {
|
||||
rtw_udelay_os(500);
|
||||
@ -4440,7 +4479,6 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
|
||||
dump_mgntframe(padapter, pmgntframe);
|
||||
|
||||
fail:
|
||||
rtw_endofpktfile(&pktfile);
|
||||
rtw_skb_free(skb);
|
||||
return 0;
|
||||
}
|
||||
@ -4737,7 +4775,6 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
|
||||
struct sta_info *psta = NULL;
|
||||
struct sta_priv *pstapriv = &padapter->stapriv;
|
||||
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
||||
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
||||
sint bmcst = IS_MCAST(pattrib->ra);
|
||||
bool update_tim = _FALSE;
|
||||
#ifdef CONFIG_TDLS
|
||||
@ -5258,7 +5295,9 @@ void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta)
|
||||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_TDLS
|
||||
exit:
|
||||
#endif
|
||||
/* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */
|
||||
_exit_critical_bh(&pxmitpriv->lock, &irqL);
|
||||
|
||||
@ -5491,7 +5530,6 @@ bool rtw_xmit_ac_blocked(_adapter *adapter)
|
||||
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||
_adapter *iface;
|
||||
struct mlme_ext_priv *mlmeext;
|
||||
struct mlme_ext_info *mlmeextinfo;
|
||||
bool blocked = _FALSE;
|
||||
int i;
|
||||
#ifdef DBG_CONFIG_ERROR_DETECT
|
||||
@ -5505,8 +5543,14 @@ bool rtw_xmit_ac_blocked(_adapter *adapter)
|
||||
#endif/* #ifdef DBG_CONFIG_ERROR_RESET */
|
||||
#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */
|
||||
|
||||
if (rfctl->offch_state != OFFCHS_NONE)
|
||||
if (rfctl->offch_state != OFFCHS_NONE
|
||||
#ifdef CONFIG_DFS
|
||||
|| IS_RADAR_DETECTED(rfctl) || rfctl->csa_ch
|
||||
#endif
|
||||
) {
|
||||
blocked = _TRUE;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
@ -5702,8 +5746,6 @@ static u8 backup_idx[HW_QUEUE_ENTRY];
|
||||
|
||||
void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq)
|
||||
{
|
||||
u16 reg_rp;
|
||||
u16 reg_wp;
|
||||
u32 tmp32;
|
||||
u8 *pxmit_buf;
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -20,9 +20,6 @@
|
||||
/* *******************************************
|
||||
* The following is for 8822B 1ANT BT Co-exist definition
|
||||
* ********************************************/
|
||||
#define BT_8822B_1ANT_COEX_DBG 0
|
||||
#define BT_AUTO_REPORT_ONLY_8822B_1ANT 1
|
||||
|
||||
#define BT_INFO_8822B_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8822B_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8822B_1ANT_B_HID BIT(5)
|
||||
@ -32,32 +29,16 @@
|
||||
#define BT_INFO_8822B_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8822B_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT 2
|
||||
|
||||
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 150 /* max: 255 */
|
||||
#define BT_8822B_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT 35
|
||||
#define BT_8822B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8822B_1ANT_ANTDET_ENABLE 0
|
||||
#define BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
|
||||
|
||||
#define BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
|
||||
|
||||
enum bt_8822b_1ant_signal_state {
|
||||
BT_8822B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8822B_1ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8822B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8822B_1ANT_SIG_STA_MAX
|
||||
BT_8822B_1ANT_GNT_SET_TO_LOW = 0x0,
|
||||
BT_8822B_1ANT_GNT_SET_TO_HIGH = 0x1,
|
||||
BT_8822B_1ANT_GNT_SET_BY_HW = 0x2,
|
||||
BT_8822B_1ANT_GNT_SET_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_path_ctrl_owner {
|
||||
@ -94,165 +75,173 @@ enum bt_8822b_1ant_lte_break_table_type {
|
||||
};
|
||||
|
||||
enum bt_info_src_8822b_1ant {
|
||||
BT_INFO_SRC_8822B_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8822B_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8822B_1ANT_MAX
|
||||
BT_8822B_1ANT_INFO_SRC_WIFI_FW = 0x0,
|
||||
BT_8822B_1ANT_INFO_SRC_BT_RSP = 0x1,
|
||||
BT_8822B_1ANT_INFO_SRC_BT_ACT = 0x2,
|
||||
BT_8822B_1ANT_INFO_SRC_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_bt_status {
|
||||
BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8822B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8822B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8822B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8822B_1ANT_BT_STATUS_MAX
|
||||
BT_8822B_1ANT_BSTATUS_NCON_IDLE = 0x0,
|
||||
BT_8822B_1ANT_BSTATUS_CON_IDLE = 0x1,
|
||||
BT_8822B_1ANT_BSTATUS_INQ_PAGE = 0x2,
|
||||
BT_8822B_1ANT_BSTATUS_ACL_BUSY = 0x3,
|
||||
BT_8822B_1ANT_BSTATUS_SCO_BUSY = 0x4,
|
||||
BT_8822B_1ANT_BSTATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8822B_1ANT_BSTATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_wifi_status {
|
||||
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8822B_1ANT_WIFI_STATUS_MAX
|
||||
BT_8822B_1ANT_WSTATUS_NCON_IDLE = 0x0,
|
||||
BT_8822B_1ANT_WSTATUS_NCON_SCAN = 0x1,
|
||||
BT_8822B_1ANT_WSTATUS_CON_SCAN = 0x2,
|
||||
BT_8822B_1ANT_WSTATUS_CON_SPECPKT = 0x3,
|
||||
BT_8822B_1ANT_WSTATUS_CON_IDLE = 0x4,
|
||||
BT_8822B_1ANT_WSTATUS_CON_BUSY = 0x5,
|
||||
BT_8822B_1ANT_WSTATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_coex_algo {
|
||||
BT_8822B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8822B_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8822B_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8822B_1ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
|
||||
BT_8822B_1ANT_COEX_ALGO_A2DPSINK = 0xc,
|
||||
BT_8822B_1ANT_COEX_ALGO_MAX
|
||||
BT_8822B_1ANT_COEX_UNDEFINED = 0x0,
|
||||
BT_8822B_1ANT_COEX_SCO = 0x1,
|
||||
BT_8822B_1ANT_COEX_HID = 0x2,
|
||||
BT_8822B_1ANT_COEX_A2DP = 0x3,
|
||||
BT_8822B_1ANT_COEX_A2DP_PANHS = 0x4,
|
||||
BT_8822B_1ANT_COEX_PAN = 0x5,
|
||||
BT_8822B_1ANT_COEX_PANHS = 0x6,
|
||||
BT_8822B_1ANT_COEX_PAN_A2DP = 0x7,
|
||||
BT_8822B_1ANT_COEX_PAN_HID = 0x8,
|
||||
BT_8822B_1ANT_COEX_HID_A2DP_PAN = 0x9,
|
||||
BT_8822B_1ANT_COEX_HID_A2DP = 0xa,
|
||||
BT_8822B_1ANT_COEX_NOPROFILEBUSY = 0xb,
|
||||
BT_8822B_1ANT_COEX_A2DPSINK = 0xc,
|
||||
BT_8822B_1ANT_COEX_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
|
||||
BT_8822B_1ANT_SWITCH_USE_SPDT = 0x0,
|
||||
BT_8822B_1ANT_SWITCH_USE_SP3T = 0x1,
|
||||
BT_8822B_1ANT_SWITCH_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
|
||||
BT_8822B_1ANT_CTRL_BY_BBSW = 0x0,
|
||||
BT_8822B_1ANT_CTRL_BY_PTA = 0x1,
|
||||
BT_8822B_1ANT_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8822B_1ANT_CTRL_BY_MAC = 0x3,
|
||||
BT_8822B_1ANT_CTRL_BY_BT = 0x4,
|
||||
BT_8822B_1ANT_CTRL_BY_FW = 0x5,
|
||||
BT_8822B_1ANT_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_pos_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_S0WLG_S1BT = 0x4,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
|
||||
BT_8822B_1ANT_TO_BT = 0x0,
|
||||
BT_8822B_1ANT_TO_WLG = 0x1,
|
||||
BT_8822B_1ANT_TO_WLA = 0x2,
|
||||
BT_8822B_1ANT_TO_NOCARE = 0x3,
|
||||
BT_8822B_1ANT_TO_S0WLG_S1BT = 0x4,
|
||||
BT_8822B_1ANT_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_phase {
|
||||
BT_8822B_1ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8822B_1ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8822B_1ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8822B_1ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8822B_1ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8822B_1ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8822B_1ANT_PHASE_COEX_POWERON = 0x6,
|
||||
BT_8822B_1ANT_PHASE_2G_FREERUN_ANT_WL = 0x7,
|
||||
BT_8822B_1ANT_PHASE_2G_FREERUN_ANT_BT = 0x8,
|
||||
BT_8822B_1ANT_PHASE_MCC_DUALBAND_RUNTIME = 0x9,
|
||||
BT_8822B_1ANT_PHASE_2G_FREERUN_ANT_S0WLS1BT = 0xa,
|
||||
BT_8822B_1ANT_PHASE_INIT = 0x0,
|
||||
BT_8822B_1ANT_PHASE_WONLY = 0x1,
|
||||
BT_8822B_1ANT_PHASE_WOFF = 0x2,
|
||||
BT_8822B_1ANT_PHASE_2G = 0x3,
|
||||
BT_8822B_1ANT_PHASE_5G = 0x4,
|
||||
BT_8822B_1ANT_PHASE_BTMP = 0x5,
|
||||
BT_8822B_1ANT_PHASE_POWERON = 0x6,
|
||||
BT_8822B_1ANT_PHASE_2G_WL = 0x7,
|
||||
BT_8822B_1ANT_PHASE_2G_BT = 0x8,
|
||||
BT_8822B_1ANT_PHASE_MCC = 0x9,
|
||||
BT_8822B_1ANT_PHASE_2G_WLBT = 0xa, /* GNT_BT/GNT_BT PTA */
|
||||
BT_8822B_1ANT_PHASE_2G_FREERUN = 0xb, /* GNT_BT/GNT_BT SW Hi*/
|
||||
BT_8822B_1ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
|
||||
enum bt_8822b_1ant_Scoreboard {
|
||||
BT_8822B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
|
||||
BT_8822B_1ANT_SCOREBOARD_ONOFF = BIT(1),
|
||||
BT_8822B_1ANT_SCOREBOARD_SCAN = BIT(2),
|
||||
BT_8822B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
|
||||
BT_8822B_1ANT_SCOREBOARD_RXGAIN = BIT(4),
|
||||
BT_8822B_1ANT_SCOREBOARD_WLBUSY = BIT(6),
|
||||
BT_8822B_1ANT_SCOREBOARD_EXTFEM = BIT(8),
|
||||
BT_8822B_1ANT_SCOREBOARD_BTCQDDR = BIT(10)
|
||||
enum bt_8822b_1ant_scoreboard {
|
||||
BT_8822B_1ANT_SCBD_ACTIVE = BIT(0),
|
||||
BT_8822B_1ANT_SCBD_ONOFF = BIT(1),
|
||||
BT_8822B_1ANT_SCBD_SCAN = BIT(2),
|
||||
BT_8822B_1ANT_SCBD_UNDERTEST = BIT(3),
|
||||
BT_8822B_1ANT_SCBD_RXGAIN = BIT(4),
|
||||
BT_8822B_1ANT_SCBD_WLBUSY = BIT(6),
|
||||
BT_8822B_1ANT_SCBD_EXTFEM = BIT(8),
|
||||
BT_8822B_1ANT_SCBD_CQDDR = BIT(10)
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_RUNREASON {
|
||||
BT_8822B_1ANT_RSN_2GSCANSTART = 0x0,
|
||||
BT_8822B_1ANT_RSN_5GSCANSTART = 0x1,
|
||||
BT_8822B_1ANT_RSN_SCANFINISH = 0x2,
|
||||
BT_8822B_1ANT_RSN_2GSWITCHBAND = 0x3,
|
||||
BT_8822B_1ANT_RSN_5GSWITCHBAND = 0x4,
|
||||
BT_8822B_1ANT_RSN_2GCONSTART = 0x5,
|
||||
BT_8822B_1ANT_RSN_5GCONSTART = 0x6,
|
||||
BT_8822B_1ANT_RSN_2GCONFINISH = 0x7,
|
||||
BT_8822B_1ANT_RSN_5GCONFINISH = 0x8,
|
||||
BT_8822B_1ANT_RSN_2GMEDIA = 0x9,
|
||||
BT_8822B_1ANT_RSN_5GMEDIA = 0xa,
|
||||
BT_8822B_1ANT_RSN_MEDIADISCON = 0xb,
|
||||
BT_8822B_1ANT_RSN_2GSPECIALPKT = 0xc,
|
||||
BT_8822B_1ANT_RSN_5GSPECIALPKT = 0xd,
|
||||
BT_8822B_1ANT_RSN_BTINFO = 0xe,
|
||||
BT_8822B_1ANT_RSN_PERIODICAL = 0xf,
|
||||
BT_8822B_1ANT_RSN_PNP = 0x10,
|
||||
BT_8822B_1ANT_RSN_LPS = 0x11,
|
||||
BT_8822B_1ANT_RSN_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_WL_LINK_MODE {
|
||||
BT_8822B_1ANT_WLINK_2G1PORT = 0x0,
|
||||
BT_8822B_1ANT_WLINK_2GMPORT = 0x1,
|
||||
BT_8822B_1ANT_WLINK_25GMPORT = 0x2,
|
||||
BT_8822B_1ANT_WLINK_5G = 0x3,
|
||||
BT_8822B_1ANT_WLINK_2GGO = 0x4,
|
||||
BT_8822B_1ANT_WLINK_2GGC = 0x5,
|
||||
BT_8822B_1ANT_WLINK_BTMR = 0x6,
|
||||
BT_8822B_1ANT_WLINK_MAX
|
||||
};
|
||||
|
||||
struct coex_dm_8822b_1ant {
|
||||
/* hw setting */
|
||||
u32 pre_ant_pos_type;
|
||||
u32 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
|
||||
u8 cur_bt_pwr_lvl;
|
||||
u8 cur_wl_pwr_lvl;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
boolean cur_low_penalty_ra;
|
||||
|
||||
u32 cur_val0x6c0;
|
||||
u32 cur_val0x6c4;
|
||||
u32 cur_val0x6c8;
|
||||
u8 cur_val0x6cc;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u32 pre_ext_ant_switch_status;
|
||||
u32 cur_ext_ant_switch_status;
|
||||
u32 cur_switch_status;
|
||||
|
||||
u8 error_condition;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 setting_tdma;
|
||||
};
|
||||
|
||||
struct coex_sta_8822b_1ant {
|
||||
@ -272,20 +261,26 @@ struct coex_sta_8822b_1ant {
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
boolean is_hiPri_rx_overhead;
|
||||
boolean is_hi_pri_rx_overhead;
|
||||
s8 bt_rssi;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
|
||||
u8 bt_info_c2h[BT_8822B_1ANT_INFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX];
|
||||
u32 bt_info_c2h_cnt[BT_8822B_1ANT_INFO_SRC_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
boolean wifi_high_pri_task1;
|
||||
boolean wifi_high_pri_task2;
|
||||
|
||||
u8 bt_info_lb2;
|
||||
u8 bt_info_lb3;
|
||||
u8 bt_info_hb0;
|
||||
u8 bt_info_hb1;
|
||||
u8 bt_info_hb2;
|
||||
u8 bt_info_hb3;
|
||||
|
||||
u8 bt_info_ext;
|
||||
u8 bt_info_ext2;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
u8 bt_retry_cnt;
|
||||
@ -329,23 +324,21 @@ struct coex_sta_8822b_1ant {
|
||||
|
||||
boolean is_A2DP_3M;
|
||||
boolean voice_over_HOGP;
|
||||
u8 bt_info;
|
||||
boolean is_autoslot;
|
||||
u8 forbidden_slot;
|
||||
u8 hid_busy_num;
|
||||
u8 hid_pair_cnt;
|
||||
|
||||
u32 cnt_RemoteNameReq;
|
||||
u32 cnt_setupLink;
|
||||
u32 cnt_ReInit;
|
||||
u32 cnt_IgnWlanAct;
|
||||
u32 cnt_Page;
|
||||
u32 cnt_RoleSwitch;
|
||||
u32 cnt_remote_name_req;
|
||||
u32 cnt_setup_link;
|
||||
u32 cnt_reinit;
|
||||
u32 cnt_ign_wlan_act;
|
||||
u32 cnt_page;
|
||||
u32 cnt_role_switch;
|
||||
|
||||
u16 bt_reg_vendor_ac;
|
||||
u16 bt_reg_vendor_ae;
|
||||
|
||||
boolean is_setupLink;
|
||||
boolean is_setup_link;
|
||||
u8 wl_noisy_level;
|
||||
u32 gnt_error_cnt;
|
||||
u8 bt_afh_map[10];
|
||||
@ -365,13 +358,14 @@ struct coex_sta_8822b_1ant {
|
||||
|
||||
u8 wl_fw_dbg_info[10];
|
||||
u8 wl_rx_rate;
|
||||
u8 wl_tx_rate;
|
||||
u8 wl_rts_rx_rate;
|
||||
u8 wl_center_channel;
|
||||
u8 wl_tx_macid;
|
||||
u8 wl_tx_retry_ratio;
|
||||
|
||||
u16 score_board_WB;
|
||||
boolean is_hid_rcu;
|
||||
u16 legacy_forbidden_slot;
|
||||
u16 le_forbidden_slot;
|
||||
u8 bt_a2dp_vendor_id;
|
||||
u32 bt_a2dp_device_name;
|
||||
boolean is_ble_scan_en;
|
||||
@ -383,153 +377,119 @@ struct coex_sta_8822b_1ant {
|
||||
u8 connect_ap_period_cnt;
|
||||
boolean is_bt_reenable;
|
||||
u8 cnt_bt_reenable;
|
||||
boolean is_wifi_linkscan_process;
|
||||
u8 wl_coex_mode;
|
||||
|
||||
u8 wl_pnp_wakeup_downcnt;
|
||||
u32 coex_run_cnt;
|
||||
boolean is_no_wl_5ms_extend;
|
||||
|
||||
u16 wl_0x42a_backup;
|
||||
u32 wl_0x430_backup;
|
||||
u32 wl_0x434_backup;
|
||||
u8 wl_0x455_backup;
|
||||
|
||||
boolean wl_tx_limit_en;
|
||||
boolean wl_ampdu_limit_en;
|
||||
boolean wl_rxagg_limit_en;
|
||||
u8 wl_rxagg_size;
|
||||
u8 coex_run_reason;
|
||||
};
|
||||
|
||||
struct rfe_type_8822b_1ant {
|
||||
|
||||
u8 rfe_module_type;
|
||||
boolean ext_ant_switch_exist;
|
||||
u8 ext_ant_switch_type;
|
||||
boolean ext_switch_exist;
|
||||
u8 ext_switch_type;
|
||||
/* iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 => Ant to BT/5G */
|
||||
u8 ext_ant_switch_ctrl_polarity;
|
||||
u8 ext_switch_polarity;
|
||||
};
|
||||
|
||||
|
||||
#define BT_8822B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8822B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8822B_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8822b_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
boolean is_AntDet_running;
|
||||
struct wifi_link_info_8822b_1ant {
|
||||
u8 num_of_active_port;
|
||||
u32 port_connect_status;
|
||||
boolean is_all_under_5g;
|
||||
boolean is_mcc_25g;
|
||||
boolean is_p2p_connected;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ********************************************/
|
||||
void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
|
||||
*btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
|
||||
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
|
||||
void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
|
||||
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
|
||||
void ex_halbtc8822b1ant_power_on_setting(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_pre_load_firmware(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_init_hw_config(struct btc_coexist *btc,
|
||||
boolean wifi_only);
|
||||
void ex_halbtc8822b1ant_init_coex_dm(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_ips_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b1ant_lps_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b1ant_scan_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b1ant_scan_notify_without_bt(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b1ant_switchband_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b1ant_switchband_notify_without_bt(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b1ant_connect_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b1ant_media_status_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b1ant_specific_packet_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b1ant_bt_info_notify(struct btc_coexist *btc,
|
||||
u8 *tmp_buf, u8 length);
|
||||
void ex_halbtc8822b1ant_wl_fwdbginfo_notify(struct btc_coexist *btc,
|
||||
u8 *tmp_buf, u8 length);
|
||||
void ex_halbtc8822b1ant_rx_rate_change_notify(struct btc_coexist *btc,
|
||||
BOOLEAN is_data_frame,
|
||||
u8 btc_rate_id);
|
||||
void ex_halbtc8822b1ant_tx_rate_change_notify(struct btc_coexist *btc,
|
||||
u8 tx_rate,
|
||||
u8 tx_retry_ratio, u8 macid);
|
||||
void ex_halbtc8822b1ant_rf_status_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b1ant_halt_notify(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_pnp_notify(struct btc_coexist *btc, u8 pnp_state);
|
||||
void ex_halbtc8822b1ant_score_board_status_notify(struct btc_coexist *btc,
|
||||
u8 *tmp_buf, u8 length);
|
||||
void ex_halbtc8822b1ant_coex_dm_reset(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_periodical(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_display_simple_coex_info(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_display_coex_info(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_dbg_control(struct btc_coexist *btc, u8 op_code,
|
||||
u8 op_len, u8 *pdata);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8822b1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8822b1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8822b1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_scan_notify_without_bt(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_switchband_notify_without_bt(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
|
||||
#define ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8822b1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8822b1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_display_ant_detection(btcoexist)
|
||||
#define ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
|
||||
#define ex_halbtc8822b1ant_power_on_setting(btc)
|
||||
#define ex_halbtc8822b1ant_pre_load_firmware(btc)
|
||||
#define ex_halbtc8822b1ant_init_hw_config(btc, wifi_only)
|
||||
#define ex_halbtc8822b1ant_init_coex_dm(btc)
|
||||
#define ex_halbtc8822b1ant_ips_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_lps_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_scan_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_scan_notify_without_bt(btc, type)
|
||||
#define ex_halbtc8822b1ant_switchband_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_switchband_notify_without_bt(btc, type)
|
||||
#define ex_halbtc8822b1ant_connect_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_media_status_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_specific_packet_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_bt_info_notify(btc, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_wl_fwdbginfo_notify(btc, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_rx_rate_change_notify(btc, is_data_frame, \
|
||||
btc_rate_id)
|
||||
#define ex_halbtc8822b1ant_tx_rate_change_notify(btcoexist, tx_rate, \
|
||||
tx_retry_ratio, macid)
|
||||
#define ex_halbtc8822b1ant_rf_status_notify(btc, type)
|
||||
#define ex_halbtc8822b1ant_halt_notify(btc)
|
||||
#define ex_halbtc8822b1ant_pnp_notify(btc, pnp_state)
|
||||
#define ex_halbtc8822b1ant_score_board_status_notify(btc, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_coex_dm_reset(btc)
|
||||
#define ex_halbtc8822b1ant_periodical(btc)
|
||||
#define ex_halbtc8822b1ant_display_coex_info(btc)
|
||||
#define ex_halbtc8822b1ant_dbg_control(btc, op_code, op_len, pdata)
|
||||
#endif
|
||||
#else
|
||||
|
||||
void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
|
||||
*btcoexist);
|
||||
void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only_5g);
|
||||
|
||||
void
|
||||
ex_halbtc8822b1ant_init_hw_config_without_bt(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b1ant_switch_band_without_bt(struct btc_coexist *btc,
|
||||
boolean wifi_only_5g);
|
||||
|
||||
#endif
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -20,12 +20,6 @@
|
||||
/* *******************************************
|
||||
* The following is for 8822B 2Ant BT Co-exist definition
|
||||
* ********************************************/
|
||||
#define BT_8822B_2ANT_COEX_DBG 0
|
||||
#define BT_AUTO_REPORT_ONLY_8822B_2ANT 1
|
||||
|
||||
|
||||
|
||||
|
||||
#define BT_INFO_8822B_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8822B_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8822B_2ANT_B_HID BIT(5)
|
||||
@ -37,7 +31,6 @@
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8822B_2ANT 2
|
||||
|
||||
|
||||
/* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation.
|
||||
* (default = 42)
|
||||
*/
|
||||
@ -63,27 +56,11 @@
|
||||
#define BT_8822B_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
|
||||
#define BT_8822B_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
|
||||
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8822B_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
|
||||
#define BT_8822B_2ANT_ANTDET_PSDTHRES_1ANT 40
|
||||
#define BT_8822B_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8822B_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
|
||||
#define BT_8822B_2ANT_ANTDET_ENABLE 0
|
||||
#define BT_8822B_2ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8822B_2ANT_ANTDET_BTTXCHANNEL 39
|
||||
#define BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
|
||||
|
||||
|
||||
#define BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8822b_2ant_signal_state {
|
||||
BT_8822B_2ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8822B_2ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8822B_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8822B_2ANT_SIG_STA_MAX
|
||||
BT_8822B_2ANT_GNT_SET_TO_LOW = 0x0,
|
||||
BT_8822B_2ANT_GNT_SET_TO_HIGH = 0x1,
|
||||
BT_8822B_2ANT_GNT_SET_BY_HW = 0x2,
|
||||
BT_8822B_2ANT_GNT_SET_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_path_ctrl_owner {
|
||||
@ -93,9 +70,9 @@ enum bt_8822b_2ant_path_ctrl_owner {
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_gnt_ctrl_type {
|
||||
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8822B_2ANT_GNT_TYPE_MAX
|
||||
BT_8822B_2ANT_GNT_CTRL_BY_PTA = 0x0,
|
||||
BT_8822B_2ANT_GNT_CTRL_BY_SW = 0x1,
|
||||
BT_8822B_2ANT_GNT_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_gnt_ctrl_block {
|
||||
@ -120,181 +97,164 @@ enum bt_8822b_2ant_lte_break_table_type {
|
||||
};
|
||||
|
||||
enum bt_info_src_8822b_2ant {
|
||||
BT_INFO_SRC_8822B_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8822B_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8822B_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8822B_2ANT_MAX
|
||||
BT_8822B_2ANT_INFO_SRC_WIFI_FW = 0x0,
|
||||
BT_8822B_2ANT_INFO_SRC_BT_RSP = 0x1,
|
||||
BT_8822B_2ANT_INFO_SRC_BT_ACT = 0x2,
|
||||
BT_8822B_2ANT_INFO_SRC_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_bt_status {
|
||||
BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8822B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8822B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8822B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8822B_2ANT_BT_STATUS_MAX
|
||||
BT_8822B_2ANT_BSTATUS_NCON_IDLE = 0x0,
|
||||
BT_8822B_2ANT_BSTATUS_CON_IDLE = 0x1,
|
||||
BT_8822B_2ANT_BSTATUS_INQ_PAGE = 0x2,
|
||||
BT_8822B_2ANT_BSTATUS_ACL_BUSY = 0x3,
|
||||
BT_8822B_2ANT_BSTATUS_SCO_BUSY = 0x4,
|
||||
BT_8822B_2ANT_BSTATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8822B_2ANT_BSTATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_coex_algo {
|
||||
BT_8822B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8822B_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8822B_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8822B_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8822B_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8822B_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8822B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8822B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
|
||||
BT_8822B_2ANT_COEX_ALGO_A2DPSINK = 0xc,
|
||||
BT_8822B_2ANT_COEX_ALGO_MAX
|
||||
BT_8822B_2ANT_COEX_UNDEFINED = 0x0,
|
||||
BT_8822B_2ANT_COEX_SCO = 0x1,
|
||||
BT_8822B_2ANT_COEX_HID = 0x2,
|
||||
BT_8822B_2ANT_COEX_A2DP = 0x3,
|
||||
BT_8822B_2ANT_COEX_A2DP_PANHS = 0x4,
|
||||
BT_8822B_2ANT_COEX_PAN = 0x5,
|
||||
BT_8822B_2ANT_COEX_PANHS = 0x6,
|
||||
BT_8822B_2ANT_COEX_PAN_A2DP = 0x7,
|
||||
BT_8822B_2ANT_COEX_PAN_HID = 0x8,
|
||||
BT_8822B_2ANT_COEX_HID_A2DP_PAN = 0x9,
|
||||
BT_8822B_2ANT_COEX_HID_A2DP = 0xa,
|
||||
BT_8822B_2ANT_COEX_NOPROFILEBUSY = 0xb,
|
||||
BT_8822B_2ANT_COEX_A2DPSINK = 0xc,
|
||||
BT_8822B_2ANT_COEX_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_ext_ant_switch_type {
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAX
|
||||
BT_8822B_2ANT_SWITCH_USE_DPDT = 0x0,
|
||||
BT_8822B_2ANT_SWITCH_USE_SPDT = 0x1,
|
||||
BT_8822B_2ANT_SWITCH_NONE = 0x2,
|
||||
BT_8822B_2ANT_SWITCH_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_ext_ant_switch_ctrl_type {
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_MAX
|
||||
BT_8822B_2ANT_CTRL_BY_BBSW = 0x0,
|
||||
BT_8822B_2ANT_CTRL_BY_PTA = 0x1,
|
||||
BT_8822B_2ANT_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8822B_2ANT_CTRL_BY_MAC = 0x3,
|
||||
BT_8822B_2ANT_CTRL_BY_BT = 0x4,
|
||||
BT_8822B_2ANT_CTRL_BY_FW = 0x5,
|
||||
BT_8822B_2ANT_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_ext_ant_switch_pos_type {
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
|
||||
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_ext_band_switch_pos_type {
|
||||
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
|
||||
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
|
||||
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_int_block {
|
||||
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
|
||||
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
|
||||
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
|
||||
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_MAX
|
||||
BT_8822B_2ANT_SWITCH_MAIN_TO_BT = 0x0,
|
||||
BT_8822B_2ANT_SWITCH_MAIN_TO_WLG = 0x1,
|
||||
BT_8822B_2ANT_SWITCH_MAIN_TO_WLA = 0x2,
|
||||
BT_8822B_2ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
|
||||
BT_8822B_2ANT_SWITCH_MAIN_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_phase {
|
||||
BT_8822B_2ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8822B_2ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8822B_2ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8822B_2ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8822B_2ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8822B_2ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8822B_2ANT_PHASE_ANTENNA_DET = 0x6,
|
||||
BT_8822B_2ANT_PHASE_COEX_POWERON = 0x7,
|
||||
BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
|
||||
BT_8822B_2ANT_PHASE_INIT = 0x0,
|
||||
BT_8822B_2ANT_PHASE_WONLY = 0x1,
|
||||
BT_8822B_2ANT_PHASE_WOFF = 0x2,
|
||||
BT_8822B_2ANT_PHASE_2G = 0x3,
|
||||
BT_8822B_2ANT_PHASE_5G = 0x4,
|
||||
BT_8822B_2ANT_PHASE_BTMP = 0x5,
|
||||
BT_8822B_2ANT_PHASE_ANTDET = 0x6,
|
||||
BT_8822B_2ANT_PHASE_POWERON = 0x7,
|
||||
BT_8822B_2ANT_PHASE_2G_CON = 0x8,
|
||||
BT_8822B_2ANT_PHASE_2G_FREERUN = 0x9,
|
||||
BT_8822B_2ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
|
||||
|
||||
enum bt_8822b_2ant_Scoreboard {
|
||||
BT_8822B_2ANT_SCOREBOARD_ACTIVE = BIT(0),
|
||||
BT_8822B_2ANT_SCOREBOARD_ONOFF = BIT(1),
|
||||
BT_8822B_2ANT_SCOREBOARD_SCAN = BIT(2),
|
||||
BT_8822B_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
|
||||
BT_8822B_2ANT_SCOREBOARD_RXGAIN = BIT(4),
|
||||
BT_8822B_2ANT_SCOREBOARD_WLBUSY = BIT(6),
|
||||
BT_8822B_2ANT_SCOREBOARD_EXTFEM = BIT(8),
|
||||
BT_8822B_2ANT_SCOREBOARD_BTCQDDR = BIT(10)
|
||||
enum bt_8822b_2ant_scoreboard {
|
||||
BT_8822B_2ANT_SCBD_ACTIVE = BIT(0),
|
||||
BT_8822B_2ANT_SCBD_ONOFF = BIT(1),
|
||||
BT_8822B_2ANT_SCBD_SCAN = BIT(2),
|
||||
BT_8822B_2ANT_SCBD_UNDERTEST = BIT(3),
|
||||
BT_8822B_2ANT_SCBD_RXGAIN = BIT(4),
|
||||
BT_8822B_2ANT_SCBD_WLBUSY = BIT(6),
|
||||
BT_8822B_2ANT_SCBD_EXTFEM = BIT(8),
|
||||
BT_8822B_2ANT_SCBD_CQDDR = BIT(10)
|
||||
};
|
||||
|
||||
enum bt_8822b_2ant_RUNREASON {
|
||||
BT_8822B_2ANT_RSN_2GSCANSTART = 0x0,
|
||||
BT_8822B_2ANT_RSN_5GSCANSTART = 0x1,
|
||||
BT_8822B_2ANT_RSN_SCANFINISH = 0x2,
|
||||
BT_8822B_2ANT_RSN_2GSWITCHBAND = 0x3,
|
||||
BT_8822B_2ANT_RSN_5GSWITCHBAND = 0x4,
|
||||
BT_8822B_2ANT_RSN_2GCONSTART = 0x5,
|
||||
BT_8822B_2ANT_RSN_5GCONSTART = 0x6,
|
||||
BT_8822B_2ANT_RSN_2GCONFINISH = 0x7,
|
||||
BT_8822B_2ANT_RSN_5GCONFINISH = 0x8,
|
||||
BT_8822B_2ANT_RSN_2GMEDIA = 0x9,
|
||||
BT_8822B_2ANT_RSN_5GMEDIA = 0xa,
|
||||
BT_8822B_2ANT_RSN_MEDIADISCON = 0xb,
|
||||
BT_8822B_2ANT_RSN_2GSPECIALPKT = 0xc,
|
||||
BT_8822B_2ANT_RSN_5GSPECIALPKT = 0xd,
|
||||
BT_8822B_2ANT_RSN_BTINFO = 0xe,
|
||||
BT_8822B_2ANT_RSN_PERIODICAL = 0xf,
|
||||
BT_8822B_2ANT_RSN_PNP = 0x10,
|
||||
BT_8822B_2ANT_RSN_LPS = 0x11,
|
||||
BT_8822B_2ANT_RSN_MAX
|
||||
};
|
||||
|
||||
|
||||
|
||||
enum bt_8822b_2ant_WL_LINK_MODE {
|
||||
BT_8822B_2ANT_WLINK_2G1PORT = 0x0,
|
||||
BT_8822B_2ANT_WLINK_2GMPORT = 0x1,
|
||||
BT_8822B_2ANT_WLINK_25GMPORT = 0x2,
|
||||
BT_8822B_2ANT_WLINK_5G = 0x3,
|
||||
BT_8822B_2ANT_WLINK_2GGO = 0x4,
|
||||
BT_8822B_2ANT_WLINK_2GGC = 0x5,
|
||||
BT_8822B_2ANT_WLINK_BTMR = 0x6,
|
||||
BT_8822B_2ANT_WLINK_MAX
|
||||
};
|
||||
|
||||
struct coex_dm_8822b_2ant {
|
||||
/* hw setting */
|
||||
u32 pre_ant_pos_type;
|
||||
u32 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
|
||||
u8 cur_bt_pwr_lvl;
|
||||
u8 cur_wl_pwr_lvl;
|
||||
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
boolean need_recover0x948;
|
||||
u32 backup0x948;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
boolean is_switch_to_1dot5_ant;
|
||||
u8 switch_thres_offset;
|
||||
u32 arp_cnt;
|
||||
|
||||
u32 pre_ext_ant_switch_status;
|
||||
u32 cur_ext_ant_switch_status;
|
||||
|
||||
u8 pre_ext_band_switch_status;
|
||||
u8 cur_ext_band_switch_status;
|
||||
|
||||
u8 pre_int_block_status;
|
||||
u8 cur_int_block_status;
|
||||
u32 setting_tdma;
|
||||
};
|
||||
|
||||
|
||||
struct coex_sta_8822b_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
@ -302,6 +262,7 @@ struct coex_sta_8822b_2ant {
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean msft_mr_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
@ -309,18 +270,23 @@ struct coex_sta_8822b_2ant {
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
boolean is_hiPri_rx_overhead;
|
||||
boolean is_hi_pri_rx_overhead;
|
||||
u8 bt_rssi;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8822B_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_2ANT_MAX];
|
||||
u8 bt_info_c2h[BT_8822B_2ANT_INFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX];
|
||||
u32 bt_info_c2h_cnt[BT_8822B_2ANT_INFO_SRC_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
|
||||
u8 bt_info_ext;
|
||||
u8 bt_info_ext2;
|
||||
u8 bt_info_lb2;
|
||||
u8 bt_info_lb3;
|
||||
u8 bt_info_hb0;
|
||||
u8 bt_info_hb1;
|
||||
u8 bt_info_hb2;
|
||||
u8 bt_info_hb3;
|
||||
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
u8 bt_retry_cnt;
|
||||
@ -334,10 +300,6 @@ struct coex_sta_8822b_2ant {
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_vht;
|
||||
|
||||
u32 acc_crc_ratio;
|
||||
u32 now_crc_ratio;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean cck_lock_ever;
|
||||
boolean cck_lock_warn;
|
||||
@ -362,7 +324,8 @@ struct coex_sta_8822b_2ant {
|
||||
u8 num_of_profile;
|
||||
boolean acl_busy;
|
||||
boolean bt_create_connection;
|
||||
boolean wifi_is_high_pri_task;
|
||||
boolean wifi_high_pri_task1;
|
||||
boolean wifi_high_pri_task2;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
@ -375,23 +338,22 @@ struct coex_sta_8822b_2ant {
|
||||
|
||||
boolean is_A2DP_3M;
|
||||
boolean voice_over_HOGP;
|
||||
u8 bt_info;
|
||||
boolean is_autoslot;
|
||||
u8 forbidden_slot;
|
||||
u8 hid_busy_num;
|
||||
u8 hid_pair_cnt;
|
||||
|
||||
u32 cnt_RemoteNameReq;
|
||||
u32 cnt_setupLink;
|
||||
u32 cnt_ReInit;
|
||||
u32 cnt_IgnWlanAct;
|
||||
u32 cnt_Page;
|
||||
u32 cnt_RoleSwitch;
|
||||
u32 cnt_remote_name_req;
|
||||
u32 cnt_setup_link;
|
||||
u32 cnt_reinit;
|
||||
u32 cnt_ign_wlan_act;
|
||||
u32 cnt_page;
|
||||
u32 cnt_role_switch;
|
||||
|
||||
u16 bt_reg_vendor_ac;
|
||||
u16 bt_reg_vendor_ae;
|
||||
|
||||
boolean is_setupLink;
|
||||
boolean is_setup_link;
|
||||
u8 wl_noisy_level;
|
||||
u32 gnt_error_cnt;
|
||||
|
||||
@ -400,7 +362,7 @@ struct coex_sta_8822b_2ant {
|
||||
boolean is_tdma_btautoslot;
|
||||
boolean is_tdma_btautoslot_hang;
|
||||
|
||||
boolean is_eSCO_mode;
|
||||
boolean is_esco_mode;
|
||||
u8 switch_band_notify_to;
|
||||
boolean is_rf_state_off;
|
||||
|
||||
@ -413,160 +375,133 @@ struct coex_sta_8822b_2ant {
|
||||
|
||||
u8 wl_fw_dbg_info[10];
|
||||
u8 wl_rx_rate;
|
||||
u8 wl_tx_rate;
|
||||
u8 wl_rts_rx_rate;
|
||||
u8 wl_center_channel;
|
||||
u8 wl_tx_macid;
|
||||
u8 wl_tx_retry_ratio;
|
||||
|
||||
boolean is_2g_freerun;
|
||||
|
||||
u16 score_board_WB;
|
||||
boolean is_hid_rcu;
|
||||
u16 legacy_forbidden_slot;
|
||||
u16 le_forbidden_slot;
|
||||
u8 bt_a2dp_vendor_id;
|
||||
u32 bt_a2dp_device_name;
|
||||
boolean is_ble_scan_en;
|
||||
|
||||
boolean is_bt_opp_exist;
|
||||
boolean gl_wifi_busy;
|
||||
};
|
||||
|
||||
boolean is_mimo_ps;
|
||||
u8 connect_ap_period_cnt;
|
||||
boolean is_bt_reenable;
|
||||
u8 cnt_bt_reenable;
|
||||
boolean is_wifi_linkscan_process;
|
||||
u8 wl_coex_mode;
|
||||
|
||||
u8 wl_pnp_wakeup_downcnt;
|
||||
u32 coex_run_cnt;
|
||||
boolean is_no_wl_5ms_extend;
|
||||
|
||||
u16 wl_0x42a_backup;
|
||||
u32 wl_0x430_backup;
|
||||
u32 wl_0x434_backup;
|
||||
u8 wl_0x455_backup;
|
||||
|
||||
boolean wl_tx_limit_en;
|
||||
boolean wl_ampdu_limit_en;
|
||||
boolean wl_rxagg_limit_en;
|
||||
u8 wl_rxagg_size;
|
||||
u8 coex_run_reason;
|
||||
};
|
||||
|
||||
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
|
||||
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
|
||||
|
||||
|
||||
struct rfe_type_8822b_2ant {
|
||||
|
||||
u8 rfe_module_type;
|
||||
boolean ext_ant_switch_exist;
|
||||
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
boolean ext_switch_exist;
|
||||
u8 ext_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
/* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
|
||||
u8 ext_ant_switch_ctrl_polarity;
|
||||
u8 ext_switch_polarity;
|
||||
|
||||
boolean ext_band_switch_exist;
|
||||
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
u8 ext_band_switch_ctrl_polarity;
|
||||
|
||||
/* If true: WLG at BTG, If false: WLG at WLAG */
|
||||
boolean wlg_Locate_at_btg;
|
||||
/* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */
|
||||
boolean wlg_locate_at_btg;
|
||||
|
||||
boolean ext_ant_switch_diversity; /* If diversity on */
|
||||
};
|
||||
|
||||
#define BT_8822B_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8822B_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8822B_2ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8822b_2ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8822B_2ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8822B_2ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_max_value2;
|
||||
/* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT,
|
||||
* and average the rest
|
||||
*/
|
||||
u32 psd_avg_value;
|
||||
/*max value in each loop */
|
||||
u32 psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT];
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_AntDet_running;
|
||||
boolean is_psd_show_max_only;
|
||||
struct wifi_link_info_8822b_2ant {
|
||||
u8 num_of_active_port;
|
||||
u32 port_connect_status;
|
||||
boolean is_all_under_5g;
|
||||
boolean is_mcc_25g;
|
||||
boolean is_p2p_connected;
|
||||
};
|
||||
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ********************************************/
|
||||
void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b2ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
|
||||
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
|
||||
void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b2ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
|
||||
void ex_halbtc8822b2ant_power_on_setting(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_pre_load_firmware(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_init_hw_config(struct btc_coexist *btc,
|
||||
boolean wifi_only);
|
||||
void ex_halbtc8822b2ant_init_coex_dm(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_ips_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b2ant_lps_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b2ant_scan_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b2ant_switchband_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b2ant_connect_notify(struct btc_coexist *btc, u8 type);
|
||||
void ex_halbtc8822b2ant_media_status_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b2ant_specific_packet_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b2ant_bt_info_notify(struct btc_coexist *btc,
|
||||
u8 *tmp_buf, u8 length);
|
||||
void ex_halbtc8822b2ant_wl_fwdbginfo_notify(struct btc_coexist *btc,
|
||||
u8 *tmp_buf, u8 length);
|
||||
void ex_halbtc8822b2ant_rx_rate_change_notify(struct btc_coexist *btc,
|
||||
BOOLEAN is_data_frame,
|
||||
u8 btc_rate_id);
|
||||
void ex_halbtc8822b2ant_tx_rate_change_notify(struct btc_coexist *btc,
|
||||
u8 tx_rate,
|
||||
u8 tx_retry_ratio, u8 macid);
|
||||
void ex_halbtc8822b2ant_rf_status_notify(struct btc_coexist *btc,
|
||||
u8 type);
|
||||
void ex_halbtc8822b2ant_halt_notify(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_pnp_notify(struct btc_coexist *btc, u8 pnp_state);
|
||||
void ex_halbtc8822b2ant_periodical(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_display_simple_coex_info(struct btc_coexist *btc);
|
||||
void ex_halbtc8822b2ant_display_coex_info(struct btc_coexist *btc);
|
||||
#else
|
||||
#define ex_halbtc8822b2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8822b2ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8822b2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8822b2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8822b2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_switchband_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b2ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b2ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
|
||||
#define ex_halbtc8822b2ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8822b2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8822b2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8822b2ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8822b2ant_display_ant_detection(btcoexist)
|
||||
#define ex_halbtc8822b2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b2ant_display_simple_coex_info(btcoexist)
|
||||
#define ex_halbtc8822b2ant_power_on_setting(btc)
|
||||
#define ex_halbtc8822b2ant_pre_load_firmware(btc)
|
||||
#define ex_halbtc8822b2ant_init_hw_config(btc, wifi_only)
|
||||
#define ex_halbtc8822b2ant_init_coex_dm(btc)
|
||||
#define ex_halbtc8822b2ant_ips_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_lps_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_scan_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_switchband_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_connect_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_media_status_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_specific_packet_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_bt_info_notify(btc, tmp_buf, length)
|
||||
#define ex_halbtc8822b2ant_wl_fwdbginfo_notify(btc, tmp_buf, length)
|
||||
#define ex_halbtc8822b2ant_rx_rate_change_notify(btc, is_data_frame, \
|
||||
btc_rate_id)
|
||||
#define ex_halbtc8822b2ant_tx_rate_change_notify(btcoexist, tx_rate, \
|
||||
tx_retry_ratio, macid)
|
||||
#define ex_halbtc8822b2ant_rf_status_notify(btc, type)
|
||||
#define ex_halbtc8822b2ant_halt_notify(btc)
|
||||
#define ex_halbtc8822b2ant_pnp_notify(btc, pnp_state)
|
||||
#define ex_halbtc8822b2ant_periodical(btc)
|
||||
#define ex_halbtc8822b2ant_display_coex_info(btc)
|
||||
#define ex_halbtc8822b2ant_display_simple_coex_info(btc)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
@ -35,6 +35,9 @@ ex_hal8822b_wifi_only_hw_config(
|
||||
/*gnt_wl=1 , gnt_bt=0*/
|
||||
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
|
||||
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
|
||||
|
||||
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x6c0, 0xffffffff, 0xaaaaaaaa);
|
||||
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x6c4, 0xffffffff, 0xaaaaaaaa);
|
||||
}
|
||||
|
||||
VOID
|
||||
@ -55,6 +58,15 @@ ex_hal8822b_wifi_only_switchbandnotify(
|
||||
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
|
||||
}
|
||||
|
||||
VOID
|
||||
ex_hal8822b_wifi_only_connectnotify(
|
||||
IN struct wifi_only_cfg *pwifionlycfg,
|
||||
IN u1Byte is_5g
|
||||
)
|
||||
{
|
||||
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
|
||||
}
|
||||
|
||||
VOID
|
||||
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
|
||||
IN u1Byte is_5g
|
||||
|
@ -30,6 +30,11 @@ ex_hal8822b_wifi_only_switchbandnotify(
|
||||
IN u1Byte is_5g
|
||||
);
|
||||
VOID
|
||||
ex_hal8822b_wifi_only_connectnotify(
|
||||
IN struct wifi_only_cfg *pwifionlycfg,
|
||||
IN u1Byte is_5g
|
||||
);
|
||||
VOID
|
||||
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
|
||||
IN u1Byte is_5g
|
||||
);
|
||||
|
@ -133,6 +133,9 @@ do {\
|
||||
#define NORMAL_EXEC FALSE
|
||||
#define FORCE_EXEC TRUE
|
||||
|
||||
#define NM_EXCU FALSE
|
||||
#define FC_EXCU TRUE
|
||||
|
||||
#define BTC_RF_OFF 0x0
|
||||
#define BTC_RF_ON 0x1
|
||||
|
||||
@ -214,6 +217,7 @@ typedef enum _BTC_CHIP_TYPE {
|
||||
/* following is for command line utility */
|
||||
#define CL_SPRINTF rsprintf
|
||||
#define CL_PRINTF DCMD_Printf
|
||||
#define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size)
|
||||
|
||||
struct btc_board_info {
|
||||
/* The following is some board information */
|
||||
@ -234,6 +238,7 @@ struct btc_board_info {
|
||||
boolean ant_det_result_five_complete;
|
||||
u32 antdetval;
|
||||
u8 customerID;
|
||||
u8 customer_id;
|
||||
};
|
||||
|
||||
typedef enum _BTC_DBG_OPCODE {
|
||||
@ -271,6 +276,7 @@ typedef enum _BTC_WIFI_ROLE {
|
||||
typedef enum _BTC_WIRELESS_FREQ {
|
||||
BTC_FREQ_2_4G = 0x0,
|
||||
BTC_FREQ_5G = 0x1,
|
||||
BTC_FREQ_25G = 0x2,
|
||||
BTC_FREQ_MAX
|
||||
} BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ;
|
||||
|
||||
@ -293,6 +299,7 @@ typedef enum _BTC_WIFI_PNP {
|
||||
BTC_WIFI_PNP_WAKE_UP = 0x0,
|
||||
BTC_WIFI_PNP_SLEEP = 0x1,
|
||||
BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2,
|
||||
BTC_WIFI_PNP_WOWLAN = 0x3,
|
||||
BTC_WIFI_PNP_MAX
|
||||
} BTC_WIFI_PNP, *PBTC_WIFI_PNP;
|
||||
|
||||
@ -353,6 +360,7 @@ typedef enum _BTC_GET_TYPE {
|
||||
BTC_GET_BL_WIFI_FW_READY,
|
||||
BTC_GET_BL_WIFI_CONNECTED,
|
||||
BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
|
||||
BTC_GET_BL_WIFI_LINK_INFO,
|
||||
BTC_GET_BL_WIFI_BUSY,
|
||||
BTC_GET_BL_WIFI_SCAN,
|
||||
BTC_GET_BL_WIFI_LINK,
|
||||
@ -366,6 +374,7 @@ typedef enum _BTC_GET_TYPE {
|
||||
BTC_GET_BL_WIFI_IS_IN_MP_MODE,
|
||||
BTC_GET_BL_IS_ASUS_8723B,
|
||||
BTC_GET_BL_RF4CE_CONNECTED,
|
||||
BTC_GET_BL_WIFI_LW_PWR_STATE,
|
||||
|
||||
/* type s4Byte */
|
||||
BTC_GET_S4_WIFI_RSSI,
|
||||
@ -476,6 +485,7 @@ typedef enum _BTC_NOTIFY_TYPE_SCAN {
|
||||
BTC_SCAN_FINISH = 0x0,
|
||||
BTC_SCAN_START = 0x1,
|
||||
BTC_SCAN_START_2G = 0x2,
|
||||
BTC_SCAN_START_5G = 0x3,
|
||||
BTC_SCAN_MAX
|
||||
} BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN;
|
||||
typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND {
|
||||
@ -495,6 +505,7 @@ typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE {
|
||||
typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS {
|
||||
BTC_MEDIA_DISCONNECT = 0x0,
|
||||
BTC_MEDIA_CONNECT = 0x1,
|
||||
BTC_MEDIA_CONNECT_5G = 0x02,
|
||||
BTC_MEDIA_MAX
|
||||
} BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS;
|
||||
typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET {
|
||||
@ -523,6 +534,8 @@ typedef enum _BTC_BT_OFFON {
|
||||
BTC_BT_ON = 0x1,
|
||||
} BTC_BTOFFON, *PBTC_BT_OFFON;
|
||||
|
||||
#define BTC_5G_BAND 0x80
|
||||
|
||||
/*==================================================
|
||||
For following block is for coex offload
|
||||
==================================================*/
|
||||
@ -632,6 +645,49 @@ typedef struct _BTC_OFFLOAD {
|
||||
extern BTC_OFFLOAD gl_coex_offload;
|
||||
/*==================================================*/
|
||||
|
||||
/* BTC_LINK_MODE same as WIFI_LINK_MODE */
|
||||
typedef enum _BTC_LINK_MODE{
|
||||
BTC_LINK_NONE=0,
|
||||
BTC_LINK_ONLY_GO,
|
||||
BTC_LINK_ONLY_GC,
|
||||
BTC_LINK_ONLY_STA,
|
||||
BTC_LINK_ONLY_AP,
|
||||
BTC_LINK_2G_MCC_GO_STA,
|
||||
BTC_LINK_5G_MCC_GO_STA,
|
||||
BTC_LINK_25G_MCC_GO_STA,
|
||||
BTC_LINK_2G_MCC_GC_STA,
|
||||
BTC_LINK_5G_MCC_GC_STA,
|
||||
BTC_LINK_25G_MCC_GC_STA,
|
||||
BTC_LINK_2G_SCC_GO_STA,
|
||||
BTC_LINK_5G_SCC_GO_STA,
|
||||
BTC_LINK_2G_SCC_GC_STA,
|
||||
BTC_LINK_5G_SCC_GC_STA,
|
||||
BTC_LINK_MAX=30
|
||||
}BTC_LINK_MODE, *PBTC_LINK_MODE;
|
||||
|
||||
|
||||
struct btc_wifi_link_info {
|
||||
BTC_LINK_MODE link_mode; /* LinkMode */
|
||||
u1Byte sta_center_channel; /* StaCenterChannel */
|
||||
u1Byte p2p_center_channel; /* P2PCenterChannel */
|
||||
BOOLEAN bany_client_join_go;
|
||||
BOOLEAN benable_noa;
|
||||
BOOLEAN bhotspot;
|
||||
};
|
||||
|
||||
typedef enum _BTC_MULTI_PORT_TDMA_MODE {
|
||||
BTC_MULTI_PORT_TDMA_MODE_NONE=0,
|
||||
BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO,
|
||||
BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO,
|
||||
BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO
|
||||
} BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE;
|
||||
|
||||
typedef struct btc_multi_port_tdma_info {
|
||||
BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode;
|
||||
u1Byte start_time_from_bcn;
|
||||
u1Byte bt_time;
|
||||
} BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO;
|
||||
|
||||
typedef u1Byte
|
||||
(*BFP_BTC_R1)(
|
||||
IN PVOID pBtcContext,
|
||||
@ -783,6 +839,14 @@ typedef u4Byte
|
||||
IN PVOID pBtcContext
|
||||
);
|
||||
|
||||
typedef u4Byte
|
||||
(*BFP_BTC_SET_ATOMIC) (
|
||||
IN PVOID pBtcContext,
|
||||
IN pu4Byte target,
|
||||
IN u4Byte val
|
||||
);
|
||||
|
||||
|
||||
typedef VOID
|
||||
(*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)(
|
||||
IN PVOID pDM_Odm,
|
||||
@ -913,6 +977,8 @@ struct btc_statistics {
|
||||
u32 cnt_stack_operation_notify;
|
||||
u32 cnt_dbg_ctrl;
|
||||
u32 cnt_rate_id_notify;
|
||||
u32 cnt_halt_notify;
|
||||
u32 cnt_pnp_notify;
|
||||
};
|
||||
|
||||
struct btc_coexist {
|
||||
@ -922,6 +988,7 @@ struct btc_coexist {
|
||||
struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/
|
||||
struct btc_stack_info stack_info;
|
||||
struct btc_bt_link_info bt_link_info;
|
||||
struct btc_wifi_link_info wifi_link_info;
|
||||
|
||||
#ifdef CONFIG_RF4CE_COEXIST
|
||||
struct btc_rf4ce_info rf4ce_info;
|
||||
@ -936,6 +1003,8 @@ struct btc_coexist {
|
||||
pu1Byte cli_buf;
|
||||
struct btc_statistics statistics;
|
||||
u1Byte pwrModeVal[10];
|
||||
BOOLEAN dbg_mode;
|
||||
BOOLEAN auto_report;
|
||||
|
||||
/* function pointers */
|
||||
/* io related */
|
||||
@ -973,13 +1042,67 @@ struct btc_coexist {
|
||||
BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature;
|
||||
BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version;
|
||||
BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version;
|
||||
BFP_BTC_SET_ATOMIC btc_set_atomic;
|
||||
BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold;
|
||||
BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter;
|
||||
BTC_PHYDM_MODIFY_ANTDIV_HWSW btc_phydm_modify_ANTDIV_HwSw;
|
||||
BTC_PHYDM_MODIFY_ANTDIV_HWSW btc_phydm_modify_antdiv_hwsw;
|
||||
BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt;
|
||||
BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt;
|
||||
BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt;
|
||||
BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt;
|
||||
|
||||
union {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
struct coex_dm_8822b_1ant coex_dm_8822b_1ant;
|
||||
struct coex_dm_8822b_2ant coex_dm_8822b_2ant;
|
||||
#endif /* 8822B */
|
||||
#ifdef CONFIG_RTL8821C
|
||||
struct coex_dm_8821c_1ant coex_dm_8821c_1ant;
|
||||
struct coex_dm_8821c_2ant coex_dm_8821c_2ant;
|
||||
#endif /* 8821C */
|
||||
#ifdef CONFIG_RTL8723D
|
||||
struct coex_dm_8723d_1ant coex_dm_8723d_1ant;
|
||||
struct coex_dm_8723d_2ant coex_dm_8723d_2ant;
|
||||
#endif /* 8723D */
|
||||
};
|
||||
|
||||
union {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
struct coex_sta_8822b_1ant coex_sta_8822b_1ant;
|
||||
struct coex_sta_8822b_2ant coex_sta_8822b_2ant;
|
||||
#endif /* 8822B */
|
||||
#ifdef CONFIG_RTL8821C
|
||||
struct coex_sta_8821c_1ant coex_sta_8821c_1ant;
|
||||
struct coex_sta_8821c_2ant coex_sta_8821c_2ant;
|
||||
#endif /* 8821C */
|
||||
#ifdef CONFIG_RTL8723D
|
||||
struct coex_sta_8723d_1ant coex_sta_8723d_1ant;
|
||||
struct coex_sta_8723d_2ant coex_sta_8723d_2ant;
|
||||
#endif /* 8723D */
|
||||
};
|
||||
|
||||
union {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
struct rfe_type_8822b_1ant rfe_type_8822b_1ant;
|
||||
struct rfe_type_8822b_2ant rfe_type_8822b_2ant;
|
||||
#endif /* 8822B */
|
||||
#ifdef CONFIG_RTL8821C
|
||||
struct rfe_type_8821c_1ant rfe_type_8821c_1ant;
|
||||
struct rfe_type_8821c_2ant rfe_type_8821c_2ant;
|
||||
#endif /* 8821C */
|
||||
};
|
||||
|
||||
union {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
struct wifi_link_info_8822b_1ant wifi_link_info_8822b_1ant;
|
||||
struct wifi_link_info_8822b_2ant wifi_link_info_8822b_2ant;
|
||||
#endif /* 8822B */
|
||||
#ifdef CONFIG_RTL8821C
|
||||
struct wifi_link_info_8821c_1ant wifi_link_info_8821c_1ant;
|
||||
struct wifi_link_info_8821c_2ant wifi_link_info_8821c_2ant;
|
||||
#endif /* 8821C */
|
||||
};
|
||||
|
||||
};
|
||||
typedef struct btc_coexist *PBTC_COEXIST;
|
||||
|
||||
|
@ -22,6 +22,7 @@
|
||||
|
||||
#ifdef PLATFORM_LINUX
|
||||
#define rsprintf snprintf
|
||||
#define rstrncat(dst, src, src_size) strncat(dst, src, src_size)
|
||||
#elif defined(PLATFORM_WINDOWS)
|
||||
#define rsprintf sprintf_s
|
||||
#endif
|
||||
@ -59,12 +60,14 @@ extern u4Byte GLBtcDbgType[];
|
||||
#define HS_SUPPORT 0
|
||||
#endif
|
||||
|
||||
#include "halbtcoutsrc.h"
|
||||
|
||||
/* for wifi only mode */
|
||||
#include "hal_btcoex_wifionly.h"
|
||||
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
#define BTC_BTINFO_LENGTH_MAX 10
|
||||
|
||||
struct wifi_only_cfg;
|
||||
struct btc_coexist;
|
||||
|
||||
#ifdef CONFIG_RTL8192E
|
||||
#include "halbtc8192e1ant.h"
|
||||
@ -108,6 +111,8 @@ extern u4Byte GLBtcDbgType[];
|
||||
#include "halbtc8821c2ant.h"
|
||||
#endif
|
||||
|
||||
#include "halbtcoutsrc.h"
|
||||
|
||||
#else /* CONFIG_BT_COEXIST */
|
||||
|
||||
#ifdef CONFIG_RTL8723B
|
||||
|
@ -13,7 +13,7 @@
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
#include "rtl8188e/HalEfuseMask8188E_USB.h"
|
||||
@ -51,6 +51,10 @@
|
||||
#include "rtl8188f/HalEfuseMask8188F_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
#include "rtl8188gtv/HalEfuseMask8188GTV_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8822B)
|
||||
#include "rtl8822b/HalEfuseMask8822B_USB.h"
|
||||
#endif
|
||||
@ -59,7 +63,16 @@
|
||||
#include "rtl8821c/HalEfuseMask8821C_USB.h"
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
#include "rtl8710b/HalEfuseMask8710B_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
#include "rtl8192f/HalEfuseMask8192F_USB.h"
|
||||
#endif
|
||||
#endif /*CONFIG_USB_HCI*/
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
|
||||
@ -99,7 +112,11 @@
|
||||
#include "rtl8821c/HalEfuseMask8821C_PCIE.h"
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
#include "rtl8192f/HalEfuseMask8192F_PCIE.h"
|
||||
#endif
|
||||
#endif /*CONFIG_PCI_HCI*/
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#if defined(CONFIG_RTL8723B)
|
||||
#include "rtl8723b/HalEfuseMask8723B_SDIO.h"
|
||||
#endif
|
||||
@ -116,6 +133,10 @@
|
||||
#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188GTV)
|
||||
#include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
|
||||
#endif
|
||||
@ -135,4 +156,9 @@
|
||||
#if defined(CONFIG_RTL8822B)
|
||||
#include "rtl8822b/HalEfuseMask8822B_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8192F)
|
||||
#include "rtl8192f/HalEfuseMask8192F_SDIO.h"
|
||||
#endif
|
||||
|
||||
#endif /*CONFIG_SDIO_HCI*/
|
||||
|
296
hal/hal_btcoex.c
296
hal/hal_btcoex.c
@ -71,13 +71,14 @@ const char *const GLBtcWifiBwString[] = {
|
||||
"11bg",
|
||||
"HT20",
|
||||
"HT40",
|
||||
"HT80",
|
||||
"HT160"
|
||||
"VHT80",
|
||||
"VHT160"
|
||||
};
|
||||
|
||||
const char *const GLBtcWifiFreqString[] = {
|
||||
"2.4G",
|
||||
"5G"
|
||||
"5G",
|
||||
"2.4G+5G"
|
||||
};
|
||||
|
||||
const char *const GLBtcIotPeerString[] = {
|
||||
@ -615,6 +616,112 @@ u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist)
|
||||
return retVal;
|
||||
}
|
||||
|
||||
struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist)
|
||||
{
|
||||
u8 n_assoc_iface = 0, i =0, mcc_en = _FALSE;
|
||||
PADAPTER adapter = NULL;
|
||||
PADAPTER iface = NULL;
|
||||
PADAPTER sta_iface = NULL, p2p_iface = NULL, ap_iface = NULL;
|
||||
BTC_LINK_MODE btc_link_moe = BTC_LINK_MAX;
|
||||
struct dvobj_priv *dvobj = NULL;
|
||||
struct mlme_ext_priv *mlmeext = NULL;
|
||||
struct btc_wifi_link_info wifi_link_info;
|
||||
|
||||
adapter = (PADAPTER)pBtCoexist->Adapter;
|
||||
dvobj = adapter_to_dvobj(adapter);
|
||||
n_assoc_iface = rtw_mi_get_assoc_if_num(adapter);
|
||||
|
||||
/* init value */
|
||||
wifi_link_info.link_mode = BTC_LINK_NONE;
|
||||
wifi_link_info.sta_center_channel = 0;
|
||||
wifi_link_info.p2p_center_channel = 0;
|
||||
wifi_link_info.bany_client_join_go = _FALSE;
|
||||
wifi_link_info.benable_noa = _FALSE;
|
||||
wifi_link_info.bhotspot = _FALSE;
|
||||
|
||||
for (i = 0; i < dvobj->iface_nums; i++) {
|
||||
iface = dvobj->padapters[i];
|
||||
if (!iface)
|
||||
continue;
|
||||
|
||||
mlmeext = &iface->mlmeextpriv;
|
||||
if (MLME_IS_GO(iface)) {
|
||||
wifi_link_info.link_mode = BTC_LINK_ONLY_GO;
|
||||
wifi_link_info.p2p_center_channel =
|
||||
rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
|
||||
p2p_iface = iface;
|
||||
if (rtw_linked_check(iface))
|
||||
wifi_link_info.bany_client_join_go = _TRUE;
|
||||
} else if (MLME_IS_GC(iface)) {
|
||||
wifi_link_info.link_mode = BTC_LINK_ONLY_GC;
|
||||
wifi_link_info.p2p_center_channel =
|
||||
rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
|
||||
p2p_iface = iface;
|
||||
} else if (MLME_IS_AP(iface)) {
|
||||
wifi_link_info.link_mode = BTC_LINK_ONLY_AP;
|
||||
ap_iface = iface;
|
||||
wifi_link_info.p2p_center_channel =
|
||||
rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
|
||||
} else if (MLME_IS_STA(iface) && rtw_linked_check(iface)) {
|
||||
wifi_link_info.link_mode = BTC_LINK_ONLY_STA;
|
||||
wifi_link_info.sta_center_channel =
|
||||
rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
|
||||
sta_iface = iface;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MCC_MODE
|
||||
if (MCC_EN(adapter)) {
|
||||
if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))
|
||||
mcc_en = _TRUE;
|
||||
}
|
||||
#endif/* CONFIG_MCC_MODE */
|
||||
|
||||
if (n_assoc_iface == 0) {
|
||||
wifi_link_info.link_mode = BTC_LINK_NONE;
|
||||
} else if (n_assoc_iface == 1) {
|
||||
/* by pass */
|
||||
} else if (n_assoc_iface == 2) {
|
||||
if (sta_iface && p2p_iface) {
|
||||
u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G;
|
||||
u8 band_p2p = p2p_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G;
|
||||
if (band_sta == band_p2p) {
|
||||
switch (band_sta) {
|
||||
case BAND_ON_2_4G:
|
||||
if (MLME_IS_GO(p2p_iface))
|
||||
wifi_link_info.link_mode =
|
||||
mcc_en == _TRUE ? BTC_LINK_2G_MCC_GO_STA : BTC_LINK_2G_SCC_GO_STA;
|
||||
else if (MLME_IS_GC(p2p_iface))
|
||||
wifi_link_info.link_mode =
|
||||
mcc_en == _TRUE ? BTC_LINK_2G_MCC_GC_STA : BTC_LINK_2G_SCC_GC_STA;
|
||||
break;
|
||||
case BAND_ON_5G:
|
||||
if (MLME_IS_GO(p2p_iface))
|
||||
wifi_link_info.link_mode =
|
||||
mcc_en == _TRUE ? BTC_LINK_5G_MCC_GO_STA : BTC_LINK_5G_SCC_GO_STA;
|
||||
else if (MLME_IS_GC(p2p_iface))
|
||||
wifi_link_info.link_mode =
|
||||
mcc_en == _TRUE ? BTC_LINK_5G_MCC_GC_STA : BTC_LINK_5G_SCC_GC_STA;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
if (MLME_IS_GO(p2p_iface))
|
||||
wifi_link_info.link_mode = BTC_LINK_25G_MCC_GO_STA;
|
||||
else if (MLME_IS_GC(p2p_iface))
|
||||
wifi_link_info.link_mode = BTC_LINK_25G_MCC_GC_STA;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
RTW_ERR("%s do not support n_assoc_iface > 2 (ant_num == 1)", __func__);
|
||||
}
|
||||
|
||||
return wifi_link_info;
|
||||
}
|
||||
|
||||
|
||||
static void _btmpoper_timer_hdl(void *p)
|
||||
{
|
||||
if (GLBtcBtMpRptWait == _TRUE) {
|
||||
@ -900,6 +1007,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
|
||||
PADAPTER padapter;
|
||||
PHAL_DATA_TYPE pHalData;
|
||||
struct mlme_ext_priv *mlmeext;
|
||||
struct btc_wifi_link_info *wifi_link_info;
|
||||
u8 bSoftApExist, bVwifiExist;
|
||||
u8 *pu8;
|
||||
s32 *pS4Tmp;
|
||||
@ -923,6 +1031,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
|
||||
pU4Tmp = (u32 *)pOutBuf;
|
||||
pU1Tmp = (u8 *)pOutBuf;
|
||||
pU2Tmp = (u16*)pOutBuf;
|
||||
wifi_link_info = (struct btc_wifi_link_info *)pOutBuf;
|
||||
ret = _TRUE;
|
||||
|
||||
switch (getType) {
|
||||
@ -1019,6 +1128,11 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
|
||||
#endif
|
||||
break;
|
||||
|
||||
case BTC_GET_BL_WIFI_LW_PWR_STATE:
|
||||
/* return false due to coex do not run during 32K */
|
||||
*pu8 = FALSE;
|
||||
break;
|
||||
|
||||
case BTC_GET_S4_WIFI_RSSI:
|
||||
*pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter);
|
||||
break;
|
||||
@ -1073,7 +1187,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
|
||||
case BTC_GET_U4_WIFI_LINK_STATUS:
|
||||
*pU4Tmp = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist);
|
||||
break;
|
||||
|
||||
case BTC_GET_BL_WIFI_LINK_INFO:
|
||||
*wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist);
|
||||
break;
|
||||
case BTC_GET_U4_BT_PATCH_VER:
|
||||
*pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist);
|
||||
break;
|
||||
@ -1668,13 +1784,101 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
|
||||
u8 wifiChnl = 0, wifiP2PChnl = 0, nScanAPNum = 0, FwPSState;
|
||||
u32 iqk_cnt_total = 0, iqk_cnt_ok = 0, iqk_cnt_fail = 0;
|
||||
u16 wifiBcnInterval = 0;
|
||||
PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter);
|
||||
struct btc_wifi_link_info wifi_link_info;
|
||||
|
||||
wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist);
|
||||
|
||||
switch (wifi_link_info.link_mode) {
|
||||
case BTC_LINK_NONE:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"None", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_ONLY_GO:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"ONLY_GO", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_ONLY_GC:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"ONLY_GC", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_ONLY_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"ONLY_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_ONLY_AP:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"ONLY_AP", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_2G_MCC_GO_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"24G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_5G_MCC_GO_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"5G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_5G;
|
||||
break;
|
||||
case BTC_LINK_25G_MCC_GO_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"2BANDS_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_25G;
|
||||
break;
|
||||
case BTC_LINK_2G_MCC_GC_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"24G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_5G_MCC_GC_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"5G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_5G;
|
||||
break;
|
||||
case BTC_LINK_25G_MCC_GC_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"2BANDS_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_25G;
|
||||
break;
|
||||
case BTC_LINK_2G_SCC_GO_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"24G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_5G_SCC_GO_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"5G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_5G;
|
||||
break;
|
||||
case BTC_LINK_2G_SCC_GC_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"24G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_2_4G;
|
||||
break;
|
||||
case BTC_LINK_5G_SCC_GC_STA:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"5G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = BTC_FREQ_5G;
|
||||
break;
|
||||
default:
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
|
||||
"UNKNOWN", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
|
||||
wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G;
|
||||
break;
|
||||
}
|
||||
|
||||
CL_PRINTF(cliBuf);
|
||||
|
||||
wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist);
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d (mcc+2band = %d)", "STA/vWifi/HS/p2pGo/p2pGc",
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc",
|
||||
((wifiLinkStatus & WIFI_STA_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_AP_CONNECTED) ? 1 : 0),
|
||||
((wifiLinkStatus & WIFI_HS_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) ? 1 : 0),
|
||||
((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0),
|
||||
halbtcoutsrc_IsDualBandConnected(padapter) ? 1 : 0);
|
||||
((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0));
|
||||
CL_PRINTF(cliBuf);
|
||||
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
|
||||
@ -1698,15 +1902,14 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
|
||||
}
|
||||
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl);
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_U2_BEACON_PERIOD, &wifiBcnInterval);
|
||||
if ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) || (wifiLinkStatus & WIFI_P2P_GC_CONNECTED))
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_P2P_CHNL, &wifiP2PChnl);
|
||||
wifiChnl = wifi_link_info.sta_center_channel;
|
||||
wifiP2PChnl = wifi_link_info.p2p_center_channel;
|
||||
|
||||
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dBm/ %d/ %d/ %d", "RSSI/ STA_Chnl/ P2P_Chnl/ BI",
|
||||
wifiRssi-100, wifiChnl, wifiP2PChnl, wifiBcnInterval);
|
||||
CL_PRINTF(cliBuf);
|
||||
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq);
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
|
||||
pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
|
||||
@ -2348,6 +2551,16 @@ u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext)
|
||||
#ifdef CONFIG_RTL8821C
|
||||
return RELEASE_VERSION_8821C;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8192F
|
||||
return RELEASE_VERSION_8192F;
|
||||
#endif
|
||||
}
|
||||
|
||||
u32 halbtcoutsrc_SetAtomic (void *btc_ctx, u32 *target, u32 val)
|
||||
{
|
||||
*target = val;
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
||||
void halbtcoutsrc_phydm_modify_AntDiv_HwSw(void *pBtcContext, u8 is_hw)
|
||||
@ -2535,6 +2748,7 @@ void EXhalbtcoutsrc_AntInfoSetting(void *padapter)
|
||||
}
|
||||
|
||||
pBtCoexist->board_info.customerID = RT_CID_DEFAULT;
|
||||
pBtCoexist->board_info.customer_id = RT_CID_DEFAULT;
|
||||
|
||||
/* set default antenna position to main port */
|
||||
pBtCoexist->board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
|
||||
@ -2604,9 +2818,10 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
|
||||
pBtCoexist->btc_get_ble_scan_para_from_bt = halbtcoutsrc_GetBleScanParaFromBt;
|
||||
pBtCoexist->btc_get_bt_afh_map_from_bt = halbtcoutsrc_GetBtAFHMapFromBt;
|
||||
pBtCoexist->btc_get_bt_phydm_version = halbtcoutsrc_GetPhydmVersion;
|
||||
pBtCoexist->btc_set_atomic= halbtcoutsrc_SetAtomic;
|
||||
pBtCoexist->btc_phydm_modify_RA_PCR_threshold = halbtcoutsrc_phydm_modify_RA_PCR_threshold;
|
||||
pBtCoexist->btc_phydm_query_PHY_counter = halbtcoutsrc_phydm_query_PHY_counter;
|
||||
pBtCoexist->btc_phydm_modify_ANTDIV_HwSw = halbtcoutsrc_phydm_modify_AntDiv_HwSw;
|
||||
pBtCoexist->btc_phydm_modify_antdiv_hwsw = halbtcoutsrc_phydm_modify_AntDiv_HwSw;
|
||||
|
||||
pBtCoexist->cli_buf = &GLBtcDbgBuf[0];
|
||||
|
||||
@ -2798,10 +3013,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
|
||||
ex_halbtc8822b1ant_init_hw_config(pBtCoexist, bWifiOnly);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8822b2ant_init_hw_config(pBtCoexist, bWifiOnly);
|
||||
#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
|
||||
rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
|
||||
rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -2811,10 +3022,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
|
||||
ex_halbtc8821c2ant_init_hw_config(pBtCoexist, bWifiOnly);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
ex_halbtc8821c1ant_init_hw_config(pBtCoexist, bWifiOnly);
|
||||
#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
|
||||
rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
|
||||
rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -3293,7 +3500,9 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType)
|
||||
|
||||
void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus)
|
||||
{
|
||||
u8 mStatus;
|
||||
u8 mStatus = BTC_MEDIA_MAX;
|
||||
PADAPTER adapter = (PADAPTER)pBtCoexist->Adapter;
|
||||
HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
|
||||
|
||||
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
|
||||
return;
|
||||
@ -3302,15 +3511,25 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
|
||||
if (pBtCoexist->manual_control)
|
||||
return;
|
||||
|
||||
if (RT_MEDIA_CONNECT == mediaStatus)
|
||||
if (RT_MEDIA_CONNECT == mediaStatus) {
|
||||
if (hal->current_band_type == BAND_ON_2_4G)
|
||||
mStatus = BTC_MEDIA_CONNECT;
|
||||
else
|
||||
else if (hal->current_band_type == BAND_ON_5G)
|
||||
mStatus = BTC_MEDIA_CONNECT_5G;
|
||||
else {
|
||||
mStatus = BTC_MEDIA_CONNECT;
|
||||
RTW_ERR("%s unknow band type\n", __func__);
|
||||
}
|
||||
} else
|
||||
mStatus = BTC_MEDIA_DISCONNECT;
|
||||
|
||||
/* All notify is called in cmd thread, don't need to leave low power again
|
||||
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
|
||||
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
|
||||
#ifdef CONFIG_RTL8821A
|
||||
/* compatible for 8821A */
|
||||
if (mStatus == BTC_MEDIA_CONNECT_5G)
|
||||
mStatus = BTC_MEDIA_CONNECT;
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
@ -3354,6 +3573,9 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
|
||||
|
||||
#ifdef CONFIG_RTL8812A
|
||||
else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) {
|
||||
/* compatible for 8812A */
|
||||
if (mStatus == BTC_MEDIA_CONNECT_5G)
|
||||
mStatus = BTC_MEDIA_CONNECT;
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8812a2ant_media_status_notify(pBtCoexist, mStatus);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
@ -3385,6 +3607,8 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
|
||||
void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
|
||||
{
|
||||
u8 packetType;
|
||||
PADAPTER adapter = (PADAPTER)pBtCoexist->Adapter;
|
||||
HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
|
||||
|
||||
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
|
||||
return;
|
||||
@ -3403,10 +3627,17 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
|
||||
return;
|
||||
}
|
||||
|
||||
if (hal->current_band_type == BAND_ON_5G)
|
||||
packetType |= BTC_5G_BAND;
|
||||
|
||||
/* All notify is called in cmd thread, don't need to leave low power again
|
||||
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
|
||||
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
|
||||
#ifdef CONFIG_RTL8821A
|
||||
/* compatible for 8821A */
|
||||
if (hal->current_band_type == BAND_ON_5G)
|
||||
packetType &= ~BTC_5G_BAND;
|
||||
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
@ -3450,6 +3681,10 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
|
||||
|
||||
#ifdef CONFIG_RTL8812A
|
||||
else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) {
|
||||
/* compatible for 8812A */
|
||||
if (hal->current_band_type == BAND_ON_5G)
|
||||
packetType &= ~BTC_5G_BAND;
|
||||
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
@ -3705,6 +3940,8 @@ void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist)
|
||||
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
|
||||
return;
|
||||
|
||||
pBtCoexist->statistics.cnt_halt_notify++;
|
||||
|
||||
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
|
||||
#ifdef CONFIG_RTL8821A
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
@ -3792,6 +4029,8 @@ void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState)
|
||||
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
|
||||
return;
|
||||
|
||||
pBtCoexist->statistics.cnt_pnp_notify++;
|
||||
|
||||
/* */
|
||||
/* currently only 1ant we have to do the notification, */
|
||||
/* once pnp is notified to sleep state, we have to leave LPS that we can sleep normally. */
|
||||
@ -4292,15 +4531,6 @@ void EXhalbtcoutsrc_DisplayAntDetection(PBTC_COEXIST pBtCoexist)
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTL8821C
|
||||
else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) {
|
||||
if (pBtCoexist->board_info.btdm_ant_num == 2)
|
||||
ex_halbtc8821c2ant_display_ant_detection(pBtCoexist);
|
||||
else if (pBtCoexist->board_info.btdm_ant_num == 1)
|
||||
ex_halbtc8821c1ant_display_ant_detection(pBtCoexist);
|
||||
}
|
||||
#endif
|
||||
|
||||
halbtcoutsrc_NormalLowPower(pBtCoexist);
|
||||
}
|
||||
|
||||
@ -4910,7 +5140,7 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state)
|
||||
case BTCOEX_SUSPEND_STATE_RESUME:
|
||||
#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
|
||||
/* re-download FW after resume, inform WL FW port number */
|
||||
rtw_hal_set_wifi_port_id_cmd(GLBtCoexist.Adapter);
|
||||
rtw_hal_set_wifi_btc_port_id_cmd(GLBtCoexist.Adapter);
|
||||
#endif
|
||||
EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP);
|
||||
break;
|
||||
|
@ -144,6 +144,26 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
|
||||
#endif
|
||||
}
|
||||
|
||||
void hal_btcoex_wifionly_connect_notify(PADAPTER padapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u8 is_5g = _FALSE;
|
||||
|
||||
if (pHalData->current_band_type == BAND_ON_5G)
|
||||
is_5g = _TRUE;
|
||||
|
||||
if (IS_HARDWARE_TYPE_8822B(padapter)) {
|
||||
#ifdef CONFIG_RTL8822B
|
||||
ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RTL8821C
|
||||
else if (IS_HARDWARE_TYPE_8821C(padapter))
|
||||
ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||
#endif
|
||||
}
|
||||
|
||||
void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
|
||||
{
|
||||
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
|
||||
|
2706
hal/hal_com.c
2706
hal/hal_com.c
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
469
hal/hal_dm.c
469
hal/hal_dm.c
@ -169,6 +169,7 @@ void record_ra_info(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 r
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
||||
|
||||
if (p_sta) {
|
||||
rtw_macid_ctl_set_bw(macid_ctl, macid, p_sta->ra_info.ra_bw_mode);
|
||||
rtw_macid_ctl_set_vht_en(macid_ctl, macid, p_sta->ra_info.is_vht_enable);
|
||||
rtw_macid_ctl_set_rate_bmp0(macid_ctl, macid, ra_mask);
|
||||
@ -176,12 +177,103 @@ void record_ra_info(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 r
|
||||
|
||||
rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter));
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
|
||||
void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv)
|
||||
{
|
||||
struct dm_struct *p_dm = (struct dm_struct *)dm;
|
||||
_adapter *adapter = p_dm->adapter;
|
||||
|
||||
switch (rtw_get_chip_type(adapter)) {
|
||||
/*
|
||||
#ifdef CONFIG_RTL8188F
|
||||
case RTL8188F:
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8723B
|
||||
case RTL8723B :
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8703B
|
||||
case RTL8703B :
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8812A
|
||||
case RTL8812 :
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8821A
|
||||
case RTL8821:
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8814A
|
||||
case RTL8814A :
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8192F
|
||||
case RTL8192F :
|
||||
break;
|
||||
#endif
|
||||
*/
|
||||
/*
|
||||
#ifdef CONFIG_RTL8192E
|
||||
case RTL8192E :
|
||||
SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv);
|
||||
break;
|
||||
#endif
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_RTL8821C
|
||||
case RTL8821C :
|
||||
SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default :
|
||||
RTW_ERR("%s IC not support dynamic tx power\n", __func__);
|
||||
break;
|
||||
}
|
||||
}
|
||||
void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id)
|
||||
{
|
||||
struct dm_struct *dm = adapter_to_phydm(adapter);
|
||||
|
||||
odm_set_dyntxpwr(dm, desc, mac_id);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTW_TX_2PATH_EN
|
||||
void rtw_phydm_tx_2path_en(_adapter *adapter)
|
||||
{
|
||||
struct dm_struct *dm = adapter_to_phydm(adapter);
|
||||
|
||||
phydm_tx_2path(dm);
|
||||
}
|
||||
#endif
|
||||
|
||||
void rtw_phydm_ops_func_init(struct dm_struct *p_phydm)
|
||||
{
|
||||
struct ra_table *p_ra_t = &p_phydm->dm_ra_table;
|
||||
|
||||
p_ra_t->record_ra_info = record_ra_info;
|
||||
#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
|
||||
p_phydm->fill_desc_dyntxpwr = rtw_phydm_fill_desc_dpt;
|
||||
#endif
|
||||
}
|
||||
void rtw_phydm_priv_init(_adapter *adapter)
|
||||
{
|
||||
PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
|
||||
struct dm_struct *phydm = &(hal->odmpriv);
|
||||
|
||||
phydm->adapter = adapter;
|
||||
odm_cmn_info_init(phydm, ODM_CMNINFO_PLATFORM, ODM_CE);
|
||||
}
|
||||
|
||||
void Init_ODM_ComInfo(_adapter *adapter)
|
||||
@ -192,15 +284,8 @@ void Init_ODM_ComInfo(_adapter *adapter)
|
||||
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
|
||||
int i;
|
||||
|
||||
_rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm));
|
||||
|
||||
pDM_Odm->adapter = adapter;
|
||||
|
||||
/*phydm_op_mode could be change for different scenarios: ex: SoftAP - PHYDM_BALANCE_MODE*/
|
||||
pHalData->phydm_op_mode = PHYDM_PERFORMANCE_MODE;/*Service one device*/
|
||||
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
|
||||
|
||||
rtw_odm_init_ic_type(adapter);
|
||||
|
||||
if (rtw_get_intf_type(adapter) == RTW_GSPI)
|
||||
@ -250,7 +335,7 @@ void Init_ODM_ComInfo(_adapter *adapter)
|
||||
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
|
||||
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled));
|
||||
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->radar_detect_enabled));
|
||||
#endif
|
||||
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
|
||||
@ -259,6 +344,7 @@ void Init_ODM_ComInfo(_adapter *adapter)
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
|
||||
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->rfe_type);
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_X_CAP_SETTING, pHalData->crystal_cap);
|
||||
|
||||
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
|
||||
|
||||
@ -277,13 +363,12 @@ void Init_ODM_ComInfo(_adapter *adapter)
|
||||
/*Add by YuChen for adaptivity init*/
|
||||
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en));
|
||||
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
|
||||
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
|
||||
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
|
||||
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
|
||||
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
|
||||
|
||||
/*halrf info init*/
|
||||
halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_EEPROM_THERMAL_VALUE, pHalData->eeprom_thermal_meter);
|
||||
halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_PWT_TYPE, 0);
|
||||
|
||||
if (rtw_odm_adaptivity_needed(adapter) == _TRUE)
|
||||
rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, adapter);
|
||||
@ -365,6 +450,65 @@ static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
|
||||
/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP */
|
||||
{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
|
||||
|
||||
|
||||
struct turbo_edca_setting{
|
||||
u32 edca_ul; /* uplink, tx */
|
||||
u32 edca_dl; /* downlink, rx */
|
||||
};
|
||||
|
||||
#define TURBO_EDCA_ENT(UL, DL) {UL, DL}
|
||||
|
||||
#if 0
|
||||
#define TURBO_EDCA_MODE_NUM 18
|
||||
static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = {
|
||||
TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 0 */
|
||||
TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */
|
||||
TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */
|
||||
TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 4 */
|
||||
TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */
|
||||
|
||||
TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 6 */
|
||||
TURBO_EDCA_ENT(0x6e431c, 0x6e431c), /* mode 7 */
|
||||
TURBO_EDCA_ENT(0x6e4319, 0x6e4319), /* mode 8 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5ea42b, 0xa42b), /* mode 9 */
|
||||
TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 10 */
|
||||
TURBO_EDCA_ENT(0x5e4319, 0x4319), /* mode 11 */
|
||||
|
||||
TURBO_EDCA_ENT(0x6ea42b, 0xa42b), /* mode 12 */
|
||||
TURBO_EDCA_ENT(0x6e431c, 0x431c), /* mode 13 */
|
||||
TURBO_EDCA_ENT(0x6e4319, 0x4319), /* mode 14 */
|
||||
|
||||
TURBO_EDCA_ENT(0x431c, 0x5e431c), /* mode 15 */
|
||||
|
||||
TURBO_EDCA_ENT(0xa42b, 0x5ea42b), /* mode 16 */
|
||||
|
||||
TURBO_EDCA_ENT(0x138642b, 0x431c), /* mode 17 */
|
||||
};
|
||||
#else
|
||||
#define TURBO_EDCA_MODE_NUM 8
|
||||
static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = {
|
||||
/* { UL, DL } */
|
||||
TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 0 */
|
||||
|
||||
TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 2 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5ea42b, 0x431c), /* mode 4 */
|
||||
|
||||
TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 5 */
|
||||
|
||||
TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 6 */
|
||||
|
||||
TURBO_EDCA_ENT(0x5e431c, 0xa42b), /* mode 7 */
|
||||
};
|
||||
#endif
|
||||
|
||||
void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
{
|
||||
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||
@ -394,7 +538,7 @@ void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
u8 is_linked = _FALSE;
|
||||
u8 interface_type;
|
||||
|
||||
if (hal_data->dis_turboedca)
|
||||
if (hal_data->dis_turboedca == 1)
|
||||
return;
|
||||
|
||||
if (rtw_mi_check_status(adapter, MI_ASSOC))
|
||||
@ -477,7 +621,7 @@ void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
EDCA_BE_DL = edca_setting_DL[iot_peer];
|
||||
}
|
||||
|
||||
if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E)) { /* add 8812AU/8812AE */
|
||||
if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */
|
||||
EDCA_BE_UL = 0x5ea42b;
|
||||
EDCA_BE_DL = 0x5ea42b;
|
||||
|
||||
@ -491,16 +635,101 @@ void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
EDCA_BE_DL = 0x6ea42b;
|
||||
}
|
||||
|
||||
if ((ic_type == RTL8822B)
|
||||
&& (interface_type == RTW_SDIO))
|
||||
EDCA_BE_DL = 0x00431c;
|
||||
|
||||
#ifdef CONFIG_RTW_TPT_MODE
|
||||
if ( dvobj->tpt_mode > 0 ) {
|
||||
EDCA_BE_UL = dvobj->edca_be_ul;
|
||||
EDCA_BE_DL = dvobj->edca_be_dl;
|
||||
}
|
||||
#endif /* CONFIG_RTW_TPT_MODE */
|
||||
|
||||
/* keep this condition at last check */
|
||||
if (hal_data->dis_turboedca == 2) {
|
||||
|
||||
if (hal_data->edca_param_mode < TURBO_EDCA_MODE_NUM) {
|
||||
|
||||
struct turbo_edca_setting param;
|
||||
|
||||
param = rtw_turbo_edca[hal_data->edca_param_mode];
|
||||
|
||||
EDCA_BE_UL = param.edca_ul;
|
||||
EDCA_BE_DL = param.edca_dl;
|
||||
|
||||
} else {
|
||||
|
||||
EDCA_BE_UL = hal_data->edca_param_mode;
|
||||
EDCA_BE_DL = hal_data->edca_param_mode;
|
||||
}
|
||||
}
|
||||
|
||||
if (traffic_index == DOWN_LINK)
|
||||
edca_param = EDCA_BE_DL;
|
||||
else
|
||||
edca_param = EDCA_BE_UL;
|
||||
|
||||
#ifdef CONFIG_EXTEND_LOWRATE_TXOP
|
||||
#define TXOP_CCK1M 0x01A6
|
||||
#define TXOP_CCK2M 0x00E6
|
||||
#define TXOP_CCK5M 0x006B
|
||||
#define TXOP_OFD6M 0x0066
|
||||
#define TXOP_MCS6M 0x0061
|
||||
{
|
||||
struct sta_info *psta;
|
||||
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
||||
u8 mac_id, role, current_rate_id;
|
||||
|
||||
/* search all used & connect2AP macid */
|
||||
for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
|
||||
if (rtw_macid_is_used(macid_ctl, mac_id)) {
|
||||
role = GET_H2CCMD_MSRRPT_PARM_ROLE(&(macid_ctl->h2c_msr[mac_id]));
|
||||
if (role != H2C_MSR_ROLE_AP)
|
||||
continue;
|
||||
|
||||
psta = macid_ctl->sta[mac_id];
|
||||
current_rate_id = rtw_get_current_tx_rate(adapter, psta);
|
||||
/* Check init tx_rate==1M and set 0x508[31:16]==0x019B(unit 32us) if it is */
|
||||
switch (current_rate_id) {
|
||||
case DESC_RATE1M:
|
||||
edca_param &= 0x0000FFFF;
|
||||
edca_param |= (TXOP_CCK1M<<16);
|
||||
break;
|
||||
case DESC_RATE2M:
|
||||
edca_param &= 0x0000FFFF;
|
||||
edca_param |= (TXOP_CCK2M<<16);
|
||||
break;
|
||||
case DESC_RATE5_5M:
|
||||
edca_param &= 0x0000FFFF;
|
||||
edca_param |= (TXOP_CCK5M<<16);
|
||||
break;
|
||||
case DESC_RATE6M:
|
||||
edca_param &= 0x0000FFFF;
|
||||
edca_param |= (TXOP_OFD6M<<16);
|
||||
break;
|
||||
case DESC_RATEMCS0:
|
||||
edca_param &= 0x0000FFFF;
|
||||
edca_param |= (TXOP_MCS6M<<16);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_EXTEND_LOWRATE_TXOP */
|
||||
|
||||
#ifdef CONFIG_RTW_CUSTOMIZE_BEEDCA
|
||||
edca_param = CONFIG_RTW_CUSTOMIZE_BEEDCA;
|
||||
#endif
|
||||
|
||||
if ( edca_param != hal_data->ac_param_be) {
|
||||
|
||||
rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
|
||||
|
||||
RTW_DBG("Turbo EDCA =0x%x\n", edca_param);
|
||||
RTW_INFO("Turbo EDCA =0x%x\n", edca_param);
|
||||
}
|
||||
|
||||
hal_data->prv_traffic_idx = traffic_index;
|
||||
}
|
||||
@ -625,8 +854,8 @@ void SetHalODMVar(
|
||||
break;
|
||||
case HAL_ODM_REGULATION:
|
||||
/* used to auto enable/disable adaptivity by SD7 */
|
||||
odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, 0);
|
||||
odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, 0);
|
||||
phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_2G, 0);
|
||||
phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_5G, 0);
|
||||
break;
|
||||
case HAL_ODM_INITIAL_GAIN: {
|
||||
u8 rx_gain = *((u8 *)(pValue1));
|
||||
@ -914,15 +1143,22 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta)
|
||||
{
|
||||
struct ra_sta_info *ra_info;
|
||||
u8 curr_sgi = _FALSE;
|
||||
u32 tx_tp_mbips, rx_tp_mbips, bi_tp_mbips;
|
||||
|
||||
if (!psta)
|
||||
return;
|
||||
RTW_PRINT_SEL(sel, "====== mac_id : %d ======\n", psta->cmn.mac_id);
|
||||
RTW_PRINT_SEL(sel, "\n");
|
||||
RTW_PRINT_SEL(sel, "====== mac_id : %d [" MAC_FMT "] ======\n",
|
||||
psta->cmn.mac_id, MAC_ARG(psta->cmn.mac_addr));
|
||||
|
||||
if (is_client_associated_to_ap(psta->padapter))
|
||||
RTW_PRINT_SEL(sel, "BCN counts : %d (per-%d second), DTIM Period:%d\n",
|
||||
rtw_get_bcn_cnt(psta->padapter) / 2, 1, rtw_get_bcn_dtim_period(psta->padapter));
|
||||
|
||||
ra_info = &psta->cmn.ra_info;
|
||||
curr_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE;
|
||||
curr_sgi = rtw_get_current_tx_sgi(adapter, psta);
|
||||
RTW_PRINT_SEL(sel, "tx_rate : %s(%s) rx_rate : %s, rx_rate_bmc : %s, rssi : %d %%\n"
|
||||
, HDATA_RATE((ra_info->curr_tx_rate & 0x7F)), (curr_sgi) ? "S" : "L"
|
||||
, HDATA_RATE(rtw_get_current_tx_rate(adapter, psta)), (curr_sgi) ? "S" : "L"
|
||||
, HDATA_RATE((psta->curr_rx_rate & 0x7F)), HDATA_RATE((psta->curr_rx_rate_bmc & 0x7F)), psta->cmn.rssi_stat.rssi
|
||||
);
|
||||
|
||||
@ -945,14 +1181,51 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta)
|
||||
);
|
||||
}
|
||||
|
||||
RTW_PRINT_SEL(sel, "TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n",
|
||||
(psta->sta_stats.tx_tp_mbytes << 3), (psta->sta_stats.rx_tp_mbytes << 3),
|
||||
(psta->sta_stats.tx_tp_mbytes + psta->sta_stats.rx_tp_mbytes) << 3);
|
||||
_RTW_PRINT_SEL(sel, "RTW: [TP] ");
|
||||
tx_tp_mbips = psta->sta_stats.tx_tp_kbits >> 10;
|
||||
rx_tp_mbips = psta->sta_stats.rx_tp_kbits >> 10;
|
||||
bi_tp_mbips = tx_tp_mbips + rx_tp_mbips;
|
||||
|
||||
if (tx_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.tx_tp_kbits);
|
||||
|
||||
if (rx_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.rx_tp_kbits);
|
||||
|
||||
if (bi_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.tx_tp_kbits + psta->sta_stats.rx_tp_kbits);
|
||||
|
||||
|
||||
_RTW_PRINT_SEL(sel, "RTW: [Smooth TP] ");
|
||||
tx_tp_mbips = psta->sta_stats.smooth_tx_tp_kbits >> 10;
|
||||
rx_tp_mbips = psta->sta_stats.smooth_rx_tp_kbits >> 10;
|
||||
bi_tp_mbips = tx_tp_mbips + rx_tp_mbips;
|
||||
if (tx_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.smooth_tx_tp_kbits);
|
||||
|
||||
if (rx_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.smooth_rx_tp_kbits);
|
||||
|
||||
if (bi_tp_mbips)
|
||||
_RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips);
|
||||
else
|
||||
_RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.smooth_tx_tp_kbits + psta->sta_stats.rx_tp_kbits);
|
||||
|
||||
#if 0
|
||||
RTW_PRINT_SEL(sel, "Moving-AVG TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n\n",
|
||||
(psta->cmn.tx_moving_average_tp << 3), (psta->cmn.rx_moving_average_tp << 3),
|
||||
(psta->cmn.tx_moving_average_tp + psta->cmn.rx_moving_average_tp) << 3);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void dump_sta_info(void *sel, struct sta_info *psta)
|
||||
@ -971,6 +1244,7 @@ void dump_sta_info(void *sel, struct sta_info *psta)
|
||||
RTW_PRINT_SEL(sel, "mac_id : %d\n", psta->cmn.mac_id);
|
||||
RTW_PRINT_SEL(sel, "wireless_mode : 0x%02x\n", psta->wireless_mode);
|
||||
RTW_PRINT_SEL(sel, "mimo_type : %d\n", psta->cmn.mimo_type);
|
||||
RTW_PRINT_SEL(sel, "static smps : %s\n", (psta->cmn.sm_ps == SM_PS_STATIC) ? "Y" : "N");
|
||||
RTW_PRINT_SEL(sel, "bw_mode : %s, ra_bw_mode : %s\n",
|
||||
ch_width_str(psta->cmn.bw_mode), ch_width_str(ra_info->ra_bw_mode));
|
||||
RTW_PRINT_SEL(sel, "rate_id : %d\n", ra_info->rate_id);
|
||||
@ -982,8 +1256,8 @@ void dump_sta_info(void *sel, struct sta_info *psta)
|
||||
RTW_PRINT_SEL(sel, "is_noisy : %s\n", (ra_info->is_noisy) ? "Y" : "N");
|
||||
RTW_PRINT_SEL(sel, "txrx_state : %d\n", ra_info->txrx_state);/*0: uplink, 1:downlink, 2:bi-direction*/
|
||||
|
||||
curr_tx_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE;
|
||||
curr_tx_rate = ra_info->curr_tx_rate & 0x7F;
|
||||
curr_tx_sgi = rtw_get_current_tx_sgi(psta->padapter, psta);
|
||||
curr_tx_rate = rtw_get_current_tx_rate(psta->padapter, psta);
|
||||
RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n",
|
||||
HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L");
|
||||
RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw));
|
||||
@ -1010,15 +1284,8 @@ static void init_phydm_info(_adapter *adapter)
|
||||
PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
|
||||
struct dm_struct *phydm = &(hal_data->odmpriv);
|
||||
|
||||
halrf_cmn_info_init(phydm, HALRF_CMNINFO_FW_VER,
|
||||
((hal_data->firmware_version << 16) | hal_data->firmware_sub_version));
|
||||
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
|
||||
/*PHYDM API - thermal trim*/
|
||||
phydm_get_thermal_trim_offset(phydm);
|
||||
/*PHYDM API - power trim*/
|
||||
phydm_get_power_trim_offset(phydm);
|
||||
#endif
|
||||
odm_cmn_info_init(phydm, ODM_CMNINFO_FW_VER, hal_data->firmware_version);
|
||||
odm_cmn_info_init(phydm, ODM_CMNINFO_FW_SUB_VER, hal_data->firmware_sub_version);
|
||||
}
|
||||
void rtw_phydm_init(_adapter *adapter)
|
||||
{
|
||||
@ -1027,9 +1294,13 @@ void rtw_phydm_init(_adapter *adapter)
|
||||
|
||||
init_phydm_info(adapter);
|
||||
odm_dm_init(phydm);
|
||||
#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
|
||||
phydm_pathb_q_matrix_rotate_en(phydm);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LPS_PG
|
||||
/*
|
||||
static void _lps_pg_state_update(_adapter *adapter)
|
||||
{
|
||||
u8 is_in_lpspg = _FALSE;
|
||||
@ -1046,44 +1317,90 @@ static void _lps_pg_state_update(_adapter *adapter)
|
||||
if (psta)
|
||||
psta->cmn.ra_info.disable_ra = (is_in_lpspg) ? _TRUE : _FALSE;
|
||||
}
|
||||
*/
|
||||
void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg)
|
||||
{
|
||||
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||
/*u8 rate_id;*/
|
||||
|
||||
if(sta == NULL) {
|
||||
RTW_ERR("%s sta is null\n", __func__);
|
||||
rtw_warn_on(1);
|
||||
return;
|
||||
}
|
||||
|
||||
if (in_lpspg) {
|
||||
sta->cmn.ra_info.disable_ra = _TRUE;
|
||||
sta->cmn.ra_info.disable_pt = _TRUE;
|
||||
/*TODO : DRV fix tx rate*/
|
||||
/*rate_id = phydm_get_rate_from_rssi_lv(phydm, sta->cmn.mac_id);*/
|
||||
} else {
|
||||
sta->cmn.ra_info.disable_ra = _FALSE;
|
||||
sta->cmn.ra_info.disable_pt = _FALSE;
|
||||
}
|
||||
|
||||
rtw_phydm_ra_registed(adapter, sta);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*#define DBG_PHYDM_STATE_CHK*/
|
||||
|
||||
|
||||
static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter)
|
||||
static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 ifs_linked)
|
||||
{
|
||||
u8 rst = _FALSE;
|
||||
u8 rfk_allowed = _TRUE;
|
||||
|
||||
if (rtw_mi_stayin_union_ch_chk(adapter))
|
||||
rst = _TRUE;
|
||||
#ifdef CONFIG_SKIP_RFK_IN_DM
|
||||
rfk_allowed = _FALSE;
|
||||
if (0)
|
||||
RTW_ERR("[RFK-CHK] RF-K not allowed due to CONFIG_SKIP_RFK_IN_DM\n");
|
||||
return rfk_allowed;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MCC_MODE
|
||||
/*not in MCC State*/
|
||||
if (MCC_EN(adapter))
|
||||
if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))
|
||||
rst = _TRUE;
|
||||
if (MCC_EN(adapter) &&
|
||||
rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) {
|
||||
rfk_allowed = _FALSE;
|
||||
if (0)
|
||||
RTW_INFO("[RFK-CHK] RF-K not allowed due to doing MCC\n");
|
||||
return rfk_allowed;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
|
||||
|
||||
#endif
|
||||
|
||||
return rst;
|
||||
if (ifs_linked) {
|
||||
if (is_scaning) {
|
||||
rfk_allowed = _FALSE;
|
||||
RTW_DBG("[RFK-CHK] RF-K not allowed due to ifaces under site-survey\n");
|
||||
}
|
||||
else {
|
||||
rfk_allowed = rtw_mi_stayin_union_ch_chk(adapter) ? _TRUE : _FALSE;
|
||||
if (rfk_allowed == _FALSE)
|
||||
RTW_ERR("[RFK-CHK] RF-K not allowed due to ld_iface not stayin union ch\n");
|
||||
}
|
||||
}
|
||||
|
||||
return rfk_allowed;
|
||||
}
|
||||
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter)
|
||||
static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked)
|
||||
{
|
||||
u8 rst = _FALSE;
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
u8 iqk_sgt = _FALSE;
|
||||
|
||||
#if 0
|
||||
if (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2)
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
if (ifs_linked && (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2))
|
||||
rst = _TRUE;
|
||||
#else
|
||||
rst = _TRUE;
|
||||
if (ifs_linked)
|
||||
iqk_sgt = _TRUE;
|
||||
#endif
|
||||
return rst;
|
||||
return iqk_sgt;
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1164,16 +1481,46 @@ void rtw_dyn_soml_config(_adapter *adapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
void rtw_phydm_watchdog(_adapter *adapter)
|
||||
|
||||
void rtw_phydm_read_efuse(_adapter *adapter)
|
||||
{
|
||||
PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
|
||||
struct dm_struct *phydm = &(hal_data->odmpriv);
|
||||
|
||||
/*PHYDM API - thermal trim*/
|
||||
phydm_get_thermal_trim_offset(phydm);
|
||||
/*PHYDM API - power trim*/
|
||||
phydm_get_power_trim_offset(phydm);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LPS_PWR_TRACKING
|
||||
void rtw_phydm_pwr_tracking_directly(_adapter *adapter)
|
||||
{
|
||||
PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
|
||||
u8 rfk_forbidden = _TRUE;
|
||||
u8 is_linked = _FALSE;
|
||||
|
||||
if (rtw_mi_check_status(adapter, MI_ASSOC))
|
||||
is_linked = _TRUE;
|
||||
|
||||
rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, hal_data->bScanInProcess, is_linked) == _TRUE) ? _FALSE : _TRUE;
|
||||
halrf_cmn_info_set(&hal_data->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
|
||||
|
||||
odm_txpowertracking_direct_ce(&hal_data->odmpriv);
|
||||
}
|
||||
#endif
|
||||
|
||||
void rtw_phydm_watchdog(_adapter *adapter, bool in_lps)
|
||||
{
|
||||
u8 bLinked = _FALSE;
|
||||
u8 bsta_state = _FALSE;
|
||||
u8 bBtDisabled = _TRUE;
|
||||
u8 rfk_forbidden = _TRUE;
|
||||
u8 segment_iqk = _TRUE;
|
||||
u8 rfk_forbidden = _FALSE;
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
u8 segment_iqk = _FALSE;
|
||||
#endif
|
||||
u8 tx_unlinked_low_rate = 0xFF;
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
|
||||
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
|
||||
|
||||
if (!rtw_is_hw_init_completed(adapter)) {
|
||||
RTW_DBG("%s skip due to hw_init_completed == FALSE\n", __func__);
|
||||
@ -1198,34 +1545,32 @@ void rtw_phydm_watchdog(_adapter *adapter)
|
||||
#endif /* CONFIG_BT_COEXIST */
|
||||
odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED,
|
||||
(bBtDisabled == _TRUE) ? _FALSE : _TRUE);
|
||||
#ifdef CONFIG_LPS_PG
|
||||
_lps_pg_state_update(adapter);
|
||||
#endif
|
||||
|
||||
if (bLinked == _TRUE) {
|
||||
rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter) == _TRUE) ? _FALSE : _TRUE;
|
||||
rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE;
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
|
||||
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
segment_iqk = _rtw_phydm_iqk_segment_chk(adapter);
|
||||
segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked);
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk);
|
||||
#endif
|
||||
} else {
|
||||
tx_unlinked_low_rate = _rtw_phydm_pwr_tracking_rate_check(adapter);
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RATE_INDEX, tx_unlinked_low_rate);
|
||||
}
|
||||
#ifdef DBG_PHYDM_STATE_CHK
|
||||
RTW_INFO("%s rfk_forbidden = %s, segment_iqk = %s\n",
|
||||
__func__, (rfk_forbidden) ? "Y" : "N", (segment_iqk) ? "Y" : "N");
|
||||
#endif
|
||||
|
||||
if (bLinked == _FALSE) {
|
||||
tx_unlinked_low_rate = _rtw_phydm_pwr_tracking_rate_check(adapter);
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RATE_INDEX, tx_unlinked_low_rate);
|
||||
}
|
||||
|
||||
/*if (!rtw_mi_stayin_union_band_chk(adapter)) {
|
||||
#ifdef DBG_PHYDM_STATE_CHK
|
||||
RTW_ERR("Not stay in union band, skip phydm\n");
|
||||
#endif
|
||||
goto _exit;
|
||||
}*/
|
||||
if (pwrctl->bpower_saving)
|
||||
|
||||
if (in_lps)
|
||||
phydm_watchdog_lps(&pHalData->odmpriv);
|
||||
else
|
||||
phydm_watchdog(&pHalData->odmpriv);
|
||||
|
18
hal/hal_dm.h
18
hal/hal_dm.h
@ -16,7 +16,9 @@
|
||||
#define __HAL_DM_H__
|
||||
|
||||
#define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv))
|
||||
#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj))
|
||||
|
||||
void rtw_phydm_priv_init(_adapter *adapter);
|
||||
void Init_ODM_ComInfo(_adapter *adapter);
|
||||
void rtw_phydm_init(_adapter *adapter);
|
||||
|
||||
@ -42,7 +44,7 @@ void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
|
||||
u8 period, u8 delay);
|
||||
void rtw_dyn_soml_config(_adapter *adapter);
|
||||
#endif
|
||||
void rtw_phydm_watchdog(_adapter *adapter);
|
||||
void rtw_phydm_watchdog(_adapter *adapter, bool in_lps);
|
||||
|
||||
void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
|
||||
void dump_sta_info(void *sel, struct sta_info *psta);
|
||||
@ -84,5 +86,19 @@ u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt);
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
void rtw_phydm_iqk_trigger(_adapter *adapter);
|
||||
#endif
|
||||
void rtw_phydm_read_efuse(_adapter *adapter);
|
||||
|
||||
#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
|
||||
void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id);
|
||||
#endif
|
||||
#ifdef CONFIG_RTW_TX_2PATH_EN
|
||||
void rtw_phydm_tx_2path_en(_adapter *adapter);
|
||||
#endif
|
||||
#ifdef CONFIG_LPS_PG
|
||||
void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg);
|
||||
#endif
|
||||
#ifdef CONFIG_LPS_PWR_TRACKING
|
||||
void rtw_phydm_pwr_tracking_directly(_adapter *adapter);
|
||||
#endif
|
||||
|
||||
#endif /* __HAL_DM_H__ */
|
||||
|
593
hal/hal_halmac.c
593
hal/hal_halmac.c
@ -1,6 +1,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2015 - 2017 Realtek Corporation.
|
||||
* Copyright(c) 2015 - 2018 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
@ -18,6 +18,13 @@
|
||||
#include <hal_data.h> /* efuse, PHAL_DATA_TYPE and etc. */
|
||||
#include "hal_halmac.h" /* dvobj_to_halmac() and ect. */
|
||||
|
||||
/*
|
||||
* HALMAC take return value 0 for fail and 1 for success to replace
|
||||
* _FALSE/_TRUE after V1_04_09
|
||||
*/
|
||||
#define RTW_HALMAC_FAIL 0
|
||||
#define RTW_HALMAC_SUCCESS 1
|
||||
|
||||
#define DEFAULT_INDICATOR_TIMELMT 1000 /* ms */
|
||||
#define MSG_PREFIX "[HALMAC]"
|
||||
|
||||
@ -183,15 +190,18 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
|
||||
struct dvobj_priv *d = (struct dvobj_priv *)p;
|
||||
u8 *pbuf;
|
||||
u8 ret;
|
||||
u8 rst = _FALSE;
|
||||
u8 rst = RTW_HALMAC_FAIL;
|
||||
u32 sdio_read_size;
|
||||
|
||||
|
||||
if (!data)
|
||||
return rst;
|
||||
|
||||
sdio_read_size = RND4(size);
|
||||
sdio_read_size = rtw_sdio_cmd53_align_size(d, sdio_read_size);
|
||||
|
||||
pbuf = rtw_zmalloc(sdio_read_size);
|
||||
if ((!pbuf) || (!data))
|
||||
if (!pbuf)
|
||||
return rst;
|
||||
|
||||
ret = rtw_sdio_read_cmd53(d, offset, pbuf, sdio_read_size);
|
||||
@ -201,7 +211,7 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
|
||||
}
|
||||
|
||||
_rtw_memcpy(data, pbuf, size);
|
||||
rst = _TRUE;
|
||||
rst = RTW_HALMAC_SUCCESS;
|
||||
exit:
|
||||
rtw_mfree(pbuf, sdio_read_size);
|
||||
|
||||
@ -376,7 +386,7 @@ static void _halmac_reg_write_32(void *p, u32 offset, u32 val)
|
||||
static u8 _halmac_mfree(void *p, void *buffer, u32 size)
|
||||
{
|
||||
rtw_mfree(buffer, size);
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static void *_halmac_malloc(void *p, u32 size)
|
||||
@ -387,13 +397,13 @@ static void *_halmac_malloc(void *p, u32 size)
|
||||
static u8 _halmac_memcpy(void *p, void *dest, void *src, u32 size)
|
||||
{
|
||||
_rtw_memcpy(dest, src, size);
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static u8 _halmac_memset(void *p, void *addr, u8 value, u32 size)
|
||||
{
|
||||
_rtw_memset(addr, value, size);
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static void _halmac_udelay(void *p, u32 us)
|
||||
@ -410,13 +420,13 @@ static void _halmac_udelay(void *p, u32 us)
|
||||
static u8 _halmac_mutex_init(void *p, HALMAC_MUTEX *pMutex)
|
||||
{
|
||||
_rtw_mutex_init(pMutex);
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static u8 _halmac_mutex_deinit(void *p, HALMAC_MUTEX *pMutex)
|
||||
{
|
||||
_rtw_mutex_free(pMutex);
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex)
|
||||
@ -425,26 +435,70 @@ static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex)
|
||||
|
||||
err = _enter_critical_mutex(pMutex, NULL);
|
||||
if (err)
|
||||
return _FALSE;
|
||||
return RTW_HALMAC_FAIL;
|
||||
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
static u8 _halmac_mutex_unlock(void *p, HALMAC_MUTEX *pMutex)
|
||||
{
|
||||
_exit_critical_mutex(pMutex, NULL);
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_SDIO_HCI
|
||||
#define DBG_MSG_FILTER
|
||||
#endif
|
||||
|
||||
#ifdef DBG_MSG_FILTER
|
||||
static u8 is_msg_allowed(uint drv_lv, u8 msg_lv)
|
||||
{
|
||||
switch (drv_lv) {
|
||||
case _DRV_NONE_:
|
||||
return _FALSE;
|
||||
|
||||
case _DRV_ALWAYS_:
|
||||
if (msg_lv > HALMAC_DBG_ALWAYS)
|
||||
return _FALSE;
|
||||
break;
|
||||
case _DRV_ERR_:
|
||||
if (msg_lv > HALMAC_DBG_ERR)
|
||||
return _FALSE;
|
||||
break;
|
||||
case _DRV_WARNING_:
|
||||
if (msg_lv > HALMAC_DBG_WARN)
|
||||
return _FALSE;
|
||||
break;
|
||||
case _DRV_INFO_:
|
||||
if (msg_lv >= HALMAC_DBG_TRACE)
|
||||
return _FALSE;
|
||||
break;
|
||||
}
|
||||
|
||||
return _TRUE;
|
||||
}
|
||||
#endif /* DBG_MSG_FILTER */
|
||||
|
||||
static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...)
|
||||
{
|
||||
#define MSG_LEN 100
|
||||
va_list args;
|
||||
u8 str[MSG_LEN] = {0};
|
||||
#ifdef DBG_MSG_FILTER
|
||||
uint drv_level = _DRV_NONE_;
|
||||
#endif
|
||||
int err;
|
||||
u8 ret = _TRUE;
|
||||
u8 ret = RTW_HALMAC_SUCCESS;
|
||||
|
||||
|
||||
#ifdef DBG_MSG_FILTER
|
||||
#ifdef CONFIG_RTW_DEBUG
|
||||
drv_level = rtw_drv_log_level;
|
||||
#endif
|
||||
if (is_msg_allowed(drv_level, msg_level) == _FALSE)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
str[0] = '\n';
|
||||
va_start(args, fmt);
|
||||
err = vsnprintf(str, MSG_LEN, fmt, args);
|
||||
@ -452,10 +506,10 @@ static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...)
|
||||
|
||||
/* An output error is encountered */
|
||||
if (err < 0)
|
||||
return _FALSE;
|
||||
return RTW_HALMAC_FAIL;
|
||||
/* Output may be truncated due to size limit */
|
||||
if ((err == (MSG_LEN - 1)) && (str[MSG_LEN - 2] != '\n'))
|
||||
ret = _FALSE;
|
||||
ret = RTW_HALMAC_FAIL;
|
||||
|
||||
if (msg_level == HALMAC_DBG_ALWAYS)
|
||||
RTW_PRINT(MSG_PREFIX "%s", str);
|
||||
@ -476,7 +530,7 @@ static u8 _halmac_buff_print(void *p, u32 msg_type, u8 msg_level, s8 *buf, u32 s
|
||||
else
|
||||
RTW_DBG_DUMP(MSG_PREFIX, buf, size);
|
||||
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
@ -515,6 +569,9 @@ static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_p
|
||||
break;
|
||||
case HALMAC_FEATURE_UPDATE_PACKET:
|
||||
RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
|
||||
if (status != HALMAC_CMD_PROCESS_DONE)
|
||||
RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
|
||||
__FUNCTION__, id, status);
|
||||
break;
|
||||
case HALMAC_FEATURE_UPDATE_DATAPACK:
|
||||
RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
|
||||
@ -524,6 +581,11 @@ static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_p
|
||||
break;
|
||||
case HALMAC_FEATURE_CHANNEL_SWITCH:
|
||||
RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
|
||||
if ((status != HALMAC_CMD_PROCESS_DONE) && (status != HALMAC_CMD_PROCESS_RCVD))
|
||||
RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
|
||||
__FUNCTION__, id, status);
|
||||
if (status == HALMAC_CMD_PROCESS_DONE)
|
||||
return _FALSE;
|
||||
break;
|
||||
case HALMAC_FEATURE_IQK:
|
||||
RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
|
||||
@ -621,7 +683,7 @@ static int wait_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id)
|
||||
|
||||
/*
|
||||
* Return:
|
||||
* Always return _TRUE, HALMAC don't care the return value.
|
||||
* Always return RTW_HALMAC_SUCCESS, HALMAC don't care the return value.
|
||||
*/
|
||||
static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, enum halmac_cmd_process_status process_status, u8 *buf, u32 size)
|
||||
{
|
||||
@ -672,7 +734,7 @@ static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, e
|
||||
rtw_sctx_done(&sctx);
|
||||
|
||||
exit:
|
||||
return _TRUE;
|
||||
return RTW_HALMAC_SUCCESS;
|
||||
}
|
||||
|
||||
struct halmac_platform_api rtw_halmac_platform_api = {
|
||||
@ -689,14 +751,14 @@ struct halmac_platform_api rtw_halmac_platform_api = {
|
||||
.SDIO_CMD53_WRITE_32 = _halmac_sdio_reg_write_32,
|
||||
.SDIO_CMD52_CIA_READ = _halmac_sdio_read_cia,
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCIE_HCI)
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
|
||||
.REG_READ_8 = _halmac_reg_read_8,
|
||||
.REG_READ_16 = _halmac_reg_read_16,
|
||||
.REG_READ_32 = _halmac_reg_read_32,
|
||||
.REG_WRITE_8 = _halmac_reg_write_8,
|
||||
.REG_WRITE_16 = _halmac_reg_write_16,
|
||||
.REG_WRITE_32 = _halmac_reg_write_32,
|
||||
#endif /* CONFIG_USB_HCI || CONFIG_PCIE_HCI */
|
||||
#endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */
|
||||
|
||||
/* Write data */
|
||||
#if 0
|
||||
@ -983,7 +1045,7 @@ static int init_write_rsvd_page_size(struct dvobj_priv *d)
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* for USB do not exceed MAX_CMDBUF_SZ */
|
||||
size = 0x1000;
|
||||
#elif defined(CONFIG_PCIE_HCI)
|
||||
#elif defined(CONFIG_PCI_HCI)
|
||||
size = MAX_CMDBUF_SZ - TXDESC_OFFSET;
|
||||
#elif defined(CONFIG_SDIO_HCI)
|
||||
size = 0x7000; /* 28KB */
|
||||
@ -1122,7 +1184,7 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf
|
||||
intf = HALMAC_INTERFACE_SDIO;
|
||||
#elif defined(CONFIG_USB_HCI)
|
||||
intf = HALMAC_INTERFACE_USB;
|
||||
#elif defined(CONFIG_PCIE_HCI)
|
||||
#elif defined(CONFIG_PCI_HCI)
|
||||
intf = HALMAC_INTERFACE_PCIE;
|
||||
#else
|
||||
#warning "INTERFACE(CONFIG_XXX_HCI) not be defined!!"
|
||||
@ -2323,6 +2385,164 @@ int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* rtw_halmac_set_rts_full_bw() - Send RTS to all covered channels
|
||||
* @d: struct dvobj_priv*
|
||||
* @enable: _TRUE(enable), _FALSE(disable)
|
||||
*
|
||||
* Hradware will duplicate RTS packet to all channels which are covered in used
|
||||
* bandwidth.
|
||||
*
|
||||
* Return 0 if process OK, otherwise -1.
|
||||
*/
|
||||
int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable)
|
||||
{
|
||||
struct halmac_adapter *mac;
|
||||
struct halmac_api *api;
|
||||
enum halmac_ret_status status;
|
||||
u8 full;
|
||||
|
||||
|
||||
mac = dvobj_to_halmac(d);
|
||||
api = HALMAC_GET_API(mac);
|
||||
full = (enable == _TRUE) ? 1 : 0;
|
||||
|
||||
status = api->halmac_set_hw_value(mac, HALMAC_HW_RTS_FULL_BW, &full);
|
||||
if (HALMAC_RET_SUCCESS != status)
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef RTW_HALMAC_DBG_POWER_SWITCH
|
||||
static void _dump_mac_reg(struct dvobj_priv *d, u32 start, u32 end)
|
||||
{
|
||||
struct _ADAPTER *adapter;
|
||||
int i, j = 1;
|
||||
|
||||
|
||||
adapter = dvobj_get_primary_adapter(d);
|
||||
for (i = start; i < end; i += 4) {
|
||||
if (j % 4 == 1)
|
||||
RTW_PRINT("0x%04x", i);
|
||||
_RTW_PRINT(" 0x%08x ", rtw_read32(adapter, i));
|
||||
if ((j++) % 4 == 0)
|
||||
_RTW_PRINT("\n");
|
||||
}
|
||||
}
|
||||
|
||||
void dump_dbg_val(struct _ADAPTER *a, u32 reg)
|
||||
{
|
||||
u32 v32;
|
||||
|
||||
|
||||
rtw_write8(a, 0x3A, reg);
|
||||
v32 = rtw_read32(a, 0xC0);
|
||||
RTW_PRINT("0x3A = %02x, 0xC0 = 0x%08x\n",reg, v32);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
static void _dump_pcie_cfg_space(struct dvobj_priv *d)
|
||||
{
|
||||
struct _ADAPTER *padapter = dvobj_get_primary_adapter(d);
|
||||
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
|
||||
struct pci_dev *pdev = pdvobjpriv->ppcidev;
|
||||
struct pci_dev *bridge_pdev = pdev->bus->self;
|
||||
|
||||
u32 tmp[4] = { 0 };
|
||||
u32 i, j;
|
||||
|
||||
RTW_PRINT("\n***** PCI Device Configuration Space *****\n\n");
|
||||
|
||||
for(i = 0; i < 0x100; i += 0x10)
|
||||
{
|
||||
for (j = 0 ; j < 4 ; j++)
|
||||
pci_read_config_dword(pdev, i + j * 4, tmp+j);
|
||||
|
||||
RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
|
||||
i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
|
||||
tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
|
||||
tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
|
||||
tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
|
||||
}
|
||||
|
||||
RTW_PRINT("\n***** PCI Host Device Configuration Space*****\n\n");
|
||||
|
||||
for(i = 0; i < 0x100; i += 0x10)
|
||||
{
|
||||
for (j = 0 ; j < 4 ; j++)
|
||||
pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j);
|
||||
|
||||
RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
|
||||
i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
|
||||
tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
|
||||
tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
|
||||
tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static void _dump_mac_reg_for_power_switch(struct dvobj_priv *d,
|
||||
const char* caller, char* desc)
|
||||
{
|
||||
struct _ADAPTER *a;
|
||||
u8 v8;
|
||||
|
||||
|
||||
RTW_PRINT("%s: %s\n", caller, desc);
|
||||
RTW_PRINT("======= MAC REG =======\n");
|
||||
/* page 0/1 */
|
||||
_dump_mac_reg(d, 0x0, 0x200);
|
||||
_dump_mac_reg(d, 0x300, 0x400); /* also dump page 3 */
|
||||
|
||||
/* dump debug register */
|
||||
a = dvobj_get_primary_adapter(d);
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
_dump_pcie_cfg_space(d);
|
||||
|
||||
v8 = rtw_read8(a, 0xF6) | 0x01;
|
||||
rtw_write8(a, 0xF6, v8);
|
||||
RTW_PRINT("0xF6 = %02x\n", v8);
|
||||
|
||||
dump_dbg_val(a, 0x63);
|
||||
dump_dbg_val(a, 0x64);
|
||||
dump_dbg_val(a, 0x68);
|
||||
dump_dbg_val(a, 0x69);
|
||||
dump_dbg_val(a, 0x6a);
|
||||
dump_dbg_val(a, 0x6b);
|
||||
dump_dbg_val(a, 0x71);
|
||||
dump_dbg_val(a, 0x72);
|
||||
#endif
|
||||
}
|
||||
|
||||
static enum halmac_ret_status _power_switch(struct halmac_adapter *halmac,
|
||||
struct halmac_api *api,
|
||||
enum halmac_mac_power pwr)
|
||||
{
|
||||
enum halmac_ret_status status;
|
||||
char desc[80] = {0};
|
||||
|
||||
|
||||
rtw_sprintf(desc, 80, "before calling power %s",
|
||||
(pwr==HALMAC_MAC_POWER_ON)?"on":"off");
|
||||
_dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter,
|
||||
__FUNCTION__, desc);
|
||||
|
||||
status = api->halmac_mac_power_switch(halmac, pwr);
|
||||
RTW_PRINT("%s: status=%d\n", __FUNCTION__, status);
|
||||
|
||||
rtw_sprintf(desc, 80, "after calling power %s",
|
||||
(pwr==HALMAC_MAC_POWER_ON)?"on":"off");
|
||||
_dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter,
|
||||
__FUNCTION__, desc);
|
||||
|
||||
return status;
|
||||
}
|
||||
#else /* !RTW_HALMAC_DBG_POWER_SWITCH */
|
||||
#define _power_switch(mac, api, pwr) (api)->halmac_mac_power_switch(mac, pwr)
|
||||
#endif /* !RTW_HALMAC_DBG_POWER_SWITCH */
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Power on device hardware.
|
||||
@ -2340,7 +2560,13 @@ int rtw_halmac_poweron(struct dvobj_priv *d)
|
||||
struct halmac_api *api;
|
||||
enum halmac_ret_status status;
|
||||
int err = -1;
|
||||
#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
|
||||
struct _ADAPTER *a;
|
||||
u8 v8;
|
||||
u32 addr;
|
||||
|
||||
a = dvobj_get_primary_adapter(d);
|
||||
#endif
|
||||
|
||||
halmac = dvobj_to_halmac(d);
|
||||
if (!halmac)
|
||||
@ -2358,14 +2584,48 @@ int rtw_halmac_poweron(struct dvobj_priv *d)
|
||||
goto out;
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON);
|
||||
#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
|
||||
addr = 0x3F3;
|
||||
v8 = rtw_read8(a, addr);
|
||||
RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
|
||||
/* are we in pcie debug mode? */
|
||||
if (!(v8 & BIT(2))) {
|
||||
RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__);
|
||||
v8 |= BIT(2);
|
||||
v8 = rtw_write8(a, addr, v8);
|
||||
}
|
||||
#endif
|
||||
|
||||
status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON);
|
||||
if (HALMAC_RET_PWR_UNCHANGE == status) {
|
||||
|
||||
#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
|
||||
addr = 0x3F3;
|
||||
v8 = rtw_read8(a, addr);
|
||||
RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
|
||||
|
||||
/* are we in pcie debug mode? */
|
||||
if (!(v8 & BIT(2))) {
|
||||
RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__);
|
||||
v8 |= BIT(2);
|
||||
v8 = rtw_write8(a, addr, v8);
|
||||
} else if (v8 & BIT(0)) {
|
||||
/* DMA stuck */
|
||||
addr = 0x1350;
|
||||
v8 = rtw_read8(a, addr);
|
||||
RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
|
||||
RTW_PRINT("%s: recover DMA stuck\n", __FUNCTION__);
|
||||
v8 |= BIT(6);
|
||||
v8 = rtw_write8(a, addr, v8);
|
||||
RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* Work around for warm reboot but device not power off,
|
||||
* but it would also fall into this case when auto power on is enabled.
|
||||
*/
|
||||
api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF);
|
||||
status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON);
|
||||
_power_switch(halmac, api, HALMAC_MAC_POWER_OFF);
|
||||
status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON);
|
||||
RTW_WARN("%s: Power state abnormal, try to recover...%s\n",
|
||||
__FUNCTION__, (HALMAC_RET_SUCCESS == status)?"OK":"FAIL!");
|
||||
}
|
||||
@ -2406,7 +2666,7 @@ int rtw_halmac_poweroff(struct dvobj_priv *d)
|
||||
|
||||
api = HALMAC_GET_API(halmac);
|
||||
|
||||
status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF);
|
||||
status = _power_switch(halmac, api, HALMAC_MAC_POWER_OFF);
|
||||
if ((HALMAC_RET_SUCCESS != status)
|
||||
&& (HALMAC_RET_PWR_UNCHANGE != status))
|
||||
goto out;
|
||||
@ -2454,7 +2714,7 @@ void dump_trx_share_mode(void *sel, struct _ADAPTER *adapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u8 num)
|
||||
static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u16 num)
|
||||
{
|
||||
if (num <= 8)
|
||||
return HALMAC_RSVD_PG_NUM8;
|
||||
@ -2466,18 +2726,20 @@ static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u8 num)
|
||||
return HALMAC_RSVD_PG_NUM32;
|
||||
if (num <= 64)
|
||||
return HALMAC_RSVD_PG_NUM64;
|
||||
if (num <= 128)
|
||||
return HALMAC_RSVD_PG_NUM128;
|
||||
|
||||
if (num > 128)
|
||||
if (num > 256)
|
||||
RTW_WARN("%s: Fail to allocate RSVD page(%d)!!"
|
||||
" The MAX RSVD page number is 128...\n",
|
||||
" The MAX RSVD page number is 256...\n",
|
||||
__FUNCTION__, num);
|
||||
|
||||
return HALMAC_RSVD_PG_NUM128;
|
||||
return HALMAC_RSVD_PG_NUM256;
|
||||
}
|
||||
|
||||
static u8 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number)
|
||||
static u16 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number)
|
||||
{
|
||||
u8 num = 0;
|
||||
u16 num = 0;
|
||||
|
||||
|
||||
switch (rsvd_page_number) {
|
||||
@ -2504,6 +2766,10 @@ static u8 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number
|
||||
case HALMAC_RSVD_PG_NUM128:
|
||||
num = 128;
|
||||
break;
|
||||
|
||||
case HALMAC_RSVD_PG_NUM256:
|
||||
num = 256;
|
||||
break;
|
||||
}
|
||||
|
||||
return num;
|
||||
@ -2718,7 +2984,7 @@ static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d)
|
||||
struct halmac_api *api;
|
||||
enum halmac_drv_rsvd_pg_num rsvd_page_number;
|
||||
enum halmac_ret_status status;
|
||||
u8 drv_rsvd_num;
|
||||
u16 drv_rsvd_num;
|
||||
|
||||
|
||||
a = dvobj_get_primary_adapter(d);
|
||||
@ -2926,6 +3192,13 @@ exit:
|
||||
return err;
|
||||
}
|
||||
|
||||
static void _init_trx_cfg_drv(struct dvobj_priv *d)
|
||||
{
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
rtw_hal_irp_reset(dvobj_get_primary_adapter(d));
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Downlaod Firmware Flow
|
||||
@ -3027,6 +3300,7 @@ resume_tx:
|
||||
status = api->halmac_init_trx_cfg(mac, mode);
|
||||
if (HALMAC_RET_SUCCESS != status)
|
||||
return -1;
|
||||
_init_trx_cfg_drv(d);
|
||||
|
||||
/* 9. Config RX Aggregation */
|
||||
err = rtw_halmac_rx_agg_switch(d, _TRUE);
|
||||
@ -3090,6 +3364,7 @@ static int init_mac_flow(struct dvobj_priv *d)
|
||||
status = api->halmac_init_mac_cfg(halmac, trx_mode);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
goto out;
|
||||
_init_trx_cfg_drv(d);
|
||||
|
||||
err = rtw_halmac_rx_agg_switch(d, _TRUE);
|
||||
if (err)
|
||||
@ -3120,7 +3395,11 @@ static int _drv_enable_trx(struct dvobj_priv *d)
|
||||
|
||||
adapter = dvobj_get_primary_adapter(d);
|
||||
if (adapter->bup == _FALSE) {
|
||||
#ifdef CONFIG_NEW_NETDEV_HDL
|
||||
status = rtw_mi_start_drv_threads(adapter);
|
||||
#else
|
||||
status = rtw_start_drv_threads(adapter);
|
||||
#endif
|
||||
if (status == _FAIL) {
|
||||
RTW_ERR("%s: Start threads Failed!\n", __FUNCTION__);
|
||||
return -1;
|
||||
@ -3395,7 +3674,7 @@ int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout)
|
||||
if (empty == _FALSE) {
|
||||
#ifdef CONFIG_RTW_DEBUG
|
||||
u16 dbg_reg[] = {0x210, 0x230, 0x234, 0x238, 0x23C, 0x240,
|
||||
0x41A, 0x10FC, 0x10F8, 0x11F4, 0x11F8};
|
||||
0x418, 0x10FC, 0x10F8, 0x11F4, 0x11F8};
|
||||
u8 i;
|
||||
u32 val;
|
||||
|
||||
@ -3612,6 +3891,7 @@ int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable)
|
||||
struct halmac_adapter *halmac;
|
||||
struct halmac_api *api;
|
||||
enum halmac_ret_status status;
|
||||
u8 on;
|
||||
|
||||
|
||||
adapter = dvobj_get_primary_adapter(d);
|
||||
@ -3619,8 +3899,9 @@ int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable)
|
||||
if (!halmac)
|
||||
return -1;
|
||||
api = HALMAC_GET_API(halmac);
|
||||
on = (enable == _TRUE) ? 1 : 0;
|
||||
|
||||
status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &enable);
|
||||
status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &on);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return -1;
|
||||
|
||||
@ -4141,7 +4422,7 @@ _exit:
|
||||
/*
|
||||
* rtw_halmac_rx_agg_switch() - Switch RX aggregation function and setting
|
||||
* @d struct dvobj_priv *
|
||||
* @enable 0/1 for disable/enable RX aggregation function
|
||||
* @enable _FALSE/_TRUE for disable/enable RX aggregation function
|
||||
*
|
||||
* This function could help to on/off bus RX aggregation function, and is only
|
||||
* useful for SDIO and USB interface. Although only "enable" flag is brough in,
|
||||
@ -4291,6 +4572,7 @@ int rtw_halmac_p2pps(struct dvobj_priv *dvobj, struct hal_p2p_ps_para *pp2p_ps_p
|
||||
(&halmac_p2p_ps)->noa_sel = pp2p_ps_para->noa_sel;
|
||||
(&halmac_p2p_ps)->all_sta_sleep = pp2p_ps_para->all_sta_sleep;
|
||||
(&halmac_p2p_ps)->discovery = pp2p_ps_para->discovery;
|
||||
(&halmac_p2p_ps)->disable_close_rf = pp2p_ps_para->disable_close_rf;
|
||||
(&halmac_p2p_ps)->p2p_port_id = _hw_port_drv2halmac(pp2p_ps_para->p2p_port_id);
|
||||
(&halmac_p2p_ps)->p2p_group = pp2p_ps_para->p2p_group;
|
||||
(&halmac_p2p_ps)->p2p_macid = pp2p_ps_para->p2p_macid;
|
||||
@ -4636,6 +4918,247 @@ void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on)
|
||||
api->halmac_pinmux_wl_led_sw_ctrl(halmac, on);
|
||||
}
|
||||
|
||||
/**
|
||||
* rtw_halmac_bt_wake_cfg() - Configure BT wake host function
|
||||
* @d: struct dvobj_priv*
|
||||
* @enable: enable or disable BT wake host function
|
||||
* 0: disable
|
||||
* 1: enable
|
||||
*
|
||||
* Configure pinmux to allow BT to control BT wake host pin.
|
||||
*
|
||||
* Rteurn 0 for OK, otherwise fail.
|
||||
*/
|
||||
int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable)
|
||||
{
|
||||
struct halmac_adapter *halmac;
|
||||
struct halmac_api *api;
|
||||
enum halmac_ret_status status;
|
||||
|
||||
|
||||
halmac = dvobj_to_halmac(d);
|
||||
api = HALMAC_GET_API(halmac);
|
||||
|
||||
if (enable) {
|
||||
status = api->halmac_pinmux_set_func(halmac,
|
||||
HALMAC_GPIO_FUNC_BT_HOST_WAKE1);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
RTW_ERR("%s: pinmux set BT_HOST_WAKE1 fail!(0x%x)\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
} else {
|
||||
status = api->halmac_pinmux_free_func(halmac,
|
||||
HALMAC_GPIO_FUNC_BT_HOST_WAKE1);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
RTW_ERR("%s: pinmux free BT_HOST_WAKE1 fail!(0x%x)\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PNO_SUPPORT
|
||||
/**
|
||||
* _halmac_scanoffload() - Switch channel by firmware during scanning
|
||||
* @d: struct dvobj_priv*
|
||||
* @enable: 1: enable, 0: disable
|
||||
* @nlo: 1: nlo mode (no c2h event), 0: normal mode
|
||||
* @ssid: ssid of probe request
|
||||
* @ssid_len: ssid length
|
||||
*
|
||||
* Switch Channel and Send Porbe Request Offloaded by FW
|
||||
*
|
||||
* Rteurn 0 for OK, otherwise fail.
|
||||
*/
|
||||
static int _halmac_scanoffload(struct dvobj_priv *d, u32 enable, u8 nlo,
|
||||
u8 *ssid, u8 ssid_len)
|
||||
{
|
||||
struct _ADAPTER *adapter;
|
||||
struct halmac_adapter *mac;
|
||||
struct halmac_api *api;
|
||||
enum halmac_ret_status status;
|
||||
struct halmac_ch_info ch_info;
|
||||
struct halmac_ch_switch_option cs_option;
|
||||
struct mlme_ext_priv *pmlmeext;
|
||||
enum halmac_feature_id id_update, id_ch_sw;
|
||||
struct halmac_indicator *indicator, *tbl;
|
||||
|
||||
int err = 0;
|
||||
u8 probereq[64];
|
||||
u32 len = 0;
|
||||
int i = 0;
|
||||
struct pno_ssid pnossid;
|
||||
struct rf_ctl_t *rfctl = NULL;
|
||||
struct _RT_CHANNEL_INFO *ch_set;
|
||||
|
||||
|
||||
tbl = d->hmpriv.indicator;
|
||||
adapter = dvobj_get_primary_adapter(d);
|
||||
mac = dvobj_to_halmac(d);
|
||||
if (!mac)
|
||||
return -1;
|
||||
api = HALMAC_GET_API(mac);
|
||||
id_update = HALMAC_FEATURE_UPDATE_PACKET;
|
||||
id_ch_sw = HALMAC_FEATURE_CHANNEL_SWITCH;
|
||||
pmlmeext = &(adapter->mlmeextpriv);
|
||||
rfctl = adapter_to_rfctl(adapter);
|
||||
ch_set = rfctl->channel_set;
|
||||
|
||||
RTW_INFO("%s: %s scanoffload, mode: %s\n",
|
||||
__FUNCTION__, enable?"Enable":"Disable",
|
||||
nlo?"PNO/NLO":"Normal");
|
||||
|
||||
if (enable) {
|
||||
_rtw_memset(probereq, 0, sizeof(probereq));
|
||||
|
||||
_rtw_memset(&pnossid, 0, sizeof(pnossid));
|
||||
if (ssid) {
|
||||
if (ssid_len > sizeof(pnossid.SSID)) {
|
||||
RTW_ERR("%s: SSID length(%d) is too long(>%d)!!\n",
|
||||
__FUNCTION__, ssid_len, sizeof(pnossid.SSID));
|
||||
return -1;
|
||||
}
|
||||
|
||||
pnossid.SSID_len = ssid_len;
|
||||
_rtw_memcpy(pnossid.SSID, ssid, ssid_len);
|
||||
}
|
||||
|
||||
rtw_hal_construct_ProbeReq(adapter, probereq, &len, &pnossid);
|
||||
|
||||
if (!nlo) {
|
||||
err = init_halmac_event(d, id_update, NULL, 0);
|
||||
if (err)
|
||||
return -1;
|
||||
}
|
||||
|
||||
status = api->halmac_update_packet(mac, HALMAC_PACKET_PROBE_REQ,
|
||||
probereq, len);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
if (!nlo)
|
||||
free_halmac_event(d, id_update);
|
||||
RTW_ERR("%s: halmac_update_packet FAIL(%d)!!\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (!nlo) {
|
||||
err = wait_halmac_event(d, id_update);
|
||||
if (err)
|
||||
RTW_ERR("%s: wait update packet FAIL(%d)!!\n",
|
||||
__FUNCTION__, err);
|
||||
}
|
||||
|
||||
api->halmac_clear_ch_info(mac);
|
||||
|
||||
for (i = 0; i < rfctl->max_chan_nums && ch_set[i].ChannelNum != 0; i++) {
|
||||
_rtw_memset(&ch_info, 0, sizeof(ch_info));
|
||||
ch_info.extra_info = 0;
|
||||
ch_info.channel = ch_set[i].ChannelNum;
|
||||
ch_info.bw = HALMAC_BW_20;
|
||||
ch_info.pri_ch_idx = HALMAC_CH_IDX_1;
|
||||
ch_info.action_id = HALMAC_CS_ACTIVE_SCAN;
|
||||
ch_info.timeout = 1;
|
||||
status = api->halmac_add_ch_info(mac, &ch_info);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
RTW_ERR("%s: add_ch_info FAIL(%d)!!\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* set channel switch option */
|
||||
_rtw_memset(&cs_option, 0, sizeof(cs_option));
|
||||
cs_option.dest_bw = HALMAC_BW_20;
|
||||
cs_option.periodic_option = HALMAC_CS_PERIODIC_2_PHASE;
|
||||
cs_option.dest_pri_ch_idx = HALMAC_CH_IDX_UNDEFINE;
|
||||
cs_option.tsf_low = 0;
|
||||
cs_option.switch_en = 1;
|
||||
cs_option.dest_ch_en = 1;
|
||||
cs_option.absolute_time_en = 0;
|
||||
cs_option.dest_ch = 1;
|
||||
|
||||
cs_option.normal_period = 5;
|
||||
cs_option.normal_period_sel = 0;
|
||||
cs_option.normal_cycle = 10;
|
||||
|
||||
cs_option.phase_2_period = 1;
|
||||
cs_option.phase_2_period_sel = 1;
|
||||
|
||||
/* nlo is for wow fw, 1: no c2h response */
|
||||
cs_option.nlo_en = nlo;
|
||||
|
||||
if (!nlo) {
|
||||
err = init_halmac_event(d, id_ch_sw, NULL, 0);
|
||||
if (err)
|
||||
return -1;
|
||||
}
|
||||
|
||||
status = api->halmac_ctrl_ch_switch(mac, &cs_option);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
if (!nlo)
|
||||
free_halmac_event(d, id_ch_sw);
|
||||
RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (!nlo) {
|
||||
err = wait_halmac_event(d, id_ch_sw);
|
||||
if (err)
|
||||
RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n",
|
||||
__FUNCTION__, err);
|
||||
}
|
||||
} else {
|
||||
api->halmac_clear_ch_info(mac);
|
||||
|
||||
_rtw_memset(&cs_option, 0, sizeof(cs_option));
|
||||
cs_option.switch_en = 0;
|
||||
|
||||
if (!nlo) {
|
||||
err = init_halmac_event(d, id_ch_sw, NULL, 0);
|
||||
if (err)
|
||||
return -1;
|
||||
}
|
||||
|
||||
status = api->halmac_ctrl_ch_switch(mac, &cs_option);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
if (!nlo)
|
||||
free_halmac_event(d, id_ch_sw);
|
||||
RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n",
|
||||
__FUNCTION__, status);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (!nlo) {
|
||||
err = wait_halmac_event(d, id_ch_sw);
|
||||
if (err)
|
||||
RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n",
|
||||
__FUNCTION__, err);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* rtw_halmac_pno_scanoffload() - Control firmware scan AP function for PNO
|
||||
* @d: struct dvobj_priv*
|
||||
* @enable: 1: enable, 0: disable
|
||||
*
|
||||
* Switch firmware scan AP function for PNO(prefer network offload) or
|
||||
* NLO(network list offload).
|
||||
*
|
||||
* Rteurn 0 for OK, otherwise fail.
|
||||
*/
|
||||
int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable)
|
||||
{
|
||||
return _halmac_scanoffload(d, enable, 1, NULL, 0);
|
||||
}
|
||||
#endif /* CONFIG_PNO_SUPPORT */
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
|
||||
/*
|
||||
|
@ -1,6 +1,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2015 - 2017 Realtek Corporation.
|
||||
* Copyright(c) 2015 - 2018 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
@ -152,6 +152,7 @@ int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct r
|
||||
int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid);
|
||||
int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw);
|
||||
int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop);
|
||||
int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable);
|
||||
|
||||
/* Functions */
|
||||
int rtw_halmac_poweron(struct dvobj_priv *);
|
||||
@ -196,6 +197,10 @@ int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment);
|
||||
int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para);
|
||||
int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode);
|
||||
void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on);
|
||||
int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable);
|
||||
#ifdef CONFIG_PNO_SUPPORT
|
||||
int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
|
||||
|
@ -333,6 +333,13 @@ u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
|
||||
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 1;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
@ -356,6 +363,13 @@ u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
|
||||
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 2;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
@ -380,6 +394,13 @@ u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
|
||||
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 4;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
@ -404,8 +425,14 @@ int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
|
||||
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 1;
|
||||
|
||||
data = val;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
@ -430,8 +457,14 @@ int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
|
||||
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 2;
|
||||
|
||||
data = val;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
@ -458,6 +491,13 @@ int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
|
||||
wvalue = (u16)(addr & 0x0000ffff);
|
||||
len = 4;
|
||||
data = val;
|
||||
|
||||
/* WLANON PAGE0_REG needs to add an offset 0x8000 */
|
||||
#if defined(CONFIG_RTL8710B)
|
||||
if(wvalue >= 0x0000 && wvalue < 0x0100)
|
||||
wvalue |= 0x8000;
|
||||
#endif
|
||||
|
||||
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
|
||||
&data, len, requesttype);
|
||||
|
||||
|
175
hal/hal_intf.c
175
hal/hal_intf.c
@ -28,9 +28,12 @@ const u32 _chip_type_to_odm_ic_type[] = {
|
||||
ODM_RTL8814A,
|
||||
ODM_RTL8703B,
|
||||
ODM_RTL8188F,
|
||||
ODM_RTL8188F,
|
||||
ODM_RTL8822B,
|
||||
ODM_RTL8723D,
|
||||
ODM_RTL8821C,
|
||||
ODM_RTL8710B,
|
||||
ODM_RTL8192F,
|
||||
0,
|
||||
};
|
||||
|
||||
@ -75,13 +78,57 @@ void rtw_hal_read_chip_version(_adapter *padapter)
|
||||
rtw_odm_init_ic_type(padapter);
|
||||
}
|
||||
|
||||
static void rtw_init_wireless_mode(_adapter *padapter)
|
||||
{
|
||||
u8 proto_wireless_mode = 0;
|
||||
struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
|
||||
if(hal_spec->proto_cap & PROTO_CAP_11B)
|
||||
proto_wireless_mode |= WIRELESS_11B;
|
||||
|
||||
if(hal_spec->proto_cap & PROTO_CAP_11G)
|
||||
proto_wireless_mode |= WIRELESS_11G;
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if(hal_spec->band_cap & BAND_CAP_5G)
|
||||
proto_wireless_mode |= WIRELESS_11A;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_80211N_HT
|
||||
if(hal_spec->proto_cap & PROTO_CAP_11N) {
|
||||
|
||||
if(hal_spec->band_cap & BAND_CAP_2G)
|
||||
proto_wireless_mode |= WIRELESS_11_24N;
|
||||
if(hal_spec->band_cap & BAND_CAP_5G)
|
||||
proto_wireless_mode |= WIRELESS_11_5N;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_80211AC_VHT
|
||||
if(hal_spec->proto_cap & PROTO_CAP_11AC)
|
||||
proto_wireless_mode |= WIRELESS_11AC;
|
||||
#endif
|
||||
padapter->registrypriv.wireless_mode &= proto_wireless_mode;
|
||||
}
|
||||
|
||||
void rtw_hal_def_value_init(_adapter *padapter)
|
||||
{
|
||||
if (is_primary_adapter(padapter)) {
|
||||
/*init fw_psmode_iface_id*/
|
||||
adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff;
|
||||
/*wireless_mode*/
|
||||
rtw_init_wireless_mode(padapter);
|
||||
padapter->hal_func.init_default_value(padapter);
|
||||
|
||||
rtw_init_hal_com_default_value(padapter);
|
||||
|
||||
#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
|
||||
adapter_to_dvobj(padapter)->dft.port_id = 0xFF;
|
||||
adapter_to_dvobj(padapter)->dft.mac_id = 0xFF;
|
||||
#endif
|
||||
#ifdef CONFIG_HW_P0_TSF_SYNC
|
||||
adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT;
|
||||
adapter_to_dvobj(padapter)->p0_tsf.offset = 0;
|
||||
#endif
|
||||
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
||||
struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
|
||||
@ -92,6 +139,7 @@ void rtw_hal_def_value_init(_adapter *padapter)
|
||||
dvobj->cam_ctl.sec_cap = hal_spec->sec_cap;
|
||||
dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT);
|
||||
}
|
||||
GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0;
|
||||
}
|
||||
}
|
||||
|
||||
@ -104,6 +152,7 @@ u8 rtw_hal_data_init(_adapter *padapter)
|
||||
RTW_INFO("cant not alloc memory for HAL DATA\n");
|
||||
return _FAIL;
|
||||
}
|
||||
rtw_phydm_priv_init(padapter);
|
||||
}
|
||||
return _SUCCESS;
|
||||
}
|
||||
@ -237,6 +286,57 @@ void rtw_hal_init_opmode(_adapter *padapter)
|
||||
rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_NEW_NETDEV_HDL
|
||||
uint rtw_hal_iface_init(_adapter *adapter)
|
||||
{
|
||||
uint status = _SUCCESS;
|
||||
|
||||
rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
|
||||
#ifdef RTW_HALMAC
|
||||
rtw_hal_hw_port_enable(adapter);
|
||||
#endif
|
||||
rtw_sec_restore_wep_key(adapter);
|
||||
rtw_hal_init_opmode(adapter);
|
||||
rtw_hal_start_thread(adapter);
|
||||
return status;
|
||||
}
|
||||
uint rtw_hal_init(_adapter *padapter)
|
||||
{
|
||||
uint status = _SUCCESS;
|
||||
|
||||
status = padapter->hal_func.hal_init(padapter);
|
||||
|
||||
if (status == _SUCCESS) {
|
||||
rtw_set_hw_init_completed(padapter, _TRUE);
|
||||
if (padapter->registrypriv.notch_filter == 1)
|
||||
rtw_hal_notch_filter(padapter, 1);
|
||||
rtw_led_control(padapter, LED_CTL_POWER_ON);
|
||||
init_hw_mlme_ext(padapter);
|
||||
#ifdef CONFIG_RF_POWER_TRIM
|
||||
rtw_bb_rf_gain_offset(padapter);
|
||||
#endif /*CONFIG_RF_POWER_TRIM*/
|
||||
GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/
|
||||
#ifdef CONFIG_MI_WITH_MBSSID_CAM
|
||||
rtw_mi_set_mbid_cam(padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_SUPPORT_MULTI_BCN
|
||||
rtw_ap_multi_bcn_cfg(padapter);
|
||||
#endif
|
||||
#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
|
||||
#ifdef CONFIG_DYNAMIC_SOML
|
||||
rtw_dyn_soml_config(padapter);
|
||||
#endif
|
||||
#endif
|
||||
#ifdef CONFIG_RTW_TX_2PATH_EN
|
||||
rtw_phydm_tx_2path_en(padapter);
|
||||
#endif
|
||||
} else {
|
||||
rtw_set_hw_init_completed(padapter, _FALSE);
|
||||
RTW_ERR("%s: hal_init fail\n", __func__);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
#else
|
||||
uint rtw_hal_init(_adapter *padapter)
|
||||
{
|
||||
uint status = _SUCCESS;
|
||||
@ -247,7 +347,7 @@ uint rtw_hal_init(_adapter *padapter)
|
||||
|
||||
if (status == _SUCCESS) {
|
||||
rtw_set_hw_init_completed(padapter, _TRUE);
|
||||
rtw_restore_mac_addr(padapter);
|
||||
rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/
|
||||
#ifdef RTW_HALMAC
|
||||
rtw_restore_hw_port_cfg(padapter);
|
||||
#endif
|
||||
@ -267,12 +367,19 @@ uint rtw_hal_init(_adapter *padapter)
|
||||
rtw_bb_rf_gain_offset(padapter);
|
||||
#endif /*CONFIG_RF_POWER_TRIM*/
|
||||
|
||||
#ifdef CONFIG_SUPPORT_MULTI_BCN
|
||||
rtw_ap_multi_bcn_cfg(padapter);
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
|
||||
#ifdef CONFIG_DYNAMIC_SOML
|
||||
rtw_dyn_soml_config(padapter);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTW_TX_2PATH_EN
|
||||
rtw_phydm_tx_2path_en(padapter);
|
||||
#endif
|
||||
} else {
|
||||
rtw_set_hw_init_completed(padapter, _FALSE);
|
||||
RTW_ERR("%s: fail\n", __func__);
|
||||
@ -282,6 +389,7 @@ uint rtw_hal_init(_adapter *padapter)
|
||||
return status;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
uint rtw_hal_deinit(_adapter *padapter)
|
||||
{
|
||||
@ -633,6 +741,23 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr,
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SYSON_INDIRECT_ACCESS
|
||||
u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask)
|
||||
{
|
||||
u32 data = 0;
|
||||
if (padapter->hal_func.read_syson_reg)
|
||||
data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
|
||||
{
|
||||
if (padapter->hal_func.write_syson_reg)
|
||||
padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
s32 rtw_hal_interrupt_handler(_adapter *padapter)
|
||||
{
|
||||
@ -640,6 +765,11 @@ s32 rtw_hal_interrupt_handler(_adapter *padapter)
|
||||
ret = padapter->hal_func.interrupt_handler(padapter);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void rtw_hal_unmap_beacon_icf(_adapter *padapter)
|
||||
{
|
||||
padapter->hal_func.unmap_beacon_icf(padapter);
|
||||
}
|
||||
#endif
|
||||
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
|
||||
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
|
||||
@ -1074,33 +1204,37 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8
|
||||
{
|
||||
struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
|
||||
u16 reg_sleep;
|
||||
u32 *m = &bmp->m0;
|
||||
u32 m;
|
||||
u8 mid = 0;
|
||||
u32 val32;
|
||||
|
||||
do {
|
||||
if (*m == 0)
|
||||
goto move_next;
|
||||
|
||||
if (mid == 0)
|
||||
if (mid == 0) {
|
||||
m = bmp->m0;
|
||||
reg_sleep = macid_ctl->reg_sleep_m0;
|
||||
#if (MACID_NUM_SW_LIMIT > 32)
|
||||
else if (mid == 1)
|
||||
} else if (mid == 1) {
|
||||
m = bmp->m1;
|
||||
reg_sleep = macid_ctl->reg_sleep_m1;
|
||||
#endif
|
||||
#if (MACID_NUM_SW_LIMIT > 64)
|
||||
else if (mid == 2)
|
||||
} else if (mid == 2) {
|
||||
m = bmp->m2;
|
||||
reg_sleep = macid_ctl->reg_sleep_m2;
|
||||
#endif
|
||||
#if (MACID_NUM_SW_LIMIT > 96)
|
||||
else if (mid == 3)
|
||||
} else if (mid == 3) {
|
||||
m = bmp->m3;
|
||||
reg_sleep = macid_ctl->reg_sleep_m3;
|
||||
#endif
|
||||
else {
|
||||
} else {
|
||||
rtw_warn_on(1);
|
||||
break;
|
||||
}
|
||||
|
||||
if (m == 0)
|
||||
goto move_next;
|
||||
|
||||
if (!reg_sleep) {
|
||||
rtw_warn_on(1);
|
||||
break;
|
||||
@ -1109,22 +1243,21 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8
|
||||
val32 = rtw_read32(adapter, reg_sleep);
|
||||
RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n"
|
||||
, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
|
||||
, mid, *m, reg_sleep, val32);
|
||||
, mid, m, reg_sleep, val32);
|
||||
|
||||
if (sleep) {
|
||||
if ((val32 & *m) == *m)
|
||||
if ((val32 & m) == m)
|
||||
goto move_next;
|
||||
val32 |= *m;
|
||||
val32 |= m;
|
||||
} else {
|
||||
if ((val32 & *m) == 0)
|
||||
if ((val32 & m) == 0)
|
||||
goto move_next;
|
||||
val32 &= ~(*m);
|
||||
val32 &= ~m;
|
||||
}
|
||||
|
||||
rtw_write32(adapter, reg_sleep, val32);
|
||||
|
||||
move_next:
|
||||
m++;
|
||||
mid++;
|
||||
} while (mid * 32 < MACID_NUM_SW_LIMIT);
|
||||
|
||||
@ -1204,11 +1337,13 @@ void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FW_CORRECT_BCN
|
||||
void rtw_hal_fw_correct_bcn(_adapter *padapter)
|
||||
{
|
||||
if (padapter->hal_func.fw_correct_bcn)
|
||||
padapter->hal_func.fw_correct_bcn(padapter);
|
||||
}
|
||||
#endif
|
||||
|
||||
void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, enum rf_path rfpath, u8 rate)
|
||||
{
|
||||
@ -1501,20 +1636,18 @@ u8 rtw_hal_ops_check(_adapter *padapter)
|
||||
}
|
||||
#endif
|
||||
|
||||
if ((IS_HARDWARE_TYPE_8814A(padapter)
|
||||
|| IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter))
|
||||
#ifdef CONFIG_FW_CORRECT_BCN
|
||||
if (IS_HARDWARE_TYPE_8814A(padapter)
|
||||
&& NULL == padapter->hal_func.fw_correct_bcn) {
|
||||
rtw_hal_error_msg("fw_correct_bcn");
|
||||
ret = _FAIL;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (IS_HARDWARE_TYPE_8822B(padapter) || IS_HARDWARE_TYPE_8821C(padapter)) {
|
||||
if (!padapter->hal_func.set_tx_power_index_handler) {
|
||||
rtw_hal_error_msg("set_tx_power_index_handler");
|
||||
ret = _FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
if (!padapter->hal_func.get_tx_power_index_handler) {
|
||||
rtw_hal_error_msg("get_tx_power_index_handler");
|
||||
ret = _FAIL;
|
||||
|
505
hal/hal_mcc.c
505
hal/hal_mcc.c
File diff suppressed because it is too large
Load Diff
198
hal/hal_mp.c
198
hal/hal_mp.c
@ -42,9 +42,18 @@
|
||||
#ifdef CONFIG_RTL8723D
|
||||
#include <rtl8723d_hal.h>
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8710B
|
||||
#include <rtl8710b_hal.h>
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188F
|
||||
#include <rtl8188f_hal.h>
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8188GTV
|
||||
#include <rtl8188gtv_hal.h>
|
||||
#endif
|
||||
#ifdef CONFIG_RTL8192F
|
||||
#include <rtl8192f_hal.h>
|
||||
#endif
|
||||
#endif /* !RTW_HALMAC */
|
||||
|
||||
|
||||
@ -145,7 +154,8 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
|
||||
u1Byte DataRate = 0xFF;
|
||||
|
||||
/* Do not modify CCK TX filter parameters for 8822B*/
|
||||
if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) || IS_HARDWARE_TYPE_8723D(Adapter))
|
||||
if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) ||
|
||||
IS_HARDWARE_TYPE_8723D(Adapter) || IS_HARDWARE_TYPE_8192F(Adapter))
|
||||
return;
|
||||
|
||||
DataRate = mpt_to_mgnt_rate(ulRateIdx);
|
||||
@ -183,7 +193,7 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
|
||||
pHalData->RegForRecover[i].value);
|
||||
}
|
||||
}
|
||||
} else if (IS_HARDWARE_TYPE_8188F(Adapter)) {
|
||||
} else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) {
|
||||
/* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/
|
||||
CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
|
||||
CCKSwingIndex = 20; /* default index */
|
||||
@ -320,15 +330,17 @@ void hal_mpt_SetChannel(PADAPTER pAdapter)
|
||||
pHalData->bSwChnl = _TRUE;
|
||||
pHalData->bSetChnlBW = _TRUE;
|
||||
|
||||
if (bandwidth > 0) {
|
||||
if ((channel >= 3 && channel <= 11) || (channel >= 42 && channel <= 171))
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, pmp->prime_channel_offset);
|
||||
else
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
|
||||
#ifdef CONFIG_RTL8822B
|
||||
if (bandwidth == 2) {
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER);
|
||||
} else if (bandwidth == 1) {
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0);
|
||||
} else
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
|
||||
#endif
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0);
|
||||
|
||||
hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14);
|
||||
rtw_btcoex_wifionly_scan_notify(pAdapter);
|
||||
|
||||
}
|
||||
|
||||
@ -347,15 +359,18 @@ void hal_mpt_SetBandwidth(PADAPTER pAdapter)
|
||||
pHalData->bSwChnl = _TRUE;
|
||||
pHalData->bSetChnlBW = _TRUE;
|
||||
|
||||
if (bandwidth > 0) {
|
||||
if ((channel >= 3 && channel <= 11) || (channel >= 42 && channel <= 171))
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, pmp->prime_channel_offset);
|
||||
else
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
|
||||
#ifdef CONFIG_RTL8822B
|
||||
if (bandwidth == 2) {
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER);
|
||||
} else if (bandwidth == 1) {
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0);
|
||||
} else
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
|
||||
#endif
|
||||
rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0);
|
||||
|
||||
hal_mpt_SwitchRfSetting(pAdapter);
|
||||
rtw_btcoex_wifionly_scan_notify(pAdapter);
|
||||
|
||||
}
|
||||
|
||||
void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower)
|
||||
@ -430,7 +445,8 @@ mpt_SetTxPower(
|
||||
|
||||
if (IS_HARDWARE_TYPE_8814A(pAdapter))
|
||||
EndPath = RF_PATH_D;
|
||||
else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
|
||||
else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)
|
||||
|| IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
|
||||
EndPath = RF_PATH_A;
|
||||
|
||||
switch (Rate) {
|
||||
@ -522,7 +538,9 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter)
|
||||
IS_HARDWARE_TYPE_8723B(pAdapter) ||
|
||||
IS_HARDWARE_TYPE_8192E(pAdapter) ||
|
||||
IS_HARDWARE_TYPE_8703B(pAdapter) ||
|
||||
IS_HARDWARE_TYPE_8188F(pAdapter)) {
|
||||
IS_HARDWARE_TYPE_8188F(pAdapter) ||
|
||||
IS_HARDWARE_TYPE_8188GTV(pAdapter)
|
||||
) {
|
||||
u8 path = (pHalData->antenna_tx_path == ANTENNA_A) ? (RF_PATH_A) : (RF_PATH_B);
|
||||
|
||||
RTW_INFO("===> MPT_ProSetTxPower: Old\n");
|
||||
@ -531,12 +549,14 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter)
|
||||
mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel);
|
||||
|
||||
} else {
|
||||
RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n");
|
||||
|
||||
mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel);
|
||||
mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel);
|
||||
mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel);
|
||||
if(IS_HARDWARE_TYPE_JAGUAR(pAdapter)||IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) {
|
||||
RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n");
|
||||
mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel);
|
||||
|
||||
}
|
||||
}
|
||||
} else
|
||||
RTW_INFO("RFChipID < RF_CHIP_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip);
|
||||
@ -556,7 +576,7 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter)
|
||||
|
||||
hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14);
|
||||
#ifdef CONFIG_RTL8723B
|
||||
if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) {
|
||||
if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
|
||||
if (IS_CCK_RATE(DataRate)) {
|
||||
if (pMptCtx->mpt_rf_path == RF_PATH_A)
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6);
|
||||
@ -618,7 +638,6 @@ VOID mpt_SetRFPath_8814A(PADAPTER pAdapter)
|
||||
R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */
|
||||
R_ANTENNA_SELECT_CCK *p_cck_txrx;
|
||||
u8 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
|
||||
u8 HtStbcCap = pAdapter->registrypriv.stbc_cap;
|
||||
/*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/
|
||||
/*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/
|
||||
|
||||
@ -1425,6 +1444,65 @@ VOID mpt_SetRFPath_819X(PADAPTER pAdapter)
|
||||
}
|
||||
} /* MPT_ProSetRFPath */
|
||||
|
||||
#ifdef CONFIG_RTL8192F
|
||||
|
||||
void mpt_set_rfpath_8192f(PADAPTER pAdapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
|
||||
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx);
|
||||
|
||||
u16 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
|
||||
u8 NssforRate, odmNssforRate;
|
||||
u32 ulAntennaTx, ulAntennaRx;
|
||||
u8 RxAntToPhyDm;
|
||||
u8 TxAntToPhyDm;
|
||||
|
||||
ulAntennaTx = pHalData->antenna_tx_path;
|
||||
ulAntennaRx = pHalData->AntennaRxPath;
|
||||
NssforRate = MgntQuery_NssTxRate(ForcedDataRate);
|
||||
|
||||
if (pHalData->rf_chip >= RF_TYPE_MAX)
|
||||
RTW_INFO("This RF chip ID is not supported\n");
|
||||
|
||||
switch (ulAntennaTx) {
|
||||
case ANTENNA_A:
|
||||
pMptCtx->mpt_rf_path = RF_PATH_A;
|
||||
TxAntToPhyDm = BB_PATH_A;
|
||||
break;
|
||||
case ANTENNA_B:
|
||||
pMptCtx->mpt_rf_path = RF_PATH_B;
|
||||
TxAntToPhyDm = BB_PATH_B;
|
||||
break;
|
||||
case ANTENNA_AB:
|
||||
pMptCtx->mpt_rf_path = RF_PATH_AB;
|
||||
TxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
|
||||
break;
|
||||
default:
|
||||
pMptCtx->mpt_rf_path = RF_PATH_AB;
|
||||
TxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
|
||||
break;
|
||||
}
|
||||
|
||||
switch (ulAntennaRx) {
|
||||
case ANTENNA_A:
|
||||
RxAntToPhyDm = BB_PATH_A;
|
||||
break;
|
||||
case ANTENNA_B:
|
||||
RxAntToPhyDm = BB_PATH_B;
|
||||
break;
|
||||
case ANTENNA_AB:
|
||||
RxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
|
||||
break;
|
||||
default:
|
||||
RxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
|
||||
break;
|
||||
}
|
||||
|
||||
config_phydm_trx_mode_8192f(GET_PDM_ODM(pAdapter), TxAntToPhyDm, RxAntToPhyDm, FALSE);
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void hal_mpt_SetAntenna(PADAPTER pAdapter)
|
||||
|
||||
@ -1474,6 +1552,14 @@ void hal_mpt_SetAntenna(PADAPTER pAdapter)
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTL8192F
|
||||
if (IS_HARDWARE_TYPE_8192F(pAdapter)) {
|
||||
mpt_set_rfpath_8192f(pAdapter);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* else if (IS_HARDWARE_TYPE_8821B(pAdapter))
|
||||
mpt_SetRFPath_8821B(pAdapter);
|
||||
Prepare for 8822B
|
||||
@ -1641,6 +1727,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
|
||||
phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF);
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/
|
||||
} else if (IS_HARDWARE_TYPE_8192F(pAdapter)) { /* USB need to do RF LO disable first, PCIE isn't required to follow this order.*/
|
||||
#ifdef CONFIG_RTL8192F
|
||||
phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1);
|
||||
phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1);
|
||||
phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1);
|
||||
phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF);
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
|
||||
if (pMptCtx->mpt_rf_path == RF_PATH_A) {
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/
|
||||
@ -1655,7 +1753,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */
|
||||
}
|
||||
} else if (IS_HARDWARE_TYPE_8188F(pAdapter)) {
|
||||
} else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) {
|
||||
/*Set BB REG 88C: Prevent SingleTone Fail*/
|
||||
phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF);
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1);
|
||||
@ -1752,6 +1850,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */
|
||||
/*/ RESTORE MAC REG 88C: Enable RF Functions*/
|
||||
phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0);
|
||||
} else if (IS_HARDWARE_TYPE_8192F(pAdapter)){
|
||||
#ifdef CONFIG_RTL8192F
|
||||
phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0);
|
||||
phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0);
|
||||
phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0);
|
||||
phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0);
|
||||
phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0);
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/
|
||||
#endif
|
||||
} else if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
|
||||
if (pMptCtx->mpt_rf_path == RF_PATH_A) {
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/
|
||||
@ -1766,7 +1876,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */
|
||||
phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */
|
||||
}
|
||||
} else if (IS_HARDWARE_TYPE_8188F(pAdapter)) {
|
||||
} else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) {
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/
|
||||
phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/
|
||||
/*Set BB REG 88C: Prevent SingleTone Fail*/
|
||||
@ -2056,55 +2166,61 @@ void mpt_ProSetPMacTx(PADAPTER Adapter)
|
||||
dbg_print("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC);
|
||||
PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4);
|
||||
|
||||
PRINT_DATA("Src Address", Adapter->mac_addr, 6);
|
||||
PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6);
|
||||
PRINT_DATA("Src Address", Adapter->mac_addr, ETH_ALEN);
|
||||
PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, ETH_ALEN);
|
||||
#endif
|
||||
if (Adapter->mppriv.pktInterval != 0)
|
||||
PMacTxInfo.PacketPeriod = Adapter->mppriv.pktInterval;
|
||||
if (pmppriv->pktInterval != 0)
|
||||
PMacTxInfo.PacketPeriod = pmppriv->pktInterval;
|
||||
|
||||
if (pmppriv->tx.count != 0)
|
||||
PMacTxInfo.PacketCount = pmppriv->tx.count;
|
||||
|
||||
RTW_INFO("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound);
|
||||
RTW_INFO("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount,
|
||||
PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern);
|
||||
|
||||
if (PMacTxInfo.bEnPMacTx == FALSE) {
|
||||
pmppriv->mode = MP_ON;
|
||||
if (PMacTxInfo.Mode == CONTINUOUS_TX) {
|
||||
if (pMptCtx->HWTxmode == CONTINUOUS_TX) {
|
||||
phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/
|
||||
if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
|
||||
if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index))
|
||||
mpt_StopCckContTx(Adapter);
|
||||
else
|
||||
mpt_StopOfdmContTx(Adapter);
|
||||
} else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) {
|
||||
} else if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) {
|
||||
u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord);
|
||||
phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50);
|
||||
phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/
|
||||
} else
|
||||
phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/
|
||||
|
||||
if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) {
|
||||
if (pMptCtx->HWTxmode == OFDM_Single_Tone_TX) {
|
||||
/* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/
|
||||
if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
|
||||
if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index))
|
||||
mpt_StopCckContTx(Adapter);
|
||||
else
|
||||
mpt_StopOfdmContTx(Adapter);
|
||||
|
||||
mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE);
|
||||
}
|
||||
|
||||
pMptCtx->HWTxmode = TEST_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
pMptCtx->mpt_rate_index = PMacTxInfo.TX_RATE;
|
||||
|
||||
if (PMacTxInfo.Mode == CONTINUOUS_TX) {
|
||||
pmppriv->mode = MP_CONTINUOUS_TX;
|
||||
pMptCtx->HWTxmode = CONTINUOUS_TX;
|
||||
PMacTxInfo.PacketCount = 1;
|
||||
|
||||
hal_mpt_SetTxPower(Adapter);
|
||||
|
||||
if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
|
||||
mpt_StartCckContTx(Adapter);
|
||||
else
|
||||
mpt_StartOfdmContTx(Adapter);
|
||||
} else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) {
|
||||
pmppriv->mode = MP_SINGLE_TONE_TX;
|
||||
/* Continuous TX -> HW TX -> RF Setting */
|
||||
pMptCtx->HWTxmode = OFDM_Single_Tone_TX;
|
||||
PMacTxInfo.PacketCount = 1;
|
||||
|
||||
if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
|
||||
@ -2112,7 +2228,7 @@ void mpt_ProSetPMacTx(PADAPTER Adapter)
|
||||
else
|
||||
mpt_StartOfdmContTx(Adapter);
|
||||
} else if (PMacTxInfo.Mode == PACKETS_TX) {
|
||||
pmppriv->mode = MP_PACKET_TX;
|
||||
pMptCtx->HWTxmode = PACKETS_TX;
|
||||
if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0)
|
||||
PMacTxInfo.PacketCount = 0xffff;
|
||||
}
|
||||
@ -2222,6 +2338,16 @@ void mpt_ProSetPMacTx(PADAPTER Adapter)
|
||||
if (IS_HARDWARE_TYPE_JAGUAR2(Adapter)) {
|
||||
u4Byte offset = 0xb44;
|
||||
|
||||
if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE))
|
||||
phy_set_bb_reg(Adapter, offset, 0xc0000000, 0);
|
||||
else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE))
|
||||
phy_set_bb_reg(Adapter, offset, 0xc0000000, 1);
|
||||
else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE))
|
||||
phy_set_bb_reg(Adapter, offset, 0xc0000000, 2);
|
||||
|
||||
} else if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) {
|
||||
u4Byte offset = 0xb4c;
|
||||
|
||||
if(IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE))
|
||||
phy_set_bb_reg(Adapter, offset, 0xc0000000, 0);
|
||||
else if(IS_MPT_HT_RATE(PMacTxInfo.TX_RATE))
|
||||
|
@ -28,13 +28,19 @@
|
||||
#include <osdep_service.h> /* __BIG_ENDIAN, __LITTLE_ENDIAN, _sema, _mutex */
|
||||
#endif
|
||||
|
||||
/*[Driver] provide the define of _TRUE, _FALSE, NULL, u8, u16, u32*/
|
||||
/*[Driver] provide the define of NULL, u8, u16, u32*/
|
||||
#ifndef NULL
|
||||
#define NULL ((void *)0)
|
||||
#endif
|
||||
|
||||
#define HALMAC_INLINE inline
|
||||
|
||||
/*
|
||||
* Ignore following typedef because Linux already have these
|
||||
* u8, u16, u32, s8, s16, s32
|
||||
* __le16, __le32, __be16, __be32
|
||||
*/
|
||||
|
||||
#define HALMAC_PLATFORM_LITTLE_ENDIAN 1
|
||||
#define HALMAC_PLATFORM_BIG_ENDIAN 0
|
||||
|
||||
|
@ -55,6 +55,7 @@
|
||||
#define EFUSE_SIZE_8822B 1024
|
||||
#define EEPROM_SIZE_8822B 768
|
||||
#define BT_EFUSE_SIZE_8822B 128
|
||||
#define PRTCT_EFUSE_SIZE_8822B 96
|
||||
|
||||
#define SEC_CAM_NUM_8822B 64
|
||||
|
||||
|
@ -37,7 +37,6 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
|
||||
u8 value8;
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
struct halmac_mac_rx_ignore_cfg cfg;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
|
||||
@ -48,28 +47,24 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
|
||||
phy_status_en = 0;
|
||||
sniffer_en = 0;
|
||||
plcp_hdr_en = 0;
|
||||
cfg.hdr_chk_en = _FALSE;
|
||||
break;
|
||||
case HALMAC_DRV_INFO_PHY_STATUS:
|
||||
drv_info_size = 4;
|
||||
phy_status_en = 1;
|
||||
sniffer_en = 0;
|
||||
plcp_hdr_en = 0;
|
||||
cfg.hdr_chk_en = _FALSE;
|
||||
break;
|
||||
case HALMAC_DRV_INFO_PHY_SNIFFER:
|
||||
drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
|
||||
phy_status_en = 1;
|
||||
sniffer_en = 1;
|
||||
plcp_hdr_en = 0;
|
||||
cfg.hdr_chk_en = _FALSE;
|
||||
break;
|
||||
case HALMAC_DRV_INFO_PHY_PLCP:
|
||||
drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
|
||||
phy_status_en = 1;
|
||||
sniffer_en = 0;
|
||||
plcp_hdr_en = 1;
|
||||
cfg.hdr_chk_en = _FALSE;
|
||||
break;
|
||||
default:
|
||||
return HALMAC_RET_SW_CASE_NOT_SUPPORT;
|
||||
@ -79,8 +74,6 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
|
||||
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
|
||||
drv_info_size = RX_DESC_DUMMY_SIZE_8822B >> 3;
|
||||
|
||||
api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
|
||||
|
||||
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_TRXFF_BNDY + 1);
|
||||
@ -127,22 +120,6 @@ void
|
||||
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
|
||||
struct halmac_mac_rx_ignore_cfg *cfg)
|
||||
{
|
||||
u8 value8;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_BBPSF_CTRL);
|
||||
|
||||
/*mac header check enable*/
|
||||
if (cfg->hdr_chk_en == _TRUE)
|
||||
value8 |= BIT_BBPSF_MHCHKEN | BIT_BBPSF_MPDUCHKEN;
|
||||
else
|
||||
value8 &= ~(BIT_BBPSF_MHCHKEN) & (~(BIT_BBPSF_MPDUCHKEN));
|
||||
|
||||
HALMAC_REG_W8(REG_BBPSF_CTRL, value8);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
|
@ -50,6 +50,10 @@ get_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
case HALMAC_HW_FW_MAX_SIZE:
|
||||
*(u32 *)value = WLAN_FW_MAX_SIZE_8822B;
|
||||
break;
|
||||
case HALMAC_HW_SDIO_INT_LAT:
|
||||
break;
|
||||
case HALMAC_HW_SDIO_CLK_CNT:
|
||||
break;
|
||||
default:
|
||||
return HALMAC_RET_PARA_NOT_SUPPORT;
|
||||
}
|
||||
@ -94,14 +98,16 @@ set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
case HALMAC_HW_RXGCK_FIFO:
|
||||
break;
|
||||
case HALMAC_HW_RX_IGNORE:
|
||||
cfg_rx_ignore_8822b(adapter,
|
||||
(struct halmac_mac_rx_ignore_cfg *)value);
|
||||
break;
|
||||
case HALMAC_HW_LDO25_EN:
|
||||
cfg_ldo25_8822b(adapter, *(u8 *)value);
|
||||
break;
|
||||
case HALMAC_HW_PCIE_REF_AUTOK:
|
||||
break;
|
||||
case HALMAC_HW_SDIO_WT_EN:
|
||||
break;
|
||||
case HALMAC_HW_SDIO_CLK_MONITOR:
|
||||
break;
|
||||
default:
|
||||
return HALMAC_RET_PARA_NOT_SUPPORT;
|
||||
}
|
||||
@ -122,8 +128,8 @@ set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
enum halmac_ret_status
|
||||
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
|
||||
{
|
||||
u16 chksum = 0;
|
||||
u16 *data = (u16 *)NULL;
|
||||
__le16 chksum = 0;
|
||||
__le16 *data;
|
||||
u32 i;
|
||||
|
||||
if (!txdesc) {
|
||||
@ -131,12 +137,12 @@ fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
|
||||
return HALMAC_RET_NULL_POINTER;
|
||||
}
|
||||
|
||||
if (adapter->tx_desc_checksum != _TRUE)
|
||||
if (adapter->tx_desc_checksum != 1)
|
||||
PLTFM_MSG_TRACE("[TRACE]chksum disable");
|
||||
|
||||
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000);
|
||||
|
||||
data = (u16 *)(txdesc);
|
||||
data = (__le16 *)(txdesc);
|
||||
|
||||
/* HW clculates only 32byte */
|
||||
for (i = 0; i < 8; i++)
|
||||
@ -144,9 +150,7 @@ fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
|
||||
|
||||
/* *(data + 2 * i) & *(data + (2 * i + 1) have endain issue*/
|
||||
/* Process eniadn issue after checksum calculation */
|
||||
chksum = rtk_le16_to_cpu(chksum);
|
||||
|
||||
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, chksum);
|
||||
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, rtk_le16_to_cpu(chksum));
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
@ -159,7 +163,7 @@ cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable)
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_LDO_EFUSE_CTRL + 3);
|
||||
|
||||
if (enable == _TRUE)
|
||||
if (enable == 1)
|
||||
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 | BIT(7)));
|
||||
else
|
||||
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 & ~BIT(7)));
|
||||
|
@ -314,7 +314,7 @@
|
||||
{HALMAC_SW_IO, HALMAC_GPIO15, HALMAC_GPIO_IN_OUT, \
|
||||
0x40, BIT(1) | BIT(0), 0}
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO0_8822B[] = {
|
||||
GPIO0_BT_GPIO0_8822B,
|
||||
GPIO0_BT_ACT_8822B,
|
||||
GPIO0_WL_ACT_8822B,
|
||||
@ -324,7 +324,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
|
||||
GPIO0_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO1_8822B[] = {
|
||||
GPIO1_BT_GPIO1_8822B,
|
||||
GPIO1_BT_3DD_SYNC_A_8822B,
|
||||
GPIO1_WL_CK_8822B,
|
||||
@ -335,7 +335,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
|
||||
GPIO1_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO2_8822B[] = {
|
||||
GPIO2_BT_GPIO2_8822B,
|
||||
GPIO2_WL_STATE_8822B,
|
||||
GPIO2_BT_STATE_8822B,
|
||||
@ -346,7 +346,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
|
||||
GPIO2_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO3_8822B[] = {
|
||||
GPIO3_BT_GPIO3_8822B,
|
||||
GPIO3_WL_PRI_8822B,
|
||||
GPIO3_BT_PRI_8822B,
|
||||
@ -357,7 +357,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
|
||||
GPIO3_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO4_8822B[] = {
|
||||
GPIO4_BT_SPI_D0_8822B,
|
||||
GPIO4_WL_SPI_D0_8822B,
|
||||
GPIO4_SDIO_INT_8822B,
|
||||
@ -369,7 +369,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
|
||||
GPIO4_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO5_8822B[] = {
|
||||
GPIO5_BT_SPI_D1_8822B,
|
||||
GPIO5_WL_SPI_D1_8822B,
|
||||
GPIO5_JTAG_TDI_8822B,
|
||||
@ -380,7 +380,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
|
||||
GPIO5_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO6_8822B[] = {
|
||||
GPIO6_BT_SPI_D2_8822B,
|
||||
GPIO6_WL_SPI_D2_8822B,
|
||||
GPIO6_EEDO_8822B,
|
||||
@ -394,7 +394,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
|
||||
GPIO6_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO7_8822B[] = {
|
||||
GPIO7_BT_SPI_D3_8822B,
|
||||
GPIO7_WL_SPI_D3_8822B,
|
||||
GPIO7_EEDI_8822B,
|
||||
@ -407,45 +407,45 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
|
||||
GPIO7_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO8_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO8_8822B[] = {
|
||||
GPIO8_WL_EXT_WOL_8822B,
|
||||
GPIO8_WL_LED_8822B,
|
||||
GPIO8_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO9_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO9_8822B[] = {
|
||||
GPIO9_DIS_WL_N_8822B,
|
||||
GPIO9_WL_EXT_WOL_8822B,
|
||||
GPIO9_USCTS0_8822B,
|
||||
GPIO9_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO10_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO10_8822B[] = {
|
||||
GPIO10_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO11_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO11_8822B[] = {
|
||||
GPIO11_DIS_BT_N_8822B,
|
||||
GPIO11_USOUT0_8822B,
|
||||
GPIO11_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO12_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO12_8822B[] = {
|
||||
GPIO12_USIN0_8822B,
|
||||
GPIO12_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO13_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO13_8822B[] = {
|
||||
GPIO13_BT_WAKE_8822B,
|
||||
GPIO13_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO14_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO14_8822B[] = {
|
||||
GPIO14_UART_WAKE_8822B,
|
||||
GPIO14_SW_IO_8822B
|
||||
};
|
||||
|
||||
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO15_8822B[] = {
|
||||
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO15_8822B[] = {
|
||||
GPIO15_EXT_XTAL_8822B,
|
||||
GPIO15_SW_IO_8822B
|
||||
};
|
||||
@ -498,6 +498,10 @@ pinmux_get_func_8822b(struct halmac_adapter *adapter,
|
||||
case HALMAC_GPIO_FUNC_SDIO_INT:
|
||||
*enable = (cur_func == HALMAC_SDIO_INT) ? 1 : 0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
*enable = (cur_func == HALMAC_GPIO13_14_WL_CTRL_EN) ? 1 : 0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_0:
|
||||
case HALMAC_GPIO_FUNC_SW_IO_1:
|
||||
case HALMAC_GPIO_FUNC_SW_IO_2:
|
||||
@ -630,9 +634,13 @@ pinmux_free_func_8822b(struct halmac_adapter *adapter,
|
||||
info->sw_io_12 = 0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_13:
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
info->bt_dev_wake = 0;
|
||||
info->sw_io_13 = 0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_14:
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
info->bt_host_wake = 0;
|
||||
info->sw_io_14 = 0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_15:
|
||||
@ -656,85 +664,87 @@ get_pinmux_list_8822b(struct halmac_adapter *adapter,
|
||||
{
|
||||
switch (gpio_func) {
|
||||
case HALMAC_GPIO_FUNC_SW_IO_0:
|
||||
*list = PIMUX_LIST_GPIO0_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO0_8822B);
|
||||
*list = PINMUX_LIST_GPIO0_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO0_8822B);
|
||||
*gpio_id = HALMAC_GPIO0;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_1:
|
||||
*list = PIMUX_LIST_GPIO1_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO1_8822B);
|
||||
*list = PINMUX_LIST_GPIO1_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO1_8822B);
|
||||
*gpio_id = HALMAC_GPIO1;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_2:
|
||||
*list = PIMUX_LIST_GPIO2_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO2_8822B);
|
||||
*list = PINMUX_LIST_GPIO2_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO2_8822B);
|
||||
*gpio_id = HALMAC_GPIO2;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_3:
|
||||
*list = PIMUX_LIST_GPIO3_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO3_8822B);
|
||||
*list = PINMUX_LIST_GPIO3_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO3_8822B);
|
||||
*gpio_id = HALMAC_GPIO3;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_4:
|
||||
case HALMAC_GPIO_FUNC_SDIO_INT:
|
||||
*list = PIMUX_LIST_GPIO4_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO4_8822B);
|
||||
*list = PINMUX_LIST_GPIO4_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO4_8822B);
|
||||
*gpio_id = HALMAC_GPIO4;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_5:
|
||||
*list = PIMUX_LIST_GPIO5_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO5_8822B);
|
||||
*list = PINMUX_LIST_GPIO5_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO5_8822B);
|
||||
*gpio_id = HALMAC_GPIO5;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_6:
|
||||
*list = PIMUX_LIST_GPIO6_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO6_8822B);
|
||||
*list = PINMUX_LIST_GPIO6_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO6_8822B);
|
||||
*gpio_id = HALMAC_GPIO6;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_7:
|
||||
*list = PIMUX_LIST_GPIO7_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO7_8822B);
|
||||
*list = PINMUX_LIST_GPIO7_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO7_8822B);
|
||||
*gpio_id = HALMAC_GPIO7;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_8:
|
||||
case HALMAC_GPIO_FUNC_WL_LED:
|
||||
*list = PIMUX_LIST_GPIO8_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO8_8822B);
|
||||
*list = PINMUX_LIST_GPIO8_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO8_8822B);
|
||||
*gpio_id = HALMAC_GPIO8;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_9:
|
||||
*list = PIMUX_LIST_GPIO9_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO9_8822B);
|
||||
*list = PINMUX_LIST_GPIO9_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO9_8822B);
|
||||
*gpio_id = HALMAC_GPIO9;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_10:
|
||||
*list = PIMUX_LIST_GPIO10_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO10_8822B);
|
||||
*list = PINMUX_LIST_GPIO10_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO10_8822B);
|
||||
*gpio_id = HALMAC_GPIO10;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_11:
|
||||
*list = PIMUX_LIST_GPIO11_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO11_8822B);
|
||||
*list = PINMUX_LIST_GPIO11_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO11_8822B);
|
||||
*gpio_id = HALMAC_GPIO11;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_12:
|
||||
*list = PIMUX_LIST_GPIO12_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO12_8822B);
|
||||
*list = PINMUX_LIST_GPIO12_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO12_8822B);
|
||||
*gpio_id = HALMAC_GPIO12;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_13:
|
||||
*list = PIMUX_LIST_GPIO13_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO13_8822B);
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
*list = PINMUX_LIST_GPIO13_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO13_8822B);
|
||||
*gpio_id = HALMAC_GPIO13;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_14:
|
||||
*list = PIMUX_LIST_GPIO14_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO14_8822B);
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
*list = PINMUX_LIST_GPIO14_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO14_8822B);
|
||||
*gpio_id = HALMAC_GPIO14;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_15:
|
||||
*list = PIMUX_LIST_GPIO15_8822B;
|
||||
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO15_8822B);
|
||||
*list = PINMUX_LIST_GPIO15_8822B;
|
||||
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO15_8822B);
|
||||
*gpio_id = HALMAC_GPIO15;
|
||||
break;
|
||||
default:
|
||||
@ -786,10 +796,14 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_8:
|
||||
case HALMAC_GPIO_FUNC_WL_LED:
|
||||
if (info->sw_io_8 == 1 || info->wl_led == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_WL_LED:
|
||||
if (info->sw_io_8 == 1 || info->wl_led == 1 ||
|
||||
info->bt_dev_wake == 1 || info->bt_host_wake == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_9:
|
||||
if (info->sw_io_9 == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
@ -807,11 +821,21 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_13:
|
||||
if (info->sw_io_13 == 1)
|
||||
if (info->sw_io_13 == 1 || info->bt_dev_wake == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
if (info->sw_io_13 == 1 || info->bt_dev_wake == 1 ||
|
||||
info->wl_led == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_14:
|
||||
if (info->sw_io_14 == 1)
|
||||
if (info->sw_io_14 == 1 || info->bt_host_wake == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
if (info->sw_io_14 == 1 || info->bt_host_wake == 1 ||
|
||||
info->wl_led == 1)
|
||||
status = HALMAC_RET_PINMUX_USED;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_15:
|
||||
|
@ -15,9 +15,16 @@
|
||||
|
||||
#include "halmac_init_8822b.h"
|
||||
#include "halmac_8822b_cfg.h"
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
#include "halmac_pcie_8822b.h"
|
||||
#endif
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
#include "halmac_sdio_8822b.h"
|
||||
#include "../halmac_sdio_88xx.h"
|
||||
#endif
|
||||
#if HALMAC_USB_SUPPORT
|
||||
#include "halmac_usb_8822b.h"
|
||||
#endif
|
||||
#include "halmac_gpio_8822b.h"
|
||||
#include "halmac_common_8822b.h"
|
||||
#include "halmac_cfg_wmac_8822b.h"
|
||||
@ -26,6 +33,8 @@
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
#define SYS_FUNC_EN 0xDC
|
||||
|
||||
#define RSVD_PG_DRV_NUM 16
|
||||
#define RSVD_PG_H2C_EXTRAINFO_NUM 24
|
||||
#define RSVD_PG_H2C_STATICINFO_NUM 8
|
||||
@ -33,7 +42,8 @@
|
||||
#define RSVD_PG_CPU_INSTRUCTION_NUM 0
|
||||
#define RSVD_PG_FW_TXBUF_NUM 4
|
||||
#define RSVD_PG_CSIBUF_NUM 0
|
||||
#define RSVD_PG_DLLB_NUM 32
|
||||
#define RSVD_PG_DLLB_NUM (TX_FIFO_SIZE_8822B / 3 >> \
|
||||
TX_PAGE_SIZE_SHIFT_88XX)
|
||||
|
||||
#define MAC_TRX_ENABLE (BIT_HCI_TXDMA_EN | BIT_HCI_RXDMA_EN | BIT_TXDMA_EN | \
|
||||
BIT_RXDMA_EN | BIT_PROTOCOL_EN | BIT_SCHEDULE_EN | \
|
||||
@ -41,6 +51,29 @@
|
||||
|
||||
#define BLK_DESC_NUM 0x3
|
||||
|
||||
#define WLAN_SLOT_TIME 0x09
|
||||
#define WLAN_PIFS_TIME 0x19
|
||||
#define WLAN_SIFS_CCK_CONT_TX 0xA
|
||||
#define WLAN_SIFS_OFDM_CONT_TX 0xE
|
||||
#define WLAN_SIFS_CCK_TRX 0x10
|
||||
#define WLAN_SIFS_OFDM_TRX 0x10
|
||||
#define WLAN_VO_TXOP_LIMIT 0x186 /* unit : 32us */
|
||||
#define WLAN_VI_TXOP_LIMIT 0x3BC /* unit : 32us */
|
||||
#define WLAN_RDG_NAV 0x05
|
||||
#define WLAN_TXOP_NAV 0x1B
|
||||
#define WLAN_CCK_RX_TSF 0x30
|
||||
#define WLAN_OFDM_RX_TSF 0x30
|
||||
#define WLAN_TBTT_PROHIBIT 0x04 /* unit : 32us */
|
||||
#define WLAN_TBTT_HOLD_TIME 0x064 /* unit : 32us */
|
||||
#define WLAN_DRV_EARLY_INT 0x04
|
||||
#define WLAN_BCN_DMA_TIME 0x02
|
||||
|
||||
#define WLAN_RX_FILTER0 0x0FFFFFFF
|
||||
#define WLAN_RX_FILTER2 0xFFFF
|
||||
#define WLAN_RCR_CFG 0xE400220E
|
||||
#define WLAN_RXPKT_MAX_SZ 12288
|
||||
#define WLAN_RXPKT_MAX_SZ_512 (WLAN_RXPKT_MAX_SZ >> 9)
|
||||
|
||||
#define WLAN_AMPDU_MAX_TIME 0x70
|
||||
#define WLAN_RTS_LEN_TH 0xFF
|
||||
#define WLAN_RTS_TX_TIME_TH 0x08
|
||||
@ -53,9 +86,26 @@
|
||||
#define WLAN_BAR_RETRY_LIMIT 0x01
|
||||
#define WLAN_RA_TRY_RATE_AGG_LIMIT 0x08
|
||||
|
||||
#define WLAN_TX_FUNC_CFG1 0x30
|
||||
#define WLAN_TX_FUNC_CFG2 0x30
|
||||
#define WLAN_MAC_OPT_NORM_FUNC1 0x98
|
||||
#define WLAN_MAC_OPT_LB_FUNC1 0x80
|
||||
#define WLAN_MAC_OPT_FUNC2 0x30810041
|
||||
|
||||
#define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \
|
||||
(WLAN_SIFS_OFDM_CONT_TX << BIT_SHIFT_SIFS_OFDM_CTX) | \
|
||||
(WLAN_SIFS_CCK_TRX << BIT_SHIFT_SIFS_CCK_TRX) | \
|
||||
(WLAN_SIFS_OFDM_TRX << BIT_SHIFT_SIFS_OFDM_TRX))
|
||||
|
||||
#define WLAN_TBTT_TIME (WLAN_TBTT_PROHIBIT |\
|
||||
(WLAN_TBTT_HOLD_TIME << BIT_SHIFT_TBTT_HOLD_TIME_AP))
|
||||
|
||||
#define WLAN_NAV_CFG (WLAN_RDG_NAV | (WLAN_TXOP_NAV << 16))
|
||||
#define WLAN_RX_TSF_CFG (WLAN_CCK_RX_TSF | (WLAN_OFDM_RX_TSF) << 8)
|
||||
|
||||
#if HALMAC_PLATFORM_WINDOWS
|
||||
/*SDIO RQPN Mapping for Windows, extra queue is not implemented in Driver code*/
|
||||
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
|
||||
@ -78,7 +128,7 @@ struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
};
|
||||
#else
|
||||
/*SDIO RQPN Mapping*/
|
||||
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
|
||||
@ -102,7 +152,7 @@ struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
|
||||
#endif
|
||||
|
||||
/*PCIE RQPN Mapping*/
|
||||
struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
|
||||
@ -125,7 +175,7 @@ struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
|
||||
};
|
||||
|
||||
/*USB 2 Bulkout RQPN Mapping*/
|
||||
struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
|
||||
@ -148,7 +198,7 @@ struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
|
||||
};
|
||||
|
||||
/*USB 3 Bulkout RQPN Mapping*/
|
||||
struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
|
||||
@ -171,7 +221,7 @@ struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
|
||||
};
|
||||
|
||||
/*USB 4 Bulkout RQPN Mapping*/
|
||||
struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
|
||||
static struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
|
||||
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
|
||||
{HALMAC_TRX_MODE_NORMAL,
|
||||
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
|
||||
@ -195,70 +245,70 @@ struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
|
||||
|
||||
#if HALMAC_PLATFORM_WINDOWS
|
||||
/*SDIO Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 0, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 640},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 640},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1},
|
||||
};
|
||||
#else
|
||||
/*SDIO Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
};
|
||||
#endif
|
||||
|
||||
/*PCIE Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
};
|
||||
|
||||
/*USB 2 Bulkout Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 0, 0, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 0, 0, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 0, 0, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1},
|
||||
};
|
||||
|
||||
/*USB 3 Bulkout Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 256, 256, 256, 0, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1},
|
||||
};
|
||||
|
||||
/*USB 4 Bulkout Page Number*/
|
||||
struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
|
||||
static struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
|
||||
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
|
||||
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
|
||||
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
|
||||
};
|
||||
|
||||
static enum halmac_ret_status
|
||||
@ -281,6 +331,7 @@ mount_api_8822b(struct halmac_adapter *adapter)
|
||||
adapter->hw_cfg_info.efuse_size = EFUSE_SIZE_8822B;
|
||||
adapter->hw_cfg_info.eeprom_size = EEPROM_SIZE_8822B;
|
||||
adapter->hw_cfg_info.bt_efuse_size = BT_EFUSE_SIZE_8822B;
|
||||
adapter->hw_cfg_info.prtct_efuse_size = PRTCT_EFUSE_SIZE_8822B;
|
||||
adapter->hw_cfg_info.cam_entry_num = SEC_CAM_NUM_8822B;
|
||||
adapter->hw_cfg_info.tx_fifo_size = TX_FIFO_SIZE_8822B;
|
||||
adapter->hw_cfg_info.rx_fifo_size = RX_FIFO_SIZE_8822B;
|
||||
@ -290,6 +341,7 @@ mount_api_8822b(struct halmac_adapter *adapter)
|
||||
adapter->txff_alloc.rsvd_drv_pg_num = RSVD_PG_DRV_NUM;
|
||||
|
||||
api->halmac_init_trx_cfg = init_trx_cfg_8822b;
|
||||
api->halmac_init_system_cfg = init_system_cfg_8822b;
|
||||
api->halmac_init_protocol_cfg = init_protocol_cfg_8822b;
|
||||
api->halmac_init_h2c = init_h2c_8822b;
|
||||
api->halmac_pinmux_get_func = pinmux_get_func_8822b;
|
||||
@ -300,8 +352,13 @@ mount_api_8822b(struct halmac_adapter *adapter)
|
||||
api->halmac_cfg_drv_info = cfg_drv_info_8822b;
|
||||
api->halmac_fill_txdesc_checksum = fill_txdesc_check_sum_8822b;
|
||||
api->halmac_init_low_pwr = init_low_pwr_8822b;
|
||||
api->halmac_pre_init_system_cfg = pre_init_system_cfg_8822b;
|
||||
|
||||
api->halmac_init_wmac_cfg = init_wmac_cfg_8822b;
|
||||
api->halmac_init_edca_cfg = init_edca_cfg_8822b;
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
api->halmac_mac_power_switch = mac_pwr_switch_sdio_8822b;
|
||||
api->halmac_phy_cfg = phy_cfg_sdio_8822b;
|
||||
api->halmac_pcie_switch = pcie_switch_sdio_8822b;
|
||||
@ -322,16 +379,22 @@ mount_api_8822b(struct halmac_adapter *adapter)
|
||||
if (!adapter->sdio_fs.macid_map)
|
||||
PLTFM_MSG_ERR("[ERR]allocate macid_map!!\n");
|
||||
}
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
|
||||
#if HALMAC_USB_SUPPORT
|
||||
api->halmac_mac_power_switch = mac_pwr_switch_usb_8822b;
|
||||
api->halmac_phy_cfg = phy_cfg_usb_8822b;
|
||||
api->halmac_pcie_switch = pcie_switch_usb_8822b;
|
||||
api->halmac_interface_integration_tuning = intf_tun_usb_8822b;
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
api->halmac_mac_power_switch = mac_pwr_switch_pcie_8822b;
|
||||
api->halmac_phy_cfg = phy_cfg_pcie_8822b;
|
||||
api->halmac_pcie_switch = pcie_switch_8822b;
|
||||
api->halmac_interface_integration_tuning = intf_tun_pcie_8822b;
|
||||
api->halmac_cfgspc_set_pcie = cfgspc_set_pcie_8822b;
|
||||
#endif
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Undefined IC\n");
|
||||
return HALMAC_RET_CHIP_NOT_SUPPORT;
|
||||
@ -625,6 +688,40 @@ set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_system_cfg_8822b() - init system config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_system_cfg_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u32 tmp = 0;
|
||||
u32 value32;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_CPU_DMEM_CON) | BIT_WL_PLATFORM_RST;
|
||||
HALMAC_REG_W32(REG_CPU_DMEM_CON, value32);
|
||||
|
||||
HALMAC_REG_W8(REG_SYS_FUNC_EN + 1, SYS_FUNC_EN);
|
||||
|
||||
/*disable boot-from-flash for driver's DL FW*/
|
||||
tmp = HALMAC_REG_R32(REG_MCUFW_CTRL);
|
||||
if (tmp & BIT_BOOT_FSPI_EN) {
|
||||
HALMAC_REG_W32(REG_MCUFW_CTRL, tmp & (~BIT_BOOT_FSPI_EN));
|
||||
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG) & (~BIT_FSPI_EN);
|
||||
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_protocol_cfg_8822b() - config protocol register
|
||||
* @adapter : the adapter of halmac
|
||||
@ -643,7 +740,7 @@ init_protocol_cfg_8822b(struct halmac_adapter *adapter)
|
||||
HALMAC_REG_W8_CLR(REG_SW_AMPDU_BURST_MODE_CTRL, BIT(6));
|
||||
|
||||
HALMAC_REG_W8(REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME);
|
||||
HALMAC_REG_W8(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
|
||||
HALMAC_REG_W8_SET(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
|
||||
|
||||
value32 = WLAN_RTS_LEN_TH | (WLAN_RTS_TX_TIME_TH << 8) |
|
||||
(WLAN_MAX_AGG_PKT_LIMIT << 16) |
|
||||
@ -721,4 +818,158 @@ init_h2c_8822b(struct halmac_adapter *adapter)
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_edca_cfg_8822b() - init EDCA config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_edca_cfg_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
/* Init SYNC_CLI_SEL : reg 0x5B4[6:4] = 0 */
|
||||
HALMAC_REG_W8_CLR(REG_TIMER0_SRC_SEL, BIT(4) | BIT(5) | BIT(6));
|
||||
|
||||
/* Clear TX pause */
|
||||
HALMAC_REG_W16(REG_TXPAUSE, 0x0000);
|
||||
|
||||
HALMAC_REG_W8(REG_SLOT, WLAN_SLOT_TIME);
|
||||
HALMAC_REG_W8(REG_PIFS, WLAN_PIFS_TIME);
|
||||
HALMAC_REG_W32(REG_SIFS, WLAN_SIFS_CFG);
|
||||
|
||||
HALMAC_REG_W16(REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT);
|
||||
HALMAC_REG_W16(REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT);
|
||||
|
||||
HALMAC_REG_W32(REG_RD_NAV_NXT, WLAN_NAV_CFG);
|
||||
HALMAC_REG_W16(REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
|
||||
|
||||
/* Set beacon cotnrol - enable TSF and other related functions */
|
||||
HALMAC_REG_W8(REG_BCN_CTRL, (u8)(HALMAC_REG_R8(REG_BCN_CTRL) |
|
||||
BIT_EN_BCN_FUNCTION));
|
||||
|
||||
/* Set send beacon related registers */
|
||||
HALMAC_REG_W32(REG_TBTT_PROHIBIT, WLAN_TBTT_TIME);
|
||||
HALMAC_REG_W8(REG_DRVERLYINT, WLAN_DRV_EARLY_INT);
|
||||
HALMAC_REG_W8(REG_BCNDMATIM, WLAN_BCN_DMA_TIME);
|
||||
|
||||
HALMAC_REG_W8_CLR(REG_TX_PTCL_CTRL + 1, BIT(4));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_wmac_cfg_8822b() - init wmac config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_wmac_cfg_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
u8 value8;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_W32(REG_RXFLTMAP0, WLAN_RX_FILTER0);
|
||||
HALMAC_REG_W16(REG_RXFLTMAP2, WLAN_RX_FILTER2);
|
||||
|
||||
HALMAC_REG_W32(REG_RCR, WLAN_RCR_CFG);
|
||||
|
||||
HALMAC_REG_W8(REG_RX_PKT_LIMIT, WLAN_RXPKT_MAX_SZ_512);
|
||||
|
||||
HALMAC_REG_W8(REG_TCR + 2, WLAN_TX_FUNC_CFG2);
|
||||
HALMAC_REG_W8(REG_TCR + 1, WLAN_TX_FUNC_CFG1);
|
||||
|
||||
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2);
|
||||
|
||||
if (adapter->hw_cfg_info.trx_mode == HALMAC_TRNSFER_NORMAL)
|
||||
value8 = WLAN_MAC_OPT_NORM_FUNC1;
|
||||
else
|
||||
value8 = WLAN_MAC_OPT_LB_FUNC1;
|
||||
|
||||
HALMAC_REG_W8(REG_WMAC_OPTION_FUNCTION + 4, value8);
|
||||
|
||||
status = api->halmac_init_low_pwr(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* pre_init_system_cfg_8822b() - pre-init system config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
pre_init_system_cfg_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u8 enable_bb;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_W8(REG_RSV_CTRL, 0);
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
if (leave_sdio_suspend_88xx(adapter) != HALMAC_RET_SUCCESS)
|
||||
return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
|
||||
#if HALMAC_USB_SUPPORT
|
||||
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20)
|
||||
HALMAC_REG_W8(0xFE5B, HALMAC_REG_R8(0xFE5B) | BIT(4));
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
/* For PCIE power on fail issue */
|
||||
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 1,
|
||||
HALMAC_REG_R8(REG_HCI_OPT_CTRL + 1) | BIT(0));
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Config PIN Mux */
|
||||
value32 = HALMAC_REG_R32(REG_PAD_CTRL1);
|
||||
value32 = value32 & (~(BIT(28) | BIT(29)));
|
||||
value32 = value32 | BIT(28) | BIT(29);
|
||||
HALMAC_REG_W32(REG_PAD_CTRL1, value32);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_LED_CFG);
|
||||
value32 = value32 & (~(BIT(25) | BIT(26)));
|
||||
HALMAC_REG_W32(REG_LED_CFG, value32);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG);
|
||||
value32 = value32 & (~(BIT(2)));
|
||||
value32 = value32 | BIT(2);
|
||||
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
|
||||
|
||||
enable_bb = 0;
|
||||
set_hw_value_88xx(adapter, HALMAC_HW_EN_BB_RF, &enable_bb);
|
||||
|
||||
if (HALMAC_REG_R8(REG_SYS_CFG1 + 2) & BIT(4)) {
|
||||
PLTFM_MSG_ERR("[ERR]test mode!!\n");
|
||||
return HALMAC_RET_WLAN_MODE_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT */
|
||||
|
@ -26,12 +26,24 @@ mount_api_8822b(struct halmac_adapter *adapter);
|
||||
enum halmac_ret_status
|
||||
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_system_cfg_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_protocol_cfg_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_h2c_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_edca_cfg_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_wmac_cfg_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
pre_init_system_cfg_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT */
|
||||
|
||||
#endif/* _HALMAC_INIT_8822B_H_ */
|
||||
|
@ -1,214 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "halmac_pcie_8822b.h"
|
||||
#include "halmac_pwr_seq_8822b.h"
|
||||
#include "../halmac_init_88xx.h"
|
||||
#include "../halmac_common_88xx.h"
|
||||
#include "../halmac_pcie_88xx.h"
|
||||
#include "../halmac_88xx_cfg.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
/**
|
||||
* mac_pwr_switch_pcie_8822b() - switch mac power
|
||||
* @adapter : the adapter of halmac
|
||||
* @pwr : power state
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_mac_power pwr)
|
||||
{
|
||||
u8 value8;
|
||||
u8 rpwm;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
PLTFM_MSG_TRACE("[TRACE]pwr = %x\n", pwr);
|
||||
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
|
||||
HALMAC_8822B_PWR_SEQ_VER);
|
||||
|
||||
adapter->rpwm = HALMAC_REG_R8(REG_PCIE_HRPWM1_V1);
|
||||
|
||||
/* Check FW still exist or not */
|
||||
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
|
||||
/* Leave 32K */
|
||||
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
|
||||
HALMAC_REG_W8(REG_PCIE_HRPWM1_V1, rpwm);
|
||||
}
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_CR);
|
||||
if (value8 == 0xEA)
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
|
||||
else
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
|
||||
|
||||
/* Check if power switch is needed */
|
||||
if (pwr == HALMAC_MAC_POWER_ON &&
|
||||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
|
||||
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
|
||||
return HALMAC_RET_PWR_UNCHANGE;
|
||||
}
|
||||
|
||||
if (pwr == HALMAC_MAC_POWER_OFF) {
|
||||
status = trxdma_check_idle_88xx(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
|
||||
return HALMAC_RET_POWER_OFF_FAIL;
|
||||
}
|
||||
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
|
||||
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
|
||||
init_adapter_dynamic_param_88xx(adapter);
|
||||
} else {
|
||||
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
|
||||
return HALMAC_RET_POWER_ON_FAIL;
|
||||
}
|
||||
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
|
||||
* @adapter : the adapter of halmac
|
||||
* @cfg : gen1/gen2 selection
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
|
||||
{
|
||||
u8 value8;
|
||||
u32 value32;
|
||||
u8 speed = 0;
|
||||
u32 cnt = 0;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (cfg == HALMAC_PCIE_GEN1) {
|
||||
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
|
||||
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(0));
|
||||
|
||||
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
|
||||
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
|
||||
|
||||
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
|
||||
cnt = 2000;
|
||||
|
||||
while ((speed != PCIE_GEN1_SPEED) && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(50);
|
||||
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
|
||||
speed &= 0x0F;
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (speed != PCIE_GEN1_SPEED) {
|
||||
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
} else if (cfg == HALMAC_PCIE_GEN2) {
|
||||
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
|
||||
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(1));
|
||||
|
||||
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
|
||||
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
|
||||
|
||||
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
|
||||
cnt = 2000;
|
||||
|
||||
while ((speed != PCIE_GEN2_SPEED) && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(50);
|
||||
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
|
||||
speed &= 0x0F;
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (speed != PCIE_GEN2_SPEED) {
|
||||
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* phy_cfg_pcie_8822b() - phy config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_intf_phy_platform pltfm)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
status = parse_intf_phy_88xx(adapter, pcie_gen1_phy_param_8822b, pltfm,
|
||||
HAL_INTF_PHY_PCIE_GEN1);
|
||||
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
status = parse_intf_phy_88xx(adapter, pcie_gen2_phy_param_8822b, pltfm,
|
||||
HAL_INTF_PHY_PCIE_GEN2);
|
||||
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* intf_tun_pcie_8822b() - pcie interface fine tuning
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : Rick Liu
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
intf_tun_pcie_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT*/
|
@ -1,42 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef _HALMAC_API_8822B_PCIE_H_
|
||||
#define _HALMAC_API_8822B_PCIE_H_
|
||||
|
||||
#include "../../halmac_api.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
extern struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[];
|
||||
extern struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[];
|
||||
|
||||
enum halmac_ret_status
|
||||
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_mac_power pwr);
|
||||
|
||||
enum halmac_ret_status
|
||||
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
|
||||
|
||||
enum halmac_ret_status
|
||||
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_intf_phy_platform pltfm);
|
||||
|
||||
enum halmac_ret_status
|
||||
intf_tun_pcie_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT*/
|
||||
|
||||
#endif/* _HALMAC_API_8822B_PCIE_H_ */
|
@ -14,6 +14,12 @@
|
||||
******************************************************************************/
|
||||
|
||||
#include "../../halmac_type.h"
|
||||
#if HALMAC_USB_SUPPORT
|
||||
#include "halmac_usb_8822b.h"
|
||||
#endif
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
#include "halmac_pcie_8822b.h"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* ============ip sel item list============
|
||||
@ -39,7 +45,7 @@ struct halmac_intf_phy_para usb2_phy_param_8822b[] = {
|
||||
HALMAC_INTF_PHY_PLATFORM_ALL},
|
||||
};
|
||||
|
||||
struct halmac_intf_phy_para usb3_phy_8822b[] = {
|
||||
struct halmac_intf_phy_para usb3_phy_param_8822b[] = {
|
||||
/* {offset, value, ip sel, cut mask, platform mask} */
|
||||
{0x0001, 0xA841,
|
||||
HALMAC_IP_INTF_PHY,
|
||||
|
@ -17,7 +17,7 @@
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0086,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -56,7 +56,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0012,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -190,7 +190,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0003,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -264,7 +264,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -281,11 +281,6 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_PCI_MSK,
|
||||
@ -340,7 +335,12 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
|
||||
HALMAC_PWR_CMD_WRITE, BIT(7) | BIT(6), 0},
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
|
||||
{0x0086,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_SDIO_MSK,
|
||||
@ -399,7 +399,7 @@ struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[] = {
|
||||
|
||||
#if HALMAC_PLATFORM_TESTPROGRAM
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -438,8 +438,18 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0xFF0A,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
|
||||
{0xFF0B,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
@ -467,7 +477,7 @@ struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0007,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -491,7 +501,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0005,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -505,7 +515,7 @@ struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0101,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -534,14 +544,34 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
|
||||
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_INTF_PCI_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x42},
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDE},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_INTF_PCI_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x9B},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0xA},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0090,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
@ -629,7 +659,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0101,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
@ -658,14 +688,34 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
|
||||
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_INTF_PCI_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x40},
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDE},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
HALMAC_PWR_INTF_PCI_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x9B},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_USB_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0093,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0xA},
|
||||
{0x0092,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_SDIO_MSK,
|
||||
HALMAC_PWR_ADDR_MAC,
|
||||
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
|
||||
{0x0090,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
HALMAC_PWR_INTF_ALL_MSK,
|
||||
@ -753,7 +803,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
|
||||
HALMAC_PWR_CMD_END, 0, 0},
|
||||
};
|
||||
|
||||
struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
|
||||
static struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
|
||||
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
|
||||
{0x0080,
|
||||
HALMAC_PWR_CUT_ALL_MSK,
|
||||
|
@ -21,7 +21,7 @@
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
#define HALMAC_8822B_PWR_SEQ_VER "V24"
|
||||
#define HALMAC_8822B_PWR_SEQ_VER "V30"
|
||||
|
||||
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822b[];
|
||||
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[];
|
||||
|
@ -1,868 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "halmac_sdio_8822b.h"
|
||||
#include "halmac_pwr_seq_8822b.h"
|
||||
#include "../halmac_init_88xx.h"
|
||||
#include "../halmac_common_88xx.h"
|
||||
#include "../halmac_sdio_88xx.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
#define WLAN_ACQ_NUM_MAX 8
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
|
||||
u8 macid_cnt);
|
||||
|
||||
static enum halmac_ret_status
|
||||
update_oqt_free_space_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
static enum halmac_ret_status
|
||||
update_sdio_free_page_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
|
||||
u8 *macid_cnt);
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
|
||||
u8 qsel_first);
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
|
||||
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num);
|
||||
|
||||
/**
|
||||
* mac_pwr_switch_sdio_8822b() - switch mac power
|
||||
* @adapter : the adapter of halmac
|
||||
* @pwr : power state
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_mac_power pwr)
|
||||
{
|
||||
u8 value8;
|
||||
u8 rpwm;
|
||||
u32 imr_backup;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
|
||||
HALMAC_8822B_PWR_SEQ_VER);
|
||||
|
||||
adapter->rpwm = HALMAC_REG_R8(REG_SDIO_HRPWM1);
|
||||
|
||||
/* Check FW still exist or not */
|
||||
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
|
||||
/* Leave 32K */
|
||||
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
|
||||
HALMAC_REG_W8(REG_SDIO_HRPWM1, rpwm);
|
||||
}
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_CR);
|
||||
if (value8 == 0xEA)
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
|
||||
else
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
|
||||
|
||||
/*Check if power switch is needed*/
|
||||
if (pwr == HALMAC_MAC_POWER_ON &&
|
||||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
|
||||
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
|
||||
return HALMAC_RET_PWR_UNCHANGE;
|
||||
}
|
||||
|
||||
imr_backup = HALMAC_REG_R32(REG_SDIO_HIMR);
|
||||
HALMAC_REG_W32(REG_SDIO_HIMR, 0);
|
||||
|
||||
if (pwr == HALMAC_MAC_POWER_OFF) {
|
||||
adapter->pwr_off_flow_flag = 1;
|
||||
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
|
||||
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
|
||||
return HALMAC_RET_POWER_OFF_FAIL;
|
||||
}
|
||||
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
|
||||
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
|
||||
adapter->pwr_off_flow_flag = 0;
|
||||
init_adapter_dynamic_param_88xx(adapter);
|
||||
} else {
|
||||
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
|
||||
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
|
||||
return HALMAC_RET_POWER_ON_FAIL;
|
||||
}
|
||||
|
||||
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
|
||||
}
|
||||
|
||||
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_tx_allowed_sdio_88xx() - check tx status
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : tx packet, include txdesc
|
||||
* @size : tx packet size, include txdesc
|
||||
* Author : Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
{
|
||||
u16 *cur_fs = NULL;
|
||||
u32 cnt;
|
||||
u32 tx_agg_num;
|
||||
u32 rqd_pg_num = 0;
|
||||
u8 macid_cnt = 0;
|
||||
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (!fs_info->macid_map) {
|
||||
PLTFM_MSG_ERR("[ERR]halmac allocate Macid_map Fail!!\n");
|
||||
return HALMAC_RET_MALLOC_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MEMSET(fs_info->macid_map, 0x00, fs_info->macid_map_size);
|
||||
|
||||
tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(buf);
|
||||
tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
|
||||
|
||||
status = chk_rqd_page_num_8822b(adapter, buf, &rqd_pg_num, &cur_fs,
|
||||
&macid_cnt, tx_agg_num);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
cnt = 10;
|
||||
do {
|
||||
if ((u32)(*cur_fs + fs_info->pubq_pg_num) > rqd_pg_num) {
|
||||
status = chk_oqt_8822b(adapter, tx_agg_num, buf,
|
||||
macid_cnt);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_WARN("[WARN]oqt buffer full!!\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (*cur_fs >= rqd_pg_num) {
|
||||
*cur_fs -= (u16)rqd_pg_num;
|
||||
} else {
|
||||
fs_info->pubq_pg_num -=
|
||||
(u16)(rqd_pg_num - *cur_fs);
|
||||
*cur_fs = 0;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
update_sdio_free_page_8822b(adapter);
|
||||
|
||||
cnt--;
|
||||
if (cnt == 0)
|
||||
return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
|
||||
} while (1);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_read_8_sdio_88xx() - read 1byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u8
|
||||
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u8 value8;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if ((offset & 0xFFFF0000) == 0) {
|
||||
value8 = (u8)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_BYTE);
|
||||
} else {
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
value8 = PLTFM_SDIO_CMD52_R(offset);
|
||||
}
|
||||
|
||||
return value8;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_write_8_sdio_88xx() - write 1byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
PLTFM_SDIO_CMD52_W(offset, value);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_read_16_sdio_88xx() - read 2byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u16
|
||||
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
union {
|
||||
u16 word;
|
||||
u8 byte[2];
|
||||
} value16 = { 0x0000 };
|
||||
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
return (u16)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_WORD);
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
|
||||
((offset & (2 - 1)) != 0) ||
|
||||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
|
||||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_R) {
|
||||
value16.byte[0] = PLTFM_SDIO_CMD52_R(offset);
|
||||
value16.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
|
||||
value16.word = rtk_le16_to_cpu(value16.word);
|
||||
} else {
|
||||
value16.word = PLTFM_SDIO_CMD53_R16(offset);
|
||||
}
|
||||
|
||||
return value16.word;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_write_16_sdio_88xx() - write 2byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
|
||||
((offset & (2 - 1)) != 0) ||
|
||||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
|
||||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_W) {
|
||||
if ((offset & 0xFFFF0000) == 0 && ((offset & (2 - 1)) == 0)) {
|
||||
status = w_indir_sdio_88xx(adapter, offset, value,
|
||||
HALMAC_IO_WORD);
|
||||
} else {
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
|
||||
PLTFM_SDIO_CMD52_W(offset + 1,
|
||||
(u8)((value & 0xFF00) >> 8));
|
||||
}
|
||||
} else {
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
PLTFM_SDIO_CMD53_W16(offset, value);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_read_32_sdio_88xx() - read 4byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u32
|
||||
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} value32 = { 0x00000000 };
|
||||
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
|
||||
(offset & (4 - 1)) != 0) {
|
||||
value32.byte[0] = PLTFM_SDIO_CMD52_R(offset);
|
||||
value32.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
|
||||
value32.byte[2] = PLTFM_SDIO_CMD52_R(offset + 2);
|
||||
value32.byte[3] = PLTFM_SDIO_CMD52_R(offset + 3);
|
||||
value32.dword = rtk_le32_to_cpu(value32.dword);
|
||||
} else {
|
||||
value32.dword = PLTFM_SDIO_CMD53_R32(offset);
|
||||
}
|
||||
|
||||
return value32.dword;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_reg_write_32_sdio_88xx() - write 4byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
|
||||
(offset & (4 - 1)) != 0) {
|
||||
if ((offset & 0xFFFF0000) == 0 && ((offset & (4 - 1)) == 0)) {
|
||||
status = w_indir_sdio_88xx(adapter, offset, value,
|
||||
HALMAC_IO_DWORD);
|
||||
} else {
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
|
||||
PLTFM_SDIO_CMD52_W(offset + 1,
|
||||
(u8)((value >> 8) & 0xFF));
|
||||
PLTFM_SDIO_CMD52_W(offset + 2,
|
||||
(u8)((value >> 16) & 0xFF));
|
||||
PLTFM_SDIO_CMD52_W(offset + 3,
|
||||
(u8)((value >> 24) & 0xFF));
|
||||
}
|
||||
} else {
|
||||
if ((offset & 0xFFFF0000) == 0)
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
PLTFM_SDIO_CMD53_W32(offset, value);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
|
||||
u8 macid_cnt)
|
||||
{
|
||||
u32 cnt = 10;
|
||||
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
|
||||
|
||||
/*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
|
||||
/*no need to check non_ac_oqt_number*/
|
||||
/*HI and MGQ blocked will cause protocal issue before H_OQT being full*/
|
||||
switch ((enum halmac_qsel)GET_TX_DESC_QSEL(buf)) {
|
||||
case HALMAC_QSEL_VO:
|
||||
case HALMAC_QSEL_VO_V2:
|
||||
case HALMAC_QSEL_VI:
|
||||
case HALMAC_QSEL_VI_V2:
|
||||
case HALMAC_QSEL_BE:
|
||||
case HALMAC_QSEL_BE_V2:
|
||||
case HALMAC_QSEL_BK:
|
||||
case HALMAC_QSEL_BK_V2:
|
||||
if (macid_cnt > WLAN_ACQ_NUM_MAX &&
|
||||
tx_agg_num > OQT_ENTRY_AC_8822B) {
|
||||
PLTFM_MSG_WARN("[WARN]txagg num %d > oqt entry\n",
|
||||
tx_agg_num);
|
||||
PLTFM_MSG_WARN("[WARN]macid cnt %d > acq max\n",
|
||||
macid_cnt);
|
||||
}
|
||||
|
||||
cnt = 10;
|
||||
do {
|
||||
if (fs_info->ac_empty >= macid_cnt) {
|
||||
fs_info->ac_empty -= macid_cnt;
|
||||
break;
|
||||
}
|
||||
|
||||
if (fs_info->ac_oqt_num >= tx_agg_num) {
|
||||
fs_info->ac_empty = 0;
|
||||
fs_info->ac_oqt_num -= (u8)tx_agg_num;
|
||||
break;
|
||||
}
|
||||
|
||||
update_oqt_free_space_8822b(adapter);
|
||||
|
||||
cnt--;
|
||||
if (cnt == 0)
|
||||
return HALMAC_RET_OQT_NOT_ENOUGH;
|
||||
} while (1);
|
||||
break;
|
||||
case HALMAC_QSEL_MGNT:
|
||||
case HALMAC_QSEL_HIGH:
|
||||
if (tx_agg_num > OQT_ENTRY_NOAC_8822B)
|
||||
PLTFM_MSG_WARN("[WARN]tx_agg_num %d > oqt entry\n",
|
||||
tx_agg_num, OQT_ENTRY_NOAC_8822B);
|
||||
|
||||
cnt = 10;
|
||||
do {
|
||||
if (fs_info->non_ac_oqt_num >= tx_agg_num) {
|
||||
fs_info->non_ac_oqt_num -= (u8)tx_agg_num;
|
||||
break;
|
||||
}
|
||||
|
||||
update_oqt_free_space_8822b(adapter);
|
||||
|
||||
cnt--;
|
||||
if (cnt == 0)
|
||||
return HALMAC_RET_OQT_NOT_ENOUGH;
|
||||
} while (1);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
update_oqt_free_space_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
|
||||
u8 value;
|
||||
u32 oqt_free_page;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
oqt_free_page = HALMAC_REG_R32(REG_SDIO_OQT_FREE_TXPG_V1);
|
||||
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(oqt_free_page);
|
||||
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page);
|
||||
fs_info->ac_empty = 0;
|
||||
if (fs_info->ac_oqt_num == OQT_ENTRY_AC_8822B) {
|
||||
value = HALMAC_REG_R8(REG_TXPKT_EMPTY);
|
||||
while (value > 0) {
|
||||
value = value & (value - 1);
|
||||
fs_info->ac_empty++;
|
||||
};
|
||||
} else {
|
||||
PLTFM_MSG_TRACE("[TRACE]free_space->ac_oqt_num %d != %d\n",
|
||||
fs_info->ac_oqt_num, OQT_ENTRY_AC_8822B);
|
||||
}
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
update_sdio_free_page_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 free_page = 0;
|
||||
u32 free_page2 = 0;
|
||||
u32 free_page3 = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
|
||||
u8 data[12] = {0};
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_SDIO_RN(REG_SDIO_FREE_TXPG, 12, data);
|
||||
|
||||
free_page = rtk_le32_to_cpu(*(u32 *)(data + 0));
|
||||
free_page2 = rtk_le32_to_cpu(*(u32 *)(data + 4));
|
||||
free_page3 = rtk_le32_to_cpu(*(u32 *)(data + 8));
|
||||
|
||||
fs_info->hiq_pg_num = (u16)BIT_GET_HIQ_FREEPG_V1(free_page);
|
||||
fs_info->miq_pg_num = (u16)BIT_GET_MID_FREEPG_V1(free_page);
|
||||
fs_info->lowq_pg_num = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
|
||||
fs_info->pubq_pg_num = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
|
||||
fs_info->exq_pg_num = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
|
||||
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(free_page3);
|
||||
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(free_page3);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* phy_cfg_sdio_8822b() - phy config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_intf_phy_platform pltfm)
|
||||
{
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_pcie_switch_8821c() - pcie gen1/gen2 switch
|
||||
* @adapter : the adapter of halmac
|
||||
* @cfg : gen1/gen2 selection
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_pcie_cfg cfg)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* intf_tun_sdio_8822b() - sdio interface fine tuning
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : Ivan
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
intf_tun_sdio_8822b(struct halmac_adapter *adapter)
|
||||
{
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_get_sdio_tx_addr_sdio_88xx() - get CMD53 addr for the TX packet
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : tx packet, include txdesc
|
||||
* @size : tx packet size
|
||||
* @cmd53_addr : cmd53 addr value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u32 *cmd53_addr)
|
||||
{
|
||||
u32 len_unit4;
|
||||
enum halmac_qsel queue_sel;
|
||||
enum halmac_dma_mapping dma_mapping;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (!buf) {
|
||||
PLTFM_MSG_ERR("[ERR]buf is NULL!!\n");
|
||||
return HALMAC_RET_DATA_BUF_NULL;
|
||||
}
|
||||
|
||||
if (size == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]size is 0!!\n");
|
||||
return HALMAC_RET_DATA_SIZE_INCORRECT;
|
||||
}
|
||||
|
||||
queue_sel = (enum halmac_qsel)GET_TX_DESC_QSEL(buf);
|
||||
|
||||
switch (queue_sel) {
|
||||
case HALMAC_QSEL_VO:
|
||||
case HALMAC_QSEL_VO_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
|
||||
break;
|
||||
case HALMAC_QSEL_VI:
|
||||
case HALMAC_QSEL_VI_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
|
||||
break;
|
||||
case HALMAC_QSEL_BE:
|
||||
case HALMAC_QSEL_BE_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
|
||||
break;
|
||||
case HALMAC_QSEL_BK:
|
||||
case HALMAC_QSEL_BK_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
|
||||
break;
|
||||
case HALMAC_QSEL_MGNT:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
|
||||
break;
|
||||
case HALMAC_QSEL_HIGH:
|
||||
case HALMAC_QSEL_BCN:
|
||||
case HALMAC_QSEL_CMD:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
|
||||
return HALMAC_RET_QSEL_INCORRECT;
|
||||
}
|
||||
|
||||
len_unit4 = (size >> 2) + ((size & (4 - 1)) ? 1 : 0);
|
||||
|
||||
switch (dma_mapping) {
|
||||
case HALMAC_DMA_MAPPING_HIGH:
|
||||
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_HIGH;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_NORMAL:
|
||||
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_NORMAL;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_LOW:
|
||||
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_LOW;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_EXTRA:
|
||||
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_EXTRA;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
|
||||
return HALMAC_RET_DMA_MAP_INCORRECT;
|
||||
}
|
||||
|
||||
*cmd53_addr = (*cmd53_addr << 13) |
|
||||
(len_unit4 & HALMAC_SDIO_4BYTE_LEN_MASK);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
|
||||
u8 *macid_cnt)
|
||||
{
|
||||
u8 flag = 0;
|
||||
u8 qsel_now;
|
||||
u8 macid;
|
||||
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
|
||||
|
||||
macid = (u8)GET_TX_DESC_MACID(pkt);
|
||||
qsel_now = (u8)GET_TX_DESC_QSEL(pkt);
|
||||
if (qsel_first == qsel_now) {
|
||||
if (*(fs_info->macid_map + macid) == 0) {
|
||||
*(fs_info->macid_map + macid) = 1;
|
||||
(*macid_cnt)++;
|
||||
}
|
||||
} else {
|
||||
switch ((enum halmac_qsel)qsel_now) {
|
||||
case HALMAC_QSEL_VO:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO_V2)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_VO_V2:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_VI:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI_V2)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_VI_V2:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_BE:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE_V2)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_BE_V2:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_BK:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK_V2)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_BK_V2:
|
||||
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK)
|
||||
flag = 1;
|
||||
break;
|
||||
case HALMAC_QSEL_MGNT:
|
||||
case HALMAC_QSEL_HIGH:
|
||||
case HALMAC_QSEL_BCN:
|
||||
case HALMAC_QSEL_CMD:
|
||||
flag = 1;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
|
||||
return HALMAC_RET_QSEL_INCORRECT;
|
||||
}
|
||||
if (flag == 1) {
|
||||
PLTFM_MSG_ERR("[ERR]Multi-Qsel is not allowed\n");
|
||||
PLTFM_MSG_ERR("[ERR]qsel = %d, %d\n",
|
||||
qsel_first, qsel_now);
|
||||
return HALMAC_RET_QSEL_INCORRECT;
|
||||
}
|
||||
if (*(fs_info->macid_map + macid + MACID_MAX_8822B) == 0) {
|
||||
*(fs_info->macid_map + macid + MACID_MAX_8822B) = 1;
|
||||
(*macid_cnt)++;
|
||||
}
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
|
||||
u8 qsel_first)
|
||||
{
|
||||
enum halmac_dma_mapping dma_mapping;
|
||||
|
||||
switch ((enum halmac_qsel)qsel_first) {
|
||||
case HALMAC_QSEL_VO:
|
||||
case HALMAC_QSEL_VO_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
|
||||
break;
|
||||
case HALMAC_QSEL_VI:
|
||||
case HALMAC_QSEL_VI_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
|
||||
break;
|
||||
case HALMAC_QSEL_BE:
|
||||
case HALMAC_QSEL_BE_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
|
||||
break;
|
||||
case HALMAC_QSEL_BK:
|
||||
case HALMAC_QSEL_BK_V2:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
|
||||
break;
|
||||
case HALMAC_QSEL_MGNT:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
|
||||
break;
|
||||
case HALMAC_QSEL_HIGH:
|
||||
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
|
||||
break;
|
||||
case HALMAC_QSEL_BCN:
|
||||
case HALMAC_QSEL_CMD:
|
||||
return HALMAC_RET_SUCCESS;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]Qsel is out of range: %d\n", qsel_first);
|
||||
return HALMAC_RET_QSEL_INCORRECT;
|
||||
}
|
||||
|
||||
switch (dma_mapping) {
|
||||
case HALMAC_DMA_MAPPING_HIGH:
|
||||
*cur_fs = &adapter->sdio_fs.hiq_pg_num;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_NORMAL:
|
||||
*cur_fs = &adapter->sdio_fs.miq_pg_num;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_LOW:
|
||||
*cur_fs = &adapter->sdio_fs.lowq_pg_num;
|
||||
break;
|
||||
case HALMAC_DMA_MAPPING_EXTRA:
|
||||
*cur_fs = &adapter->sdio_fs.exq_pg_num;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
|
||||
return HALMAC_RET_DMA_MAP_INCORRECT;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
|
||||
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num)
|
||||
{
|
||||
u8 *pkt;
|
||||
u8 qsel_first;
|
||||
u32 i;
|
||||
u32 pkt_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
pkt = buf;
|
||||
|
||||
qsel_first = (u8)GET_TX_DESC_QSEL(pkt);
|
||||
|
||||
status = chk_dma_mapping_8822b(adapter, cur_fs, qsel_first);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
for (i = 0; i < tx_agg_num; i++) {
|
||||
/*QSEL parser*/
|
||||
status = chk_qsel_8822b(adapter, qsel_first, pkt, macid_cnt);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
/*Page number parser*/
|
||||
pkt_size = GET_TX_DESC_TXPKTSIZE(pkt) + GET_TX_DESC_OFFSET(pkt);
|
||||
*rqd_pg_num += (pkt_size >> TX_PAGE_SIZE_SHIFT_88XX) +
|
||||
((pkt_size & (TX_PAGE_SIZE_88XX - 1)) ? 1 : 0);
|
||||
|
||||
pkt += HALMAC_ALIGN(GET_TX_DESC_TXPKTSIZE(pkt) +
|
||||
(GET_TX_DESC_PKT_OFFSET(pkt) << 3) +
|
||||
TX_DESC_SIZE_88XX, 8);
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT*/
|
@ -1,66 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef _HALMAC_API_8822B_SDIO_H_
|
||||
#define _HALMAC_API_8822B_SDIO_H_
|
||||
|
||||
#include "../../halmac_api.h"
|
||||
#include "halmac_8822b_cfg.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
|
||||
enum halmac_ret_status
|
||||
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_mac_power pwr);
|
||||
|
||||
enum halmac_ret_status
|
||||
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size);
|
||||
|
||||
u8
|
||||
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value);
|
||||
|
||||
u16
|
||||
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value);
|
||||
|
||||
u32
|
||||
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value);
|
||||
|
||||
enum halmac_ret_status
|
||||
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_intf_phy_platform pltfm);
|
||||
|
||||
enum halmac_ret_status
|
||||
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
|
||||
enum halmac_pcie_cfg cfg);
|
||||
|
||||
enum halmac_ret_status
|
||||
intf_tun_sdio_8822b(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u32 *cmd53_addr);
|
||||
|
||||
#endif /* HALMAC_8822B_SUPPORT*/
|
||||
|
||||
#endif/* _HALMAC_API_8822B_SDIO_H_ */
|
@ -18,7 +18,7 @@
|
||||
#include "../halmac_init_88xx.h"
|
||||
#include "../halmac_common_88xx.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
#if (HALMAC_8822B_SUPPORT && HALMAC_USB_SUPPORT)
|
||||
|
||||
/**
|
||||
* mac_pwr_switch_usb_8822b() - switch mac power
|
||||
@ -118,7 +118,7 @@ phy_cfg_usb_8822b(struct halmac_adapter *adapter,
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
status = parse_intf_phy_88xx(adapter, usb3_phy_8822b, pltfm,
|
||||
status = parse_intf_phy_88xx(adapter, usb3_phy_param_8822b, pltfm,
|
||||
HAL_INTF_PHY_USB3);
|
||||
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
|
@ -18,10 +18,10 @@
|
||||
|
||||
#include "../../halmac_api.h"
|
||||
|
||||
#if HALMAC_8822B_SUPPORT
|
||||
#if (HALMAC_8822B_SUPPORT && HALMAC_USB_SUPPORT)
|
||||
|
||||
extern struct halmac_intf_phy_para usb2_phy_param_8822b[];
|
||||
extern struct halmac_intf_phy_para usb3_phy_8822b[];
|
||||
extern struct halmac_intf_phy_para usb3_phy_param_8822b[];
|
||||
|
||||
enum halmac_ret_status
|
||||
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,
|
||||
|
@ -56,7 +56,7 @@ start_iqk_88xx(struct halmac_adapter *adapter, struct halmac_iqk_para *param)
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_IQK;
|
||||
hdr_info.content_size = 1;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
adapter->halmac_state.iqk_state.seq_num = seq_num;
|
||||
@ -116,16 +116,19 @@ ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
|
||||
PWR_TRK_SET_TSSI_VALUE_A(h2c_buf, param->tssi_value);
|
||||
PWR_TRK_SET_OFFSET_VALUE_A(h2c_buf, param->pwr_tracking_offset_value);
|
||||
|
||||
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_B];
|
||||
PWR_TRK_SET_ENABLE_B(h2c_buf, param->enable);
|
||||
PWR_TRK_SET_TX_PWR_INDEX_B(h2c_buf, param->tx_pwr_index);
|
||||
PWR_TRK_SET_TSSI_VALUE_B(h2c_buf, param->tssi_value);
|
||||
PWR_TRK_SET_OFFSET_VALUE_B(h2c_buf, param->pwr_tracking_offset_value);
|
||||
|
||||
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_C];
|
||||
PWR_TRK_SET_ENABLE_C(h2c_buf, param->enable);
|
||||
PWR_TRK_SET_TX_PWR_INDEX_C(h2c_buf, param->tx_pwr_index);
|
||||
PWR_TRK_SET_TSSI_VALUE_C(h2c_buf, param->tssi_value);
|
||||
PWR_TRK_SET_OFFSET_VALUE_C(h2c_buf, param->pwr_tracking_offset_value);
|
||||
|
||||
param = &opt->pwr_tracking_para[HALMAC_RF_PATH_D];
|
||||
PWR_TRK_SET_ENABLE_D(h2c_buf, param->enable);
|
||||
PWR_TRK_SET_TX_PWR_INDEX_D(h2c_buf, param->tx_pwr_index);
|
||||
PWR_TRK_SET_TSSI_VALUE_D(h2c_buf, param->tssi_value);
|
||||
@ -133,7 +136,7 @@ ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_PWR_TRK;
|
||||
hdr_info.content_size = 20;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
adapter->halmac_state.pwr_trk_state.seq_num = seq_num;
|
||||
@ -243,7 +246,7 @@ psd_88xx(struct halmac_adapter *adapter, u16 start_psd, u16 end_psd)
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_PSD;
|
||||
hdr_info.content_size = 4;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
status = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
@ -377,7 +380,7 @@ get_psd_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
PLTFM_MEMCPY(state->data + seg_id * state->seg_size,
|
||||
buf + C2H_DATA_OFFSET_88XX, seg_size);
|
||||
|
||||
if (PSD_DATA_GET_END_SEGMENT(buf) == _FALSE)
|
||||
if (PSD_DATA_GET_END_SEGMENT(buf) == 0)
|
||||
return HALMAC_RET_SUCCESS;
|
||||
|
||||
proc_status = HALMAC_CMD_PROCESS_DONE;
|
||||
|
@ -15,10 +15,12 @@
|
||||
|
||||
#include "halmac_cfg_wmac_88xx.h"
|
||||
#include "halmac_88xx_cfg.h"
|
||||
#include "halmac_efuse_88xx.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
|
||||
#define MAC_CLK_SPEED 80 /* 80M */
|
||||
#define EFUSE_PCB_INFO_OFFSET 0xCA
|
||||
|
||||
enum mac_clock_hw_def {
|
||||
MAC_CLK_HW_DEF_80M = 0,
|
||||
@ -26,6 +28,9 @@ enum mac_clock_hw_def {
|
||||
MAC_CLK_HW_DEF_20M = 2,
|
||||
};
|
||||
|
||||
static enum halmac_ret_status
|
||||
board_rf_fine_tune_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
/**
|
||||
* cfg_mac_addr_88xx() - config mac address
|
||||
* @adapter : the adapter of halmac
|
||||
@ -39,8 +44,7 @@ enum halmac_ret_status
|
||||
cfg_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
union halmac_wlan_addr *addr)
|
||||
{
|
||||
u16 mac_addr_h;
|
||||
u32 mac_addr_l;
|
||||
u32 offset;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
@ -50,37 +54,29 @@ cfg_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
mac_addr_l = addr->addr_l_h.low;
|
||||
mac_addr_h = addr->addr_l_h.high;
|
||||
|
||||
mac_addr_l = rtk_le32_to_cpu(mac_addr_l);
|
||||
mac_addr_h = rtk_le16_to_cpu(mac_addr_h);
|
||||
|
||||
switch (port) {
|
||||
case HALMAC_PORTID0:
|
||||
HALMAC_REG_W32(REG_MACID, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_MACID + 4, mac_addr_h);
|
||||
offset = REG_MACID;
|
||||
break;
|
||||
case HALMAC_PORTID1:
|
||||
HALMAC_REG_W32(REG_MACID1, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_MACID1 + 4, mac_addr_h);
|
||||
offset = REG_MACID1;
|
||||
break;
|
||||
case HALMAC_PORTID2:
|
||||
HALMAC_REG_W32(REG_MACID2, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_MACID2 + 4, mac_addr_h);
|
||||
offset = REG_MACID2;
|
||||
break;
|
||||
case HALMAC_PORTID3:
|
||||
HALMAC_REG_W32(REG_MACID3, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_MACID3 + 4, mac_addr_h);
|
||||
offset = REG_MACID3;
|
||||
break;
|
||||
case HALMAC_PORTID4:
|
||||
HALMAC_REG_W32(REG_MACID4, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_MACID4 + 4, mac_addr_h);
|
||||
offset = REG_MACID4;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
HALMAC_REG_W32(offset, rtk_le32_to_cpu(addr->addr_l_h.low));
|
||||
HALMAC_REG_W16(offset + 4, rtk_le16_to_cpu(addr->addr_l_h.high));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
@ -99,8 +95,7 @@ enum halmac_ret_status
|
||||
cfg_bssid_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
union halmac_wlan_addr *addr)
|
||||
{
|
||||
u16 bssid_addr_h;
|
||||
u32 bssid_addr_l;
|
||||
u32 offset;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
@ -110,37 +105,29 @@ cfg_bssid_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
bssid_addr_l = addr->addr_l_h.low;
|
||||
bssid_addr_h = addr->addr_l_h.high;
|
||||
|
||||
bssid_addr_l = rtk_le32_to_cpu(bssid_addr_l);
|
||||
bssid_addr_h = rtk_le16_to_cpu(bssid_addr_h);
|
||||
|
||||
switch (port) {
|
||||
case HALMAC_PORTID0:
|
||||
HALMAC_REG_W32(REG_BSSID, bssid_addr_l);
|
||||
HALMAC_REG_W16(REG_BSSID + 4, bssid_addr_h);
|
||||
offset = REG_BSSID;
|
||||
break;
|
||||
case HALMAC_PORTID1:
|
||||
HALMAC_REG_W32(REG_BSSID1, bssid_addr_l);
|
||||
HALMAC_REG_W16(REG_BSSID1 + 4, bssid_addr_h);
|
||||
offset = REG_BSSID1;
|
||||
break;
|
||||
case HALMAC_PORTID2:
|
||||
HALMAC_REG_W32(REG_BSSID2, bssid_addr_l);
|
||||
HALMAC_REG_W16(REG_BSSID2 + 4, bssid_addr_h);
|
||||
offset = REG_BSSID2;
|
||||
break;
|
||||
case HALMAC_PORTID3:
|
||||
HALMAC_REG_W32(REG_BSSID3, bssid_addr_l);
|
||||
HALMAC_REG_W16(REG_BSSID3 + 4, bssid_addr_h);
|
||||
offset = REG_BSSID3;
|
||||
break;
|
||||
case HALMAC_PORTID4:
|
||||
HALMAC_REG_W32(REG_BSSID4, bssid_addr_l);
|
||||
HALMAC_REG_W16(REG_BSSID4 + 4, bssid_addr_h);
|
||||
offset = REG_BSSID4;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
HALMAC_REG_W32(offset, rtk_le32_to_cpu(addr->addr_l_h.low));
|
||||
HALMAC_REG_W16(offset + 4, rtk_le16_to_cpu(addr->addr_l_h.high));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
@ -158,8 +145,7 @@ enum halmac_ret_status
|
||||
cfg_transmitter_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
union halmac_wlan_addr *addr)
|
||||
{
|
||||
u16 mac_addr_h;
|
||||
u32 mac_addr_l;
|
||||
u32 offset;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
@ -169,37 +155,29 @@ cfg_transmitter_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
mac_addr_l = addr->addr_l_h.low;
|
||||
mac_addr_h = addr->addr_l_h.high;
|
||||
|
||||
mac_addr_l = rtk_le32_to_cpu(mac_addr_l);
|
||||
mac_addr_h = rtk_le16_to_cpu(mac_addr_h);
|
||||
|
||||
switch (port) {
|
||||
case HALMAC_PORTID0:
|
||||
HALMAC_REG_W32(REG_TRANSMIT_ADDRSS_0, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_TRANSMIT_ADDRSS_0 + 4, mac_addr_h);
|
||||
offset = REG_TRANSMIT_ADDRSS_0;
|
||||
break;
|
||||
case HALMAC_PORTID1:
|
||||
HALMAC_REG_W32(REG_TRANSMIT_ADDRSS_1, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_TRANSMIT_ADDRSS_1 + 4, mac_addr_h);
|
||||
offset = REG_TRANSMIT_ADDRSS_1;
|
||||
break;
|
||||
case HALMAC_PORTID2:
|
||||
HALMAC_REG_W32(REG_TRANSMIT_ADDRSS_2, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_TRANSMIT_ADDRSS_2 + 4, mac_addr_h);
|
||||
offset = REG_TRANSMIT_ADDRSS_2;
|
||||
break;
|
||||
case HALMAC_PORTID3:
|
||||
HALMAC_REG_W32(REG_TRANSMIT_ADDRSS_3, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_TRANSMIT_ADDRSS_3 + 4, mac_addr_h);
|
||||
offset = REG_TRANSMIT_ADDRSS_3;
|
||||
break;
|
||||
case HALMAC_PORTID4:
|
||||
HALMAC_REG_W32(REG_TRANSMIT_ADDRSS_4, mac_addr_l);
|
||||
HALMAC_REG_W16(REG_TRANSMIT_ADDRSS_4 + 4, mac_addr_h);
|
||||
offset = REG_TRANSMIT_ADDRSS_4;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
HALMAC_REG_W32(offset, rtk_le32_to_cpu(addr->addr_l_h.low));
|
||||
HALMAC_REG_W16(offset + 4, rtk_le16_to_cpu(addr->addr_l_h.high));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
@ -380,48 +358,43 @@ rw_bcn_ctrl_88xx(struct halmac_adapter *adapter, u8 port, u8 write_en,
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (write_en) {
|
||||
if (ctrl->dis_rx_bssid_fit == _TRUE)
|
||||
if (ctrl->dis_rx_bssid_fit == 1)
|
||||
ctrl_value |= BIT_DIS_RX_BSSID_FIT;
|
||||
|
||||
if (ctrl->en_txbcn_rpt == _TRUE)
|
||||
if (ctrl->en_txbcn_rpt == 1)
|
||||
ctrl_value |= BIT_P0_EN_TXBCN_RPT;
|
||||
|
||||
if (ctrl->dis_tsf_udt == _TRUE)
|
||||
if (ctrl->dis_tsf_udt == 1)
|
||||
ctrl_value |= BIT_DIS_TSF_UDT;
|
||||
|
||||
if (ctrl->en_bcn == _TRUE)
|
||||
if (ctrl->en_bcn == 1)
|
||||
ctrl_value |= BIT_EN_BCN_FUNCTION;
|
||||
|
||||
if (ctrl->en_rxbcn_rpt == _TRUE)
|
||||
if (ctrl->en_rxbcn_rpt == 1)
|
||||
ctrl_value |= BIT_P0_EN_RXBCN_RPT;
|
||||
|
||||
if (ctrl->en_p2p_ctwin == _TRUE)
|
||||
if (ctrl->en_p2p_ctwin == 1)
|
||||
ctrl_value |= BIT_EN_P2P_CTWINDOW;
|
||||
|
||||
if (ctrl->en_p2p_bcn_area == _TRUE)
|
||||
if (ctrl->en_p2p_bcn_area == 1)
|
||||
ctrl_value |= BIT_EN_P2P_BCNQ_AREA;
|
||||
|
||||
switch (port) {
|
||||
case HALMAC_PORTID0:
|
||||
HALMAC_REG_W8(REG_BCN_CTRL, ctrl_value);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID1:
|
||||
HALMAC_REG_W8(REG_BCN_CTRL_CLINT0, ctrl_value);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID2:
|
||||
HALMAC_REG_W8(REG_BCN_CTRL_CLINT1, ctrl_value);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID3:
|
||||
HALMAC_REG_W8(REG_BCN_CTRL_CLINT2, ctrl_value);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID4:
|
||||
HALMAC_REG_W8(REG_BCN_CTRL_CLINT3, ctrl_value);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -431,61 +404,56 @@ rw_bcn_ctrl_88xx(struct halmac_adapter *adapter, u8 port, u8 write_en,
|
||||
case HALMAC_PORTID0:
|
||||
ctrl_value = HALMAC_REG_R8(REG_BCN_CTRL);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID1:
|
||||
ctrl_value = HALMAC_REG_R8(REG_BCN_CTRL_CLINT0);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID2:
|
||||
ctrl_value = HALMAC_REG_R8(REG_BCN_CTRL_CLINT1);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID3:
|
||||
ctrl_value = HALMAC_REG_R8(REG_BCN_CTRL_CLINT2);
|
||||
break;
|
||||
|
||||
case HALMAC_PORTID4:
|
||||
ctrl_value = HALMAC_REG_R8(REG_BCN_CTRL_CLINT3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (ctrl_value & BIT_EN_P2P_BCNQ_AREA)
|
||||
ctrl->en_p2p_bcn_area = _TRUE;
|
||||
ctrl->en_p2p_bcn_area = 1;
|
||||
else
|
||||
ctrl->en_p2p_bcn_area = _FALSE;
|
||||
ctrl->en_p2p_bcn_area = 0;
|
||||
|
||||
if (ctrl_value & BIT_EN_P2P_CTWINDOW)
|
||||
ctrl->en_p2p_ctwin = _TRUE;
|
||||
ctrl->en_p2p_ctwin = 1;
|
||||
else
|
||||
ctrl->en_p2p_ctwin = _FALSE;
|
||||
ctrl->en_p2p_ctwin = 0;
|
||||
|
||||
if (ctrl_value & BIT_P0_EN_RXBCN_RPT)
|
||||
ctrl->en_rxbcn_rpt = _TRUE;
|
||||
ctrl->en_rxbcn_rpt = 1;
|
||||
else
|
||||
ctrl->en_rxbcn_rpt = _FALSE;
|
||||
ctrl->en_rxbcn_rpt = 0;
|
||||
|
||||
if (ctrl_value & BIT_EN_BCN_FUNCTION)
|
||||
ctrl->en_bcn = _TRUE;
|
||||
ctrl->en_bcn = 1;
|
||||
else
|
||||
ctrl->en_bcn = _FALSE;
|
||||
ctrl->en_bcn = 0;
|
||||
|
||||
if (ctrl_value & BIT_DIS_TSF_UDT)
|
||||
ctrl->dis_tsf_udt = _TRUE;
|
||||
ctrl->dis_tsf_udt = 1;
|
||||
else
|
||||
ctrl->dis_tsf_udt = _FALSE;
|
||||
ctrl->dis_tsf_udt = 0;
|
||||
|
||||
if (ctrl_value & BIT_P0_EN_TXBCN_RPT)
|
||||
ctrl->en_txbcn_rpt = _TRUE;
|
||||
ctrl->en_txbcn_rpt = 1;
|
||||
else
|
||||
ctrl->en_txbcn_rpt = _FALSE;
|
||||
ctrl->en_txbcn_rpt = 0;
|
||||
|
||||
if (ctrl_value & BIT_DIS_RX_BSSID_FIT)
|
||||
ctrl->dis_rx_bssid_fit = _TRUE;
|
||||
ctrl->dis_rx_bssid_fit = 1;
|
||||
else
|
||||
ctrl->dis_rx_bssid_fit = _FALSE;
|
||||
ctrl->dis_rx_bssid_fit = 0;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
@ -505,20 +473,12 @@ enum halmac_ret_status
|
||||
cfg_multicast_addr_88xx(struct halmac_adapter *adapter,
|
||||
union halmac_wlan_addr *addr)
|
||||
{
|
||||
u16 addr_h;
|
||||
u32 addr_l;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
addr_l = addr->addr_l_h.low;
|
||||
addr_h = addr->addr_l_h.high;
|
||||
|
||||
addr_l = rtk_le32_to_cpu(addr_l);
|
||||
addr_h = rtk_le16_to_cpu(addr_h);
|
||||
|
||||
HALMAC_REG_W32(REG_MAR, addr_l);
|
||||
HALMAC_REG_W16(REG_MAR + 4, addr_h);
|
||||
HALMAC_REG_W32(REG_MAR, rtk_le32_to_cpu(addr->addr_l_h.low));
|
||||
HALMAC_REG_W16(REG_MAR + 4, rtk_le16_to_cpu(addr->addr_l_h.high));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
@ -628,10 +588,10 @@ cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw)
|
||||
|
||||
switch (bw) {
|
||||
case HALMAC_BW_80:
|
||||
value32 = value32 | BIT(7);
|
||||
value32 |= BIT(8);
|
||||
break;
|
||||
case HALMAC_BW_40:
|
||||
value32 = value32 | BIT(8);
|
||||
value32 |= BIT(7);
|
||||
break;
|
||||
case HALMAC_BW_20:
|
||||
case HALMAC_BW_10:
|
||||
@ -643,13 +603,7 @@ cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw)
|
||||
|
||||
HALMAC_REG_W32(REG_WMAC_TRXPTCL_CTL, value32);
|
||||
|
||||
/* TODO:Move to change mac clk api later... */
|
||||
value32 = HALMAC_REG_R32(REG_AFE_CTRL1) & ~(BIT(20) | BIT(21));
|
||||
value32 |= (MAC_CLK_HW_DEF_80M << BIT_SHIFT_MAC_CLK_SEL);
|
||||
HALMAC_REG_W32(REG_AFE_CTRL1, value32);
|
||||
|
||||
HALMAC_REG_W8(REG_USTIME_TSF, MAC_CLK_SPEED);
|
||||
HALMAC_REG_W8(REG_USTIME_EDCA, MAC_CLK_SPEED);
|
||||
cfg_mac_clk_88xx(adapter);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
@ -657,13 +611,38 @@ cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw)
|
||||
}
|
||||
|
||||
void
|
||||
enable_bb_rf_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
cfg_txfifo_lt_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_txfifo_lifetime_cfg *cfg)
|
||||
{
|
||||
u8 value8;
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
if (cfg->enable == 1) {
|
||||
value8 = HALMAC_REG_R8(REG_LIFETIME_EN);
|
||||
value8 = value8 | BIT(0) | BIT(1) | BIT(2) | BIT(3);
|
||||
HALMAC_REG_W8(REG_LIFETIME_EN, value8);
|
||||
|
||||
value32 = (cfg->lifetime) >> 8;
|
||||
value32 = value32 + (value32 << 16);
|
||||
HALMAC_REG_W32(REG_PKT_LIFE_TIME, value32);
|
||||
} else {
|
||||
value8 = HALMAC_REG_R8(REG_LIFETIME_EN);
|
||||
value8 = value8 & (~(BIT(0) | BIT(1) | BIT(2) | BIT(3)));
|
||||
HALMAC_REG_W8(REG_LIFETIME_EN, value8);
|
||||
}
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
enable_bb_rf_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
{
|
||||
u8 value8;
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (enable == 1) {
|
||||
status = board_rf_fine_tune_88xx(adapter);
|
||||
value8 = HALMAC_REG_R8(REG_SYS_FUNC_EN);
|
||||
value8 = value8 | BIT(0) | BIT(1);
|
||||
HALMAC_REG_W8(REG_SYS_FUNC_EN, value8);
|
||||
@ -688,6 +667,59 @@ enable_bb_rf_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
value32 = value32 & (~(BIT(24) | BIT(25) | BIT(26)));
|
||||
HALMAC_REG_W32(REG_WLRF1, value32);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
board_rf_fine_tune_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u8 *map = NULL;
|
||||
u32 size = adapter->hw_cfg_info.eeprom_size;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
if (adapter->chip_id == HALMAC_CHIP_ID_8822B) {
|
||||
if (!adapter->efuse_map_valid || !adapter->efuse_map) {
|
||||
PLTFM_MSG_ERR("[ERR]efuse map invalid!!\n");
|
||||
return HALMAC_RET_EFUSE_R_FAIL;
|
||||
}
|
||||
|
||||
map = (u8 *)PLTFM_MALLOC(size);
|
||||
if (!map) {
|
||||
PLTFM_MSG_ERR("[ERR]malloc map\n");
|
||||
return HALMAC_RET_MALLOC_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MEMSET(map, 0xFF, size);
|
||||
|
||||
if (eeprom_parser_88xx(adapter, adapter->efuse_map, map) !=
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_FREE(map, size);
|
||||
return HALMAC_RET_EEPROM_PARSING_FAIL;
|
||||
}
|
||||
|
||||
/* Fine-tune XTAL voltage for 2L PCB board */
|
||||
if (*(map + EFUSE_PCB_INFO_OFFSET) == 0x0C)
|
||||
HALMAC_REG_W8_SET(REG_AFE_CTRL1 + 1, BIT(1));
|
||||
|
||||
PLTFM_FREE(map, size);
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
void
|
||||
cfg_mac_clk_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_AFE_CTRL1) & ~(BIT(20) | BIT(21));
|
||||
value32 |= (MAC_CLK_HW_DEF_80M << BIT_SHIFT_MAC_CLK_SEL);
|
||||
HALMAC_REG_W32(REG_AFE_CTRL1, value32);
|
||||
|
||||
HALMAC_REG_W8(REG_USTIME_TSF, MAC_CLK_SPEED);
|
||||
HALMAC_REG_W8(REG_USTIME_EDCA, MAC_CLK_SPEED);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -753,11 +785,10 @@ config_security_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_W16(REG_CR, (u16)(HALMAC_REG_R16(REG_CR) | BIT_MAC_SEC_EN));
|
||||
HALMAC_REG_W16_SET(REG_CR, BIT_MAC_SEC_EN);
|
||||
|
||||
if (setting->compare_keyid == 1) {
|
||||
sec_cfg = HALMAC_REG_R8(REG_SECCFG + 1) | BIT(0);
|
||||
HALMAC_REG_W8(REG_SECCFG + 1, sec_cfg);
|
||||
HALMAC_REG_W8_SET(REG_SECCFG + 1, BIT(0));
|
||||
adapter->hw_cfg_info.chk_security_keyid = 1;
|
||||
} else {
|
||||
adapter->hw_cfg_info.chk_security_keyid = 0;
|
||||
@ -784,7 +815,7 @@ config_security_88xx(struct halmac_adapter *adapter,
|
||||
if (setting->bip_enable == 1) {
|
||||
if (adapter->chip_id == HALMAC_CHIP_ID_8822B)
|
||||
return HALMAC_RET_BIP_NO_SUPPORT;
|
||||
#if HALMAC_8821C_SUPPORT
|
||||
#if (HALMAC_8821C_SUPPORT || HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
|
||||
sec_cfg = HALMAC_REG_R8(REG_WSEC_OPTION + 2);
|
||||
|
||||
if (setting->tx_encryption == 1)
|
||||
@ -1054,7 +1085,7 @@ rx_clk_gate_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_RCR + 2);
|
||||
|
||||
if (enable == _TRUE)
|
||||
if (enable == 1)
|
||||
HALMAC_REG_W8(REG_RCR + 2, value8 & ~(BIT(3)));
|
||||
else
|
||||
HALMAC_REG_W8(REG_RCR + 2, value8 | BIT(3));
|
||||
@ -1154,15 +1185,26 @@ get_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
return HALMAC_RET_PORT_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
mac_addr_l = rtk_le32_to_cpu(mac_addr_l);
|
||||
mac_addr_h = rtk_le16_to_cpu(mac_addr_h);
|
||||
|
||||
addr->addr_l_h.low = mac_addr_l;
|
||||
addr->addr_l_h.high = mac_addr_h;
|
||||
addr->addr_l_h.low = rtk_cpu_to_le32(mac_addr_l);
|
||||
addr->addr_l_h.high = rtk_cpu_to_le16(mac_addr_h);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
void
|
||||
rts_full_bw_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
{
|
||||
u8 value8;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_INIRTS_RATE_SEL);
|
||||
|
||||
if (enable == 1)
|
||||
HALMAC_REG_W8(REG_INIRTS_RATE_SEL, value8 | BIT(5));
|
||||
else
|
||||
HALMAC_REG_W8(REG_INIRTS_RATE_SEL, value8 & ~(BIT(5)));
|
||||
}
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
@ -68,6 +68,10 @@ enum halmac_ret_status
|
||||
cfg_bw_88xx(struct halmac_adapter *adapter, enum halmac_bw bw);
|
||||
|
||||
void
|
||||
cfg_txfifo_lt_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_txfifo_lifetime_cfg *cfg);
|
||||
|
||||
enum halmac_ret_status
|
||||
enable_bb_rf_88xx(struct halmac_adapter *adapter, u8 enable);
|
||||
|
||||
enum halmac_ret_status
|
||||
@ -118,6 +122,12 @@ enum halmac_ret_status
|
||||
get_mac_addr_88xx(struct halmac_adapter *adapter, u8 port,
|
||||
union halmac_wlan_addr *addr);
|
||||
|
||||
void
|
||||
rts_full_bw_88xx(struct halmac_adapter *adapter, u8 enable);
|
||||
|
||||
void
|
||||
cfg_mac_clk_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
#endif/* HALMAC_88XX_SUPPORT */
|
||||
|
||||
#endif/* _HALMAC_CFG_WMAC_88XX_H_ */
|
||||
|
@ -19,9 +19,15 @@
|
||||
#include "halmac_cfg_wmac_88xx.h"
|
||||
#include "halmac_efuse_88xx.h"
|
||||
#include "halmac_bb_rf_88xx.h"
|
||||
#if HALMAC_USB_SUPPORT
|
||||
#include "halmac_usb_88xx.h"
|
||||
#endif
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
#include "halmac_sdio_88xx.h"
|
||||
#endif
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
#include "halmac_pcie_88xx.h"
|
||||
#endif
|
||||
#include "halmac_mimo_88xx.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
@ -202,6 +208,14 @@ wlhdr_data_valid_88xx(struct halmac_adapter *adapter,
|
||||
static void
|
||||
dump_reg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
static u8
|
||||
packet_in_nlo_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_packet_id pkt_id);
|
||||
|
||||
static enum halmac_packet_id
|
||||
get_real_pkt_id_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_packet_id pkt_id);
|
||||
|
||||
/**
|
||||
* ofld_func_cfg_88xx() - config offload function
|
||||
* @adapter : the adapter of halmac
|
||||
@ -301,7 +315,7 @@ dl_rsvd_page_88xx(struct halmac_adapter *adapter, u16 pg_addr, u8 *buf,
|
||||
value8 = (u8)(value8 & ~(BIT(6)));
|
||||
HALMAC_REG_W8(REG_FWHW_TXQ_CTRL + 2, value8);
|
||||
|
||||
if (PLTFM_SEND_RSVD_PAGE(buf, size) == _FALSE) {
|
||||
if (PLTFM_SEND_RSVD_PAGE(buf, size) == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]send rvsd pg(pltfm)!!\n");
|
||||
status = HALMAC_RET_DL_RSVD_PAGE_FAIL;
|
||||
goto DL_RSVD_PG_END;
|
||||
@ -455,8 +469,9 @@ enum halmac_ret_status
|
||||
set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
void *value)
|
||||
{
|
||||
enum halmac_ret_status status;
|
||||
struct halmac_tx_page_threshold_info *tx_th_info;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
struct halmac_tx_page_threshold_info *th_info = NULL;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
@ -466,12 +481,14 @@ set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
}
|
||||
|
||||
switch (hw_id) {
|
||||
#if HALMAC_USB_SUPPORT
|
||||
case HALMAC_HW_USB_MODE:
|
||||
status = set_usb_mode_88xx(adapter,
|
||||
*(enum halmac_usb_mode *)value);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
break;
|
||||
#endif
|
||||
case HALMAC_HW_BANDWIDTH:
|
||||
cfg_bw_88xx(adapter, *(enum halmac_bw *)value);
|
||||
break;
|
||||
@ -482,12 +499,20 @@ set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
cfg_pri_ch_idx_88xx(adapter, *(enum halmac_pri_ch_idx *)value);
|
||||
break;
|
||||
case HALMAC_HW_EN_BB_RF:
|
||||
enable_bb_rf_88xx(adapter, *(u8 *)value);
|
||||
status = enable_bb_rf_88xx(adapter, *(u8 *)value);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
break;
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
case HALMAC_HW_SDIO_TX_PAGE_THRESHOLD:
|
||||
tx_th_info = (struct halmac_tx_page_threshold_info *)value;
|
||||
cfg_sdio_tx_page_threshold_88xx(adapter, tx_th_info);
|
||||
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
|
||||
th_info = (struct halmac_tx_page_threshold_info *)value;
|
||||
cfg_sdio_tx_page_threshold_88xx(adapter, th_info);
|
||||
} else {
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
case HALMAC_HW_RX_SHIFT:
|
||||
rx_shift_88xx(adapter, *(u8 *)value);
|
||||
break;
|
||||
@ -501,6 +526,15 @@ set_hw_value_88xx(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
|
||||
fast_edca_cfg_88xx(adapter,
|
||||
(struct halmac_fast_edca_cfg *)value);
|
||||
break;
|
||||
case HALMAC_HW_RTS_FULL_BW:
|
||||
rts_full_bw_88xx(adapter, *(u8 *)value);
|
||||
break;
|
||||
case HALMAC_HW_FREE_CNT_EN:
|
||||
HALMAC_REG_W8_SET(REG_MISC_CTRL, BIT_EN_FREECNT);
|
||||
break;
|
||||
case HALMAC_HW_TXFIFO_LIFETIME:
|
||||
cfg_txfifo_lt_88xx(adapter,
|
||||
(struct halmac_txfifo_lifetime_cfg *)value);
|
||||
default:
|
||||
return HALMAC_RET_PARA_NOT_SUPPORT;
|
||||
}
|
||||
@ -531,8 +565,8 @@ set_h2c_pkt_hdr_88xx(struct halmac_adapter *adapter, u8 *hdr,
|
||||
(adapter->h2c_info.seq_num)++;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->h2c_seq_mutex);
|
||||
|
||||
if (info->ack == _TRUE)
|
||||
FW_OFFLOAD_H2C_SET_ACK(hdr, _TRUE);
|
||||
if (info->ack == 1)
|
||||
FW_OFFLOAD_H2C_SET_ACK(hdr, 1);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
@ -554,7 +588,7 @@ send_h2c_pkt_88xx(struct halmac_adapter *adapter, u8 *pkt)
|
||||
|
||||
cnt = 100;
|
||||
do {
|
||||
if (PLTFM_SEND_H2C_PKT(pkt, H2C_PKT_SIZE_88XX) == _TRUE)
|
||||
if (PLTFM_SEND_H2C_PKT(pkt, H2C_PKT_SIZE_88XX) == 1)
|
||||
break;
|
||||
cnt--;
|
||||
if (cnt == 0) {
|
||||
@ -578,8 +612,8 @@ get_h2c_buf_free_space_88xx(struct halmac_adapter *adapter)
|
||||
struct halmac_h2c_info *info = &adapter->h2c_info;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
hw_wptr = HALMAC_REG_R32(REG_H2C_PKT_WRITEADDR) & BIT_MASK_H2C_WR_ADDR;
|
||||
fw_rptr = HALMAC_REG_R32(REG_H2C_PKT_READADDR) & BIT_MASK_H2C_READ_ADDR;
|
||||
hw_wptr = HALMAC_REG_R32(REG_H2C_PKT_WRITEADDR) & 0x3FFFF;
|
||||
fw_rptr = HALMAC_REG_R32(REG_H2C_PKT_READADDR) & 0x3FFFF;
|
||||
|
||||
if (hw_wptr >= fw_rptr)
|
||||
info->buf_fs = info->buf_size - (hw_wptr - fw_rptr);
|
||||
@ -594,6 +628,9 @@ get_h2c_buf_free_space_88xx(struct halmac_adapter *adapter)
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : RX Packet pointer
|
||||
* @size : RX Packet size
|
||||
*
|
||||
* Note : Don't use any IO or DELAY in this API
|
||||
*
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
*
|
||||
* Used to process c2h packet info from RX path. After receiving the packet,
|
||||
@ -607,7 +644,7 @@ get_c2h_info_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (GET_RX_DESC_C2H(buf) == _TRUE) {
|
||||
if (GET_RX_DESC_C2H(buf) == 1) {
|
||||
PLTFM_MSG_TRACE("[TRACE]Parse c2h pkt\n");
|
||||
|
||||
status = parse_c2h_pkt_88xx(adapter, buf, size);
|
||||
@ -623,7 +660,8 @@ get_c2h_info_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
static enum halmac_ret_status
|
||||
parse_c2h_pkt_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
{
|
||||
u8 cmd_id, sub_cmd_id;
|
||||
u8 cmd_id;
|
||||
u8 sub_cmd_id;
|
||||
u8 *c2h_pkt = buf + adapter->hw_cfg_info.rxdesc_size;
|
||||
u32 c2h_size = size - adapter->hw_cfg_info.rxdesc_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
@ -732,7 +770,8 @@ _ENDFOUND:
|
||||
static enum halmac_ret_status
|
||||
get_h2c_ack_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
{
|
||||
u8 cmd_id, sub_cmd_id;
|
||||
u8 cmd_id;
|
||||
u8 sub_cmd_id;
|
||||
u8 fw_rc;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
@ -960,11 +999,10 @@ get_h2c_ack_ch_switch_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
}
|
||||
|
||||
/**
|
||||
* mac_debug_88xx() - dump debug information
|
||||
* @adapter : the adapter of halmac
|
||||
* mac_debug_88xx_v1() - read some registers for debug
|
||||
* @adapter
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
mac_debug_88xx(struct halmac_adapter *adapter)
|
||||
@ -1054,7 +1092,7 @@ dump_reg_88xx(struct halmac_adapter *adapter)
|
||||
* @info : cmd id, content
|
||||
* @full_fifo : parameter information
|
||||
*
|
||||
* If msk_en = _TRUE, the format of array is {reg_info, mask, value}.
|
||||
* If msk_en = 1, the format of array is {reg_info, mask, value}.
|
||||
* If msk_en =_FAUSE, the format of array is {reg_info, value}
|
||||
* The format of reg_info is
|
||||
* reg_info[31]=rf_reg, 0: MAC_BB reg, 1: RF reg
|
||||
@ -1062,7 +1100,7 @@ dump_reg_88xx(struct halmac_adapter *adapter)
|
||||
* if rf_reg=0(MAC_BB reg), rf_path is meaningless.
|
||||
* ref_info[15:0]=offset
|
||||
*
|
||||
* Example: msk_en = _FALSE
|
||||
* Example: msk_en = 0
|
||||
* {0x8100000a, 0x00001122}
|
||||
* =>Set RF register, path_B, offset 0xA to 0x00001122
|
||||
* {0x00000824, 0x11224433}
|
||||
@ -1124,7 +1162,7 @@ static enum halmac_ret_status
|
||||
proc_cfg_param_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_phy_parameter_info *param, u8 full_fifo)
|
||||
{
|
||||
u8 end_cmd = _FALSE;
|
||||
u8 end_cmd = 0;
|
||||
u32 rsvd_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
struct halmac_cfg_param_info *info = &adapter->cfg_param_info;
|
||||
@ -1137,8 +1175,12 @@ proc_cfg_param_88xx(struct halmac_adapter *adapter,
|
||||
return status;
|
||||
|
||||
if (cnv_cfg_param_state_88xx(adapter, HALMAC_CMD_CNSTR_CNSTR) !=
|
||||
HALMAC_RET_SUCCESS)
|
||||
HALMAC_RET_SUCCESS) {
|
||||
PLTFM_FREE(info->buf, info->buf_size);
|
||||
info->buf = NULL;
|
||||
info->buf_wptr = NULL;
|
||||
return HALMAC_RET_ERROR_STATE;
|
||||
}
|
||||
|
||||
add_param_buf_88xx(adapter, param, info->buf_wptr, &end_cmd);
|
||||
if (param->cmd_id != HALMAC_PARAMETER_CMD_END) {
|
||||
@ -1148,7 +1190,7 @@ proc_cfg_param_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
rsvd_size = info->avl_buf_size - adapter->hw_cfg_info.txdesc_size;
|
||||
if (rsvd_size > CFG_PARAM_H2C_INFO_SIZE && end_cmd == _FALSE)
|
||||
if (rsvd_size > CFG_PARAM_H2C_INFO_SIZE && end_cmd == 0)
|
||||
return HALMAC_RET_SUCCESS;
|
||||
|
||||
if (info->num == 0) {
|
||||
@ -1166,10 +1208,16 @@ proc_cfg_param_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
status = send_cfg_param_h2c_88xx(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
if (info->buf) {
|
||||
PLTFM_FREE(info->buf, info->buf_size);
|
||||
info->buf = NULL;
|
||||
info->buf_wptr = NULL;
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
if (end_cmd == _FALSE) {
|
||||
if (end_cmd == 0) {
|
||||
PLTFM_MSG_TRACE("[TRACE]send h2c-buf full\n");
|
||||
return HALMAC_RET_PARA_SENDING;
|
||||
}
|
||||
@ -1197,7 +1245,7 @@ send_cfg_param_h2c_88xx(struct halmac_adapter *adapter)
|
||||
|
||||
*proc_status = HALMAC_CMD_PROCESS_SENDING;
|
||||
|
||||
if (info->full_fifo_mode == _TRUE)
|
||||
if (info->full_fifo_mode == 1)
|
||||
pg_addr = 0;
|
||||
else
|
||||
pg_addr = adapter->txff_alloc.rsvd_h2c_info_addr;
|
||||
@ -1214,7 +1262,7 @@ send_cfg_param_h2c_88xx(struct halmac_adapter *adapter)
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_CFG_PARAM;
|
||||
hdr_info.content_size = 4;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
adapter->halmac_state.cfg_param_state.seq_num = seq_num;
|
||||
@ -1276,7 +1324,7 @@ add_param_buf_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_cfg_param_info *info = &adapter->cfg_param_info;
|
||||
union halmac_parameter_content *content = ¶m->content;
|
||||
|
||||
*end_cmd = _FALSE;
|
||||
*end_cmd = 0;
|
||||
|
||||
PARAM_INFO_SET_LEN(buf, CFG_PARAM_H2C_INFO_SIZE);
|
||||
PARAM_INFO_SET_IO_CMD(buf, param->cmd_id);
|
||||
@ -1311,7 +1359,7 @@ add_param_buf_88xx(struct halmac_adapter *adapter,
|
||||
PARAM_INFO_SET_DELAY_VAL(buf, content->DELAY_TIME.delay_time);
|
||||
break;
|
||||
case HALMAC_PARAMETER_CMD_END:
|
||||
*end_cmd = _TRUE;
|
||||
*end_cmd = 1;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]cmd id!!\n");
|
||||
@ -1330,7 +1378,7 @@ gen_cfg_param_h2c_88xx(struct halmac_adapter *adapter, u8 *buff)
|
||||
|
||||
CFG_PARAM_SET_NUM(buff, info->num);
|
||||
|
||||
if (info->full_fifo_mode == _TRUE) {
|
||||
if (info->full_fifo_mode == 1) {
|
||||
CFG_PARAM_SET_INIT_CASE(buff, 0x1);
|
||||
CFG_PARAM_SET_LOC(buff, 0);
|
||||
} else {
|
||||
@ -1350,7 +1398,7 @@ malloc_cfg_param_buf_88xx(struct halmac_adapter *adapter, u8 full_fifo)
|
||||
if (info->buf)
|
||||
return HALMAC_RET_SUCCESS;
|
||||
|
||||
if (full_fifo == _TRUE)
|
||||
if (full_fifo == 1)
|
||||
info->buf_size = pltfm_info->malloc_size;
|
||||
else
|
||||
info->buf_size = CFG_PARAM_RSVDPG_SIZE;
|
||||
@ -1420,6 +1468,11 @@ update_packet_88xx(struct halmac_adapter *adapter, enum halmac_packet_id pkt_id,
|
||||
return status;
|
||||
}
|
||||
|
||||
if (packet_in_nlo_88xx(adapter, pkt_id)) {
|
||||
*proc_status = HALMAC_CMD_PROCESS_DONE;
|
||||
adapter->nlo_flag = 1;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
@ -1435,6 +1488,7 @@ send_h2c_update_packet_88xx(struct halmac_adapter *adapter,
|
||||
u16 pg_offset;
|
||||
struct halmac_h2c_header_info hdr_info;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
enum halmac_packet_id real_pkt_id;
|
||||
|
||||
status = dl_rsvd_page_88xx(adapter, pg_addr, pkt, size);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
@ -1442,14 +1496,18 @@ send_h2c_update_packet_88xx(struct halmac_adapter *adapter,
|
||||
return status;
|
||||
}
|
||||
|
||||
real_pkt_id = get_real_pkt_id_88xx(adapter, pkt_id);
|
||||
pg_offset = pg_addr - adapter->txff_alloc.rsvd_boundary;
|
||||
UPDATE_PKT_SET_SIZE(h2c_buf, size + adapter->hw_cfg_info.txdesc_size);
|
||||
UPDATE_PKT_SET_ID(h2c_buf, pkt_id);
|
||||
UPDATE_PKT_SET_ID(h2c_buf, real_pkt_id);
|
||||
UPDATE_PKT_SET_LOC(h2c_buf, pg_offset);
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_UPDATE_PKT;
|
||||
hdr_info.content_size = 8;
|
||||
hdr_info.ack = _TRUE;
|
||||
if (packet_in_nlo_88xx(adapter, pkt_id))
|
||||
hdr_info.ack = 0;
|
||||
else
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
adapter->halmac_state.update_pkt_state.seq_num = seq_num;
|
||||
|
||||
@ -1583,7 +1641,7 @@ dump_fifo_88xx(struct halmac_adapter *adapter, enum hal_fifo_sel sel,
|
||||
return HALMAC_RET_NULL_POINTER;
|
||||
|
||||
tmp8 = HALMAC_REG_R8(REG_RCR + 2);
|
||||
enable = _FALSE;
|
||||
enable = 0;
|
||||
status = api->halmac_set_hw_value(adapter, HALMAC_HW_RX_CLK_GATE,
|
||||
&enable);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
@ -1702,8 +1760,8 @@ set_h2c_header_88xx(struct halmac_adapter *adapter, u8 *hdr, u16 *seq, u8 ack)
|
||||
(adapter->h2c_info.seq_num)++;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->h2c_seq_mutex);
|
||||
|
||||
if (ack == _TRUE)
|
||||
H2C_CMD_HEADER_SET_ACK(hdr, _TRUE);
|
||||
if (ack == 1)
|
||||
H2C_CMD_HEADER_SET_ACK(hdr, 1);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
@ -1898,7 +1956,7 @@ ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (opt->switch_en == _FALSE)
|
||||
if (opt->switch_en == 0)
|
||||
*proc_status = HALMAC_CMD_PROCESS_IDLE;
|
||||
|
||||
if ((*proc_status == HALMAC_CMD_PROCESS_SENDING) ||
|
||||
@ -1908,7 +1966,7 @@ ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
state = scan_cmd_cnstr_state_88xx(adapter);
|
||||
if (opt->switch_en == _TRUE) {
|
||||
if (opt->switch_en == 1) {
|
||||
if (state != HALMAC_CMD_CNSTR_CNSTR) {
|
||||
PLTFM_MSG_ERR("[ERR]state(en = 1)\n");
|
||||
return HALMAC_RET_ERROR_STATE;
|
||||
@ -1946,6 +2004,9 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (opt->nlo_en == 1 && adapter->nlo_flag != 1)
|
||||
PLTFM_MSG_WARN("[WARN]probe req is NOT nlo pkt!!\n");
|
||||
|
||||
if (cnv_scan_state_88xx(adapter, HALMAC_CMD_CNSTR_H2C_SENT) !=
|
||||
HALMAC_RET_SUCCESS)
|
||||
return HALMAC_RET_ERROR_STATE;
|
||||
@ -1981,7 +2042,10 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_CH_SWITCH;
|
||||
hdr_info.content_size = 20;
|
||||
hdr_info.ack = _TRUE;
|
||||
if (opt->nlo_en == 1)
|
||||
hdr_info.ack = 0;
|
||||
else
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
adapter->halmac_state.scan_state.seq_num = seq_num;
|
||||
|
||||
@ -2004,6 +2068,8 @@ proc_ctrl_ch_switch_88xx(struct halmac_adapter *adapter,
|
||||
HALMAC_RET_SUCCESS)
|
||||
return HALMAC_RET_ERROR_STATE;
|
||||
|
||||
adapter->nlo_flag = 0;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -2060,7 +2126,7 @@ chk_txdesc_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (GET_TX_DESC_BMC(buf) == _TRUE && GET_TX_DESC_AGG_EN(buf) == _TRUE)
|
||||
if (GET_TX_DESC_BMC(buf) == 1 && GET_TX_DESC_AGG_EN(buf) == 1)
|
||||
PLTFM_MSG_ERR("[ERR]txdesc - agg + bmc\n");
|
||||
|
||||
if (size < (GET_TX_DESC_TXPKTSIZE(buf) +
|
||||
@ -2121,15 +2187,15 @@ wlhdr_valid_88xx(struct halmac_adapter *adapter, u8 *buf)
|
||||
|
||||
switch (wlhdr->type) {
|
||||
case WLHDR_TYPE_MGMT:
|
||||
if (wlhdr_mgmt_valid_88xx(adapter, wlhdr) != _TRUE)
|
||||
if (wlhdr_mgmt_valid_88xx(adapter, wlhdr) != 1)
|
||||
status = HALMAC_RET_WLHDR_FAIL;
|
||||
break;
|
||||
case WLHDR_TYPE_CTRL:
|
||||
if (wlhdr_ctrl_valid_88xx(adapter, wlhdr) != _TRUE)
|
||||
if (wlhdr_ctrl_valid_88xx(adapter, wlhdr) != 1)
|
||||
status = HALMAC_RET_WLHDR_FAIL;
|
||||
break;
|
||||
case WLHDR_TYPE_DATA:
|
||||
if (wlhdr_data_valid_88xx(adapter, wlhdr) != _TRUE)
|
||||
if (wlhdr_data_valid_88xx(adapter, wlhdr) != 1)
|
||||
status = HALMAC_RET_WLHDR_FAIL;
|
||||
break;
|
||||
default:
|
||||
@ -2160,11 +2226,11 @@ wlhdr_mgmt_valid_88xx(struct halmac_adapter *adapter,
|
||||
case WLHDR_SUB_TYPE_DEAUTH:
|
||||
case WLHDR_SUB_TYPE_ACTION:
|
||||
case WLHDR_SUB_TYPE_ACTION_NOACK:
|
||||
state = _TRUE;
|
||||
state = 1;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]mgmt invalid!!\n");
|
||||
state = _FALSE;
|
||||
state = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -2180,11 +2246,11 @@ wlhdr_ctrl_valid_88xx(struct halmac_adapter *adapter,
|
||||
switch (wlhdr->sub_type) {
|
||||
case WLHDR_SUB_TYPE_BF_RPT_POLL:
|
||||
case WLHDR_SUB_TYPE_NDPA:
|
||||
state = _TRUE;
|
||||
state = 1;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]ctrl invalid!!\n");
|
||||
state = _FALSE;
|
||||
state = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -2202,11 +2268,11 @@ wlhdr_data_valid_88xx(struct halmac_adapter *adapter,
|
||||
case WLHDR_SUB_TYPE_NULL:
|
||||
case WLHDR_SUB_TYPE_QOS_DATA:
|
||||
case WLHDR_SUB_TYPE_QOS_NULL:
|
||||
state = _TRUE;
|
||||
state = 1;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]data invalid!!\n");
|
||||
state = _FALSE;
|
||||
state = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -2214,7 +2280,7 @@ wlhdr_data_valid_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
/**
|
||||
* halmac_get_version() - get HALMAC version
|
||||
* get_version_88xx() - get HALMAC version
|
||||
* @ver : return version of major, prototype and minor information
|
||||
* Author : KaiYuan Chang / Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
@ -2283,7 +2349,7 @@ proc_p2pps_88xx(struct halmac_adapter *adapter, struct halmac_p2pps *info)
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_P2PPS;
|
||||
hdr_info.content_size = 24;
|
||||
hdr_info.ack = _FALSE;
|
||||
hdr_info.ack = 0;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
status = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
@ -2424,6 +2490,9 @@ cfg_drv_rsvd_pg_num_88xx(struct halmac_adapter *adapter,
|
||||
case HALMAC_RSVD_PG_NUM128:
|
||||
adapter->txff_alloc.rsvd_drv_pg_num = 128;
|
||||
break;
|
||||
case HALMAC_RSVD_PG_NUM256:
|
||||
adapter->txff_alloc.rsvd_drv_pg_num = 256;
|
||||
break;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
@ -2688,13 +2757,15 @@ parse_intf_phy_88xx(struct halmac_adapter *adapter,
|
||||
HALMAC_REG_W8((u32)offset, (u8)value);
|
||||
} else if (intf_phy == HAL_INTF_PHY_USB2 ||
|
||||
intf_phy == HAL_INTF_PHY_USB3) {
|
||||
#if HALMAC_USB_SUPPORT
|
||||
result = usbphy_write_88xx(adapter, (u8)offset,
|
||||
value, intf_phy);
|
||||
if (result != HALMAC_RET_SUCCESS)
|
||||
PLTFM_MSG_ERR("[ERR]usb phy!!\n");
|
||||
|
||||
#endif
|
||||
} else if (intf_phy == HAL_INTF_PHY_PCIE_GEN1 ||
|
||||
intf_phy == HAL_INTF_PHY_PCIE_GEN2) {
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
if (ip_sel == HALMAC_IP_INTF_PHY)
|
||||
result = mdio_write_88xx(adapter,
|
||||
(u8)offset,
|
||||
@ -2705,7 +2776,7 @@ parse_intf_phy_88xx(struct halmac_adapter *adapter,
|
||||
(u8)value);
|
||||
if (result != HALMAC_RET_SUCCESS)
|
||||
PLTFM_MSG_ERR("[ERR]mdio/dbi!!\n");
|
||||
|
||||
#endif
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]intf phy sel!!\n");
|
||||
}
|
||||
@ -2855,4 +2926,41 @@ pwr_state_88xx(struct halmac_adapter *adapter, enum halmac_mac_power *state)
|
||||
*state = HALMAC_MAC_POWER_ON;
|
||||
}
|
||||
|
||||
static u8
|
||||
packet_in_nlo_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_packet_id pkt_id)
|
||||
{
|
||||
enum halmac_packet_id nlo_pkt = HALMAC_PACKET_PROBE_REQ_NLO;
|
||||
|
||||
if (pkt_id >= nlo_pkt)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static enum halmac_packet_id
|
||||
get_real_pkt_id_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_packet_id pkt_id)
|
||||
{
|
||||
enum halmac_packet_id real_pkt_id;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
switch (pkt_id) {
|
||||
case HALMAC_PACKET_PROBE_REQ_NLO:
|
||||
real_pkt_id = HALMAC_PACKET_PROBE_REQ;
|
||||
break;
|
||||
case HALMAC_PACKET_SYNC_BCN_NLO:
|
||||
real_pkt_id = HALMAC_PACKET_SYNC_BCN;
|
||||
break;
|
||||
case HALMAC_PACKET_DISCOVERY_BCN_NLO:
|
||||
real_pkt_id = HALMAC_PACKET_DISCOVERY_BCN;
|
||||
break;
|
||||
default:
|
||||
real_pkt_id = pkt_id;
|
||||
}
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
return real_pkt_id;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
@ -22,7 +22,6 @@
|
||||
|
||||
#define RSVD_EFUSE_SIZE 16
|
||||
#define RSVD_CS_EFUSE_SIZE 24
|
||||
#define PROTECT_EFUSE_SIZE 96
|
||||
#define FEATURE_DUMP_PHY_EFUSE HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE
|
||||
#define FEATURE_DUMP_LOG_EFUSE HALMAC_FEATURE_DUMP_LOGICAL_EFUSE
|
||||
|
||||
@ -37,9 +36,6 @@ static enum halmac_ret_status
|
||||
read_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
u8 *map);
|
||||
|
||||
static enum halmac_ret_status
|
||||
eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map);
|
||||
|
||||
static enum halmac_ret_status
|
||||
read_log_efuse_map_88xx(struct halmac_adapter *adapter, u8 *map);
|
||||
|
||||
@ -98,6 +94,7 @@ dump_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
u8 *map = NULL;
|
||||
u8 *efuse_map;
|
||||
u32 efuse_size = adapter->hw_cfg_info.efuse_size;
|
||||
u32 prtct_efuse_size = adapter->hw_cfg_info.prtct_efuse_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
enum halmac_cmd_process_status *proc_status;
|
||||
|
||||
@ -138,7 +135,7 @@ dump_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
return status;
|
||||
}
|
||||
|
||||
if (adapter->efuse_map_valid == _TRUE) {
|
||||
if (adapter->efuse_map_valid == 1) {
|
||||
*proc_status = HALMAC_CMD_PROCESS_DONE;
|
||||
efuse_map = adapter->efuse_map;
|
||||
|
||||
@ -149,13 +146,17 @@ dump_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
PLTFM_MEMSET(map, 0xFF, efuse_size);
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
PLTFM_MEMCPY(map, efuse_map, efuse_size - PROTECT_EFUSE_SIZE);
|
||||
PLTFM_MEMCPY(map + efuse_size - PROTECT_EFUSE_SIZE +
|
||||
#if HALMAC_PLATFORM_WINDOWS
|
||||
PLTFM_MEMCPY(map, efuse_map, efuse_size);
|
||||
#else
|
||||
PLTFM_MEMCPY(map, efuse_map, efuse_size - prtct_efuse_size);
|
||||
PLTFM_MEMCPY(map + efuse_size - prtct_efuse_size +
|
||||
RSVD_CS_EFUSE_SIZE,
|
||||
efuse_map + efuse_size - PROTECT_EFUSE_SIZE +
|
||||
efuse_map + efuse_size - prtct_efuse_size +
|
||||
RSVD_CS_EFUSE_SIZE,
|
||||
PROTECT_EFUSE_SIZE - RSVD_EFUSE_SIZE -
|
||||
prtct_efuse_size - RSVD_EFUSE_SIZE -
|
||||
RSVD_CS_EFUSE_SIZE);
|
||||
#endif
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
PLTFM_EVENT_SIG(HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE,
|
||||
@ -311,8 +312,9 @@ read_efuse_bt_88xx(struct halmac_adapter *adapter, u32 offset, u8 *value,
|
||||
enum halmac_efuse_bank bank)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
enum halmac_cmd_process_status *proc_status =
|
||||
&adapter->halmac_state.efuse_state.proc_status;
|
||||
enum halmac_cmd_process_status *proc_status;
|
||||
|
||||
proc_status = &adapter->halmac_state.efuse_state.proc_status;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
@ -397,8 +399,8 @@ get_efuse_available_size_88xx(struct halmac_adapter *adapter, u32 *size)
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
*size = adapter->hw_cfg_info.efuse_size - PROTECT_EFUSE_SIZE -
|
||||
adapter->efuse_end;
|
||||
*size = adapter->hw_cfg_info.efuse_size -
|
||||
adapter->hw_cfg_info.prtct_efuse_size - adapter->efuse_end;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
@ -460,8 +462,9 @@ dump_log_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
u8 *map = NULL;
|
||||
u32 size = adapter->hw_cfg_info.eeprom_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
enum halmac_cmd_process_status *proc_status =
|
||||
&adapter->halmac_state.efuse_state.proc_status;
|
||||
enum halmac_cmd_process_status *proc_status;
|
||||
|
||||
proc_status = &adapter->halmac_state.efuse_state.proc_status;
|
||||
|
||||
if (cfg == HALMAC_EFUSE_R_FW &&
|
||||
halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
|
||||
@ -498,7 +501,7 @@ dump_log_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
return status;
|
||||
}
|
||||
|
||||
if (adapter->efuse_map_valid == _TRUE) {
|
||||
if (adapter->efuse_map_valid == 1) {
|
||||
*proc_status = HALMAC_CMD_PROCESS_DONE;
|
||||
|
||||
map = (u8 *)PLTFM_MALLOC(size);
|
||||
@ -889,7 +892,7 @@ read_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
/* Read efuse no need 2.5V LDO */
|
||||
enable = _FALSE;
|
||||
enable = 0;
|
||||
status = api->halmac_set_hw_value(adapter, HALMAC_HW_LDO25_EN, &enable);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]dis ldo25\n");
|
||||
@ -923,7 +926,8 @@ enum halmac_ret_status
|
||||
write_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
{
|
||||
const u8 unlock_code = 0x69;
|
||||
u8 value_read = 0, enable;
|
||||
u8 value_read = 0;
|
||||
u8 enable;
|
||||
u32 value32;
|
||||
u32 tmp32;
|
||||
u32 cnt;
|
||||
@ -931,13 +935,13 @@ write_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
adapter->efuse_map_valid = _FALSE;
|
||||
adapter->efuse_map_valid = 0;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
HALMAC_REG_W8(REG_PMC_DBG_CTRL2 + 3, unlock_code);
|
||||
|
||||
/* Enable 2.5V LDO */
|
||||
enable = _TRUE;
|
||||
enable = 1;
|
||||
status = api->halmac_set_hw_value(adapter, HALMAC_HW_LDO25_EN, &enable);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]en ldo25\n");
|
||||
@ -964,7 +968,7 @@ write_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
HALMAC_REG_W8(REG_PMC_DBG_CTRL2 + 3, 0x00);
|
||||
|
||||
/* Disable 2.5V LDO */
|
||||
enable = _FALSE;
|
||||
enable = 0;
|
||||
status = api->halmac_set_hw_value(adapter, HALMAC_HW_LDO25_EN, &enable);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]dis ldo25\n");
|
||||
@ -984,7 +988,7 @@ write_hw_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
enum halmac_ret_status
|
||||
eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
|
||||
{
|
||||
u8 i;
|
||||
@ -996,6 +1000,7 @@ eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
|
||||
u8 hdr2 = 0;
|
||||
u32 eeprom_idx;
|
||||
u32 efuse_idx = 0;
|
||||
u32 prtct_efuse_size = adapter->hw_cfg_info.prtct_efuse_size;
|
||||
struct halmac_hw_cfg_info *hw_info = &adapter->hw_cfg_info;
|
||||
|
||||
PLTFM_MEMSET(log_map, 0xFF, hw_info->eeprom_size);
|
||||
@ -1022,7 +1027,7 @@ eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
|
||||
|
||||
efuse_idx++;
|
||||
|
||||
if (efuse_idx >= hw_info->efuse_size - PROTECT_EFUSE_SIZE - 1)
|
||||
if (efuse_idx >= hw_info->efuse_size - prtct_efuse_size - 1)
|
||||
return HALMAC_RET_EEPROM_PARSING_FAIL;
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
@ -1050,7 +1055,7 @@ eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
|
||||
efuse_idx++;
|
||||
|
||||
if (efuse_idx > hw_info->efuse_size -
|
||||
PROTECT_EFUSE_SIZE - 1)
|
||||
prtct_efuse_size - 1)
|
||||
return HALMAC_RET_EEPROM_PARSING_FAIL;
|
||||
|
||||
value8 = *(phy_map + efuse_idx);
|
||||
@ -1059,7 +1064,7 @@ eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map)
|
||||
efuse_idx++;
|
||||
|
||||
if (efuse_idx > hw_info->efuse_size -
|
||||
PROTECT_EFUSE_SIZE)
|
||||
prtct_efuse_size)
|
||||
return HALMAC_RET_EEPROM_PARSING_FAIL;
|
||||
}
|
||||
}
|
||||
@ -1077,7 +1082,7 @@ read_log_efuse_map_88xx(struct halmac_adapter *adapter, u8 *map)
|
||||
u32 efuse_size;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->efuse_map_valid == _FALSE) {
|
||||
if (adapter->efuse_map_valid == 0) {
|
||||
efuse_size = adapter->hw_cfg_info.efuse_size;
|
||||
|
||||
local_map = (u8 *)PLTFM_MALLOC(efuse_size);
|
||||
@ -1104,7 +1109,7 @@ read_log_efuse_map_88xx(struct halmac_adapter *adapter, u8 *map)
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
PLTFM_MEMCPY(adapter->efuse_map, local_map, efuse_size);
|
||||
adapter->efuse_map_valid = _TRUE;
|
||||
adapter->efuse_map_valid = 1;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
PLTFM_FREE(local_map, efuse_size);
|
||||
@ -1175,7 +1180,7 @@ dump_efuse_drv_88xx(struct halmac_adapter *adapter)
|
||||
}
|
||||
}
|
||||
|
||||
if (adapter->efuse_map_valid == _FALSE) {
|
||||
if (adapter->efuse_map_valid == 0) {
|
||||
map = (u8 *)PLTFM_MALLOC(efuse_size);
|
||||
if (!map) {
|
||||
PLTFM_MSG_ERR("[ERR]malloc map\n");
|
||||
@ -1190,7 +1195,7 @@ dump_efuse_drv_88xx(struct halmac_adapter *adapter)
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
PLTFM_MEMCPY(adapter->efuse_map, map, efuse_size);
|
||||
adapter->efuse_map_valid = _TRUE;
|
||||
adapter->efuse_map_valid = 1;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
PLTFM_FREE(map, efuse_size);
|
||||
@ -1210,7 +1215,7 @@ dump_efuse_fw_88xx(struct halmac_adapter *adapter)
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_DUMP_PHYSICAL_EFUSE;
|
||||
hdr_info.content_size = 0;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
adapter->halmac_state.efuse_state.seq_num = seq_num;
|
||||
@ -1225,7 +1230,7 @@ dump_efuse_fw_88xx(struct halmac_adapter *adapter)
|
||||
}
|
||||
}
|
||||
|
||||
if (adapter->efuse_map_valid == _FALSE) {
|
||||
if (adapter->efuse_map_valid == 0) {
|
||||
status = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]send h2c pkt\n");
|
||||
@ -1249,6 +1254,7 @@ proc_write_log_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
u8 hdr2;
|
||||
u8 *map = NULL;
|
||||
u32 eeprom_size = adapter->hw_cfg_info.eeprom_size;
|
||||
u32 prtct_efuse_size = adapter->hw_cfg_info.prtct_efuse_size;
|
||||
u32 end;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
@ -1289,7 +1295,7 @@ proc_write_log_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
|
||||
if (offset > 0x7f) {
|
||||
if (adapter->hw_cfg_info.efuse_size <=
|
||||
4 + PROTECT_EFUSE_SIZE + end) {
|
||||
4 + prtct_efuse_size + end) {
|
||||
PLTFM_FREE(map, eeprom_size);
|
||||
return HALMAC_RET_EFUSE_NOT_ENOUGH;
|
||||
}
|
||||
@ -1319,7 +1325,7 @@ proc_write_log_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
}
|
||||
} else {
|
||||
if (adapter->hw_cfg_info.efuse_size <=
|
||||
3 + PROTECT_EFUSE_SIZE + end) {
|
||||
3 + prtct_efuse_size + end) {
|
||||
PLTFM_FREE(map, eeprom_size);
|
||||
return HALMAC_RET_EFUSE_NOT_ENOUGH;
|
||||
}
|
||||
@ -1357,7 +1363,7 @@ read_efuse_88xx(struct halmac_adapter *adapter, u32 offset, u32 size, u8 *map)
|
||||
return HALMAC_RET_NULL_POINTER;
|
||||
}
|
||||
|
||||
if (adapter->efuse_map_valid == _TRUE) {
|
||||
if (adapter->efuse_map_valid == 1) {
|
||||
PLTFM_MEMCPY(map, adapter->efuse_map + offset, size);
|
||||
} else {
|
||||
if (read_hw_efuse_88xx(adapter, offset, size, map) !=
|
||||
@ -1485,7 +1491,8 @@ check_efuse_enough_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
if (adapter->hw_cfg_info.efuse_size <=
|
||||
(pg_num + PROTECT_EFUSE_SIZE + adapter->efuse_end))
|
||||
(pg_num + adapter->hw_cfg_info.prtct_efuse_size +
|
||||
adapter->efuse_end))
|
||||
return HALMAC_RET_EFUSE_NOT_ENOUGH;
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
@ -1716,7 +1723,7 @@ get_efuse_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
buf + C2H_DATA_OFFSET_88XX, seg_size);
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
if (EFUSE_DATA_GET_END_SEGMENT(buf) == _FALSE) {
|
||||
if (EFUSE_DATA_GET_END_SEGMENT(buf) == 0) {
|
||||
PLTFM_FREE(map, eeprom_size);
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
@ -1728,7 +1735,7 @@ get_efuse_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
state->proc_status = proc_status;
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
adapter->efuse_map_valid = _TRUE;
|
||||
adapter->efuse_map_valid = 1;
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
if (adapter->evnt.phy_efuse_map == 1) {
|
||||
@ -1777,6 +1784,7 @@ get_dump_phy_efuse_status_88xx(struct halmac_adapter *adapter,
|
||||
{
|
||||
u8 *map = NULL;
|
||||
u32 efuse_size = adapter->hw_cfg_info.efuse_size;
|
||||
u32 prtct_efuse_size = adapter->hw_cfg_info.prtct_efuse_size;
|
||||
struct halmac_efuse_state *state = &adapter->halmac_state.efuse_state;
|
||||
|
||||
*proc_status = state->proc_status;
|
||||
@ -1803,12 +1811,12 @@ get_dump_phy_efuse_status_88xx(struct halmac_adapter *adapter,
|
||||
PLTFM_MEMSET(map, 0xFF, efuse_size);
|
||||
PLTFM_MUTEX_LOCK(&adapter->efuse_mutex);
|
||||
PLTFM_MEMCPY(map, adapter->efuse_map,
|
||||
efuse_size - PROTECT_EFUSE_SIZE);
|
||||
PLTFM_MEMCPY(map + efuse_size - PROTECT_EFUSE_SIZE +
|
||||
efuse_size - prtct_efuse_size);
|
||||
PLTFM_MEMCPY(map + efuse_size - prtct_efuse_size +
|
||||
RSVD_CS_EFUSE_SIZE,
|
||||
adapter->efuse_map + efuse_size -
|
||||
PROTECT_EFUSE_SIZE + RSVD_CS_EFUSE_SIZE,
|
||||
PROTECT_EFUSE_SIZE - RSVD_EFUSE_SIZE -
|
||||
prtct_efuse_size + RSVD_CS_EFUSE_SIZE,
|
||||
prtct_efuse_size - RSVD_EFUSE_SIZE -
|
||||
RSVD_CS_EFUSE_SIZE);
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->efuse_mutex);
|
||||
|
||||
@ -1896,7 +1904,7 @@ get_h2c_ack_phy_efuse_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
u32
|
||||
get_rsvd_efuse_size_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
return PROTECT_EFUSE_SIZE;
|
||||
return adapter->hw_cfg_info.prtct_efuse_size;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
@ -24,6 +24,9 @@ enum halmac_ret_status
|
||||
dump_efuse_map_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_efuse_read_cfg cfg);
|
||||
|
||||
enum halmac_ret_status
|
||||
eeprom_parser_88xx(struct halmac_adapter *adapter, u8 *phy_map, u8 *log_map);
|
||||
|
||||
enum halmac_ret_status
|
||||
dump_efuse_map_bt_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_efuse_bank bank, u32 size, u8 *map);
|
||||
|
@ -87,7 +87,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
|
||||
hdr_info.content_size = 20;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
rc = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
@ -131,7 +131,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
read_flash_88xx(struct halmac_adapter *adapter, u32 addr)
|
||||
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status;
|
||||
@ -168,13 +168,13 @@ read_flash_88xx(struct halmac_adapter *adapter, u32 addr)
|
||||
/* Construct H2C Content */
|
||||
DOWNLOAD_FLASH_SET_SPI_CMD(h2c_buf, 0x03);
|
||||
DOWNLOAD_FLASH_SET_LOCATION(h2c_buf, h2c_info_addr - rsvd_pg_addr);
|
||||
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, 4096);
|
||||
DOWNLOAD_FLASH_SET_SIZE(h2c_buf, length);
|
||||
DOWNLOAD_FLASH_SET_START_ADDR(h2c_buf, addr);
|
||||
|
||||
/* Fill in H2C Header */
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
|
||||
hdr_info.content_size = 16;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
/* Send H2C Cmd Packet */
|
||||
@ -231,7 +231,7 @@ erase_flash_88xx(struct halmac_adapter *adapter, u8 erase_cmd, u32 addr)
|
||||
/* Fill in H2C Header */
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
|
||||
hdr_info.content_size = 16;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
/* Send H2C Cmd Packet */
|
||||
@ -286,7 +286,7 @@ check_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
else
|
||||
pkt_size = size;
|
||||
|
||||
read_flash_88xx(adapter, addr);
|
||||
read_flash_88xx(adapter, addr, 4096);
|
||||
|
||||
cnt = 0;
|
||||
while (cnt < pkt_size) {
|
||||
|
@ -25,7 +25,7 @@ download_flash_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
u32 rom_addr);
|
||||
|
||||
enum halmac_ret_status
|
||||
read_flash_88xx(struct halmac_adapter *adapter, u32 addr);
|
||||
read_flash_88xx(struct halmac_adapter *adapter, u32 addr, u32 length);
|
||||
|
||||
enum halmac_ret_status
|
||||
erase_flash_88xx(struct halmac_adapter *adapter, u8 erase_cmd, u32 addr);
|
||||
|
@ -243,14 +243,13 @@ start_dlfw_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status;
|
||||
|
||||
dmem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_DMEM_SIZE));
|
||||
imem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_IMEM_SIZE));
|
||||
dmem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_DMEM_SIZE)));
|
||||
imem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_IMEM_SIZE)));
|
||||
if (0 != ((*(fw_bin + WLAN_FW_HDR_MEM_USAGE)) & BIT(4)))
|
||||
emem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_EMEM_SIZE));
|
||||
|
||||
dmem_size = rtk_le32_to_cpu(dmem_size);
|
||||
imem_size = rtk_le32_to_cpu(imem_size);
|
||||
emem_size = rtk_le32_to_cpu(emem_size);
|
||||
emem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_EMEM_SIZE)));
|
||||
|
||||
dmem_size += WLAN_FW_HDR_CHKSUM_SIZE;
|
||||
imem_size += WLAN_FW_HDR_CHKSUM_SIZE;
|
||||
@ -268,15 +267,15 @@ start_dlfw_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size,
|
||||
HALMAC_REG_W16(REG_MCUFW_CTRL, value16);
|
||||
|
||||
cur_fw = fw_bin + WLAN_FW_HDR_SIZE;
|
||||
addr = *((u32 *)(fw_bin + WLAN_FW_HDR_DMEM_ADDR));
|
||||
addr = rtk_le32_to_cpu(addr) & ~BIT(31);
|
||||
addr = rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_DMEM_ADDR)));
|
||||
addr &= ~BIT(31);
|
||||
status = dlfw_to_mem_88xx(adapter, cur_fw, 0, addr, dmem_size);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
cur_fw = fw_bin + WLAN_FW_HDR_SIZE + dmem_size;
|
||||
addr = *((u32 *)(fw_bin + WLAN_FW_HDR_IMEM_ADDR));
|
||||
addr = rtk_le32_to_cpu(addr) & ~BIT(31);
|
||||
addr = rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_IMEM_ADDR)));
|
||||
addr &= ~BIT(31);
|
||||
status = dlfw_to_mem_88xx(adapter, cur_fw, 0, addr, imem_size);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
@ -285,8 +284,9 @@ DLFW_EMEM:
|
||||
if (emem_size) {
|
||||
cur_fw = fw_bin + WLAN_FW_HDR_SIZE +
|
||||
dmem_size + imem_size;
|
||||
addr = *((u32 *)(fw_bin + WLAN_FW_HDR_EMEM_ADDR));
|
||||
addr = rtk_le32_to_cpu(addr) & ~BIT(31);
|
||||
addr = rtk_le32_to_cpu(*((__le32 *)(fw_bin +
|
||||
WLAN_FW_HDR_EMEM_ADDR)));
|
||||
addr &= ~BIT(31);
|
||||
status = dlfw_to_mem_88xx(adapter, cur_fw, dl_addr << 7, addr,
|
||||
emem_size);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
@ -308,15 +308,12 @@ chk_h2c_ver_88xx(struct halmac_adapter *adapter, u8 *fw_bin)
|
||||
u16 halmac_h2c_ver;
|
||||
u16 fw_h2c_ver;
|
||||
|
||||
fw_h2c_ver = *((u16 *)(fw_bin + WLAN_FW_HDR_H2C_FMT_VER));
|
||||
fw_h2c_ver = rtk_le16_to_cpu(fw_h2c_ver);
|
||||
fw_h2c_ver = rtk_le16_to_cpu(*((__le16 *)(fw_bin +
|
||||
WLAN_FW_HDR_H2C_FMT_VER)));
|
||||
halmac_h2c_ver = H2C_FORMAT_VERSION;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]halmac h2c ver = %x, fw h2c ver = %x!!\n",
|
||||
halmac_h2c_ver, fw_h2c_ver);
|
||||
|
||||
if (fw_h2c_ver != halmac_h2c_ver)
|
||||
PLTFM_MSG_WARN("[WARN]H2C/C2H ver is compatible!!\n");
|
||||
}
|
||||
|
||||
static enum halmac_ret_status
|
||||
@ -332,14 +329,13 @@ chk_fw_size_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size)
|
||||
return HALMAC_RET_FW_SIZE_ERR;
|
||||
}
|
||||
|
||||
dmem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_DMEM_SIZE));
|
||||
imem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_IMEM_SIZE));
|
||||
dmem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_DMEM_SIZE)));
|
||||
imem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_IMEM_SIZE)));
|
||||
if (0 != ((*(fw_bin + WLAN_FW_HDR_MEM_USAGE)) & BIT(4)))
|
||||
emem_size = *((u32 *)(fw_bin + WLAN_FW_HDR_EMEM_SIZE));
|
||||
|
||||
dmem_size = rtk_le32_to_cpu(dmem_size);
|
||||
imem_size = rtk_le32_to_cpu(imem_size);
|
||||
emem_size = rtk_le32_to_cpu(emem_size);
|
||||
emem_size =
|
||||
rtk_le32_to_cpu(*((__le32 *)(fw_bin + WLAN_FW_HDR_EMEM_SIZE)));
|
||||
|
||||
dmem_size += WLAN_FW_HDR_CHKSUM_SIZE;
|
||||
imem_size += WLAN_FW_HDR_CHKSUM_SIZE;
|
||||
@ -469,6 +465,28 @@ DL_FREE_FW_END:
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* reset_wifi_fw_88xx() - reset wifi fw
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : LIN YONG-CHING
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reset_wifi_fw_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
wlan_cpu_en_88xx(adapter, 0);
|
||||
pltfm_reset_88xx(adapter);
|
||||
init_ofld_feature_state_machine_88xx(adapter);
|
||||
wlan_cpu_en_88xx(adapter, 1);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* get_fw_version_88xx() - get FW version
|
||||
* @adapter : the adapter of halmac
|
||||
@ -507,18 +525,18 @@ update_fw_info_88xx(struct halmac_adapter *adapter, u8 *fw_bin)
|
||||
{
|
||||
struct halmac_fw_version *info = &adapter->fw_ver;
|
||||
|
||||
info->version = *((u16 *)(fw_bin + WLAN_FW_HDR_VERSION));
|
||||
info->version = rtk_le16_to_cpu(info->version);
|
||||
info->version =
|
||||
rtk_le16_to_cpu(*((__le16 *)(fw_bin + WLAN_FW_HDR_VERSION)));
|
||||
info->sub_version = *(fw_bin + WLAN_FW_HDR_SUBVERSION);
|
||||
info->sub_index = *(fw_bin + WLAN_FW_HDR_SUBINDEX);
|
||||
info->h2c_version = *((u16 *)(fw_bin + WLAN_FW_HDR_H2C_FMT_VER));
|
||||
info->h2c_version = rtk_le16_to_cpu(info->h2c_version);
|
||||
info->h2c_version = rtk_le16_to_cpu(*((__le16 *)(fw_bin +
|
||||
WLAN_FW_HDR_H2C_FMT_VER)));
|
||||
info->build_time.month = *(fw_bin + WLAN_FW_HDR_MONTH);
|
||||
info->build_time.date = *(fw_bin + WLAN_FW_HDR_DATE);
|
||||
info->build_time.hour = *(fw_bin + WLAN_FW_HDR_HOUR);
|
||||
info->build_time.min = *(fw_bin + WLAN_FW_HDR_MIN);
|
||||
info->build_time.year = *((u16 *)(fw_bin + WLAN_FW_HDR_YEAR));
|
||||
info->build_time.year = rtk_le16_to_cpu(info->build_time.year);
|
||||
info->build_time.year =
|
||||
rtk_le16_to_cpu(*((__le16 *)(fw_bin + WLAN_FW_HDR_YEAR)));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]=== FW info ===\n");
|
||||
PLTFM_MSG_TRACE("[TRACE]ver : %X\n", info->version);
|
||||
@ -560,7 +578,7 @@ dlfw_to_mem_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 src, u32 dest,
|
||||
status = send_fwpkt_88xx(adapter, (u16)(src >> 7),
|
||||
fw_bin + mem_offset, pkt_size);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]send fw pkt!!");
|
||||
PLTFM_MSG_ERR("[ERR]send fw pkt!!\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -570,7 +588,7 @@ dlfw_to_mem_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 src, u32 dest,
|
||||
dest + mem_offset, pkt_size,
|
||||
first_part);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]iddma dlfw!!");
|
||||
PLTFM_MSG_ERR("[ERR]iddma dlfw!!\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -581,7 +599,7 @@ dlfw_to_mem_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 src, u32 dest,
|
||||
|
||||
status = check_fw_chksum_88xx(adapter, dest);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]chk fw chksum!!");
|
||||
PLTFM_MSG_ERR("[ERR]chk fw chksum!!\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -691,8 +709,29 @@ static enum halmac_ret_status
|
||||
send_fwpkt_88xx(struct halmac_adapter *adapter, u16 pg_addr, u8 *fw_bin,
|
||||
u32 size)
|
||||
{
|
||||
u8 *fw_add_dum = NULL;
|
||||
enum halmac_ret_status status;
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_USB &&
|
||||
!((size + TX_DESC_SIZE_88XX) & (512 - 1))) {
|
||||
fw_add_dum = (u8 *)PLTFM_MALLOC(size + 1);
|
||||
if (!fw_add_dum) {
|
||||
PLTFM_MSG_ERR("[ERR]fw bin malloc!!\n");
|
||||
return HALMAC_RET_MALLOC_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MEMCPY(fw_add_dum, fw_bin, size);
|
||||
|
||||
status = dl_rsvd_page_88xx(adapter, pg_addr,
|
||||
fw_add_dum, size + 1);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
PLTFM_MSG_ERR("[ERR]dl rsvd page - dum!!\n");
|
||||
|
||||
PLTFM_FREE(fw_add_dum, size + 1);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
status = dl_rsvd_page_88xx(adapter, pg_addr, fw_bin, size);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
PLTFM_MSG_ERR("[ERR]dl rsvd page!!\n");
|
||||
@ -803,7 +842,7 @@ check_fw_status_88xx(struct halmac_adapter *adapter, u8 *fw_status)
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
*fw_status = _TRUE;
|
||||
*fw_status = 1;
|
||||
|
||||
fw_dbg6 = HALMAC_REG_R32(REG_FW_DBG6);
|
||||
|
||||
@ -818,7 +857,7 @@ check_fw_status_88xx(struct halmac_adapter *adapter, u8 *fw_status)
|
||||
if ((fw_dbg6 & FW_STATUS_CHK_FATAL) != 0) {
|
||||
PLTFM_MSG_ERR("[ERR]fw status(fatal):%X\n", fw_dbg6);
|
||||
fw_fatal_status_debug_88xx(adapter);
|
||||
*fw_status = _FALSE;
|
||||
*fw_status = 0;
|
||||
return status;
|
||||
}
|
||||
}
|
||||
@ -837,7 +876,7 @@ check_fw_status_88xx(struct halmac_adapter *adapter, u8 *fw_status)
|
||||
cnt--;
|
||||
if (cnt == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]fw pc\n");
|
||||
*fw_status = _FALSE;
|
||||
*fw_status = 0;
|
||||
return status;
|
||||
}
|
||||
PLTFM_DELAY_US(50);
|
||||
@ -996,6 +1035,8 @@ enum halmac_ret_status
|
||||
send_general_info_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_general_info *info)
|
||||
{
|
||||
u8 h2cq_ele[4] = {0};
|
||||
u32 h2cq_addr;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
|
||||
@ -1023,6 +1064,20 @@ send_general_info_88xx(struct halmac_adapter *adapter,
|
||||
return status;
|
||||
}
|
||||
|
||||
h2cq_addr = adapter->txff_alloc.rsvd_h2cq_addr;
|
||||
h2cq_addr <<= TX_PAGE_SIZE_SHIFT_88XX;
|
||||
status = dump_fifo_88xx(adapter, HAL_FIFO_SEL_TX,
|
||||
h2cq_addr, 4, h2cq_ele);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]dump h2cq!!\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
if ((h2cq_ele[0] & 0x7F) != 0x01 || h2cq_ele[1] != 0xFF) {
|
||||
PLTFM_MSG_ERR("[ERR]h2cq compare!!\n");
|
||||
return HALMAC_RET_SEND_H2C_FAIL;
|
||||
}
|
||||
|
||||
if (adapter->halmac_state.dlfw_state == HALMAC_DLFW_DONE)
|
||||
adapter->halmac_state.dlfw_state = HALMAC_GEN_INFO_SENT;
|
||||
|
||||
@ -1048,7 +1103,7 @@ proc_send_general_info_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_GENERAL_INFO;
|
||||
hdr_info.content_size = 4;
|
||||
hdr_info.ack = _FALSE;
|
||||
hdr_info.ack = 0;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
status = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
@ -1078,7 +1133,7 @@ proc_send_phydm_info_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_PHYDM_INFO;
|
||||
hdr_info.content_size = 8;
|
||||
hdr_info.ack = _FALSE;
|
||||
hdr_info.ack = 0;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
|
||||
status = send_h2c_pkt_88xx(adapter, h2c_buf);
|
||||
|
@ -22,8 +22,6 @@
|
||||
|
||||
#define HALMC_DDMA_POLLING_COUNT 1000
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
||||
enum halmac_ret_status
|
||||
download_firmware_88xx(struct halmac_adapter *adapter, u8 *fw_bin, u32 size);
|
||||
|
||||
@ -31,6 +29,9 @@ enum halmac_ret_status
|
||||
free_download_firmware_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_dlfw_mem mem_sel, u8 *fw_bin, u32 size);
|
||||
|
||||
enum halmac_ret_status
|
||||
reset_wifi_fw_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
get_fw_version_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_fw_version *ver);
|
||||
@ -58,4 +59,6 @@ send_general_info_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_ret_status
|
||||
drv_fwctrl_88xx(struct halmac_adapter *adapter, u8 *payload, u32 size, u8 ack);
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
||||
#endif/* _HALMAC_FW_88XX_H_ */
|
||||
|
@ -273,6 +273,10 @@ pinmux_switch_88xx(struct halmac_adapter *adapter,
|
||||
case HALMAC_GPIO_FUNC_SDIO_INT:
|
||||
switch_func = HALMAC_SDIO_INT;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
switch_func = HALMAC_GPIO13_14_WL_CTRL_EN;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_0:
|
||||
case HALMAC_GPIO_FUNC_SW_IO_1:
|
||||
case HALMAC_GPIO_FUNC_SW_IO_2:
|
||||
@ -352,6 +356,12 @@ pinmux_record_88xx(struct halmac_adapter *adapter,
|
||||
case HALMAC_GPIO_FUNC_SDIO_INT:
|
||||
adapter->pinmux_info.sdio_int = val;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
|
||||
adapter->pinmux_info.bt_host_wake = val;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
|
||||
adapter->pinmux_info.bt_dev_wake = val;
|
||||
break;
|
||||
case HALMAC_GPIO_FUNC_SW_IO_0:
|
||||
adapter->pinmux_info.sw_io_0 = val;
|
||||
break;
|
||||
|
@ -21,9 +21,15 @@
|
||||
#include "halmac_efuse_88xx.h"
|
||||
#include "halmac_mimo_88xx.h"
|
||||
#include "halmac_bb_rf_88xx.h"
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
#include "halmac_sdio_88xx.h"
|
||||
#endif
|
||||
#if HALMAC_USB_SUPPORT
|
||||
#include "halmac_usb_88xx.h"
|
||||
#endif
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
#include "halmac_pcie_88xx.h"
|
||||
#endif
|
||||
#include "halmac_gpio_88xx.h"
|
||||
#include "halmac_flash_88xx.h"
|
||||
|
||||
@ -39,6 +45,10 @@
|
||||
#include "halmac_8822c/halmac_init_8822c.h"
|
||||
#endif
|
||||
|
||||
#if HALMAC_8812F_SUPPORT
|
||||
#include "halmac_8812f/halmac_init_8812f.h"
|
||||
#endif
|
||||
|
||||
#if HALMAC_PLATFORM_TESTPROGRAM
|
||||
#include "halmisc_api_88xx.h"
|
||||
#endif
|
||||
@ -49,48 +59,6 @@
|
||||
#define PLTFM_INFO_RSVD_PG_SIZE 16384
|
||||
#define DLFW_PKT_MAX_SIZE 8192 /* need multiple of 2 */
|
||||
|
||||
#define SYS_FUNC_EN 0xDC
|
||||
#define WLAN_SLOT_TIME 0x05
|
||||
#define WLAN_PIFS_TIME 0x19
|
||||
#define WLAN_SIFS_CCK_CONT_TX 0xA
|
||||
#define WLAN_SIFS_OFDM_CONT_TX 0xA
|
||||
#define WLAN_SIFS_CCK_TRX 0x10
|
||||
#define WLAN_SIFS_OFDM_TRX 0x10
|
||||
#define WLAN_VO_TXOP_LIMIT 0x186 /* unit : 32us */
|
||||
#define WLAN_VI_TXOP_LIMIT 0x3BC /* unit : 32us */
|
||||
#define WLAN_RDG_NAV 0x05
|
||||
#define WLAN_TXOP_NAV 0x1B
|
||||
#define WLAN_CCK_RX_TSF 0x30
|
||||
#define WLAN_OFDM_RX_TSF 0x30
|
||||
#define WLAN_TBTT_PROHIBIT 0x04 /* unit : 32us */
|
||||
#define WLAN_TBTT_HOLD_TIME 0x064 /* unit : 32us */
|
||||
#define WLAN_DRV_EARLY_INT 0x04
|
||||
#define WLAN_BCN_DMA_TIME 0x02
|
||||
#define WLAN_ACK_TO_CCK 0x40
|
||||
|
||||
#define WLAN_RX_FILTER0 0x0FFFFFFF
|
||||
#define WLAN_RX_FILTER2 0xFFFF
|
||||
#define WLAN_RCR_CFG 0xE400220E
|
||||
#define WLAN_RXPKT_MAX_SZ 12288
|
||||
#define WLAN_RXPKT_MAX_SZ_512 (WLAN_RXPKT_MAX_SZ >> 9)
|
||||
|
||||
#define WLAN_TX_FUNC_CFG1 0x30
|
||||
#define WLAN_TX_FUNC_CFG2 0x30
|
||||
#define WLAN_MAC_OPT_NORM_FUNC1 0x98
|
||||
#define WLAN_MAC_OPT_LB_FUNC1 0x80
|
||||
#define WLAN_MAC_OPT_FUNC2 0x30810041
|
||||
|
||||
#define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \
|
||||
(WLAN_SIFS_OFDM_CONT_TX << BIT_SHIFT_SIFS_OFDM_CTX) | \
|
||||
(WLAN_SIFS_CCK_TRX << BIT_SHIFT_SIFS_CCK_TRX) | \
|
||||
(WLAN_SIFS_OFDM_TRX << BIT_SHIFT_SIFS_OFDM_TRX))
|
||||
|
||||
#define WLAN_TBTT_TIME (WLAN_TBTT_PROHIBIT |\
|
||||
(WLAN_TBTT_HOLD_TIME << BIT_SHIFT_TBTT_HOLD_TIME_AP))
|
||||
|
||||
#define WLAN_NAV_CFG (WLAN_RDG_NAV | (WLAN_TXOP_NAV << 16))
|
||||
#define WLAN_RX_TSF_CFG (WLAN_CCK_RX_TSF | (WLAN_OFDM_RX_TSF) << 8)
|
||||
|
||||
static void
|
||||
init_state_machine_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
@ -109,7 +77,7 @@ init_adapter_param_88xx(struct halmac_adapter *adapter)
|
||||
adapter->api_registry.sdio_cmd53_4byte_en = 1;
|
||||
|
||||
adapter->efuse_map = (u8 *)NULL;
|
||||
adapter->efuse_map_valid = _FALSE;
|
||||
adapter->efuse_map_valid = 0;
|
||||
adapter->efuse_end = 0;
|
||||
|
||||
adapter->dlfw_pkt_size = DLFW_PKT_MAX_SIZE;
|
||||
@ -119,7 +87,7 @@ init_adapter_param_88xx(struct halmac_adapter *adapter)
|
||||
adapter->cfg_param_info.buf = NULL;
|
||||
adapter->cfg_param_info.buf_wptr = NULL;
|
||||
adapter->cfg_param_info.num = 0;
|
||||
adapter->cfg_param_info.full_fifo_mode = _FALSE;
|
||||
adapter->cfg_param_info.full_fifo_mode = 0;
|
||||
adapter->cfg_param_info.buf_size = 0;
|
||||
adapter->cfg_param_info.avl_buf_size = 0;
|
||||
adapter->cfg_param_info.offset_accum = 0;
|
||||
@ -134,7 +102,7 @@ init_adapter_param_88xx(struct halmac_adapter *adapter)
|
||||
adapter->ch_sw_info.ch_num = 0;
|
||||
|
||||
adapter->drv_info_size = 0;
|
||||
adapter->tx_desc_transfer = _FALSE;
|
||||
adapter->tx_desc_transfer = 0;
|
||||
|
||||
adapter->txff_alloc.tx_fifo_pg_num = 0;
|
||||
adapter->txff_alloc.acq_pg_num = 0;
|
||||
@ -193,6 +161,13 @@ init_adapter_param_88xx(struct halmac_adapter *adapter)
|
||||
adapter->pcie_refautok_en = 1;
|
||||
adapter->pwr_off_flow_flag = 0;
|
||||
|
||||
adapter->rx_ignore_info.hdr_chk_mask = 1;
|
||||
adapter->rx_ignore_info.fcs_chk_mask = 1;
|
||||
adapter->rx_ignore_info.hdr_chk_en = 0;
|
||||
adapter->rx_ignore_info.fcs_chk_en = 0;
|
||||
adapter->rx_ignore_info.cck_rst_en = 0;
|
||||
adapter->rx_ignore_info.fcs_chk_thr = HALMAC_PSF_FCS_CHK_THR_28;
|
||||
|
||||
init_adapter_dynamic_param_88xx(adapter);
|
||||
init_state_machine_88xx(adapter);
|
||||
}
|
||||
@ -223,6 +198,7 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_register_api = register_api_88xx;
|
||||
api->halmac_download_firmware = download_firmware_88xx;
|
||||
api->halmac_free_download_firmware = free_download_firmware_88xx;
|
||||
api->halmac_reset_wifi_fw = reset_wifi_fw_88xx;
|
||||
api->halmac_get_fw_version = get_fw_version_88xx;
|
||||
api->halmac_cfg_mac_addr = cfg_mac_addr_88xx;
|
||||
api->halmac_cfg_bssid = cfg_bssid_88xx;
|
||||
@ -232,13 +208,9 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_cfg_bcn_space = cfg_bcn_space_88xx;
|
||||
api->halmac_rw_bcn_ctrl = rw_bcn_ctrl_88xx;
|
||||
api->halmac_cfg_multicast_addr = cfg_multicast_addr_88xx;
|
||||
api->halmac_pre_init_system_cfg = pre_init_system_cfg_88xx;
|
||||
api->halmac_init_system_cfg = init_system_cfg_88xx;
|
||||
api->halmac_init_edca_cfg = init_edca_cfg_88xx;
|
||||
api->halmac_cfg_operation_mode = cfg_operation_mode_88xx;
|
||||
api->halmac_cfg_ch_bw = cfg_ch_bw_88xx;
|
||||
api->halmac_cfg_bw = cfg_bw_88xx;
|
||||
api->halmac_init_wmac_cfg = init_wmac_cfg_88xx;
|
||||
api->halmac_init_mac_cfg = init_mac_cfg_88xx;
|
||||
api->halmac_dump_efuse_map = dump_efuse_map_88xx;
|
||||
api->halmac_dump_efuse_map_bt = dump_efuse_map_bt_88xx;
|
||||
@ -315,15 +287,6 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_dl_drv_rsvd_page = dl_drv_rsvd_page_88xx;
|
||||
api->halmac_cfg_csi_rate = cfg_csi_rate_88xx;
|
||||
|
||||
api->halmac_sdio_cmd53_4byte = sdio_cmd53_4byte_88xx;
|
||||
api->halmac_sdio_hw_info = sdio_hw_info_88xx;
|
||||
|
||||
api->halmac_init_sdio_cfg = init_sdio_cfg_88xx;
|
||||
api->halmac_init_usb_cfg = init_usb_cfg_88xx;
|
||||
api->halmac_init_pcie_cfg = init_pcie_cfg_88xx;
|
||||
api->halmac_deinit_sdio_cfg = deinit_sdio_cfg_88xx;
|
||||
api->halmac_deinit_usb_cfg = deinit_usb_cfg_88xx;
|
||||
api->halmac_deinit_pcie_cfg = deinit_pcie_cfg_88xx;
|
||||
api->halmac_txfifo_is_empty = txfifo_is_empty_88xx;
|
||||
api->halmac_download_flash = download_flash_88xx;
|
||||
api->halmac_read_flash = read_flash_88xx;
|
||||
@ -344,9 +307,11 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_enter_cpu_sleep_mode = enter_cpu_sleep_mode_88xx;
|
||||
api->halmac_get_cpu_mode = get_cpu_mode_88xx;
|
||||
api->halmac_drv_fwctrl = drv_fwctrl_88xx;
|
||||
api->halmac_en_ref_autok_pcie = en_ref_autok_88xx;
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
api->halmac_init_sdio_cfg = init_sdio_cfg_88xx;
|
||||
api->halmac_deinit_sdio_cfg = deinit_sdio_cfg_88xx;
|
||||
api->halmac_cfg_rx_aggregation = cfg_sdio_rx_agg_88xx;
|
||||
api->halmac_init_interface_cfg = init_sdio_cfg_88xx;
|
||||
api->halmac_deinit_interface_cfg = deinit_sdio_cfg_88xx;
|
||||
@ -355,7 +320,14 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_get_usb_bulkout_id = get_sdio_bulkout_id_88xx;
|
||||
api->halmac_reg_read_indirect_32 = sdio_indirect_reg_r32_88xx;
|
||||
api->halmac_reg_sdio_cmd53_read_n = sdio_reg_rn_88xx;
|
||||
api->halmac_sdio_cmd53_4byte = sdio_cmd53_4byte_88xx;
|
||||
api->halmac_sdio_hw_info = sdio_hw_info_88xx;
|
||||
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
|
||||
#if HALMAC_USB_SUPPORT
|
||||
api->halmac_init_usb_cfg = init_usb_cfg_88xx;
|
||||
api->halmac_deinit_usb_cfg = deinit_usb_cfg_88xx;
|
||||
api->halmac_cfg_rx_aggregation = cfg_usb_rx_agg_88xx;
|
||||
api->halmac_init_interface_cfg = init_usb_cfg_88xx;
|
||||
api->halmac_deinit_interface_cfg = deinit_usb_cfg_88xx;
|
||||
@ -372,7 +344,11 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_reg_write_32 = reg_w32_usb_88xx;
|
||||
api->halmac_reg_read_indirect_32 = usb_indirect_reg_r32_88xx;
|
||||
api->halmac_reg_sdio_cmd53_read_n = usb_reg_rn_88xx;
|
||||
#endif
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
|
||||
#if HALMAC_PCIE_SUPPORT
|
||||
api->halmac_init_pcie_cfg = init_pcie_cfg_88xx;
|
||||
api->halmac_deinit_pcie_cfg = deinit_pcie_cfg_88xx;
|
||||
api->halmac_cfg_rx_aggregation = cfg_pcie_rx_agg_88xx;
|
||||
api->halmac_init_interface_cfg = init_pcie_cfg_88xx;
|
||||
api->halmac_deinit_interface_cfg = deinit_pcie_cfg_88xx;
|
||||
@ -389,6 +365,8 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
api->halmac_reg_write_32 = reg_w32_pcie_88xx;
|
||||
api->halmac_reg_read_indirect_32 = pcie_indirect_reg_r32_88xx;
|
||||
api->halmac_reg_sdio_cmd53_read_n = pcie_reg_rn_88xx;
|
||||
api->halmac_en_ref_autok_pcie = en_ref_autok_88xx;
|
||||
#endif
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Set halmac io function Error!!\n");
|
||||
}
|
||||
@ -404,6 +382,10 @@ mount_api_88xx(struct halmac_adapter *adapter)
|
||||
} else if (adapter->chip_id == HALMAC_CHIP_ID_8822C) {
|
||||
#if HALMAC_8822C_SUPPORT
|
||||
mount_api_8822c(adapter);
|
||||
#endif
|
||||
} else if (adapter->chip_id == HALMAC_CHIP_ID_8812F) {
|
||||
#if HALMAC_8812F_SUPPORT
|
||||
mount_api_8812f(adapter);
|
||||
#endif
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Chip ID undefine!!\n");
|
||||
@ -498,206 +480,6 @@ register_api_88xx(struct halmac_adapter *adapter,
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* pre_init_system_cfg_88xx() - pre-init system config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
pre_init_system_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u8 enable_bb;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_W8(REG_RSV_CTRL, 0);
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
|
||||
if (leave_sdio_suspend_88xx(adapter) != HALMAC_RET_SUCCESS)
|
||||
return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
|
||||
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20)
|
||||
HALMAC_REG_W8(0xFE5B, HALMAC_REG_R8(0xFE5B) | BIT(4));
|
||||
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
|
||||
/* For PCIE power on fail issue */
|
||||
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 1,
|
||||
HALMAC_REG_R8(REG_HCI_OPT_CTRL + 1) | BIT(0));
|
||||
}
|
||||
|
||||
/* Config PIN Mux */
|
||||
value32 = HALMAC_REG_R32(REG_PAD_CTRL1);
|
||||
value32 = value32 & (~(BIT(28) | BIT(29)));
|
||||
value32 = value32 | BIT(28) | BIT(29);
|
||||
HALMAC_REG_W32(REG_PAD_CTRL1, value32);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_LED_CFG);
|
||||
value32 = value32 & (~(BIT(25) | BIT(26)));
|
||||
HALMAC_REG_W32(REG_LED_CFG, value32);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG);
|
||||
value32 = value32 & (~(BIT(2)));
|
||||
value32 = value32 | BIT(2);
|
||||
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
|
||||
|
||||
enable_bb = _FALSE;
|
||||
set_hw_value_88xx(adapter, HALMAC_HW_EN_BB_RF, &enable_bb);
|
||||
|
||||
if (HALMAC_REG_R8(REG_SYS_CFG1 + 2) & BIT(4)) {
|
||||
PLTFM_MSG_ERR("[ERR]test mode!!\n");
|
||||
return HALMAC_RET_WLAN_MODE_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_system_cfg_88xx() - init system config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_system_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u32 tmp = 0;
|
||||
u32 value32;
|
||||
enum halmac_ret_status status;
|
||||
u8 hwval;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (adapter->intf == HALMAC_INTERFACE_PCIE) {
|
||||
hwval = 1;
|
||||
status = api->halmac_set_hw_value(adapter,
|
||||
HALMAC_HW_PCIE_REF_AUTOK,
|
||||
&hwval);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
}
|
||||
|
||||
HALMAC_REG_W8(REG_SYS_FUNC_EN + 1, SYS_FUNC_EN);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_SYS_SDIO_CTRL) | BIT_LTE_MUX_CTRL_PATH;
|
||||
HALMAC_REG_W32(REG_SYS_SDIO_CTRL, value32);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_CPU_DMEM_CON) | BIT_WL_PLATFORM_RST;
|
||||
#if HALMAC_8822C_SUPPORT
|
||||
if (adapter->chip_id != HALMAC_CHIP_ID_8822B &&
|
||||
adapter->chip_id != HALMAC_CHIP_ID_8821C)
|
||||
value32 |= BIT_DDMA_EN;
|
||||
#endif
|
||||
HALMAC_REG_W32(REG_CPU_DMEM_CON, value32);
|
||||
|
||||
/*disable boot-from-flash for driver's DL FW*/
|
||||
tmp = HALMAC_REG_R32(REG_MCUFW_CTRL);
|
||||
if (tmp & BIT_BOOT_FSPI_EN) {
|
||||
HALMAC_REG_W32(REG_MCUFW_CTRL, tmp & (~BIT_BOOT_FSPI_EN));
|
||||
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG) & (~BIT_FSPI_EN);
|
||||
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
|
||||
}
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_edca_cfg_88xx() - init EDCA config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_edca_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
/* Clear TX pause */
|
||||
HALMAC_REG_W16(REG_TXPAUSE, 0x0000);
|
||||
|
||||
HALMAC_REG_W8(REG_SLOT, WLAN_SLOT_TIME);
|
||||
HALMAC_REG_W8(REG_PIFS, WLAN_PIFS_TIME);
|
||||
HALMAC_REG_W32(REG_SIFS, WLAN_SIFS_CFG);
|
||||
|
||||
HALMAC_REG_W16(REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT);
|
||||
HALMAC_REG_W16(REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT);
|
||||
|
||||
HALMAC_REG_W32(REG_RD_NAV_NXT, WLAN_NAV_CFG);
|
||||
HALMAC_REG_W16(REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
|
||||
|
||||
/* Set beacon cotnrol - enable TSF and other related functions */
|
||||
HALMAC_REG_W8(REG_BCN_CTRL, (u8)(HALMAC_REG_R8(REG_BCN_CTRL) |
|
||||
BIT_EN_BCN_FUNCTION));
|
||||
|
||||
/* Set send beacon related registers */
|
||||
HALMAC_REG_W32(REG_TBTT_PROHIBIT, WLAN_TBTT_TIME);
|
||||
HALMAC_REG_W8(REG_DRVERLYINT, WLAN_DRV_EARLY_INT);
|
||||
HALMAC_REG_W8(REG_BCNDMATIM, WLAN_BCN_DMA_TIME);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_wmac_cfg_88xx() - init wmac config
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_wmac_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u8 value8;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_W32(REG_RXFLTMAP0, WLAN_RX_FILTER0);
|
||||
HALMAC_REG_W16(REG_RXFLTMAP2, WLAN_RX_FILTER2);
|
||||
|
||||
HALMAC_REG_W32(REG_RCR, WLAN_RCR_CFG);
|
||||
|
||||
HALMAC_REG_W8(REG_RX_PKT_LIMIT, WLAN_RXPKT_MAX_SZ_512);
|
||||
|
||||
HALMAC_REG_W8(REG_TCR + 2, WLAN_TX_FUNC_CFG2);
|
||||
HALMAC_REG_W8(REG_TCR + 1, WLAN_TX_FUNC_CFG1);
|
||||
|
||||
#if HALMAC_8821C_SUPPORT
|
||||
if (adapter->chip_id == HALMAC_CHIP_ID_8821C)
|
||||
HALMAC_REG_W8(REG_ACKTO_CCK, WLAN_ACK_TO_CCK);
|
||||
#endif
|
||||
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2);
|
||||
|
||||
if (adapter->hw_cfg_info.trx_mode == HALMAC_TRNSFER_NORMAL)
|
||||
value8 = WLAN_MAC_OPT_NORM_FUNC1;
|
||||
else
|
||||
value8 = WLAN_MAC_OPT_LB_FUNC1;
|
||||
|
||||
HALMAC_REG_W8(REG_WMAC_OPTION_FUNCTION + 4, value8);
|
||||
|
||||
status = api->halmac_init_low_pwr(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* init_mac_cfg_88xx() - config page1~page7 register
|
||||
* @adapter : the adapter of halmac
|
||||
@ -712,7 +494,7 @@ init_mac_cfg_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__, mode);
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
status = api->halmac_init_trx_cfg(adapter, mode);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
@ -726,13 +508,13 @@ init_mac_cfg_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
|
||||
return status;
|
||||
}
|
||||
|
||||
status = init_edca_cfg_88xx(adapter);
|
||||
status = api->halmac_init_edca_cfg(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]init edca %x\n", status);
|
||||
return status;
|
||||
}
|
||||
|
||||
status = init_wmac_cfg_88xx(adapter);
|
||||
status = api->halmac_init_wmac_cfg(adapter);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]init wmac %x\n", status);
|
||||
return status;
|
||||
@ -854,7 +636,7 @@ tx_desc_chksum_88xx(struct halmac_adapter *adapter, u8 enable)
|
||||
adapter->tx_desc_checksum = enable;
|
||||
|
||||
value16 = HALMAC_REG_R16(REG_TXDMA_OFFSET_CHK);
|
||||
if (enable == _TRUE)
|
||||
if (enable == 1)
|
||||
HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK, value16 | BIT(13));
|
||||
else
|
||||
HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK, value16 & ~BIT(13));
|
||||
@ -875,9 +657,11 @@ verify_io_88xx(struct halmac_adapter *adapter)
|
||||
offset = REG_PAGE5_DUMMY;
|
||||
if (0 == (offset & 0xFFFF0000))
|
||||
offset |= WLAN_IOREG_OFFSET;
|
||||
|
||||
#if HALMAC_SDIO_SUPPORT
|
||||
ret_status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
|
||||
#else
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
#endif
|
||||
/* Verify CMD52 R/W */
|
||||
wvalue8 = 0xab;
|
||||
PLTFM_SDIO_CMD52_W(offset, wvalue8);
|
||||
@ -945,7 +729,8 @@ verify_send_rsvd_page_88xx(struct halmac_adapter *adapter)
|
||||
u8 *rsvd_buf = NULL;
|
||||
u8 *rsvd_page = NULL;
|
||||
u32 i;
|
||||
u32 pkt_size = 64, payload = 0xab;
|
||||
u32 pkt_size = 64;
|
||||
u32 payload = 0xab;
|
||||
enum halmac_ret_status ret_status = HALMAC_RET_SUCCESS;
|
||||
|
||||
rsvd_buf = (u8 *)PLTFM_MALLOC(pkt_size);
|
||||
@ -1002,8 +787,12 @@ pg_num_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
|
||||
struct halmac_pg_num *tbl)
|
||||
{
|
||||
u8 flag;
|
||||
u16 hpq_num = 0, lpq_num = 0, npq_num = 0, gapq_num = 0;
|
||||
u16 expq_num = 0, pubq_num = 0;
|
||||
u16 hpq_num = 0;
|
||||
u16 lpq_num = 0;
|
||||
u16 npq_num = 0;
|
||||
u16 gapq_num = 0;
|
||||
u16 expq_num = 0;
|
||||
u16 pubq_num = 0;
|
||||
u32 i = 0;
|
||||
|
||||
flag = 0;
|
||||
|
@ -33,18 +33,6 @@ init_adapter_dynamic_param_88xx(struct halmac_adapter *adapter);
|
||||
enum halmac_ret_status
|
||||
mount_api_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
pre_init_system_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_system_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_edca_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_wmac_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
init_mac_cfg_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
|
||||
|
||||
|
@ -22,6 +22,7 @@
|
||||
|
||||
#define TXBF_CTRL_CFG (BIT_R_ENABLE_NDPA | BIT_USE_NDPA_PARAMETER | \
|
||||
BIT_R_EN_NDPA_INT | BIT_DIS_NDP_BFEN)
|
||||
#define CSI_RATE_MAP 0x292911
|
||||
|
||||
static void
|
||||
cfg_mu_bfee_88xx(struct halmac_adapter *adapter,
|
||||
@ -153,7 +154,7 @@ cfg_mu_bfer_88xx(struct halmac_adapter *adapter,
|
||||
u32 gid_valid[6] = {0};
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
if (param->mu_tx_en == _FALSE) {
|
||||
if (param->mu_tx_en == 0) {
|
||||
HALMAC_REG_W8(REG_MU_TX_CTL,
|
||||
HALMAC_REG_R8(REG_MU_TX_CTL) & ~(BIT(7)));
|
||||
return;
|
||||
@ -211,7 +212,7 @@ cfg_mu_bfer_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
/*To validate the sounding successful MU STA and enable MU TX*/
|
||||
for (i = 0; i < 6; i++) {
|
||||
if (param->sounding_sts[i] == _TRUE)
|
||||
if (param->sounding_sts[i] == 1)
|
||||
mu_tbl_valid |= BIT(i);
|
||||
}
|
||||
HALMAC_REG_W8(REG_MU_TX_CTL, mu_tbl_valid | BIT(7));
|
||||
@ -252,6 +253,16 @@ cfg_sounding_88xx(struct halmac_adapter *adapter, enum halmac_snd_role role,
|
||||
HALMAC_REG_W8(REG_SND_PTCL_CTRL + 3, 0x26);
|
||||
HALMAC_REG_W8_CLR(REG_RXFLTMAP1, BIT(4));
|
||||
HALMAC_REG_W8_CLR(REG_RXFLTMAP4, BIT(4));
|
||||
#if (HALMAC_8822C_SUPPORT || HALMAC_8812F_SUPPORT)
|
||||
if (adapter->chip_id == HALMAC_CHIP_ID_8822C)
|
||||
HALMAC_REG_W32(REG_CSI_RRSR,
|
||||
BIT_CSI_RRSC_BITMAP(CSI_RATE_MAP) |
|
||||
BIT_OFDM_LEN_TH(0));
|
||||
else if (adapter->chip_id == HALMAC_CHIP_ID_8812F)
|
||||
HALMAC_REG_W32(REG_CSI_RRSR,
|
||||
BIT_CSI_RRSC_BITMAP(CSI_RATE_MAP) |
|
||||
BIT_OFDM_LEN_TH(3));
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
return HALMAC_RET_INVALID_SOUNDING_SETTING;
|
||||
@ -740,7 +751,7 @@ fw_snding_88xx(struct halmac_adapter *adapter,
|
||||
|
||||
hdr_info.sub_cmd_id = SUB_CMD_ID_FW_SNDING;
|
||||
hdr_info.content_size = 8;
|
||||
hdr_info.ack = _TRUE;
|
||||
hdr_info.ack = 1;
|
||||
set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
|
||||
adapter->halmac_state.fw_snding_state.seq_num = seq_num;
|
||||
|
||||
@ -767,7 +778,7 @@ snding_pkt_chk_88xx(struct halmac_adapter *adapter, u8 *pkt)
|
||||
|
||||
if (GET_TX_DESC_NDPA(pkt) == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]txdesc ndpa = 0\n");
|
||||
return _FALSE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
data_rate = (u8)GET_TX_DESC_DATARATE(pkt);
|
||||
@ -775,21 +786,21 @@ snding_pkt_chk_88xx(struct halmac_adapter *adapter, u8 *pkt)
|
||||
data_rate <= HALMAC_VHT_NSS2_MCS9)) {
|
||||
if (!(data_rate >= HALMAC_MCS8 && data_rate <= HALMAC_MCS15)) {
|
||||
PLTFM_MSG_ERR("[ERR]txdesc rate\n");
|
||||
return _FALSE;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (GET_TX_DESC_NAVUSEHDR(pkt) == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]txdesc navusehdr = 0\n");
|
||||
return _FALSE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (GET_TX_DESC_USE_RATE(pkt) == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]txdesc userate = 0\n");
|
||||
return _FALSE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return _TRUE;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static enum halmac_cmd_construct_state
|
||||
|
@ -1,543 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "halmac_pcie_88xx.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
|
||||
/**
|
||||
* init_pcie_cfg_88xx() - init PCIe
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_pcie_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
if (adapter->intf != HALMAC_INTERFACE_PCIE)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* deinit_pcie_cfg_88xx() - deinit PCIE
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
deinit_pcie_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
if (adapter->intf != HALMAC_INTERFACE_PCIE)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* cfg_pcie_rx_agg_88xx() - config rx aggregation
|
||||
* @adapter : the adapter of halmac
|
||||
* @halmac_rx_agg_mode
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
cfg_pcie_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_rxagg_cfg *cfg)
|
||||
{
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_r8_pcie_88xx() - read 1byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u8
|
||||
reg_r8_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
return PLTFM_REG_R8(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_w8_pcie_88xx() - write 1byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w8_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
{
|
||||
PLTFM_REG_W8(offset, value);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_r16_pcie_88xx() - read 2byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u16
|
||||
reg_r16_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
return PLTFM_REG_R16(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_w16_pcie_88xx() - write 2byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w16_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u16 value)
|
||||
{
|
||||
PLTFM_REG_W16(offset, value);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_r32_pcie_88xx() - read 4byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u32
|
||||
reg_r32_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
return PLTFM_REG_R32(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
* reg_w32_pcie_88xx() - write 4byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @value : register value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
reg_w32_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u32 value)
|
||||
{
|
||||
PLTFM_REG_W32(offset, value);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* cfg_txagg_pcie_align_88xx() -config sdio bus tx agg alignment
|
||||
* @adapter : the adapter of halmac
|
||||
* @enable : function enable(1)/disable(0)
|
||||
* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
|
||||
* Author : Soar Tu
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
cfg_txagg_pcie_align_88xx(struct halmac_adapter *adapter, u8 enable,
|
||||
u16 align_size)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* tx_allowed_pcie_88xx() - check tx status
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : tx packet, include txdesc
|
||||
* @size : tx packet size, include txdesc
|
||||
* Author : Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
tx_allowed_pcie_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcie_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : Soar
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u32
|
||||
pcie_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcie_reg_rn_88xx() - read n byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @size : register value size
|
||||
* @value : register value
|
||||
* Author : Soar
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
pcie_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
u8 *value)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* set_pcie_bulkout_num_88xx() - inform bulk-out num
|
||||
* @adapter : the adapter of halmac
|
||||
* @num : usb bulk-out number
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
set_pcie_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* get_pcie_tx_addr_88xx() - get CMD53 addr for the TX packet
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : tx packet, include txdesc
|
||||
* @size : tx packet size
|
||||
* @cmd53_addr : cmd53 addr value
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
get_pcie_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u32 *cmd53_addr)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* get_pcie_bulkout_id_88xx() - get bulk out id for the TX packet
|
||||
* @adapter : the adapter of halmac
|
||||
* @buf : tx packet, include txdesc
|
||||
* @size : tx packet size
|
||||
* @id : usb bulk-out id
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
get_pcie_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u8 *id)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
mdio_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed)
|
||||
{
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u8 real_addr = 0;
|
||||
|
||||
HALMAC_REG_W16(REG_MDIO_V1, data);
|
||||
|
||||
real_addr = (addr & 0x1F);
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
|
||||
|
||||
if (speed == HAL_INTF_PHY_PCIE_GEN1) {
|
||||
if (addr < 0x20)
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
|
||||
else
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
|
||||
} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
|
||||
if (addr < 0x20)
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
|
||||
else
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
|
||||
}
|
||||
|
||||
HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1);
|
||||
|
||||
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
|
||||
cnt = 20;
|
||||
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
PLTFM_MSG_ERR("[ERR]MDIO write fail!\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
u16
|
||||
mdio_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
|
||||
{
|
||||
u16 ret = 0;
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u8 real_addr = 0;
|
||||
|
||||
real_addr = (addr & 0x1F);
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
|
||||
|
||||
if (speed == HAL_INTF_PHY_PCIE_GEN1) {
|
||||
if (addr < 0x20)
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
|
||||
else
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
|
||||
} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
|
||||
if (addr < 0x20)
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
|
||||
else
|
||||
HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
|
||||
} else {
|
||||
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
|
||||
}
|
||||
|
||||
HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_RFLAG_V1);
|
||||
|
||||
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
|
||||
cnt = 20;
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
ret = 0xFFFF;
|
||||
PLTFM_MSG_ERR("[ERR]MDIO read fail!\n");
|
||||
} else {
|
||||
ret = HALMAC_REG_R16(REG_MDIO_V1 + 2);
|
||||
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
dbi_w32_88xx(struct halmac_adapter *adapter, u16 addr, u32 data)
|
||||
{
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
u16 write_addr = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
HALMAC_REG_W32(REG_DBI_WDATA_V1, data);
|
||||
|
||||
write_addr = ((addr & 0x0ffc) | (0x000F << 12));
|
||||
HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
|
||||
|
||||
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
|
||||
cnt = 20;
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
u32
|
||||
dbi_r32_88xx(struct halmac_adapter *adapter, u16 addr)
|
||||
{
|
||||
u16 read_addr = addr & 0x0ffc;
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
u32 ret = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
|
||||
|
||||
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
|
||||
cnt = 20;
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
ret = 0xFFFF;
|
||||
PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
|
||||
} else {
|
||||
ret = HALMAC_REG_R32(REG_DBI_RDATA_V1);
|
||||
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
dbi_w8_88xx(struct halmac_adapter *adapter, u16 addr, u8 data)
|
||||
{
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
u16 write_addr = 0;
|
||||
u16 remainder = addr & (4 - 1);
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
HALMAC_REG_W8(REG_DBI_WDATA_V1 + remainder, data);
|
||||
|
||||
write_addr = ((addr & 0x0ffc) | (BIT(0) << (remainder + 12)));
|
||||
|
||||
HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
|
||||
|
||||
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
|
||||
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
|
||||
cnt = 20;
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
u8
|
||||
dbi_r8_88xx(struct halmac_adapter *adapter, u16 addr)
|
||||
{
|
||||
u16 read_addr = addr & 0x0ffc;
|
||||
u8 tmp_u1b = 0;
|
||||
u32 cnt = 0;
|
||||
u8 ret = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
|
||||
HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
|
||||
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
|
||||
cnt = 20;
|
||||
while (tmp_u1b && (cnt != 0)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
|
||||
cnt--;
|
||||
}
|
||||
|
||||
if (tmp_u1b) {
|
||||
ret = 0xFF;
|
||||
PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
|
||||
} else {
|
||||
ret = HALMAC_REG_R8(REG_DBI_RDATA_V1 + (addr & (4 - 1)));
|
||||
PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
trxdma_check_idle_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 cnt = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
/* Stop Tx & Rx DMA */
|
||||
HALMAC_REG_W32_SET(REG_RXPKT_NUM, BIT(18));
|
||||
HALMAC_REG_W16_SET(REG_PCIE_CTRL, ~(BIT(15) | BIT(8)));
|
||||
|
||||
/* Stop FW */
|
||||
HALMAC_REG_W16_CLR(REG_SYS_FUNC_EN, BIT(10));
|
||||
|
||||
/* Check Tx DMA is idle */
|
||||
cnt = 20;
|
||||
while ((HALMAC_REG_R8(REG_SYS_CFG5) & BIT(2)) == BIT(2)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
cnt--;
|
||||
if (cnt == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]Chk tx idle\n");
|
||||
return HALMAC_RET_POWER_OFF_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check Rx DMA is idle */
|
||||
cnt = 20;
|
||||
while ((HALMAC_REG_R32(REG_RXPKT_NUM) & BIT(17)) != BIT(17)) {
|
||||
PLTFM_DELAY_US(10);
|
||||
cnt--;
|
||||
if (cnt == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]Chk rx idle\n");
|
||||
return HALMAC_RET_POWER_OFF_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
void
|
||||
en_ref_autok_88xx(struct halmac_adapter *adapter, u8 en)
|
||||
{
|
||||
if (en == 1)
|
||||
adapter->pcie_refautok_en = 1;
|
||||
else
|
||||
adapter->pcie_refautok_en = 0;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
@ -1,102 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef _HALMAC_PCIE_88XX_H_
|
||||
#define _HALMAC_PCIE_88XX_H_
|
||||
|
||||
#include "../halmac_api.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
|
||||
enum halmac_ret_status
|
||||
init_pcie_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
deinit_pcie_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
cfg_pcie_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_rxagg_cfg *cfg);
|
||||
|
||||
u8
|
||||
reg_r8_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w8_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u8 value);
|
||||
|
||||
u16
|
||||
reg_r16_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w16_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u16 value);
|
||||
|
||||
u32
|
||||
reg_r32_pcie_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
reg_w32_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u32 value);
|
||||
|
||||
enum halmac_ret_status
|
||||
cfg_txagg_pcie_align_88xx(struct halmac_adapter *adapter, u8 enable,
|
||||
u16 align_size);
|
||||
|
||||
enum halmac_ret_status
|
||||
tx_allowed_pcie_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size);
|
||||
|
||||
u32
|
||||
pcie_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
pcie_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
u8 *value);
|
||||
|
||||
enum halmac_ret_status
|
||||
set_pcie_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num);
|
||||
|
||||
enum halmac_ret_status
|
||||
get_pcie_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u32 *cmd53_addr);
|
||||
|
||||
enum halmac_ret_status
|
||||
get_pcie_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u8 *id);
|
||||
|
||||
enum halmac_ret_status
|
||||
mdio_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed);
|
||||
|
||||
u16
|
||||
mdio_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed);
|
||||
|
||||
enum halmac_ret_status
|
||||
dbi_w32_88xx(struct halmac_adapter *adapter, u16 addr, u32 data);
|
||||
|
||||
u32
|
||||
dbi_r32_88xx(struct halmac_adapter *adapter, u16 addr);
|
||||
|
||||
enum halmac_ret_status
|
||||
dbi_w8_88xx(struct halmac_adapter *adapter, u16 addr, u8 data);
|
||||
|
||||
u8
|
||||
dbi_r8_88xx(struct halmac_adapter *adapter, u16 addr);
|
||||
|
||||
enum halmac_ret_status
|
||||
trxdma_check_idle_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
void
|
||||
en_ref_autok_88xx(struct halmac_adapter *dapter, u8 en);
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
||||
#endif/* _HALMAC_PCIE_88XX_H_ */
|
@ -1,892 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "halmac_sdio_88xx.h"
|
||||
#include "halmac_88xx_cfg.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
|
||||
/* define the SDIO Bus CLK threshold */
|
||||
/* for avoiding CMD53 fails that result from SDIO CLK sync to ana_clk fail */
|
||||
#define SDIO_CLK_HIGH_SPEED_TH 50 /* 50MHz */
|
||||
#define SDIO_CLK_SPEED_MAX 208 /* 208MHz */
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u8
|
||||
r_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr);
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size);
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size);
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val);
|
||||
|
||||
/**
|
||||
* init_sdio_cfg_88xx() - init SDIO
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
init_sdio_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
if (adapter->intf != HALMAC_INTERFACE_SDIO)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
HALMAC_REG_R32(REG_SDIO_FREE_TXPG);
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_SDIO_TX_CTRL) & 0xFFFF;
|
||||
value32 &= ~(BIT_CMD_ERR_STOP_INT_EN | BIT_EN_MASK_TIMER |
|
||||
BIT_EN_RXDMA_MASK_INT);
|
||||
HALMAC_REG_W32(REG_SDIO_TX_CTRL, value32);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* deinit_sdio_cfg_88xx() - deinit SDIO
|
||||
* @adapter : the adapter of halmac
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
deinit_sdio_cfg_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
if (adapter->intf != HALMAC_INTERFACE_SDIO)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* cfg_sdio_rx_agg_88xx() - config rx aggregation
|
||||
* @adapter : the adapter of halmac
|
||||
* @halmac_rx_agg_mode
|
||||
* Author : KaiYuan Chang/Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
cfg_sdio_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_rxagg_cfg *cfg)
|
||||
{
|
||||
u8 value8;
|
||||
u8 size;
|
||||
u8 timeout;
|
||||
u8 agg_enable;
|
||||
u32 value32;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
agg_enable = HALMAC_REG_R8(REG_TXDMA_PQ_MAP);
|
||||
|
||||
switch (cfg->mode) {
|
||||
case HALMAC_RX_AGG_MODE_NONE:
|
||||
agg_enable &= ~(BIT_RXDMA_AGG_EN);
|
||||
break;
|
||||
case HALMAC_RX_AGG_MODE_DMA:
|
||||
case HALMAC_RX_AGG_MODE_USB:
|
||||
agg_enable |= BIT_RXDMA_AGG_EN;
|
||||
break;
|
||||
default:
|
||||
PLTFM_MSG_ERR("[ERR]unsupported mode\n");
|
||||
agg_enable &= ~BIT_RXDMA_AGG_EN;
|
||||
break;
|
||||
}
|
||||
|
||||
if (cfg->threshold.drv_define == _FALSE) {
|
||||
size = 0xFF;
|
||||
timeout = 0x01;
|
||||
} else {
|
||||
size = cfg->threshold.size;
|
||||
timeout = cfg->threshold.timeout;
|
||||
}
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_RXDMA_AGG_PG_TH);
|
||||
if (cfg->threshold.size_limit_en == _FALSE)
|
||||
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 & ~BIT_EN_PRE_CALC);
|
||||
else
|
||||
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 | BIT_EN_PRE_CALC);
|
||||
|
||||
HALMAC_REG_W8(REG_TXDMA_PQ_MAP, agg_enable);
|
||||
HALMAC_REG_W16(REG_RXDMA_AGG_PG_TH,
|
||||
(u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO_V1)));
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_RXDMA_MODE);
|
||||
if (0 != (agg_enable & BIT_RXDMA_AGG_EN))
|
||||
HALMAC_REG_W8(REG_RXDMA_MODE, value8 | BIT_DMA_MODE);
|
||||
else
|
||||
HALMAC_REG_W8(REG_RXDMA_MODE, value8 & ~(BIT_DMA_MODE));
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* sdio_reg_rn_88xx() - read n byte register
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* @halmac_size : register value size
|
||||
* @value : register value
|
||||
* Author : Soar
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
sdio_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
u8 *value)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (0 == (offset & 0xFFFF0000)) {
|
||||
PLTFM_MSG_ERR("[ERR]offset 0x%x\n", offset);
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
|
||||
if (status != HALMAC_RET_SUCCESS) {
|
||||
PLTFM_MSG_ERR("[ERR]convert offset\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
PLTFM_MSG_ERR("[ERR]power off\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_SDIO_CMD53_RN(offset, size, value);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* cfg_txagg_sdio_align_88xx() -config sdio bus tx agg alignment
|
||||
* @adapter : the adapter of halmac
|
||||
* @enable : function enable(1)/disable(0)
|
||||
* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
|
||||
* Author : Soar Tu
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
cfg_txagg_sdio_align_88xx(struct halmac_adapter *adapter, u8 enable,
|
||||
u16 align_size)
|
||||
{
|
||||
u8 i;
|
||||
u8 flag = 0;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (adapter->chip_id == HALMAC_CHIP_ID_8822B)
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
|
||||
if ((align_size & 0xF000) != 0) {
|
||||
PLTFM_MSG_ERR("[ERR]out of range\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
for (i = 3; i <= 11; i++) {
|
||||
if (align_size == 1 << i) {
|
||||
flag = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (flag == 0) {
|
||||
PLTFM_MSG_ERR("[ERR]not 2^3 ~ 2^11\n");
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
adapter->hw_cfg_info.tx_align_size = align_size;
|
||||
|
||||
if (enable)
|
||||
HALMAC_REG_W16(REG_RQPN_CTRL_2, 0x8000 | align_size);
|
||||
else
|
||||
HALMAC_REG_W16(REG_RQPN_CTRL_2, align_size);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* sdio_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
|
||||
* @adapter : the adapter of halmac
|
||||
* @offset : register offset
|
||||
* Author : Soar
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
u32
|
||||
sdio_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
|
||||
}
|
||||
|
||||
/**
|
||||
* set_sdio_bulkout_num_88xx() - inform bulk-out num
|
||||
* @adapter : the adapter of halmac
|
||||
* @bulkout_num : usb bulk-out number
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
set_sdio_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* get_sdio_bulkout_id_88xx() - get bulk out id for the TX packet
|
||||
* @adapter : the adapter of halmac
|
||||
* @halmac_buf : tx packet, include txdesc
|
||||
* @halmac_size : tx packet size
|
||||
* @bulkout_id : usb bulk-out id
|
||||
* Author : KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
get_sdio_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u8 *id)
|
||||
{
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
/**
|
||||
* sdio_cmd53_4byte_88xx() - cmd53 only for 4byte len register IO
|
||||
* @adapter : the adapter of halmac
|
||||
* @enable : 1->CMD53 only use in 4byte reg, 0 : No limitation
|
||||
* Author : Ivan Lin/KaiYuan Chang
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
sdio_cmd53_4byte_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_sdio_cmd53_4byte_mode mode)
|
||||
{
|
||||
if (adapter->intf != HALMAC_INTERFACE_SDIO)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
if (adapter->api_registry.sdio_cmd53_4byte_en == 0)
|
||||
return HALMAC_RET_NOT_SUPPORT;
|
||||
|
||||
adapter->sdio_cmd53_4byte = mode;
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* sdio_hw_info_88xx() - info sdio hw info
|
||||
* @adapter : the adapter of halmac
|
||||
* @HALMAC_SDIO_CMD53_4BYTE_MODE :
|
||||
* clock_speed : sdio bus clock. Unit -> MHz
|
||||
* spec_ver : sdio spec version
|
||||
* Author : Ivan Lin
|
||||
* Return : enum halmac_ret_status
|
||||
* More details of status code can be found in prototype document
|
||||
*/
|
||||
enum halmac_ret_status
|
||||
sdio_hw_info_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_sdio_hw_info *info)
|
||||
{
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (adapter->intf != HALMAC_INTERFACE_SDIO)
|
||||
return HALMAC_RET_WRONG_INTF;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]SDIO clock:%d, spec:%d\n",
|
||||
info->clock_speed, info->spec_ver);
|
||||
|
||||
if (info->clock_speed > SDIO_CLK_SPEED_MAX)
|
||||
return HALMAC_RET_SDIO_CLOCK_ERR;
|
||||
|
||||
if (info->clock_speed > SDIO_CLK_HIGH_SPEED_TH)
|
||||
adapter->sdio_hw_info.io_hi_speed_flag = 1;
|
||||
|
||||
adapter->sdio_hw_info.io_indir_flag = info->io_indir_flag;
|
||||
if (info->clock_speed > SDIO_CLK_HIGH_SPEED_TH &&
|
||||
adapter->sdio_hw_info.io_indir_flag == 0)
|
||||
PLTFM_MSG_WARN("[WARN]SDIO clock:%d, indir access is better\n",
|
||||
info->clock_speed);
|
||||
|
||||
adapter->sdio_hw_info.clock_speed = info->clock_speed;
|
||||
adapter->sdio_hw_info.spec_ver = info->spec_ver;
|
||||
adapter->sdio_hw_info.block_size = info->block_size;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
void
|
||||
cfg_sdio_tx_page_threshold_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_tx_page_threshold_info *info)
|
||||
{
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
u32 threshold = info->threshold;
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
|
||||
|
||||
if (info->enable == 1) {
|
||||
threshold = BIT(31) | threshold;
|
||||
PLTFM_MSG_TRACE("[TRACE]enable\n");
|
||||
} else {
|
||||
threshold = ~(BIT(31)) & threshold;
|
||||
PLTFM_MSG_TRACE("[TRACE]disable\n");
|
||||
}
|
||||
|
||||
switch (info->dma_queue_sel) {
|
||||
case HALMAC_MAP2_HQ:
|
||||
HALMAC_REG_W32(REG_TQPNT1, threshold);
|
||||
break;
|
||||
case HALMAC_MAP2_NQ:
|
||||
HALMAC_REG_W32(REG_TQPNT2, threshold);
|
||||
break;
|
||||
case HALMAC_MAP2_LQ:
|
||||
HALMAC_REG_W32(REG_TQPNT3, threshold);
|
||||
break;
|
||||
case HALMAC_MAP2_EXQ:
|
||||
HALMAC_REG_W32(REG_TQPNT4, threshold);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
cnv_to_sdio_bus_offset_88xx(struct halmac_adapter *adapter, u32 *offset)
|
||||
{
|
||||
switch ((*offset) & 0xFFFF0000) {
|
||||
case WLAN_IOREG_OFFSET:
|
||||
*offset &= HALMAC_WLAN_MAC_REG_MSK;
|
||||
*offset |= HALMAC_SDIO_CMD_ADDR_MAC_REG << 13;
|
||||
break;
|
||||
case SDIO_LOCAL_OFFSET:
|
||||
*offset &= HALMAC_SDIO_LOCAL_MSK;
|
||||
*offset |= HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13;
|
||||
break;
|
||||
default:
|
||||
*offset = 0xFFFFFFFF;
|
||||
PLTFM_MSG_ERR("[ERR]base address!!\n");
|
||||
return HALMAC_RET_CONVERT_SDIO_OFFSET_FAIL;
|
||||
}
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
leave_sdio_suspend_88xx(struct halmac_adapter *adapter)
|
||||
{
|
||||
u8 value8;
|
||||
u32 cnt;
|
||||
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_SDIO_HSUS_CTRL);
|
||||
HALMAC_REG_W8(REG_SDIO_HSUS_CTRL, value8 & ~(BIT(0)));
|
||||
|
||||
cnt = 10000;
|
||||
while (!(HALMAC_REG_R8(REG_SDIO_HSUS_CTRL) & 0x02)) {
|
||||
cnt--;
|
||||
if (cnt == 0)
|
||||
return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
|
||||
}
|
||||
|
||||
value8 = HALMAC_REG_R8(REG_HCI_OPT_CTRL + 2);
|
||||
if (adapter->sdio_hw_info.spec_ver == HALMAC_SDIO_SPEC_VER_3_00)
|
||||
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 2, value8 | BIT(2));
|
||||
else
|
||||
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 2, value8 & ~(BIT(2)));
|
||||
|
||||
return HALMAC_RET_SUCCESS;
|
||||
}
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u8
|
||||
r_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u8 value8, tmp, cnt = 50;
|
||||
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_cfg);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset);
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8));
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4)));
|
||||
|
||||
do {
|
||||
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
|
||||
cnt--;
|
||||
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
|
||||
|
||||
if (((cnt & BIT(4)) == 0) && cnt == 0)
|
||||
PLTFM_MSG_ERR("[ERR]sdio indirect CMD52 read\n");
|
||||
|
||||
value8 = PLTFM_SDIO_CMD52_R(reg_data);
|
||||
|
||||
return value8;
|
||||
}
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u8 tmp, cnt = 50;
|
||||
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} value32 = { 0x00000000 };
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_cfg);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20));
|
||||
|
||||
do {
|
||||
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
|
||||
cnt--;
|
||||
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
|
||||
|
||||
if (((cnt & BIT(4)) == 0) && cnt == 0)
|
||||
PLTFM_MSG_ERR("[ERR]sdio indirect CMD53 read\n");
|
||||
|
||||
value32.dword = PLTFM_SDIO_CMD53_R32(reg_data);
|
||||
|
||||
return value32.dword;
|
||||
}
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
|
||||
{
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} val = { 0x00000000 };
|
||||
|
||||
if (adapter->pwr_off_flow_flag == 1 ||
|
||||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
|
||||
val.dword = rtk_le32_to_cpu(val.dword);
|
||||
} else {
|
||||
val.dword = r_indir_cmd53_88xx(adapter, adr);
|
||||
}
|
||||
|
||||
return val.dword;
|
||||
}
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
|
||||
{
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} val = { 0x00000000 };
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
if (0 != (adr & (2 - 1))) {
|
||||
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
|
||||
val.byte[1] = r_indir_cmd52_88xx(adapter, adr + 1);
|
||||
} else {
|
||||
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
|
||||
val.byte[1] = PLTFM_SDIO_CMD52_R(reg_data + 1);
|
||||
}
|
||||
val.dword = rtk_le32_to_cpu(val.dword);
|
||||
} else {
|
||||
if (0 != (adr & (2 - 1))) {
|
||||
val.byte[0] = (u8)r_indir_cmd53_88xx(adapter, adr);
|
||||
val.byte[1] = (u8)r_indir_cmd53_88xx(adapter, adr + 1);
|
||||
val.dword = rtk_le32_to_cpu(val.dword);
|
||||
} else {
|
||||
val.dword = r_indir_cmd53_88xx(adapter, adr);
|
||||
}
|
||||
}
|
||||
return val.dword;
|
||||
}
|
||||
|
||||
/*only for r_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static u32
|
||||
r32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr)
|
||||
{
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} val = { 0x00000000 };
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
if (0 != (adr & (4 - 1))) {
|
||||
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
|
||||
val.byte[1] = r_indir_cmd52_88xx(adapter, adr + 1);
|
||||
val.byte[2] = r_indir_cmd52_88xx(adapter, adr + 2);
|
||||
val.byte[3] = r_indir_cmd52_88xx(adapter, adr + 3);
|
||||
} else {
|
||||
val.byte[0] = r_indir_cmd52_88xx(adapter, adr);
|
||||
val.byte[1] = PLTFM_SDIO_CMD52_R(reg_data + 1);
|
||||
val.byte[2] = PLTFM_SDIO_CMD52_R(reg_data + 2);
|
||||
val.byte[3] = PLTFM_SDIO_CMD52_R(reg_data + 3);
|
||||
}
|
||||
val.dword = rtk_le32_to_cpu(val.dword);
|
||||
} else {
|
||||
if (0 != (adr & (4 - 1))) {
|
||||
val.byte[0] = (u8)r_indir_cmd53_88xx(adapter, adr);
|
||||
val.byte[1] = (u8)r_indir_cmd53_88xx(adapter, adr + 1);
|
||||
val.byte[2] = (u8)r_indir_cmd53_88xx(adapter, adr + 2);
|
||||
val.byte[3] = (u8)r_indir_cmd53_88xx(adapter, adr + 3);
|
||||
val.dword = rtk_le32_to_cpu(val.dword);
|
||||
} else {
|
||||
val.dword = r_indir_cmd53_88xx(adapter, adr);
|
||||
}
|
||||
}
|
||||
return val.dword;
|
||||
}
|
||||
|
||||
u32
|
||||
r_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr,
|
||||
enum halmac_io_size size)
|
||||
{
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
union {
|
||||
u32 dword;
|
||||
u8 byte[4];
|
||||
} val = { 0x00000000 };
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->sdio_indir_mutex);
|
||||
|
||||
switch (size) {
|
||||
case HALMAC_IO_BYTE:
|
||||
val.dword = r8_indir_sdio_88xx(adapter, adr);
|
||||
break;
|
||||
case HALMAC_IO_WORD:
|
||||
val.dword = r16_indir_sdio_88xx(adapter, adr);
|
||||
break;
|
||||
case HALMAC_IO_DWORD:
|
||||
val.dword = r32_indir_sdio_88xx(adapter, adr);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->sdio_indir_mutex);
|
||||
|
||||
return val.dword;
|
||||
}
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w_indir_cmd52_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size)
|
||||
{
|
||||
u8 tmp, cnt = 50;
|
||||
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_cfg);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg, (u8)adr);
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(adr >> 8));
|
||||
switch (size) {
|
||||
case HALMAC_IO_BYTE:
|
||||
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(2) | BIT(4)));
|
||||
break;
|
||||
case HALMAC_IO_WORD:
|
||||
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
|
||||
PLTFM_SDIO_CMD52_W(reg_data + 1, (u8)(val >> 8));
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 2,
|
||||
(u8)(BIT(0) | BIT(2) | BIT(4)));
|
||||
break;
|
||||
case HALMAC_IO_DWORD:
|
||||
PLTFM_SDIO_CMD52_W(reg_data, (u8)val);
|
||||
PLTFM_SDIO_CMD52_W(reg_data + 1, (u8)(val >> 8));
|
||||
PLTFM_SDIO_CMD52_W(reg_data + 2, (u8)(val >> 16));
|
||||
PLTFM_SDIO_CMD52_W(reg_data + 3, (u8)(val >> 24));
|
||||
PLTFM_SDIO_CMD52_W(reg_cfg + 2,
|
||||
(u8)(BIT(1) | BIT(2) | BIT(4)));
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
do {
|
||||
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
|
||||
cnt--;
|
||||
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
|
||||
|
||||
if (((cnt & BIT(4)) == 0) && cnt == 0)
|
||||
PLTFM_MSG_ERR("[ERR]sdio indirect CMD52 write\n");
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w_indir_cmd53_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size)
|
||||
{
|
||||
u8 tmp, cnt = 50;
|
||||
u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG;
|
||||
u32 reg_data = REG_SDIO_INDIRECT_REG_DATA;
|
||||
u32 value32 = 0;
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_cfg);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = cnv_to_sdio_bus_offset_88xx(adapter, ®_data);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
|
||||
switch (size) {
|
||||
case HALMAC_IO_BYTE:
|
||||
value32 = adr | BIT(18) | BIT(20);
|
||||
break;
|
||||
case HALMAC_IO_WORD:
|
||||
value32 = adr | BIT(16) | BIT(18) | BIT(20);
|
||||
break;
|
||||
case HALMAC_IO_DWORD:
|
||||
value32 = adr | BIT(17) | BIT(18) | BIT(20);
|
||||
break;
|
||||
default:
|
||||
return HALMAC_RET_FAIL;
|
||||
}
|
||||
|
||||
PLTFM_SDIO_CMD53_W32(reg_data, val);
|
||||
PLTFM_SDIO_CMD53_W32(reg_cfg, value32);
|
||||
|
||||
do {
|
||||
tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2);
|
||||
cnt--;
|
||||
} while (((tmp & BIT(4)) == 0) && (cnt > 0));
|
||||
|
||||
if (((cnt & BIT(4)) == 0) && cnt == 0)
|
||||
PLTFM_MSG_ERR("[ERR]sdio indirect CMD53 read\n");
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w8_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->pwr_off_flow_flag == 1 ||
|
||||
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF)
|
||||
status = w_indir_cmd52_88xx(adapter, adr, val, HALMAC_IO_BYTE);
|
||||
else
|
||||
status = w_indir_cmd53_88xx(adapter, adr, val, HALMAC_IO_BYTE);
|
||||
return status;
|
||||
}
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w16_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
if (0 != (adr & (2 - 1))) {
|
||||
status = w_indir_cmd52_88xx(adapter, adr, val,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd52_88xx(adapter, adr + 1, val >> 8,
|
||||
HALMAC_IO_BYTE);
|
||||
} else {
|
||||
status = w_indir_cmd52_88xx(adapter, adr, val,
|
||||
HALMAC_IO_WORD);
|
||||
}
|
||||
} else {
|
||||
if (0 != (adr & (2 - 1))) {
|
||||
status = w_indir_cmd53_88xx(adapter, adr, val,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd53_88xx(adapter, adr + 1, val >> 8,
|
||||
HALMAC_IO_BYTE);
|
||||
} else {
|
||||
status = w_indir_cmd53_88xx(adapter, adr, val,
|
||||
HALMAC_IO_WORD);
|
||||
}
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/*only for w_indir_sdio_88xx !!, Soar 20171222*/
|
||||
static enum halmac_ret_status
|
||||
w32_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF) {
|
||||
if (0 != (adr & (4 - 1))) {
|
||||
status = w_indir_cmd52_88xx(adapter, adr, val,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd52_88xx(adapter, adr + 1, val >> 8,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd52_88xx(adapter, adr + 2, val >> 16,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd52_88xx(adapter, adr + 3, val >> 24,
|
||||
HALMAC_IO_BYTE);
|
||||
} else {
|
||||
status = w_indir_cmd52_88xx(adapter, adr, val,
|
||||
HALMAC_IO_DWORD);
|
||||
}
|
||||
} else {
|
||||
if (0 != (adr & (4 - 1))) {
|
||||
status = w_indir_cmd53_88xx(adapter, adr, val,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd53_88xx(adapter, adr + 1, val >> 8,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd53_88xx(adapter, adr + 2, val >> 16,
|
||||
HALMAC_IO_BYTE);
|
||||
if (status != HALMAC_RET_SUCCESS)
|
||||
return status;
|
||||
status = w_indir_cmd53_88xx(adapter, adr + 3, val >> 24,
|
||||
HALMAC_IO_BYTE);
|
||||
} else {
|
||||
status = w_indir_cmd53_88xx(adapter, adr, val,
|
||||
HALMAC_IO_DWORD);
|
||||
}
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
enum halmac_ret_status
|
||||
w_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size)
|
||||
{
|
||||
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
|
||||
|
||||
PLTFM_MUTEX_LOCK(&adapter->sdio_indir_mutex);
|
||||
|
||||
switch (size) {
|
||||
case HALMAC_IO_BYTE:
|
||||
status = w8_indir_sdio_88xx(adapter, adr, val);
|
||||
break;
|
||||
case HALMAC_IO_WORD:
|
||||
status = w16_indir_sdio_88xx(adapter, adr, val);
|
||||
break;
|
||||
case HALMAC_IO_DWORD:
|
||||
status = w32_indir_sdio_88xx(adapter, adr, val);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
PLTFM_MUTEX_UNLOCK(&adapter->sdio_indir_mutex);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
@ -1,79 +0,0 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef _HALMAC_SDIO_88XX_H_
|
||||
#define _HALMAC_SDIO_88XX_H_
|
||||
|
||||
#include "../halmac_api.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
|
||||
enum halmac_ret_status
|
||||
init_sdio_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
deinit_sdio_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
enum halmac_ret_status
|
||||
cfg_sdio_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_rxagg_cfg *cfg);
|
||||
|
||||
enum halmac_ret_status
|
||||
cfg_txagg_sdio_align_88xx(struct halmac_adapter *adapter, u8 enable,
|
||||
u16 align_size);
|
||||
|
||||
u32
|
||||
sdio_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
sdio_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
|
||||
u8 *value);
|
||||
|
||||
enum halmac_ret_status
|
||||
set_sdio_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num);
|
||||
|
||||
enum halmac_ret_status
|
||||
get_sdio_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
|
||||
u8 *id);
|
||||
|
||||
enum halmac_ret_status
|
||||
sdio_cmd53_4byte_88xx(struct halmac_adapter *adapter,
|
||||
enum halmac_sdio_cmd53_4byte_mode mode);
|
||||
|
||||
enum halmac_ret_status
|
||||
sdio_hw_info_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_sdio_hw_info *info);
|
||||
|
||||
void
|
||||
cfg_sdio_tx_page_threshold_88xx(struct halmac_adapter *adapter,
|
||||
struct halmac_tx_page_threshold_info *info);
|
||||
|
||||
enum halmac_ret_status
|
||||
cnv_to_sdio_bus_offset_88xx(struct halmac_adapter *adapter, u32 *offset);
|
||||
|
||||
enum halmac_ret_status
|
||||
leave_sdio_suspend_88xx(struct halmac_adapter *adapter);
|
||||
|
||||
u32
|
||||
r_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr,
|
||||
enum halmac_io_size size);
|
||||
|
||||
enum halmac_ret_status
|
||||
w_indir_sdio_88xx(struct halmac_adapter *adapter, u32 adr, u32 val,
|
||||
enum halmac_io_size size);
|
||||
|
||||
#endif /* HALMAC_88XX_SUPPORT */
|
||||
|
||||
#endif/* _HALMAC_SDIO_88XX_H_ */
|
@ -15,7 +15,7 @@
|
||||
|
||||
#include "halmac_usb_88xx.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
#if (HALMAC_88XX_SUPPORT && HALMAC_USB_SUPPORT)
|
||||
|
||||
enum usb_burst_size {
|
||||
USB_BURST_SIZE_3_0 = 0x0,
|
||||
@ -53,8 +53,7 @@ init_usb_cfg_88xx(struct halmac_adapter *adapter)
|
||||
}
|
||||
|
||||
HALMAC_REG_W8(REG_RXDMA_MODE, value8);
|
||||
HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK,
|
||||
HALMAC_REG_R16(REG_TXDMA_OFFSET_CHK) | BIT_DROP_DATA_EN);
|
||||
HALMAC_REG_W16_SET(REG_TXDMA_OFFSET_CHK, BIT_DROP_DATA_EN);
|
||||
|
||||
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
|
||||
|
||||
@ -117,7 +116,7 @@ cfg_usb_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
break;
|
||||
}
|
||||
|
||||
if (cfg->threshold.drv_define == _FALSE) {
|
||||
if (cfg->threshold.drv_define == 0) {
|
||||
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20) {
|
||||
/* usb3.0 */
|
||||
size = 0x5;
|
||||
@ -133,7 +132,7 @@ cfg_usb_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
}
|
||||
|
||||
value32 = HALMAC_REG_R32(REG_RXDMA_AGG_PG_TH);
|
||||
if (cfg->threshold.size_limit_en == _FALSE)
|
||||
if (cfg->threshold.size_limit_en == 0)
|
||||
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 & ~BIT_EN_PRE_CALC);
|
||||
else
|
||||
HALMAC_REG_W32(REG_RXDMA_AGG_PG_TH, value32 | BIT_EN_PRE_CALC);
|
||||
@ -159,11 +158,7 @@ cfg_usb_rx_agg_88xx(struct halmac_adapter *adapter,
|
||||
u8
|
||||
reg_r8_usb_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u8 value8;
|
||||
|
||||
value8 = PLTFM_REG_R8(offset);
|
||||
|
||||
return value8;
|
||||
return PLTFM_REG_R8(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -194,11 +189,7 @@ reg_w8_usb_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
|
||||
u16
|
||||
reg_r16_usb_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u16 value16;
|
||||
|
||||
value16 = PLTFM_REG_R16(offset);
|
||||
|
||||
return value16;
|
||||
return PLTFM_REG_R16(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -229,11 +220,7 @@ reg_w16_usb_88xx(struct halmac_adapter *adapter, u32 offset, u16 value)
|
||||
u32
|
||||
reg_r32_usb_88xx(struct halmac_adapter *adapter, u32 offset)
|
||||
{
|
||||
u32 value32;
|
||||
|
||||
value32 = PLTFM_REG_R32(offset);
|
||||
|
||||
return value32;
|
||||
return PLTFM_REG_R32(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -444,7 +431,7 @@ set_usb_mode_88xx(struct halmac_adapter *adapter, enum halmac_usb_mode mode)
|
||||
|
||||
/* check if HW supports usb2_usb3 switch */
|
||||
usb_tmp = HALMAC_REG_R32(REG_PAD_CTRL2);
|
||||
if (_FALSE == (BIT_GET_USB23_SW_MODE_V1(usb_tmp) |
|
||||
if (0 == (BIT_GET_USB23_SW_MODE_V1(usb_tmp) |
|
||||
(usb_tmp & BIT_USB3_USB2_TRANSITION))) {
|
||||
PLTFM_MSG_ERR("[ERR]u2/u3 switch\n");
|
||||
return HALMAC_RET_USB2_3_SWITCH_UNSUPPORT;
|
||||
@ -512,7 +499,7 @@ usbphy_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
|
||||
HALMAC_REG_W8(0xff0c, addr | BIT(6));
|
||||
value = (u16)(HALMAC_REG_R32(0xff0c) >> 8);
|
||||
} else if (speed == HAL_INTF_PHY_USB2) {
|
||||
if (addr >= 0xE0 && addr <= 0xFF)
|
||||
if (addr >= 0xE0)
|
||||
addr -= 0x20;
|
||||
if (addr >= 0xC0 && addr <= 0xDF) {
|
||||
HALMAC_REG_W8(0xfe40, addr);
|
||||
|
@ -18,7 +18,7 @@
|
||||
|
||||
#include "../halmac_api.h"
|
||||
|
||||
#if HALMAC_88XX_SUPPORT
|
||||
#if (HALMAC_88XX_SUPPORT && HALMAC_USB_SUPPORT)
|
||||
|
||||
enum halmac_ret_status
|
||||
init_usb_cfg_88xx(struct halmac_adapter *adapter);
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user