RinCat/RTL88x2BU-Linux-Driver
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Update to 5.6.1

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Rin Cat
2019-09-21 05:30:30 -04:00
parent 953142179e
commit 0644d0b316
413 changed files with 179115 additions and 110562 deletions
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1365
hal/phydm/rtl8822b/halhwimg8822b_bb.c
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File diff suppressed because it is too large Load Diff

131
hal/phydm/rtl8822b/halhwimg8822b_bb.h
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@@ -23,121 +23,118 @@
*
*****************************************************************************/
/*Image2HeaderVersion: R3 1.0*/
/*Image2HeaderVersion: R3 1.4.5*/
#if (RTL8822B_SUPPORT == 1)
#ifndef __INC_MP_BB_HW_IMG_8822B_H
#define __INC_MP_BB_HW_IMG_8822B_H
/******************************************************************************
* agc_tab.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_agc_tab(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_agc_tab(void);
/******************************************************************************
* agc_tab.TXT
******************************************************************************/
* phy_reg.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_agc_tab(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_agc_tab(void);
odm_read_and_config_mp_8822b_phy_reg(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg(void);
/******************************************************************************
* phy_reg.TXT
******************************************************************************/
* phy_reg_pg.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg(void);
odm_read_and_config_mp_8822b_phy_reg_pg(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg(void);
/******************************************************************************
* phy_reg_pg.TXT
******************************************************************************/
* phy_reg_pg_type12.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type12(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type12(void);
/******************************************************************************
* phy_reg_pg_type12.TXT
******************************************************************************/
* phy_reg_pg_type15.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type12(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type12(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type15(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type15(void);
/******************************************************************************
* phy_reg_pg_type15.TXT
******************************************************************************/
* phy_reg_pg_type16.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type15(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type15(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type16(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type16(void);
/******************************************************************************
* phy_reg_pg_type16.TXT
******************************************************************************/
* phy_reg_pg_type17.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type16(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type16(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type17(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type17(void);
/******************************************************************************
* phy_reg_pg_type17.TXT
******************************************************************************/
* phy_reg_pg_type18.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type17(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type17(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type18(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type18(void);
/******************************************************************************
* phy_reg_pg_type2.TXT
******************************************************************************/
* phy_reg_pg_type2.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type2(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type2(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type2(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type2(void);
/******************************************************************************
* phy_reg_pg_type3.TXT
******************************************************************************/
* phy_reg_pg_type3.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type3(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type3(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type3(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type3(void);
/******************************************************************************
* phy_reg_pg_type4.TXT
******************************************************************************/
* phy_reg_pg_type4.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type4(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type4(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type4(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type4(void);
/******************************************************************************
* phy_reg_pg_type5.TXT
******************************************************************************/
* phy_reg_pg_type5.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_phy_reg_pg_type5(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_phy_reg_pg_type5(void);
odm_read_and_config_mp_8822b_phy_reg_pg_type5(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_phy_reg_pg_type5(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

94
hal/phydm/rtl8822b/halhwimg8822b_mac.c
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@@ -23,24 +23,29 @@
*
*****************************************************************************/
/*Image2HeaderVersion: R3 1.0*/
/*Image2HeaderVersion: R3 1.4.5*/
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#define D_S_SIZE DELTA_SWINGIDX_SIZE
#if (RTL8822B_SUPPORT == 1)
static boolean
check_positive(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2,
const u32 condition3,
const u32 condition4
check_positive(struct dm_struct *dm,
const u32 condition1,
const u32 condition2,
const u32 condition3,
const u32 condition4
)
{
u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
u32 cond1 = condition1, cond2 = condition2,
cond3 = condition3, cond4 = condition4;
u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version;
u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type;
u8 cut_version_for_para =
(dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version;
u8 pkg_type_for_para =
(dm->package_type == 0) ? 15 : dm->package_type;
u32 driver1 = cut_version_for_para << 24 |
(dm->support_interface & 0xF0) << 16 |
@@ -62,27 +67,32 @@ check_positive(
(dm->type_apa & 0xFF00) << 16;
PHYDM_DBG(dm, ODM_COMP_INIT,
"===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4);
"===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n",
__func__, cond1, cond2, cond3, cond4);
PHYDM_DBG(dm, ODM_COMP_INIT,
"===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4);
"===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n",
__func__, driver1, driver2, driver3, driver4);
PHYDM_DBG(dm, ODM_COMP_INIT,
" (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface);
PHYDM_DBG(dm, ODM_COMP_INIT,
" (RFE, Package) = (0x%X, 0x%X)\n", dm->rfe_type, dm->package_type);
" (Platform, Interface) = (0x%X, 0x%X)\n",
dm->support_platform, dm->support_interface);
PHYDM_DBG(dm, ODM_COMP_INIT, " (RFE, Package) = (0x%X, 0x%X)\n",
dm->rfe_type, dm->package_type);
/*============== value Defined Check ===============*/
/*cut version [27:24] need to do value check*/
if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
if (((cond1 & 0x0F000000) != 0) &&
((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
return false;
/*pkg type [15:12] need to do value check*/
if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
if (((cond1 & 0x0000F000) != 0) &&
((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
return false;
/*interface [11:8] need to do value check*/
if (((cond1 & 0x00000F00) != 0) && ((cond1 & 0x00000F00) != (driver1 & 0x00000F00)))
if (((cond1 & 0x00000F00) != 0) &&
((cond1 & 0x00000F00) != (driver1 & 0x00000F00)))
return false;
/*=============== Bit Defined Check ================*/
/* We don't care [31:28] */
@@ -95,21 +105,21 @@ check_positive(
else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
check_negative(struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* mac_reg.TXT
******************************************************************************/
* mac_reg.TXT
******************************************************************************/
u32 array_mp_8822b_mac_reg[] = {
const u32 array_mp_8822b_mac_reg[] = {
0x029, 0x000000F9,
0x420, 0x00000080,
0x421, 0x0000001F,
@@ -239,19 +249,19 @@ u32 array_mp_8822b_mac_reg[] = {
};
void
odm_read_and_config_mp_8822b_mac_reg(
struct dm_struct *dm
)
odm_read_and_config_mp_8822b_mac_reg(struct dm_struct *dm)
{
u32 i = 0;
u8 c_cond;
boolean is_matched = true, is_skipped = false;
u32 array_len = sizeof(array_mp_8822b_mac_reg)/sizeof(u32);
u32 *array = array_mp_8822b_mac_reg;
u32 array_len =
sizeof(array_mp_8822b_mac_reg) / sizeof(u32);
u32 *array = (u32 *)array_mp_8822b_mac_reg;
u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
u32 a1 = 0, a2 = 0, a3 = 0, a4 = 0;
PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8822b_mac_reg\n");
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
while ((i + 1) < array_len) {
v1 = array[i];
@@ -259,30 +269,36 @@ odm_read_and_config_mp_8822b_mac_reg(
if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
if (v1 & BIT(31)) {/* positive condition*/
c_cond = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
c_cond =
(u8)((v1 & (BIT(29) | BIT(28))) >> 28);
if (c_cond == COND_ENDIF) {/*end*/
is_matched = true;
is_skipped = false;
PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
} else if (c_cond == COND_ELSE) { /*else*/
is_matched = is_skipped?false:true;
is_matched = is_skipped ? false : true;
PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
} else {/*if , else if*/
pre_v1 = v1;
pre_v2 = v2;
PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
PHYDM_DBG(dm, ODM_COMP_INIT,
"IF or ELSE IF\n");
}
} else if (v1 & BIT(30)) { /*negative condition*/
if (is_skipped == false) {
if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
if (!is_skipped) {
a1 = pre_v1; a2 = pre_v2;
a3 = v1; a4 = v2;
if (check_positive(dm,
a1, a2, a3, a4)) {
is_matched = true;
is_skipped = true;
} else {
is_matched = false;
is_skipped = false;
}
} else
} else {
is_matched = false;
}
}
} else {
if (is_matched)
@@ -295,7 +311,7 @@ odm_read_and_config_mp_8822b_mac_reg(
u32
odm_get_version_mp_8822b_mac_reg(void)
{
return 104;
return 112;
}
#endif /* end of HWIMG_SUPPORT*/

14
hal/phydm/rtl8822b/halhwimg8822b_mac.h
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@@ -23,21 +23,19 @@
*
*****************************************************************************/
/*Image2HeaderVersion: R3 1.0*/
/*Image2HeaderVersion: R3 1.4.5*/
#if (RTL8822B_SUPPORT == 1)
#ifndef __INC_MP_MAC_HW_IMG_8822B_H
#define __INC_MP_MAC_HW_IMG_8822B_H
/******************************************************************************
* mac_reg.TXT
******************************************************************************/
* mac_reg.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_mac_reg(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_mac_reg(void);
odm_read_and_config_mp_8822b_mac_reg(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_mac_reg(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

5443
hal/phydm/rtl8822b/halhwimg8822b_rf.c
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File diff suppressed because it is too large Load Diff

468
hal/phydm/rtl8822b/halhwimg8822b_rf.h
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@@ -23,301 +23,419 @@
*
*****************************************************************************/
/*Image2HeaderVersion: R3 1.0*/
/*Image2HeaderVersion: R3 1.4.5*/
#if (RTL8822B_SUPPORT == 1)
#ifndef __INC_MP_RF_HW_IMG_8822B_H
#define __INC_MP_RF_HW_IMG_8822B_H
/* Please add following compiler flags definition (#define CONFIG_XXX_DRV_DIS)
* into driver source code to reduce code size if necessary.
* #define CONFIG_8822B_DRV_DIS
* #define CONFIG_8822B_TYPE0_DRV_DIS
* #define CONFIG_8822B_TYPE1_DRV_DIS
* #define CONFIG_8822B_TYPE10_DRV_DIS
* #define CONFIG_8822B_TYPE11_DRV_DIS
* #define CONFIG_8822B_TYPE12_DRV_DIS
* #define CONFIG_8822B_TYPE13_DRV_DIS
* #define CONFIG_8822B_TYPE14_DRV_DIS
* #define CONFIG_8822B_TYPE15_DRV_DIS
* #define CONFIG_8822B_TYPE16_DRV_DIS
* #define CONFIG_8822B_TYPE17_DRV_DIS
* #define CONFIG_8822B_TYPE18_DRV_DIS
* #define CONFIG_8822B_TYPE2_DRV_DIS
* #define CONFIG_8822B_TYPE3_TYPE5_DRV_DIS
* #define CONFIG_8822B_TYPE4_DRV_DIS
* #define CONFIG_8822B_TYPE6_DRV_DIS
* #define CONFIG_8822B_TYPE7_DRV_DIS
* #define CONFIG_8822B_TYPE8_DRV_DIS
* #define CONFIG_8822B_TYPE9_DRV_DIS
* #define CONFIG_8822B_TYPE3_DRV_DIS
* #define CONFIG_8822B_TYPE5_DRV_DIS
*/
#define CONFIG_8822B
#ifdef CONFIG_8822B_DRV_DIS
#undef CONFIG_8822B
#endif
#define CONFIG_8822B_TYPE0
#ifdef CONFIG_8822B_TYPE0_DRV_DIS
#undef CONFIG_8822B_TYPE0
#endif
#define CONFIG_8822B_TYPE1
#ifdef CONFIG_8822B_TYPE1_DRV_DIS
#undef CONFIG_8822B_TYPE1
#endif
#define CONFIG_8822B_TYPE10
#ifdef CONFIG_8822B_TYPE10_DRV_DIS
#undef CONFIG_8822B_TYPE10
#endif
#define CONFIG_8822B_TYPE11
#ifdef CONFIG_8822B_TYPE11_DRV_DIS
#undef CONFIG_8822B_TYPE11
#endif
#define CONFIG_8822B_TYPE12
#ifdef CONFIG_8822B_TYPE12_DRV_DIS
#undef CONFIG_8822B_TYPE12
#endif
#define CONFIG_8822B_TYPE13
#ifdef CONFIG_8822B_TYPE13_DRV_DIS
#undef CONFIG_8822B_TYPE13
#endif
#define CONFIG_8822B_TYPE14
#ifdef CONFIG_8822B_TYPE14_DRV_DIS
#undef CONFIG_8822B_TYPE14
#endif
#define CONFIG_8822B_TYPE15
#ifdef CONFIG_8822B_TYPE15_DRV_DIS
#undef CONFIG_8822B_TYPE15
#endif
#define CONFIG_8822B_TYPE16
#ifdef CONFIG_8822B_TYPE16_DRV_DIS
#undef CONFIG_8822B_TYPE16
#endif
#define CONFIG_8822B_TYPE17
#ifdef CONFIG_8822B_TYPE17_DRV_DIS
#undef CONFIG_8822B_TYPE17
#endif
#define CONFIG_8822B_TYPE18
#ifdef CONFIG_8822B_TYPE18_DRV_DIS
#undef CONFIG_8822B_TYPE18
#endif
#define CONFIG_8822B_TYPE2
#ifdef CONFIG_8822B_TYPE2_DRV_DIS
#undef CONFIG_8822B_TYPE2
#endif
#define CONFIG_8822B_TYPE3_TYPE5
#ifdef CONFIG_8822B_TYPE3_TYPE5_DRV_DIS
#undef CONFIG_8822B_TYPE3_TYPE5
#endif
#define CONFIG_8822B_TYPE4
#ifdef CONFIG_8822B_TYPE4_DRV_DIS
#undef CONFIG_8822B_TYPE4
#endif
#define CONFIG_8822B_TYPE6
#ifdef CONFIG_8822B_TYPE6_DRV_DIS
#undef CONFIG_8822B_TYPE6
#endif
#define CONFIG_8822B_TYPE7
#ifdef CONFIG_8822B_TYPE7_DRV_DIS
#undef CONFIG_8822B_TYPE7
#endif
#define CONFIG_8822B_TYPE8
#ifdef CONFIG_8822B_TYPE8_DRV_DIS
#undef CONFIG_8822B_TYPE8
#endif
#define CONFIG_8822B_TYPE9
#ifdef CONFIG_8822B_TYPE9_DRV_DIS
#undef CONFIG_8822B_TYPE9
#endif
#define CONFIG_8822B_TYPE3
#ifdef CONFIG_8822B_TYPE3_DRV_DIS
#undef CONFIG_8822B_TYPE3
#endif
#define CONFIG_8822B_TYPE5
#ifdef CONFIG_8822B_TYPE5_DRV_DIS
#undef CONFIG_8822B_TYPE5
#endif
/******************************************************************************
* radioa.TXT
******************************************************************************/
* radioa.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_radioa(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_radioa(void);
odm_read_and_config_mp_8822b_radioa(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_radioa(void);
/******************************************************************************
* radiob.TXT
******************************************************************************/
* radiob.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_radiob(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_radiob(void);
odm_read_and_config_mp_8822b_radiob(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_radiob(void);
/******************************************************************************
* txpowertrack.TXT
******************************************************************************/
* txpowertrack.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack(void);
odm_read_and_config_mp_8822b_txpowertrack(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack(void);
/******************************************************************************
* txpowertrack_type0.TXT
******************************************************************************/
* txpowertrack_type0.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type0(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type0(void);
odm_read_and_config_mp_8822b_txpowertrack_type0(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type0(void);
/******************************************************************************
* txpowertrack_type1.TXT
******************************************************************************/
* txpowertrack_type1.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type1(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type1(void);
odm_read_and_config_mp_8822b_txpowertrack_type1(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type1(void);
/******************************************************************************
* txpowertrack_type10.TXT
******************************************************************************/
* txpowertrack_type10.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type10(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type10(void);
odm_read_and_config_mp_8822b_txpowertrack_type10(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type10(void);
/******************************************************************************
* txpowertrack_type11.TXT
******************************************************************************/
* txpowertrack_type11.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type11(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type11(void);
odm_read_and_config_mp_8822b_txpowertrack_type11(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type11(void);
/******************************************************************************
* txpowertrack_type12.TXT
******************************************************************************/
* txpowertrack_type12.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type12(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type12(void);
odm_read_and_config_mp_8822b_txpowertrack_type12(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type12(void);
/******************************************************************************
* txpowertrack_type13.TXT
******************************************************************************/
* txpowertrack_type13.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type13(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type13(void);
odm_read_and_config_mp_8822b_txpowertrack_type13(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type13(void);
/******************************************************************************
* txpowertrack_type14.TXT
******************************************************************************/
* txpowertrack_type14.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type14(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type14(void);
odm_read_and_config_mp_8822b_txpowertrack_type14(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type14(void);
/******************************************************************************
* txpowertrack_type15.TXT
******************************************************************************/
* txpowertrack_type15.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type15(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type15(void);
odm_read_and_config_mp_8822b_txpowertrack_type15(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type15(void);
/******************************************************************************
* txpowertrack_type16.TXT
******************************************************************************/
* txpowertrack_type16.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type16(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type16(void);
odm_read_and_config_mp_8822b_txpowertrack_type16(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type16(void);
/******************************************************************************
* txpowertrack_type17.TXT
******************************************************************************/
* txpowertrack_type17.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type17(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type17(void);
odm_read_and_config_mp_8822b_txpowertrack_type17(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type17(void);
/******************************************************************************
* txpowertrack_type2.TXT
******************************************************************************/
* txpowertrack_type18.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type2(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type2(void);
odm_read_and_config_mp_8822b_txpowertrack_type18(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type18(void);
/******************************************************************************
* txpowertrack_type3_type5.TXT
******************************************************************************/
* txpowertrack_type2.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type3_type5(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type3_type5(void);
odm_read_and_config_mp_8822b_txpowertrack_type2(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type2(void);
/******************************************************************************
* txpowertrack_type4.TXT
******************************************************************************/
* txpowertrack_type3_type5.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type4(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type4(void);
odm_read_and_config_mp_8822b_txpowertrack_type3_type5(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type3_type5(void);
/******************************************************************************
* txpowertrack_type6.TXT
******************************************************************************/
* txpowertrack_type4.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type6(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type6(void);
odm_read_and_config_mp_8822b_txpowertrack_type4(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type4(void);
/******************************************************************************
* txpowertrack_type7.TXT
******************************************************************************/
* txpowertrack_type6.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type7(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type7(void);
odm_read_and_config_mp_8822b_txpowertrack_type6(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type6(void);
/******************************************************************************
* txpowertrack_type8.TXT
******************************************************************************/
* txpowertrack_type7.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type8(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type8(void);
odm_read_and_config_mp_8822b_txpowertrack_type7(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type7(void);
/******************************************************************************
* txpowertrack_type9.TXT
******************************************************************************/
* txpowertrack_type8.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpowertrack_type9(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpowertrack_type9(void);
odm_read_and_config_mp_8822b_txpowertrack_type8(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type8(void);
/******************************************************************************
* txpwr_lmt.TXT
******************************************************************************/
* txpowertrack_type9.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt(void);
odm_read_and_config_mp_8822b_txpowertrack_type9(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpowertrack_type9(void);
/******************************************************************************
* txpwr_lmt_type12.TXT
******************************************************************************/
* txpwr_lmt.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type12(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type12(void);
odm_read_and_config_mp_8822b_txpwr_lmt(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt(void);
/******************************************************************************
* txpwr_lmt_type15.TXT
******************************************************************************/
* txpwr_lmt_type12.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type15(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type15(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type12(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type12(void);
/******************************************************************************
* txpwr_lmt_type16.TXT
******************************************************************************/
* txpwr_lmt_type15.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type16(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type16(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type15(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type15(void);
/******************************************************************************
* txpwr_lmt_type17.TXT
******************************************************************************/
* txpwr_lmt_type16.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type17(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type17(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type16(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type16(void);
/******************************************************************************
* txpwr_lmt_type2.TXT
******************************************************************************/
* txpwr_lmt_type17.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type2(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type2(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type17(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type17(void);
/******************************************************************************
* txpwr_lmt_type3.TXT
******************************************************************************/
* txpwr_lmt_type18.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type3(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type3(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type18(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type18(void);
/******************************************************************************
* txpwr_lmt_type4.TXT
******************************************************************************/
* txpwr_lmt_type2.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type4(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type4(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type2(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type2(void);
/******************************************************************************
* txpwr_lmt_type5.TXT
******************************************************************************/
* txpwr_lmt_type3.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type5(/* tc: Test Chip, mp: mp Chip*/
struct dm_struct *dm
);
u32 odm_get_version_mp_8822b_txpwr_lmt_type5(void);
odm_read_and_config_mp_8822b_txpwr_lmt_type3(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type3(void);
/******************************************************************************
* txpwr_lmt_type4.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type4(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type4(void);
/******************************************************************************
* txpwr_lmt_type5.TXT
******************************************************************************/
/* tc: Test Chip, mp: mp Chip*/
void
odm_read_and_config_mp_8822b_txpwr_lmt_type5(struct dm_struct *dm);
u32 odm_get_version_mp_8822b_txpwr_lmt_type5(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

3079
hal/phydm/rtl8822b/phydm_hal_api8822b.c
View File

File diff suppressed because it is too large Load Diff

177
hal/phydm/rtl8822b/phydm_hal_api8822b.h
View File

@@ -26,142 +26,111 @@
#define __INC_PHYDM_API_H_8822B__
#if (RTL8822B_SUPPORT == 1)
#define PHY_CONFIG_VERSION_8822B "28.5.34"
/* @2017.01.18 */
/* @(HW user guide version: R28, SW user guide version: R05, Modification: R34)*/
/* @remove A cut setting, refine CCK txfilter and OFDM CCA setting by YuChen*/
#define PHY_CONFIG_VERSION_8822B "28.5.34" /*2017.01.18 (HW user guide version: R28, SW user guide version: R05, Modification: R34), remove A cut setting, refine CCK txfilter and OFDM CCA setting by YuChen*/
#define SMTANT_TMP_RFE_TYPE 100
#define ANT_2T3R_RFE_TYPE 101
#define ANT_2T4R_RFE_TYPE 102
#define SMTANT_TMP_RFE_TYPE 100
#define INVALID_RF_DATA 0xffffffff
#define INVALID_TXAGC_DATA 0xff
#define INVALID_RF_DATA 0xffffffff
#define INVALID_TXAGC_DATA 0xff
#define PSD_VAL_NUM 3
#define PSD_SMP_NUM 3
#define FREQ_PT_2G_NUM 14
#define FREQ_PT_5G_NUM 10
#define PSD_VAL_NUM 5
#define PSD_SMP_NUM 3
#define FREQ_PT_2G_NUM 14
#define FREQ_PT_5G_NUM 10
#define number_channel_interferecne 4
#define number_channel_interferecne 4
#define config_phydm_read_rf_check_8822b(data) (data != INVALID_RF_DATA)
#define config_phydm_read_txagc_check_8822b(data) (data != INVALID_TXAGC_DATA)
#define config_phydm_read_rf_check_8822b(data) (data != INVALID_RF_DATA)
#define config_phydm_read_txagc_check_8822b(data) (data != INVALID_TXAGC_DATA)
enum agc_tab_sel {
DEFAULT_AGC_TABLE,
LNA_SAT_AGC_TABLE,
AUTO_AGC_TABLE
};
void
phydm_rxagc_switch_8822b(
struct dm_struct *dm,
boolean enable_rxagc_swich
);
void
phydm_rfe_8822b_init(
struct dm_struct *dm
);
void phydm_rfe_8822b_init(struct dm_struct *dm);
boolean
phydm_rfe_8822b(
struct dm_struct *dm,
u8 channel
);
phydm_rfe_8822b(struct dm_struct *dm, u8 channel);
u32
config_phydm_read_rf_reg_8822b(
struct dm_struct *dm,
enum rf_path path,
u32 reg_addr,
u32 bit_mask
);
u32 config_phydm_read_rf_reg_8822b(struct dm_struct *dm,
enum rf_path path,
u32 reg_addr, u32 bit_mask);
boolean
config_phydm_write_rf_reg_8822b(
struct dm_struct *dm,
enum rf_path path,
u32 reg_addr,
u32 bit_mask,
u32 data
);
config_phydm_write_rf_reg_8822b(struct dm_struct *dm,
enum rf_path path, u32 reg_addr,
u32 bit_mask, u32 data);
boolean
config_phydm_write_txagc_8822b(
struct dm_struct *dm,
u32 power_index,
enum rf_path path,
u8 hw_rate
);
config_phydm_write_txagc_8822b(struct dm_struct *dm, u32 pw_idx,
enum rf_path path, u8 hw_rate);
u8
config_phydm_read_txagc_8822b(
struct dm_struct *dm,
enum rf_path path,
u8 hw_rate
);
u8 config_phydm_read_txagc_8822b(struct dm_struct *dm,
enum rf_path path, u8 hw_rate);
void
phydm_dynamic_spur_det_eliminate(
struct dm_struct *dm
);
void phydm_dynamic_spur_det_eliminate(struct dm_struct *dm);
boolean
config_phydm_switch_band_8822b(
struct dm_struct *dm,
u8 central_ch
);
config_phydm_switch_band_8822b(struct dm_struct *dm,
u8 central_ch);
boolean
config_phydm_switch_channel_8822b(
struct dm_struct *dm,
u8 central_ch
);
config_phydm_switch_channel_8822b(struct dm_struct *dm,
u8 central_ch);
__iram_odm_func__
boolean
config_phydm_switch_agc_tab_8822b(struct dm_struct *dm,
u8 channel, enum agc_tab_sel tab_sel);
boolean
config_phydm_switch_bandwidth_8822b(
struct dm_struct *dm,
u8 primary_ch_idx,
enum channel_width bandwidth
);
config_phydm_switch_bandwidth_8822b(struct dm_struct *dm,
u8 primary_ch_idx,
enum channel_width bw);
boolean
config_phydm_switch_channel_bw_8822b(
struct dm_struct *dm,
u8 central_ch,
u8 primary_ch_idx,
enum channel_width bandwidth
);
config_phydm_switch_channel_bw_8822b(struct dm_struct *dm,
u8 central_ch,
u8 primary_ch_idx,
enum channel_width bw);
boolean
config_phydm_trx_mode_8822b(
struct dm_struct *dm,
enum bb_path tx_path,
enum bb_path rx_path,
boolean is_tx2_path
);
config_phydm_trx_mode_8822b(struct dm_struct *dm,
enum bb_path tx_path, enum bb_path rx_path,
boolean is_tx2_path);
boolean
config_phydm_parameter_init_8822b(
struct dm_struct *dm,
enum odm_parameter_init type
);
config_phydm_parameter_init_8822b(struct dm_struct *dm,
enum odm_parameter_init type);
/* ======================================================================== */
/* These following functions can be used for PHY DM only*/
/* @======================================================================== */
/* @These following functions can be used for PHY DM only*/
boolean
phydm_write_txagc_1byte_8822b(
struct dm_struct *dm,
u32 power_index,
enum rf_path path,
u8 hw_rate
);
phydm_write_txagc_1byte_8822b(struct dm_struct *dm, u32 pw_idx,
enum rf_path path, u8 hw_rate);
void
phydm_init_hw_info_by_rfe_type_8822b(
struct dm_struct *dm
);
void phydm_init_hw_info_by_rfe_type_8822b(struct dm_struct *dm);
s32
phydm_get_condition_number_8822B(
struct dm_struct *dm
);
void phydm_get_condi_num_acc_8822b(void *dm_void);
/* ======================================================================== */
u32 phydm_get_condi_num_8822b(struct dm_struct *dm);
#endif /* RTL8822B_SUPPORT == 1 */
#endif /* __INC_PHYDM_API_H_8822B__ */
__iram_odm_func__
void phydm_rxagc_switch_8822b(struct dm_struct *dm,
boolean enable_rxagc_switch);
boolean
phydm_rfe_8822b_lps(struct dm_struct *dm, boolean enable_sw_rfe);
/* @======================================================================== */
#endif /* RTL8822B_SUPPORT == 1 */
#endif /* @__INC_PHYDM_API_H_8822B__ */

272
hal/phydm/rtl8822b/phydm_regconfig8822b.c
View File

@@ -27,48 +27,41 @@
#include "../phydm_precomp.h"
#if (RTL8822B_SUPPORT == 1)
void
odm_config_rf_reg_8822b(
struct dm_struct *dm,
u32 addr,
u32 data,
enum rf_path rf_path,
u32 reg_addr
)
void odm_config_rf_reg_8822b(struct dm_struct *dm, u32 addr, u32 data,
enum rf_path rf_path, u32 reg_addr)
{
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
if (addr == 0xffe)
if (addr == 0xffe) {
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_DELAY_MS,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
50);
else if (addr == 0xfe)
PHYDM_HALMAC_CMD_DELAY_MS,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
50);
} else if (addr == 0xfe) {
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_DELAY_US,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
100);
else {
PHYDM_HALMAC_CMD_DELAY_US,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
100);
} else {
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_RF_W,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
0);
PHYDM_HALMAC_CMD_RF_W,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
0);
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_DELAY_US,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
1);
PHYDM_HALMAC_CMD_DELAY_US,
reg_addr,
data,
RFREGOFFSETMASK,
rf_path,
1);
}
} else {
if (addr == 0xffe) {
@@ -86,153 +79,124 @@ odm_config_rf_reg_8822b(
} else {
odm_set_rf_reg(dm, rf_path, reg_addr, RFREGOFFSETMASK, data);
/* Add 1us delay between BB/RF register setting. */
/* @Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
}
}
}
void
odm_config_rf_radio_a_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
)
void odm_config_rf_radio_a_8822b(struct dm_struct *dm, u32 addr, u32 data)
{
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskfor_phy_set = (u32)(content & 0xE000);
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskfor_phy_set = (u32)(content & 0xE000);
odm_config_rf_reg_8822b(dm, addr, data, RF_PATH_A, addr | maskfor_phy_set);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_rf: [RadioA] %08X %08X\n", addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_rf: [RadioA] %08X %08X\n",
addr, data);
}
void
odm_config_rf_radio_b_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
)
void odm_config_rf_radio_b_8822b(struct dm_struct *dm, u32 addr, u32 data)
{
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskfor_phy_set = (u32)(content & 0xE000);
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskfor_phy_set = (u32)(content & 0xE000);
odm_config_rf_reg_8822b(dm, addr, data, RF_PATH_B, addr | maskfor_phy_set);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_rf: [RadioB] %08X %08X\n", addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_rf: [RadioB] %08X %08X\n",
addr, data);
}
void
odm_config_mac_8822b(
struct dm_struct *dm,
u32 addr,
u8 data
)
void odm_config_mac_8822b(struct dm_struct *dm, u32 addr, u8 data)
{
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD)
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_MAC_W8,
addr,
data,
0,
(enum rf_path)0,
0);
PHYDM_HALMAC_CMD_MAC_W8,
addr,
data,
0,
(enum rf_path)0,
0);
else
odm_write_1byte(dm, addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_mac: [MAC_REG] %08X %08X\n", addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_mac: [MAC_REG] %08X %08X\n",
addr, data);
}
void
odm_update_agc_big_jump_lmt_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
)
void odm_update_agc_big_jump_lmt_8822b(struct dm_struct *dm, u32 addr, u32 data)
{
struct phydm_dig_struct *dig_tab = &dm->dm_dig_table;
u8 rf_gain_idx = (u8)((data & 0xFF000000) >> 24);
u8 bb_gain_idx = (u8)((data & 0x00ff0000) >> 16);
u8 agc_table_idx = (u8)((data & 0x00000f00) >> 8);
static boolean is_limit;
static boolean is_limit;
struct phydm_dig_struct *dig_tab = &dm->dm_dig_table;
u8 rf_gain_idx = (u8)((data & 0xFF000000) >> 24);
u8 bb_gain_idx = (u8)((data & 0x00ff0000) >> 16);
u8 agc_table_idx = (u8)((data & 0x00000f00) >> 8);
if (addr != 0x81c)
return;
/*dbg_print("data = 0x%x, rf_gain_idx = 0x%x, bb_gain_idx = 0x%x, agc_table_idx = 0x%x\n", data, rf_gain_idx, bb_gain_idx, agc_table_idx);*/
/*dbg_print("rf_gain_idx = 0x%x, dig_tab->rf_gain_idx = 0x%x\n", rf_gain_idx, dig_tab->rf_gain_idx);*/
#if 0
/*@dbg_print("data = 0x%x, rf_gain_idx = 0x%x, bb_gain_idx = 0x%x, agc_table_idx = 0x%x\n", data, rf_gain_idx, bb_gain_idx, agc_table_idx);*/
/*@dbg_print("rf_gain_idx = 0x%x, dig_tab->rf_gain_idx = 0x%x\n", rf_gain_idx, dig_tab->rf_gain_idx);*/
#endif
if (bb_gain_idx > 0x3c) {
if ((rf_gain_idx == dig_tab->rf_gain_idx) && !is_limit) {
if (rf_gain_idx == dig_tab->rf_gain_idx && !is_limit) {
is_limit = true;
dig_tab->big_jump_lmt[agc_table_idx] = bb_gain_idx - 2;
PHYDM_DBG(dm, DBG_DIG, "===> [AGC_TAB] big_jump_lmt [%d] = 0x%x\n", agc_table_idx, dig_tab->big_jump_lmt[agc_table_idx]);
PHYDM_DBG(dm, DBG_DIG,
"===> [AGC_TAB] big_jump_lmt [%d] = 0x%x\n",
agc_table_idx,
dig_tab->big_jump_lmt[agc_table_idx]);
}
} else
} else {
is_limit = false;
}
dig_tab->rf_gain_idx = rf_gain_idx;
}
void
odm_config_bb_agc_8822b(
struct dm_struct *dm,
u32 addr,
u32 bitmask,
u32 data
)
void odm_config_bb_agc_8822b(struct dm_struct *dm, u32 addr, u32 bitmask,
u32 data)
{
odm_update_agc_big_jump_lmt_8822b(dm, addr, data);
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD)
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_BB_W32,
addr,
data,
bitmask,
(enum rf_path)0,
0);
PHYDM_HALMAC_CMD_BB_W32,
addr,
data,
bitmask,
(enum rf_path)0,
0);
else
odm_set_bb_reg(dm, addr, bitmask, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_bb: [AGC_TAB] %08X %08X\n", addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_bb: [AGC_TAB] %08X %08X\n",
addr, data);
}
void
odm_config_bb_phy_reg_pg_8822b(
struct dm_struct *dm,
u32 band,
u32 rf_path,
u32 tx_num,
u32 addr,
u32 bitmask,
u32 data
)
void odm_config_bb_phy_reg_pg_8822b(struct dm_struct *dm, u32 band, u32 rf_path,
u32 tx_num, u32 addr, u32 bitmask, u32 data)
{
if (addr == 0xfe || addr == 0xffe) {
if (addr == 0xfe || addr == 0xffe)
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
} else {
else
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
phy_store_tx_power_by_rate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
PHY_StoreTxPowerByRate((PADAPTER)dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
PHY_StoreTxPowerByRate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
#endif
}
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_bb: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data);
PHYDM_DBG(dm, ODM_COMP_INIT,
"===> config_bb: [PHY_REG] %08X %08X %08X\n", addr, bitmask,
data);
}
void
odm_config_bb_phy_8822b(
struct dm_struct *dm,
u32 addr,
u32 bitmask,
u32 data
)
void odm_config_bb_phy_8822b(struct dm_struct *dm, u32 addr, u32 bitmask,
u32 data)
{
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
u32 delay_time = 0;
@@ -245,30 +209,31 @@ odm_config_bb_phy_8822b(
else
delay_time = 1;
if (addr >= 0xfc && addr <=0xfe)
if (addr >= 0xfc && addr <= 0xfe)
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_DELAY_MS,
addr,
data,
bitmask,
(enum rf_path)0,
delay_time);
PHYDM_HALMAC_CMD_DELAY_MS,
addr,
data,
bitmask,
(enum rf_path)0,
delay_time);
else
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_DELAY_US,
addr,
data,
bitmask,
(enum rf_path)0,
delay_time);
} else
PHYDM_HALMAC_CMD_DELAY_US,
addr,
data,
bitmask,
(enum rf_path)0,
delay_time);
} else {
phydm_set_reg_by_fw(dm,
PHYDM_HALMAC_CMD_BB_W32,
addr,
data,
bitmask,
(enum rf_path)0,
0);
PHYDM_HALMAC_CMD_BB_W32,
addr,
data,
bitmask,
(enum rf_path)0,
0);
}
} else {
if (addr == 0xfe)
#ifdef CONFIG_LONG_DELAY_ISSUE
@@ -289,28 +254,21 @@ odm_config_bb_phy_8822b(
else
odm_set_bb_reg(dm, addr, bitmask, data);
}
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_bb: [PHY_REG] %08X %08X\n", addr, data);
PHYDM_DBG(dm, ODM_COMP_INIT, "===> config_bb: [PHY_REG] %08X %08X\n",
addr, data);
}
void
odm_config_bb_txpwr_lmt_8822b(
struct dm_struct *dm,
u8 *regulation,
u8 *band,
u8 *bandwidth,
u8 *rate_section,
u8 *rf_path,
u8 *channel,
u8 *power_limit
)
void odm_config_bb_txpwr_lmt_8822b(struct dm_struct *dm, u8 *regulation,
u8 *band, u8 *bandwidth, u8 *rate_section,
u8 *rf_path, u8 *channel, u8 *power_limit)
{
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
phy_set_tx_power_limit(dm, regulation, band,
bandwidth, rate_section, rf_path, channel, power_limit);
bandwidth, rate_section, rf_path, channel, power_limit);
#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
PHY_SetTxPowerLimit(dm, regulation, band,
bandwidth, rate_section, rf_path, channel, power_limit);
bandwidth, rate_section, rf_path, channel, power_limit);
#endif
}

94
hal/phydm/rtl8822b/phydm_regconfig8822b.h
View File

@@ -26,82 +26,22 @@
#define __INC_ODM_REGCONFIG_H_8822B
#if (RTL8822B_SUPPORT == 1)
void
odm_config_rf_reg_8822b(
struct dm_struct *dm,
u32 addr,
u32 data,
enum rf_path rf_path,
u32 reg_addr
);
void
odm_config_rf_radio_a_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
);
void
odm_config_rf_radio_b_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
);
void
odm_config_mac_8822b(
struct dm_struct *dm,
u32 addr,
u8 data
);
void
odm_update_agc_big_jump_lmt_8822b(
struct dm_struct *dm,
u32 addr,
u32 data
);
void
odm_config_bb_agc_8822b(
struct dm_struct *dm,
u32 addr,
u32 bitmask,
u32 data
);
void
odm_config_bb_phy_reg_pg_8822b(
struct dm_struct *dm,
u32 band,
u32 rf_path,
u32 tx_num,
u32 addr,
u32 bitmask,
u32 data
);
void
odm_config_bb_phy_8822b(
struct dm_struct *dm,
u32 addr,
u32 bitmask,
u32 data
);
void
odm_config_bb_txpwr_lmt_8822b(
struct dm_struct *dm,
u8 *regulation,
u8 *band,
u8 *bandwidth,
u8 *rate_section,
u8 *rf_path,
u8 *channel,
u8 *power_limit
);
void odm_config_rf_reg_8822b(struct dm_struct *dm, u32 addr, u32 data,
enum rf_path rf_path, u32 reg_addr);
void odm_config_rf_radio_a_8822b(struct dm_struct *dm, u32 addr, u32 data);
void odm_config_rf_radio_b_8822b(struct dm_struct *dm, u32 addr, u32 data);
void odm_config_mac_8822b(struct dm_struct *dm, u32 addr, u8 data);
void odm_update_agc_big_jump_lmt_8822b(struct dm_struct *dm, u32 addr,
u32 data);
void odm_config_bb_agc_8822b(struct dm_struct *dm, u32 addr, u32 bitmask,
u32 data);
void odm_config_bb_phy_reg_pg_8822b(struct dm_struct *dm, u32 band, u32 rf_path,
u32 tx_num, u32 addr, u32 bitmask,
u32 data);
void odm_config_bb_phy_8822b(struct dm_struct *dm, u32 addr, u32 bitmask,
u32 data);
void odm_config_bb_txpwr_lmt_8822b(struct dm_struct *dm, u8 *regulation,
u8 *band, u8 *bandwidth, u8 *rate_section,
u8 *rf_path, u8 *channel, u8 *power_limit);
#endif
#endif /* RTL8822B_SUPPORT == 1*/

910
hal/phydm/rtl8822b/phydm_rtl8822b.c
View File

File diff suppressed because it is too large Load Diff

50
hal/phydm/rtl8822b/phydm_rtl8822b.h
View File

@@ -23,39 +23,37 @@
*
*****************************************************************************/
#if (RTL8822B_SUPPORT == 1)
#ifndef __ODM_RTL8822B_H__
#ifndef __ODM_RTL8822B_H__
#define __ODM_RTL8822B_H__
#ifdef DYN_ANT_WEIGHTING_SUPPORT
void
phydm_dynamic_ant_weighting_8822b(
void *dm_void
);
void phydm_dynamic_ant_weighting_8822b(void *dm_void);
#endif
void
phydm_1rcca_setting(
struct dm_struct *dm,
boolean enable_1rcca
);
#ifdef CONFIG_MCC_DM
#ifdef DYN_ANT_WEIGHTING_SUPPORT
void phydm_dynamic_ant_weighting_mcc_8822b(void *dm_void);
#endif /*#ifdef DYN_ANT_WEIGHTING_SUPPORT*/
void phydm_fill_mcccmd( void *dm_void, u8 regid, u16 reg_add, u8 val0, u8 val1);
u8 phydm_check(void *dm_void);
void phydm_mcc_init (void *dm_void);
void phydm_mcc_switch(void *dm_void);
#endif /*#ifdef CONFIG_MCC_DM*/
void
phydm_somlrxhp_setting(
struct dm_struct *dm,
boolean switch_soml
);
void
phydm_hwsetting_8822b(
struct dm_struct *dm
);
void phydm_1rcca_setting(struct dm_struct *dm, boolean enable_1rcca);
void
phydm_config_tx2path_8822b(
struct dm_struct *dm,
enum wireless_set wireless_mode,
boolean is_tx2_path
);
void phydm_somlrxhp_setting(struct dm_struct *dm, boolean switch_soml);
#endif /* #define __ODM_RTL8822B_H__ */
#ifdef CONFIG_DYNAMIC_BYPASS
void phydm_pw_sat_8822b(struct dm_struct *dm, u8 rssi_value);
#endif
void phydm_hwsetting_8822b(struct dm_struct *dm);
void phydm_config_tx2path_8822b(struct dm_struct *dm,
enum wireless_set wireless_mode,
boolean is_tx2_path);
#endif /* @#define __ODM_RTL8822B_H__ */
#endif

17
hal/phydm/rtl8822b/version_rtl8822b.h
View File

@@ -23,11 +23,12 @@
*
*****************************************************************************/
/*RTL8822B PHY Parameters*/
/*
[Caution]
Since 01/Aug/2015, the commit rules will be simplified. You do not need to fill up the version.h anymore,
only the maintenance supervisor fills it before formal release.
*/
#define RELEASE_DATE_8822B 20171201
#define COMMIT_BY_8822B "BB_JOE"
#define RELEASE_VERSION_8822B 104
/*
* [Caution]
* Since 01/Aug/2015, the commit rules will be simplified.
* You do not need to fill up the version.h anymore,
* only the maintenance supervisor fills it before formal release.
*/
#define RELEASE_DATE_8822B 20181002
#define COMMIT_BY_8822B "BB_Colin"
#define RELEASE_VERSION_8822B 112