Update to 5.6.1

This commit is contained in:
Rin Cat
2019-09-21 05:30:30 -04:00
parent 953142179e
commit 0644d0b316
413 changed files with 179115 additions and 110562 deletions

View File

@@ -55,6 +55,7 @@
#define EFUSE_SIZE_8822B 1024
#define EEPROM_SIZE_8822B 768
#define BT_EFUSE_SIZE_8822B 128
#define PRTCT_EFUSE_SIZE_8822B 96
#define SEC_CAM_NUM_8822B 64

View File

@@ -37,7 +37,6 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
u8 value8;
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_mac_rx_ignore_cfg cfg;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
@@ -48,28 +47,24 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
phy_status_en = 0;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_STATUS:
drv_info_size = 4;
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_SNIFFER:
drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
phy_status_en = 1;
sniffer_en = 1;
plcp_hdr_en = 0;
cfg.hdr_chk_en = _FALSE;
break;
case HALMAC_DRV_INFO_PHY_PLCP:
drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
phy_status_en = 1;
sniffer_en = 0;
plcp_hdr_en = 1;
cfg.hdr_chk_en = _FALSE;
break;
default:
return HALMAC_RET_SW_CASE_NOT_SUPPORT;
@@ -79,8 +74,6 @@ cfg_drv_info_8822b(struct halmac_adapter *adapter,
HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
drv_info_size = RX_DESC_DUMMY_SIZE_8822B >> 3;
api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
value8 = HALMAC_REG_R8(REG_TRXFF_BNDY + 1);
@@ -127,22 +120,6 @@ void
cfg_rx_ignore_8822b(struct halmac_adapter *adapter,
struct halmac_mac_rx_ignore_cfg *cfg)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value8 = HALMAC_REG_R8(REG_BBPSF_CTRL);
/*mac header check enable*/
if (cfg->hdr_chk_en == _TRUE)
value8 |= BIT_BBPSF_MHCHKEN | BIT_BBPSF_MPDUCHKEN;
else
value8 &= ~(BIT_BBPSF_MHCHKEN) & (~(BIT_BBPSF_MPDUCHKEN));
HALMAC_REG_W8(REG_BBPSF_CTRL, value8);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
}
enum halmac_ret_status

View File

@@ -50,6 +50,10 @@ get_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
case HALMAC_HW_FW_MAX_SIZE:
*(u32 *)value = WLAN_FW_MAX_SIZE_8822B;
break;
case HALMAC_HW_SDIO_INT_LAT:
break;
case HALMAC_HW_SDIO_CLK_CNT:
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
@@ -94,14 +98,16 @@ set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
case HALMAC_HW_RXGCK_FIFO:
break;
case HALMAC_HW_RX_IGNORE:
cfg_rx_ignore_8822b(adapter,
(struct halmac_mac_rx_ignore_cfg *)value);
break;
case HALMAC_HW_LDO25_EN:
cfg_ldo25_8822b(adapter, *(u8 *)value);
break;
case HALMAC_HW_PCIE_REF_AUTOK:
break;
case HALMAC_HW_SDIO_WT_EN:
break;
case HALMAC_HW_SDIO_CLK_MONITOR:
break;
default:
return HALMAC_RET_PARA_NOT_SUPPORT;
}
@@ -122,8 +128,8 @@ set_hw_value_8822b(struct halmac_adapter *adapter, enum halmac_hw_id hw_id,
enum halmac_ret_status
fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
{
u16 chksum = 0;
u16 *data = (u16 *)NULL;
__le16 chksum = 0;
__le16 *data;
u32 i;
if (!txdesc) {
@@ -131,12 +137,12 @@ fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
return HALMAC_RET_NULL_POINTER;
}
if (adapter->tx_desc_checksum != _TRUE)
if (adapter->tx_desc_checksum != 1)
PLTFM_MSG_TRACE("[TRACE]chksum disable");
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000);
data = (u16 *)(txdesc);
data = (__le16 *)(txdesc);
/* HW clculates only 32byte */
for (i = 0; i < 8; i++)
@@ -144,9 +150,7 @@ fill_txdesc_check_sum_8822b(struct halmac_adapter *adapter, u8 *txdesc)
/* *(data + 2 * i) & *(data + (2 * i + 1) have endain issue*/
/* Process eniadn issue after checksum calculation */
chksum = rtk_le16_to_cpu(chksum);
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, chksum);
SET_TX_DESC_TXDESC_CHECKSUM(txdesc, rtk_le16_to_cpu(chksum));
return HALMAC_RET_SUCCESS;
}
@@ -159,7 +163,7 @@ cfg_ldo25_8822b(struct halmac_adapter *adapter, u8 enable)
value8 = HALMAC_REG_R8(REG_LDO_EFUSE_CTRL + 3);
if (enable == _TRUE)
if (enable == 1)
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 | BIT(7)));
else
HALMAC_REG_W8(REG_LDO_EFUSE_CTRL + 3, (u8)(value8 & ~BIT(7)));

View File

@@ -314,7 +314,7 @@
{HALMAC_SW_IO, HALMAC_GPIO15, HALMAC_GPIO_IN_OUT, \
0x40, BIT(1) | BIT(0), 0}
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO0_8822B[] = {
GPIO0_BT_GPIO0_8822B,
GPIO0_BT_ACT_8822B,
GPIO0_WL_ACT_8822B,
@@ -324,7 +324,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO0_8822B[] = {
GPIO0_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO1_8822B[] = {
GPIO1_BT_GPIO1_8822B,
GPIO1_BT_3DD_SYNC_A_8822B,
GPIO1_WL_CK_8822B,
@@ -335,7 +335,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO1_8822B[] = {
GPIO1_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO2_8822B[] = {
GPIO2_BT_GPIO2_8822B,
GPIO2_WL_STATE_8822B,
GPIO2_BT_STATE_8822B,
@@ -346,7 +346,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO2_8822B[] = {
GPIO2_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO3_8822B[] = {
GPIO3_BT_GPIO3_8822B,
GPIO3_WL_PRI_8822B,
GPIO3_BT_PRI_8822B,
@@ -357,7 +357,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO3_8822B[] = {
GPIO3_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO4_8822B[] = {
GPIO4_BT_SPI_D0_8822B,
GPIO4_WL_SPI_D0_8822B,
GPIO4_SDIO_INT_8822B,
@@ -369,7 +369,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO4_8822B[] = {
GPIO4_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO5_8822B[] = {
GPIO5_BT_SPI_D1_8822B,
GPIO5_WL_SPI_D1_8822B,
GPIO5_JTAG_TDI_8822B,
@@ -380,7 +380,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO5_8822B[] = {
GPIO5_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO6_8822B[] = {
GPIO6_BT_SPI_D2_8822B,
GPIO6_WL_SPI_D2_8822B,
GPIO6_EEDO_8822B,
@@ -394,7 +394,7 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO6_8822B[] = {
GPIO6_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO7_8822B[] = {
GPIO7_BT_SPI_D3_8822B,
GPIO7_WL_SPI_D3_8822B,
GPIO7_EEDI_8822B,
@@ -407,45 +407,45 @@ const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO7_8822B[] = {
GPIO7_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO8_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO8_8822B[] = {
GPIO8_WL_EXT_WOL_8822B,
GPIO8_WL_LED_8822B,
GPIO8_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO9_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO9_8822B[] = {
GPIO9_DIS_WL_N_8822B,
GPIO9_WL_EXT_WOL_8822B,
GPIO9_USCTS0_8822B,
GPIO9_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO10_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO10_8822B[] = {
GPIO10_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO11_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO11_8822B[] = {
GPIO11_DIS_BT_N_8822B,
GPIO11_USOUT0_8822B,
GPIO11_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO12_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO12_8822B[] = {
GPIO12_USIN0_8822B,
GPIO12_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO13_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO13_8822B[] = {
GPIO13_BT_WAKE_8822B,
GPIO13_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO14_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO14_8822B[] = {
GPIO14_UART_WAKE_8822B,
GPIO14_SW_IO_8822B
};
const struct halmac_gpio_pimux_list PIMUX_LIST_GPIO15_8822B[] = {
static const struct halmac_gpio_pimux_list PINMUX_LIST_GPIO15_8822B[] = {
GPIO15_EXT_XTAL_8822B,
GPIO15_SW_IO_8822B
};
@@ -498,6 +498,10 @@ pinmux_get_func_8822b(struct halmac_adapter *adapter,
case HALMAC_GPIO_FUNC_SDIO_INT:
*enable = (cur_func == HALMAC_SDIO_INT) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
*enable = (cur_func == HALMAC_GPIO13_14_WL_CTRL_EN) ? 1 : 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_0:
case HALMAC_GPIO_FUNC_SW_IO_1:
case HALMAC_GPIO_FUNC_SW_IO_2:
@@ -630,9 +634,13 @@ pinmux_free_func_8822b(struct halmac_adapter *adapter,
info->sw_io_12 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
info->bt_dev_wake = 0;
info->sw_io_13 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
info->bt_host_wake = 0;
info->sw_io_14 = 0;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
@@ -656,85 +664,87 @@ get_pinmux_list_8822b(struct halmac_adapter *adapter,
{
switch (gpio_func) {
case HALMAC_GPIO_FUNC_SW_IO_0:
*list = PIMUX_LIST_GPIO0_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO0_8822B);
*list = PINMUX_LIST_GPIO0_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO0_8822B);
*gpio_id = HALMAC_GPIO0;
break;
case HALMAC_GPIO_FUNC_SW_IO_1:
*list = PIMUX_LIST_GPIO1_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO1_8822B);
*list = PINMUX_LIST_GPIO1_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO1_8822B);
*gpio_id = HALMAC_GPIO1;
break;
case HALMAC_GPIO_FUNC_SW_IO_2:
*list = PIMUX_LIST_GPIO2_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO2_8822B);
*list = PINMUX_LIST_GPIO2_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO2_8822B);
*gpio_id = HALMAC_GPIO2;
break;
case HALMAC_GPIO_FUNC_SW_IO_3:
*list = PIMUX_LIST_GPIO3_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO3_8822B);
*list = PINMUX_LIST_GPIO3_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO3_8822B);
*gpio_id = HALMAC_GPIO3;
break;
case HALMAC_GPIO_FUNC_SW_IO_4:
case HALMAC_GPIO_FUNC_SDIO_INT:
*list = PIMUX_LIST_GPIO4_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO4_8822B);
*list = PINMUX_LIST_GPIO4_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO4_8822B);
*gpio_id = HALMAC_GPIO4;
break;
case HALMAC_GPIO_FUNC_SW_IO_5:
*list = PIMUX_LIST_GPIO5_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO5_8822B);
*list = PINMUX_LIST_GPIO5_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO5_8822B);
*gpio_id = HALMAC_GPIO5;
break;
case HALMAC_GPIO_FUNC_SW_IO_6:
*list = PIMUX_LIST_GPIO6_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO6_8822B);
*list = PINMUX_LIST_GPIO6_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO6_8822B);
*gpio_id = HALMAC_GPIO6;
break;
case HALMAC_GPIO_FUNC_SW_IO_7:
*list = PIMUX_LIST_GPIO7_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO7_8822B);
*list = PINMUX_LIST_GPIO7_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO7_8822B);
*gpio_id = HALMAC_GPIO7;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
*list = PIMUX_LIST_GPIO8_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO8_8822B);
*list = PINMUX_LIST_GPIO8_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO8_8822B);
*gpio_id = HALMAC_GPIO8;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
*list = PIMUX_LIST_GPIO9_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO9_8822B);
*list = PINMUX_LIST_GPIO9_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO9_8822B);
*gpio_id = HALMAC_GPIO9;
break;
case HALMAC_GPIO_FUNC_SW_IO_10:
*list = PIMUX_LIST_GPIO10_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO10_8822B);
*list = PINMUX_LIST_GPIO10_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO10_8822B);
*gpio_id = HALMAC_GPIO10;
break;
case HALMAC_GPIO_FUNC_SW_IO_11:
*list = PIMUX_LIST_GPIO11_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO11_8822B);
*list = PINMUX_LIST_GPIO11_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO11_8822B);
*gpio_id = HALMAC_GPIO11;
break;
case HALMAC_GPIO_FUNC_SW_IO_12:
*list = PIMUX_LIST_GPIO12_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO12_8822B);
*list = PINMUX_LIST_GPIO12_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO12_8822B);
*gpio_id = HALMAC_GPIO12;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
*list = PIMUX_LIST_GPIO13_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO13_8822B);
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
*list = PINMUX_LIST_GPIO13_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO13_8822B);
*gpio_id = HALMAC_GPIO13;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
*list = PIMUX_LIST_GPIO14_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO14_8822B);
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
*list = PINMUX_LIST_GPIO14_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO14_8822B);
*gpio_id = HALMAC_GPIO14;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:
*list = PIMUX_LIST_GPIO15_8822B;
*list_size = ARRAY_SIZE(PIMUX_LIST_GPIO15_8822B);
*list = PINMUX_LIST_GPIO15_8822B;
*list_size = ARRAY_SIZE(PINMUX_LIST_GPIO15_8822B);
*gpio_id = HALMAC_GPIO15;
break;
default:
@@ -786,10 +796,14 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_8:
case HALMAC_GPIO_FUNC_WL_LED:
if (info->sw_io_8 == 1 || info->wl_led == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_WL_LED:
if (info->sw_io_8 == 1 || info->wl_led == 1 ||
info->bt_dev_wake == 1 || info->bt_host_wake == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_9:
if (info->sw_io_9 == 1)
status = HALMAC_RET_PINMUX_USED;
@@ -807,11 +821,21 @@ chk_pinmux_valid_8822b(struct halmac_adapter *adapter,
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_13:
if (info->sw_io_13 == 1)
if (info->sw_io_13 == 1 || info->bt_dev_wake == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_BT_DEV_WAKE1:
if (info->sw_io_13 == 1 || info->bt_dev_wake == 1 ||
info->wl_led == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_14:
if (info->sw_io_14 == 1)
if (info->sw_io_14 == 1 || info->bt_host_wake == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_BT_HOST_WAKE1:
if (info->sw_io_14 == 1 || info->bt_host_wake == 1 ||
info->wl_led == 1)
status = HALMAC_RET_PINMUX_USED;
break;
case HALMAC_GPIO_FUNC_SW_IO_15:

View File

@@ -15,9 +15,16 @@
#include "halmac_init_8822b.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_PCIE_SUPPORT
#include "halmac_pcie_8822b.h"
#endif
#if HALMAC_SDIO_SUPPORT
#include "halmac_sdio_8822b.h"
#include "../halmac_sdio_88xx.h"
#endif
#if HALMAC_USB_SUPPORT
#include "halmac_usb_8822b.h"
#endif
#include "halmac_gpio_8822b.h"
#include "halmac_common_8822b.h"
#include "halmac_cfg_wmac_8822b.h"
@@ -26,6 +33,8 @@
#if HALMAC_8822B_SUPPORT
#define SYS_FUNC_EN 0xDC
#define RSVD_PG_DRV_NUM 16
#define RSVD_PG_H2C_EXTRAINFO_NUM 24
#define RSVD_PG_H2C_STATICINFO_NUM 8
@@ -33,7 +42,8 @@
#define RSVD_PG_CPU_INSTRUCTION_NUM 0
#define RSVD_PG_FW_TXBUF_NUM 4
#define RSVD_PG_CSIBUF_NUM 0
#define RSVD_PG_DLLB_NUM 32
#define RSVD_PG_DLLB_NUM (TX_FIFO_SIZE_8822B / 3 >> \
TX_PAGE_SIZE_SHIFT_88XX)
#define MAC_TRX_ENABLE (BIT_HCI_TXDMA_EN | BIT_HCI_RXDMA_EN | BIT_TXDMA_EN | \
BIT_RXDMA_EN | BIT_PROTOCOL_EN | BIT_SCHEDULE_EN | \
@@ -41,6 +51,29 @@
#define BLK_DESC_NUM 0x3
#define WLAN_SLOT_TIME 0x09
#define WLAN_PIFS_TIME 0x19
#define WLAN_SIFS_CCK_CONT_TX 0xA
#define WLAN_SIFS_OFDM_CONT_TX 0xE
#define WLAN_SIFS_CCK_TRX 0x10
#define WLAN_SIFS_OFDM_TRX 0x10
#define WLAN_VO_TXOP_LIMIT 0x186 /* unit : 32us */
#define WLAN_VI_TXOP_LIMIT 0x3BC /* unit : 32us */
#define WLAN_RDG_NAV 0x05
#define WLAN_TXOP_NAV 0x1B
#define WLAN_CCK_RX_TSF 0x30
#define WLAN_OFDM_RX_TSF 0x30
#define WLAN_TBTT_PROHIBIT 0x04 /* unit : 32us */
#define WLAN_TBTT_HOLD_TIME 0x064 /* unit : 32us */
#define WLAN_DRV_EARLY_INT 0x04
#define WLAN_BCN_DMA_TIME 0x02
#define WLAN_RX_FILTER0 0x0FFFFFFF
#define WLAN_RX_FILTER2 0xFFFF
#define WLAN_RCR_CFG 0xE400220E
#define WLAN_RXPKT_MAX_SZ 12288
#define WLAN_RXPKT_MAX_SZ_512 (WLAN_RXPKT_MAX_SZ >> 9)
#define WLAN_AMPDU_MAX_TIME 0x70
#define WLAN_RTS_LEN_TH 0xFF
#define WLAN_RTS_TX_TIME_TH 0x08
@@ -53,9 +86,26 @@
#define WLAN_BAR_RETRY_LIMIT 0x01
#define WLAN_RA_TRY_RATE_AGG_LIMIT 0x08
#define WLAN_TX_FUNC_CFG1 0x30
#define WLAN_TX_FUNC_CFG2 0x30
#define WLAN_MAC_OPT_NORM_FUNC1 0x98
#define WLAN_MAC_OPT_LB_FUNC1 0x80
#define WLAN_MAC_OPT_FUNC2 0x30810041
#define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \
(WLAN_SIFS_OFDM_CONT_TX << BIT_SHIFT_SIFS_OFDM_CTX) | \
(WLAN_SIFS_CCK_TRX << BIT_SHIFT_SIFS_CCK_TRX) | \
(WLAN_SIFS_OFDM_TRX << BIT_SHIFT_SIFS_OFDM_TRX))
#define WLAN_TBTT_TIME (WLAN_TBTT_PROHIBIT |\
(WLAN_TBTT_HOLD_TIME << BIT_SHIFT_TBTT_HOLD_TIME_AP))
#define WLAN_NAV_CFG (WLAN_RDG_NAV | (WLAN_TXOP_NAV << 16))
#define WLAN_RX_TSF_CFG (WLAN_CCK_RX_TSF | (WLAN_OFDM_RX_TSF) << 8)
#if HALMAC_PLATFORM_WINDOWS
/*SDIO RQPN Mapping for Windows, extra queue is not implemented in Driver code*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
@@ -78,7 +128,7 @@ struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
};
#else
/*SDIO RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
@@ -102,7 +152,7 @@ struct halmac_rqpn HALMAC_RQPN_SDIO_8822B[] = {
#endif
/*PCIE RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
@@ -125,7 +175,7 @@ struct halmac_rqpn HALMAC_RQPN_PCIE_8822B[] = {
};
/*USB 2 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ,
@@ -148,7 +198,7 @@ struct halmac_rqpn HALMAC_RQPN_2BULKOUT_8822B[] = {
};
/*USB 3 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
@@ -171,7 +221,7 @@ struct halmac_rqpn HALMAC_RQPN_3BULKOUT_8822B[] = {
};
/*USB 4 Bulkout RQPN Mapping*/
struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
static struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
{HALMAC_TRX_MODE_NORMAL,
HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ,
@@ -195,70 +245,70 @@ struct halmac_rqpn HALMAC_RQPN_4BULKOUT_8822B[] = {
#if HALMAC_PLATFORM_WINDOWS
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 640},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1},
};
#else
/*SDIO Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_SDIO_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
};
#endif
/*PCIE Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_PCIE_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
};
/*USB 2 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_2BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1},
};
/*USB 3 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_3BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_WMM, 256, 256, 256, 0, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1},
};
/*USB 4 Bulkout Page Number*/
struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
static struct halmac_pg_num HALMAC_PG_NUM_4BULKOUT_8822B[] = {
/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 1},
{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 1},
};
static enum halmac_ret_status
@@ -281,6 +331,7 @@ mount_api_8822b(struct halmac_adapter *adapter)
adapter->hw_cfg_info.efuse_size = EFUSE_SIZE_8822B;
adapter->hw_cfg_info.eeprom_size = EEPROM_SIZE_8822B;
adapter->hw_cfg_info.bt_efuse_size = BT_EFUSE_SIZE_8822B;
adapter->hw_cfg_info.prtct_efuse_size = PRTCT_EFUSE_SIZE_8822B;
adapter->hw_cfg_info.cam_entry_num = SEC_CAM_NUM_8822B;
adapter->hw_cfg_info.tx_fifo_size = TX_FIFO_SIZE_8822B;
adapter->hw_cfg_info.rx_fifo_size = RX_FIFO_SIZE_8822B;
@@ -290,6 +341,7 @@ mount_api_8822b(struct halmac_adapter *adapter)
adapter->txff_alloc.rsvd_drv_pg_num = RSVD_PG_DRV_NUM;
api->halmac_init_trx_cfg = init_trx_cfg_8822b;
api->halmac_init_system_cfg = init_system_cfg_8822b;
api->halmac_init_protocol_cfg = init_protocol_cfg_8822b;
api->halmac_init_h2c = init_h2c_8822b;
api->halmac_pinmux_get_func = pinmux_get_func_8822b;
@@ -300,8 +352,13 @@ mount_api_8822b(struct halmac_adapter *adapter)
api->halmac_cfg_drv_info = cfg_drv_info_8822b;
api->halmac_fill_txdesc_checksum = fill_txdesc_check_sum_8822b;
api->halmac_init_low_pwr = init_low_pwr_8822b;
api->halmac_pre_init_system_cfg = pre_init_system_cfg_8822b;
api->halmac_init_wmac_cfg = init_wmac_cfg_8822b;
api->halmac_init_edca_cfg = init_edca_cfg_8822b;
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
#if HALMAC_SDIO_SUPPORT
api->halmac_mac_power_switch = mac_pwr_switch_sdio_8822b;
api->halmac_phy_cfg = phy_cfg_sdio_8822b;
api->halmac_pcie_switch = pcie_switch_sdio_8822b;
@@ -322,16 +379,22 @@ mount_api_8822b(struct halmac_adapter *adapter)
if (!adapter->sdio_fs.macid_map)
PLTFM_MSG_ERR("[ERR]allocate macid_map!!\n");
}
#endif
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
#if HALMAC_USB_SUPPORT
api->halmac_mac_power_switch = mac_pwr_switch_usb_8822b;
api->halmac_phy_cfg = phy_cfg_usb_8822b;
api->halmac_pcie_switch = pcie_switch_usb_8822b;
api->halmac_interface_integration_tuning = intf_tun_usb_8822b;
#endif
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
#if HALMAC_PCIE_SUPPORT
api->halmac_mac_power_switch = mac_pwr_switch_pcie_8822b;
api->halmac_phy_cfg = phy_cfg_pcie_8822b;
api->halmac_pcie_switch = pcie_switch_8822b;
api->halmac_interface_integration_tuning = intf_tun_pcie_8822b;
api->halmac_cfgspc_set_pcie = cfgspc_set_pcie_8822b;
#endif
} else {
PLTFM_MSG_ERR("[ERR]Undefined IC\n");
return HALMAC_RET_CHIP_NOT_SUPPORT;
@@ -625,6 +688,40 @@ set_trx_fifo_info_8822b(struct halmac_adapter *adapter,
return HALMAC_RET_SUCCESS;
}
/**
* init_system_cfg_8822b() - init system config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_system_cfg_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u32 tmp = 0;
u32 value32;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
value32 = HALMAC_REG_R32(REG_CPU_DMEM_CON) | BIT_WL_PLATFORM_RST;
HALMAC_REG_W32(REG_CPU_DMEM_CON, value32);
HALMAC_REG_W8(REG_SYS_FUNC_EN + 1, SYS_FUNC_EN);
/*disable boot-from-flash for driver's DL FW*/
tmp = HALMAC_REG_R32(REG_MCUFW_CTRL);
if (tmp & BIT_BOOT_FSPI_EN) {
HALMAC_REG_W32(REG_MCUFW_CTRL, tmp & (~BIT_BOOT_FSPI_EN));
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG) & (~BIT_FSPI_EN);
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_protocol_cfg_8822b() - config protocol register
* @adapter : the adapter of halmac
@@ -643,7 +740,7 @@ init_protocol_cfg_8822b(struct halmac_adapter *adapter)
HALMAC_REG_W8_CLR(REG_SW_AMPDU_BURST_MODE_CTRL, BIT(6));
HALMAC_REG_W8(REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME);
HALMAC_REG_W8(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
HALMAC_REG_W8_SET(REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
value32 = WLAN_RTS_LEN_TH | (WLAN_RTS_TX_TIME_TH << 8) |
(WLAN_MAX_AGG_PKT_LIMIT << 16) |
@@ -721,4 +818,158 @@ init_h2c_8822b(struct halmac_adapter *adapter)
return HALMAC_RET_SUCCESS;
}
/**
* init_edca_cfg_8822b() - init EDCA config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_edca_cfg_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
/* Init SYNC_CLI_SEL : reg 0x5B4[6:4] = 0 */
HALMAC_REG_W8_CLR(REG_TIMER0_SRC_SEL, BIT(4) | BIT(5) | BIT(6));
/* Clear TX pause */
HALMAC_REG_W16(REG_TXPAUSE, 0x0000);
HALMAC_REG_W8(REG_SLOT, WLAN_SLOT_TIME);
HALMAC_REG_W8(REG_PIFS, WLAN_PIFS_TIME);
HALMAC_REG_W32(REG_SIFS, WLAN_SIFS_CFG);
HALMAC_REG_W16(REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT);
HALMAC_REG_W16(REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT);
HALMAC_REG_W32(REG_RD_NAV_NXT, WLAN_NAV_CFG);
HALMAC_REG_W16(REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
/* Set beacon cotnrol - enable TSF and other related functions */
HALMAC_REG_W8(REG_BCN_CTRL, (u8)(HALMAC_REG_R8(REG_BCN_CTRL) |
BIT_EN_BCN_FUNCTION));
/* Set send beacon related registers */
HALMAC_REG_W32(REG_TBTT_PROHIBIT, WLAN_TBTT_TIME);
HALMAC_REG_W8(REG_DRVERLYINT, WLAN_DRV_EARLY_INT);
HALMAC_REG_W8(REG_BCNDMATIM, WLAN_BCN_DMA_TIME);
HALMAC_REG_W8_CLR(REG_TX_PTCL_CTRL + 1, BIT(4));
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* init_wmac_cfg_8822b() - init wmac config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
init_wmac_cfg_8822b(struct halmac_adapter *adapter)
{
u8 value8;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_W32(REG_RXFLTMAP0, WLAN_RX_FILTER0);
HALMAC_REG_W16(REG_RXFLTMAP2, WLAN_RX_FILTER2);
HALMAC_REG_W32(REG_RCR, WLAN_RCR_CFG);
HALMAC_REG_W8(REG_RX_PKT_LIMIT, WLAN_RXPKT_MAX_SZ_512);
HALMAC_REG_W8(REG_TCR + 2, WLAN_TX_FUNC_CFG2);
HALMAC_REG_W8(REG_TCR + 1, WLAN_TX_FUNC_CFG1);
HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2);
if (adapter->hw_cfg_info.trx_mode == HALMAC_TRNSFER_NORMAL)
value8 = WLAN_MAC_OPT_NORM_FUNC1;
else
value8 = WLAN_MAC_OPT_LB_FUNC1;
HALMAC_REG_W8(REG_WMAC_OPTION_FUNCTION + 4, value8);
status = api->halmac_init_low_pwr(adapter);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* pre_init_system_cfg_8822b() - pre-init system config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pre_init_system_cfg_8822b(struct halmac_adapter *adapter)
{
u32 value32;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
u8 enable_bb;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_W8(REG_RSV_CTRL, 0);
if (adapter->intf == HALMAC_INTERFACE_SDIO) {
#if HALMAC_SDIO_SUPPORT
if (leave_sdio_suspend_88xx(adapter) != HALMAC_RET_SUCCESS)
return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
#endif
} else if (adapter->intf == HALMAC_INTERFACE_USB) {
#if HALMAC_USB_SUPPORT
if (HALMAC_REG_R8(REG_SYS_CFG2 + 3) == 0x20)
HALMAC_REG_W8(0xFE5B, HALMAC_REG_R8(0xFE5B) | BIT(4));
#endif
} else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
#if HALMAC_PCIE_SUPPORT
/* For PCIE power on fail issue */
HALMAC_REG_W8(REG_HCI_OPT_CTRL + 1,
HALMAC_REG_R8(REG_HCI_OPT_CTRL + 1) | BIT(0));
#endif
}
/* Config PIN Mux */
value32 = HALMAC_REG_R32(REG_PAD_CTRL1);
value32 = value32 & (~(BIT(28) | BIT(29)));
value32 = value32 | BIT(28) | BIT(29);
HALMAC_REG_W32(REG_PAD_CTRL1, value32);
value32 = HALMAC_REG_R32(REG_LED_CFG);
value32 = value32 & (~(BIT(25) | BIT(26)));
HALMAC_REG_W32(REG_LED_CFG, value32);
value32 = HALMAC_REG_R32(REG_GPIO_MUXCFG);
value32 = value32 & (~(BIT(2)));
value32 = value32 | BIT(2);
HALMAC_REG_W32(REG_GPIO_MUXCFG, value32);
enable_bb = 0;
set_hw_value_88xx(adapter, HALMAC_HW_EN_BB_RF, &enable_bb);
if (HALMAC_REG_R8(REG_SYS_CFG1 + 2) & BIT(4)) {
PLTFM_MSG_ERR("[ERR]test mode!!\n");
return HALMAC_RET_WLAN_MODE_FAIL;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT */

View File

@@ -26,12 +26,24 @@ mount_api_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_trx_cfg_8822b(struct halmac_adapter *adapter, enum halmac_trx_mode mode);
enum halmac_ret_status
init_system_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_protocol_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_h2c_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_edca_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
init_wmac_cfg_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
pre_init_system_cfg_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT */
#endif/* _HALMAC_INIT_8822B_H_ */

View File

@@ -1,214 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_pcie_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_pcie_88xx.h"
#include "../halmac_88xx_cfg.h"
#if HALMAC_8822B_SUPPORT
/**
* mac_pwr_switch_pcie_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
enum halmac_ret_status status;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]pwr = %x\n", pwr);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_PCIE_HRPWM1_V1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_PCIE_HRPWM1_V1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/* Check if power switch is needed */
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
if (pwr == HALMAC_MAC_POWER_OFF) {
status = trxdma_check_idle_88xx(adapter);
if (status != HALMAC_RET_SUCCESS)
return status;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg)
{
u8 value8;
u32 value32;
u8 speed = 0;
u32 cnt = 0;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (cfg == HALMAC_PCIE_GEN1) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(0));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN1_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN1_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else if (cfg == HALMAC_PCIE_GEN2) {
value8 = dbi_r8_88xx(adapter, LINK_CTRL2_REG_OFFSET) & 0xF0;
dbi_w8_88xx(adapter, LINK_CTRL2_REG_OFFSET, value8 | BIT(1));
value32 = dbi_r32_88xx(adapter, GEN2_CTRL_OFFSET);
dbi_w32_88xx(adapter, GEN2_CTRL_OFFSET, value32 | BIT(17));
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
cnt = 2000;
while ((speed != PCIE_GEN2_SPEED) && (cnt != 0)) {
PLTFM_DELAY_US(50);
speed = dbi_r8_88xx(adapter, LINK_STATUS_REG_OFFSET);
speed &= 0x0F;
cnt--;
}
if (speed != PCIE_GEN2_SPEED) {
PLTFM_MSG_ERR("[ERR]Speed change to GEN1 fail !\n");
return HALMAC_RET_FAIL;
}
} else {
PLTFM_MSG_ERR("[ERR]Error Speed !\n");
return HALMAC_RET_FAIL;
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_pcie_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
status = parse_intf_phy_88xx(adapter, pcie_gen1_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN1);
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, pcie_gen2_phy_param_8822b, pltfm,
HAL_INTF_PHY_PCIE_GEN2);
if (status != HALMAC_RET_SUCCESS)
return status;
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* intf_tun_pcie_8822b() - pcie interface fine tuning
* @adapter : the adapter of halmac
* Author : Rick Liu
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

View File

@@ -1,42 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_PCIE_H_
#define _HALMAC_API_8822B_PCIE_H_
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
extern struct halmac_intf_phy_para pcie_gen1_phy_param_8822b[];
extern struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[];
enum halmac_ret_status
mac_pwr_switch_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
pcie_switch_8822b(struct halmac_adapter *adapter, enum halmac_pcie_cfg cfg);
enum halmac_ret_status
phy_cfg_pcie_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
intf_tun_pcie_8822b(struct halmac_adapter *adapter);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_PCIE_H_ */

View File

@@ -14,6 +14,12 @@
******************************************************************************/
#include "../../halmac_type.h"
#if HALMAC_USB_SUPPORT
#include "halmac_usb_8822b.h"
#endif
#if HALMAC_PCIE_SUPPORT
#include "halmac_pcie_8822b.h"
#endif
/**
* ============ip sel item list============
@@ -39,7 +45,7 @@ struct halmac_intf_phy_para usb2_phy_param_8822b[] = {
HALMAC_INTF_PHY_PLATFORM_ALL},
};
struct halmac_intf_phy_para usb3_phy_8822b[] = {
struct halmac_intf_phy_para usb3_phy_param_8822b[] = {
/* {offset, value, ip sel, cut mask, platform mask} */
{0x0001, 0xA841,
HALMAC_IP_INTF_PHY,
@@ -147,4 +153,4 @@ struct halmac_intf_phy_para pcie_gen2_phy_param_8822b[] = {
HALMAC_INTF_PHY_PLATFORM_ALL},
};
#endif /* HALMAC_8822B_SUPPORT*/
#endif /* HALMAC_8822B_SUPPORT */

View File

@@ -17,7 +17,7 @@
#if HALMAC_8822B_SUPPORT
struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
@@ -56,7 +56,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDDIS_TO_CARDEMU_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0012,
HALMAC_PWR_CUT_ALL_MSK,
@@ -190,7 +190,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_ACT_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0003,
HALMAC_PWR_CUT_ALL_MSK,
@@ -264,7 +264,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_CARDEMU_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
@@ -281,11 +281,6 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(5), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
@@ -340,7 +335,12 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_CARDDIS_8822B[] = {
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(7), 0},
HALMAC_PWR_CMD_WRITE, BIT(7) | BIT(6), 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)},
{0x0086,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
@@ -399,7 +399,7 @@ struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[] = {
#if HALMAC_PLATFORM_TESTPROGRAM
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
@@ -438,8 +438,18 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_SUS_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0xFF0A,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0xFF0B,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0},
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
@@ -467,7 +477,7 @@ struct halmac_wlan_pwr_cfg TRANS_SUS_TO_CARDEMU_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0007,
HALMAC_PWR_CUT_ALL_MSK,
@@ -491,7 +501,7 @@ struct halmac_wlan_pwr_cfg TRANS_CARDEMU_TO_PDN_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0005,
HALMAC_PWR_CUT_ALL_MSK,
@@ -505,7 +515,7 @@ struct halmac_wlan_pwr_cfg TRANS_PDN_TO_CARDEMU_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
@@ -534,14 +544,34 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x42},
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDE},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x9B},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xA},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
@@ -629,7 +659,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_LPS_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0101,
HALMAC_PWR_CUT_ALL_MSK,
@@ -658,14 +688,34 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x40},
HALMAC_PWR_CMD_WRITE, 0xFF, 0xDE},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
HALMAC_PWR_INTF_PCI_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x20},
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x9B},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_USB_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0093,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0xA},
{0x0092,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_SDIO_MSK,
HALMAC_PWR_ADDR_MAC,
HALMAC_PWR_CMD_WRITE, 0xFF, 0x60},
{0x0090,
HALMAC_PWR_CUT_ALL_MSK,
HALMAC_PWR_INTF_ALL_MSK,
@@ -753,7 +803,7 @@ struct halmac_wlan_pwr_cfg TRANS_ACT_TO_DEEP_LPS_8822B[] = {
HALMAC_PWR_CMD_END, 0, 0},
};
struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
static struct halmac_wlan_pwr_cfg TRANS_LPS_TO_ACT_8822B[] = {
/* { offset, cut_msk, interface_msk, base|cmd, msk, value } */
{0x0080,
HALMAC_PWR_CUT_ALL_MSK,

View File

@@ -21,7 +21,7 @@
#if HALMAC_8822B_SUPPORT
#define HALMAC_8822B_PWR_SEQ_VER "V24"
#define HALMAC_8822B_PWR_SEQ_VER "V30"
extern struct halmac_wlan_pwr_cfg *card_en_flow_8822b[];
extern struct halmac_wlan_pwr_cfg *card_dis_flow_8822b[];

View File

@@ -1,868 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#include "halmac_sdio_8822b.h"
#include "halmac_pwr_seq_8822b.h"
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#include "../halmac_sdio_88xx.h"
#if HALMAC_8822B_SUPPORT
#define WLAN_ACQ_NUM_MAX 8
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt);
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter);
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt);
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first);
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num);
/**
* mac_pwr_switch_sdio_8822b() - switch mac power
* @adapter : the adapter of halmac
* @pwr : power state
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr)
{
u8 value8;
u8 rpwm;
u32 imr_backup;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
PLTFM_MSG_TRACE("[TRACE]8822B pwr seq ver = %s\n",
HALMAC_8822B_PWR_SEQ_VER);
adapter->rpwm = HALMAC_REG_R8(REG_SDIO_HRPWM1);
/* Check FW still exist or not */
if (HALMAC_REG_R16(REG_MCUFW_CTRL) == 0xC078) {
/* Leave 32K */
rpwm = (u8)((adapter->rpwm ^ BIT(7)) & 0x80);
HALMAC_REG_W8(REG_SDIO_HRPWM1, rpwm);
}
value8 = HALMAC_REG_R8(REG_CR);
if (value8 == 0xEA)
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
else
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
/*Check if power switch is needed*/
if (pwr == HALMAC_MAC_POWER_ON &&
adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_ON) {
PLTFM_MSG_WARN("[WARN]power state unchange!!\n");
return HALMAC_RET_PWR_UNCHANGE;
}
imr_backup = HALMAC_REG_R32(REG_SDIO_HIMR);
HALMAC_REG_W32(REG_SDIO_HIMR, 0);
if (pwr == HALMAC_MAC_POWER_OFF) {
adapter->pwr_off_flow_flag = 1;
if (pwr_seq_parser_88xx(adapter, card_dis_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power off cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_OFF_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_OFF;
adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
adapter->pwr_off_flow_flag = 0;
init_adapter_dynamic_param_88xx(adapter);
} else {
if (pwr_seq_parser_88xx(adapter, card_en_flow_8822b) !=
HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]Handle power on cmd error\n");
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
return HALMAC_RET_POWER_ON_FAIL;
}
adapter->halmac_state.mac_pwr = HALMAC_MAC_POWER_ON;
}
HALMAC_REG_W32(REG_SDIO_HIMR, imr_backup);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_tx_allowed_sdio_88xx() - check tx status
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size, include txdesc
* Author : Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size)
{
u16 *cur_fs = NULL;
u32 cnt;
u32 tx_agg_num;
u32 rqd_pg_num = 0;
u8 macid_cnt = 0;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!fs_info->macid_map) {
PLTFM_MSG_ERR("[ERR]halmac allocate Macid_map Fail!!\n");
return HALMAC_RET_MALLOC_FAIL;
}
PLTFM_MEMSET(fs_info->macid_map, 0x00, fs_info->macid_map_size);
tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(buf);
tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
status = chk_rqd_page_num_8822b(adapter, buf, &rqd_pg_num, &cur_fs,
&macid_cnt, tx_agg_num);
if (status != HALMAC_RET_SUCCESS)
return status;
cnt = 10;
do {
if ((u32)(*cur_fs + fs_info->pubq_pg_num) > rqd_pg_num) {
status = chk_oqt_8822b(adapter, tx_agg_num, buf,
macid_cnt);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_WARN("[WARN]oqt buffer full!!\n");
return status;
}
if (*cur_fs >= rqd_pg_num) {
*cur_fs -= (u16)rqd_pg_num;
} else {
fs_info->pubq_pg_num -=
(u16)(rqd_pg_num - *cur_fs);
*cur_fs = 0;
}
break;
}
update_sdio_free_page_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
} while (1);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_8_sdio_88xx() - read 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
u8 value8;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0) {
value8 = (u8)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_BYTE);
} else {
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
value8 = PLTFM_SDIO_CMD52_R(offset);
}
return value8;
}
/**
* halmac_reg_write_8_sdio_88xx() - write 1byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, value);
return HALMAC_RET_SUCCESS;
}
/**
* halmac_reg_read_16_sdio_88xx() - read 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u16 word;
u8 byte[2];
} value16 = { 0x0000 };
if ((offset & 0xFFFF0000) == 0)
return (u16)r_indir_sdio_88xx(adapter, offset, HALMAC_IO_WORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_R) {
value16.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value16.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value16.word = rtk_le16_to_cpu(value16.word);
} else {
value16.word = PLTFM_SDIO_CMD53_R16(offset);
}
return value16.word;
}
/**
* halmac_reg_write_16_sdio_88xx() - write 2byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
((offset & (2 - 1)) != 0) ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW ||
adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_W) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (2 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_WORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value & 0xFF00) >> 8));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W16(offset, value);
}
return status;
}
/**
* halmac_reg_read_32_sdio_88xx() - read 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
union {
u32 dword;
u8 byte[4];
} value32 = { 0x00000000 };
if ((offset & 0xFFFF0000) == 0)
return r_indir_sdio_88xx(adapter, offset, HALMAC_IO_DWORD);
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
value32.byte[0] = PLTFM_SDIO_CMD52_R(offset);
value32.byte[1] = PLTFM_SDIO_CMD52_R(offset + 1);
value32.byte[2] = PLTFM_SDIO_CMD52_R(offset + 2);
value32.byte[3] = PLTFM_SDIO_CMD52_R(offset + 3);
value32.dword = rtk_le32_to_cpu(value32.dword);
} else {
value32.dword = PLTFM_SDIO_CMD53_R32(offset);
}
return value32.dword;
}
/**
* halmac_reg_write_32_sdio_88xx() - write 4byte register
* @adapter : the adapter of halmac
* @offset : register offset
* @value : register value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value)
{
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
if (adapter->halmac_state.mac_pwr == HALMAC_MAC_POWER_OFF ||
(offset & (4 - 1)) != 0) {
if ((offset & 0xFFFF0000) == 0 && ((offset & (4 - 1)) == 0)) {
status = w_indir_sdio_88xx(adapter, offset, value,
HALMAC_IO_DWORD);
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD52_W(offset, (u8)(value & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 1,
(u8)((value >> 8) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 2,
(u8)((value >> 16) & 0xFF));
PLTFM_SDIO_CMD52_W(offset + 3,
(u8)((value >> 24) & 0xFF));
}
} else {
if ((offset & 0xFFFF0000) == 0)
offset |= WLAN_IOREG_OFFSET;
status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
if (status != HALMAC_RET_SUCCESS) {
PLTFM_MSG_ERR("[ERR]convert offset\n");
return status;
}
PLTFM_SDIO_CMD53_W32(offset, value);
}
return status;
}
static enum halmac_ret_status
chk_oqt_8822b(struct halmac_adapter *adapter, u32 tx_agg_num, u8 *buf,
u8 macid_cnt)
{
u32 cnt = 10;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
/*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
/*no need to check non_ac_oqt_number*/
/*HI and MGQ blocked will cause protocal issue before H_OQT being full*/
switch ((enum halmac_qsel)GET_TX_DESC_QSEL(buf)) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
if (macid_cnt > WLAN_ACQ_NUM_MAX &&
tx_agg_num > OQT_ENTRY_AC_8822B) {
PLTFM_MSG_WARN("[WARN]txagg num %d > oqt entry\n",
tx_agg_num);
PLTFM_MSG_WARN("[WARN]macid cnt %d > acq max\n",
macid_cnt);
}
cnt = 10;
do {
if (fs_info->ac_empty >= macid_cnt) {
fs_info->ac_empty -= macid_cnt;
break;
}
if (fs_info->ac_oqt_num >= tx_agg_num) {
fs_info->ac_empty = 0;
fs_info->ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
if (tx_agg_num > OQT_ENTRY_NOAC_8822B)
PLTFM_MSG_WARN("[WARN]tx_agg_num %d > oqt entry\n",
tx_agg_num, OQT_ENTRY_NOAC_8822B);
cnt = 10;
do {
if (fs_info->non_ac_oqt_num >= tx_agg_num) {
fs_info->non_ac_oqt_num -= (u8)tx_agg_num;
break;
}
update_oqt_free_space_8822b(adapter);
cnt--;
if (cnt == 0)
return HALMAC_RET_OQT_NOT_ENOUGH;
} while (1);
break;
default:
break;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_oqt_free_space_8822b(struct halmac_adapter *adapter)
{
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 value;
u32 oqt_free_page;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
oqt_free_page = HALMAC_REG_R32(REG_SDIO_OQT_FREE_TXPG_V1);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(oqt_free_page);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page);
fs_info->ac_empty = 0;
if (fs_info->ac_oqt_num == OQT_ENTRY_AC_8822B) {
value = HALMAC_REG_R8(REG_TXPKT_EMPTY);
while (value > 0) {
value = value & (value - 1);
fs_info->ac_empty++;
};
} else {
PLTFM_MSG_TRACE("[TRACE]free_space->ac_oqt_num %d != %d\n",
fs_info->ac_oqt_num, OQT_ENTRY_AC_8822B);
}
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
update_sdio_free_page_8822b(struct halmac_adapter *adapter)
{
u32 free_page = 0;
u32 free_page2 = 0;
u32 free_page3 = 0;
struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
u8 data[12] = {0};
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
HALMAC_REG_SDIO_RN(REG_SDIO_FREE_TXPG, 12, data);
free_page = rtk_le32_to_cpu(*(u32 *)(data + 0));
free_page2 = rtk_le32_to_cpu(*(u32 *)(data + 4));
free_page3 = rtk_le32_to_cpu(*(u32 *)(data + 8));
fs_info->hiq_pg_num = (u16)BIT_GET_HIQ_FREEPG_V1(free_page);
fs_info->miq_pg_num = (u16)BIT_GET_MID_FREEPG_V1(free_page);
fs_info->lowq_pg_num = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
fs_info->pubq_pg_num = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
fs_info->exq_pg_num = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
fs_info->ac_oqt_num = (u8)BIT_GET_AC_OQT_FREEPG_V1(free_page3);
fs_info->non_ac_oqt_num = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(free_page3);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
/**
* phy_cfg_sdio_8822b() - phy config
* @adapter : the adapter of halmac
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_pcie_switch_8821c() - pcie gen1/gen2 switch
* @adapter : the adapter of halmac
* @cfg : gen1/gen2 selection
* Author : KaiYuan Chang
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg)
{
return HALMAC_RET_NOT_SUPPORT;
}
/**
* intf_tun_sdio_8822b() - sdio interface fine tuning
* @adapter : the adapter of halmac
* Author : Ivan
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter)
{
return HALMAC_RET_SUCCESS;
}
/**
* halmac_get_sdio_tx_addr_sdio_88xx() - get CMD53 addr for the TX packet
* @adapter : the adapter of halmac
* @buf : tx packet, include txdesc
* @size : tx packet size
* @cmd53_addr : cmd53 addr value
* Author : KaiYuan Chang/Ivan Lin
* Return : enum halmac_ret_status
* More details of status code can be found in prototype document
*/
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr)
{
u32 len_unit4;
enum halmac_qsel queue_sel;
enum halmac_dma_mapping dma_mapping;
PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
if (!buf) {
PLTFM_MSG_ERR("[ERR]buf is NULL!!\n");
return HALMAC_RET_DATA_BUF_NULL;
}
if (size == 0) {
PLTFM_MSG_ERR("[ERR]size is 0!!\n");
return HALMAC_RET_DATA_SIZE_INCORRECT;
}
queue_sel = (enum halmac_qsel)GET_TX_DESC_QSEL(buf);
switch (queue_sel) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
len_unit4 = (size >> 2) + ((size & (4 - 1)) ? 1 : 0);
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_HIGH;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_NORMAL;
break;
case HALMAC_DMA_MAPPING_LOW:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_LOW;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cmd53_addr = HALMAC_SDIO_CMD_ADDR_TXFF_EXTRA;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
*cmd53_addr = (*cmd53_addr << 13) |
(len_unit4 & HALMAC_SDIO_4BYTE_LEN_MASK);
PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_qsel_8822b(struct halmac_adapter *adapter, u8 qsel_first, u8 *pkt,
u8 *macid_cnt)
{
u8 flag = 0;
u8 qsel_now;
u8 macid;
struct halmac_sdio_free_space *fs_info = &adapter->sdio_fs;
macid = (u8)GET_TX_DESC_MACID(pkt);
qsel_now = (u8)GET_TX_DESC_QSEL(pkt);
if (qsel_first == qsel_now) {
if (*(fs_info->macid_map + macid) == 0) {
*(fs_info->macid_map + macid) = 1;
(*macid_cnt)++;
}
} else {
switch ((enum halmac_qsel)qsel_now) {
case HALMAC_QSEL_VO:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO_V2)
flag = 1;
break;
case HALMAC_QSEL_VO_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VO)
flag = 1;
break;
case HALMAC_QSEL_VI:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI_V2)
flag = 1;
break;
case HALMAC_QSEL_VI_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_VI)
flag = 1;
break;
case HALMAC_QSEL_BE:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE_V2)
flag = 1;
break;
case HALMAC_QSEL_BE_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BE)
flag = 1;
break;
case HALMAC_QSEL_BK:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK_V2)
flag = 1;
break;
case HALMAC_QSEL_BK_V2:
if ((enum halmac_qsel)qsel_first != HALMAC_QSEL_BK)
flag = 1;
break;
case HALMAC_QSEL_MGNT:
case HALMAC_QSEL_HIGH:
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
flag = 1;
break;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range\n");
return HALMAC_RET_QSEL_INCORRECT;
}
if (flag == 1) {
PLTFM_MSG_ERR("[ERR]Multi-Qsel is not allowed\n");
PLTFM_MSG_ERR("[ERR]qsel = %d, %d\n",
qsel_first, qsel_now);
return HALMAC_RET_QSEL_INCORRECT;
}
if (*(fs_info->macid_map + macid + MACID_MAX_8822B) == 0) {
*(fs_info->macid_map + macid + MACID_MAX_8822B) = 1;
(*macid_cnt)++;
}
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_dma_mapping_8822b(struct halmac_adapter *adapter, u16 **cur_fs,
u8 qsel_first)
{
enum halmac_dma_mapping dma_mapping;
switch ((enum halmac_qsel)qsel_first) {
case HALMAC_QSEL_VO:
case HALMAC_QSEL_VO_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VO];
break;
case HALMAC_QSEL_VI:
case HALMAC_QSEL_VI_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_VI];
break;
case HALMAC_QSEL_BE:
case HALMAC_QSEL_BE_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BE];
break;
case HALMAC_QSEL_BK:
case HALMAC_QSEL_BK_V2:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_BK];
break;
case HALMAC_QSEL_MGNT:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_MG];
break;
case HALMAC_QSEL_HIGH:
dma_mapping = adapter->pq_map[HALMAC_PQ_MAP_HI];
break;
case HALMAC_QSEL_BCN:
case HALMAC_QSEL_CMD:
return HALMAC_RET_SUCCESS;
default:
PLTFM_MSG_ERR("[ERR]Qsel is out of range: %d\n", qsel_first);
return HALMAC_RET_QSEL_INCORRECT;
}
switch (dma_mapping) {
case HALMAC_DMA_MAPPING_HIGH:
*cur_fs = &adapter->sdio_fs.hiq_pg_num;
break;
case HALMAC_DMA_MAPPING_NORMAL:
*cur_fs = &adapter->sdio_fs.miq_pg_num;
break;
case HALMAC_DMA_MAPPING_LOW:
*cur_fs = &adapter->sdio_fs.lowq_pg_num;
break;
case HALMAC_DMA_MAPPING_EXTRA:
*cur_fs = &adapter->sdio_fs.exq_pg_num;
break;
default:
PLTFM_MSG_ERR("[ERR]DmaMapping is out of range\n");
return HALMAC_RET_DMA_MAP_INCORRECT;
}
return HALMAC_RET_SUCCESS;
}
static enum halmac_ret_status
chk_rqd_page_num_8822b(struct halmac_adapter *adapter, u8 *buf, u32 *rqd_pg_num,
u16 **cur_fs, u8 *macid_cnt, u32 tx_agg_num)
{
u8 *pkt;
u8 qsel_first;
u32 i;
u32 pkt_size;
enum halmac_ret_status status = HALMAC_RET_SUCCESS;
pkt = buf;
qsel_first = (u8)GET_TX_DESC_QSEL(pkt);
status = chk_dma_mapping_8822b(adapter, cur_fs, qsel_first);
if (status != HALMAC_RET_SUCCESS)
return status;
for (i = 0; i < tx_agg_num; i++) {
/*QSEL parser*/
status = chk_qsel_8822b(adapter, qsel_first, pkt, macid_cnt);
if (status != HALMAC_RET_SUCCESS)
return status;
/*Page number parser*/
pkt_size = GET_TX_DESC_TXPKTSIZE(pkt) + GET_TX_DESC_OFFSET(pkt);
*rqd_pg_num += (pkt_size >> TX_PAGE_SIZE_SHIFT_88XX) +
((pkt_size & (TX_PAGE_SIZE_88XX - 1)) ? 1 : 0);
pkt += HALMAC_ALIGN(GET_TX_DESC_TXPKTSIZE(pkt) +
(GET_TX_DESC_PKT_OFFSET(pkt) << 3) +
TX_DESC_SIZE_88XX, 8);
}
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/

View File

@@ -1,66 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _HALMAC_API_8822B_SDIO_H_
#define _HALMAC_API_8822B_SDIO_H_
#include "../../halmac_api.h"
#include "halmac_8822b_cfg.h"
#if HALMAC_8822B_SUPPORT
enum halmac_ret_status
mac_pwr_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_mac_power pwr);
enum halmac_ret_status
tx_allowed_sdio_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size);
u8
reg_r8_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w8_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u8 value);
u16
reg_r16_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w16_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u16 value);
u32
reg_r32_sdio_8822b(struct halmac_adapter *adapter, u32 offset);
enum halmac_ret_status
reg_w32_sdio_8822b(struct halmac_adapter *adapter, u32 offset, u32 value);
enum halmac_ret_status
phy_cfg_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_intf_phy_platform pltfm);
enum halmac_ret_status
pcie_switch_sdio_8822b(struct halmac_adapter *adapter,
enum halmac_pcie_cfg cfg);
enum halmac_ret_status
intf_tun_sdio_8822b(struct halmac_adapter *adapter);
enum halmac_ret_status
get_sdio_tx_addr_8822b(struct halmac_adapter *adapter, u8 *buf, u32 size,
u32 *cmd53_addr);
#endif /* HALMAC_8822B_SUPPORT*/
#endif/* _HALMAC_API_8822B_SDIO_H_ */

View File

@@ -18,7 +18,7 @@
#include "../halmac_init_88xx.h"
#include "../halmac_common_88xx.h"
#if HALMAC_8822B_SUPPORT
#if (HALMAC_8822B_SUPPORT && HALMAC_USB_SUPPORT)
/**
* mac_pwr_switch_usb_8822b() - switch mac power
@@ -118,7 +118,7 @@ phy_cfg_usb_8822b(struct halmac_adapter *adapter,
if (status != HALMAC_RET_SUCCESS)
return status;
status = parse_intf_phy_88xx(adapter, usb3_phy_8822b, pltfm,
status = parse_intf_phy_88xx(adapter, usb3_phy_param_8822b, pltfm,
HAL_INTF_PHY_USB3);
if (status != HALMAC_RET_SUCCESS)
@@ -156,4 +156,4 @@ intf_tun_usb_8822b(struct halmac_adapter *adapter)
return HALMAC_RET_SUCCESS;
}
#endif /* HALMAC_8822B_SUPPORT*/
#endif /* HALMAC_8822B_SUPPORT */

View File

@@ -18,10 +18,10 @@
#include "../../halmac_api.h"
#if HALMAC_8822B_SUPPORT
#if (HALMAC_8822B_SUPPORT && HALMAC_USB_SUPPORT)
extern struct halmac_intf_phy_para usb2_phy_param_8822b[];
extern struct halmac_intf_phy_para usb3_phy_8822b[];
extern struct halmac_intf_phy_para usb3_phy_param_8822b[];
enum halmac_ret_status
mac_pwr_switch_usb_8822b(struct halmac_adapter *adapter,