2018-11-23 20:19:44 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2015 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8822BU_HALINIT_C_
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#include <hal_data.h> /* HAL DATA */
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#include "../../hal_halmac.h" /* HALMAC API */
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#include "../rtl8822b.h" /* rtl8822b hal common define */
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#include "rtl8822bu.h"
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#ifndef CONFIG_USB_HCI
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#error "CONFIG_USB_HCI shall be on!\n"
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#endif
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static void _dbg_dump_macreg(PADAPTER padapter)
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{
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u32 offset = 0;
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u32 val32 = 0;
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u32 index = 0;
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for (index = 0; index < 64; index++) {
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offset = index * 4;
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val32 = rtw_read32(padapter, offset);
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RTW_INFO("offset : 0x%02x ,val:0x%08x\n", offset, val32);
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}
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}
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#ifdef CONFIG_FWLPS_IN_IPS
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u8 rtl8822bu_fw_ips_init(_adapter *padapter)
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{
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struct sreset_priv *psrtpriv = &GET_HAL_DATA(padapter)->srestpriv;
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struct debug_priv *pdbgpriv = &adapter_to_dvobj(padapter)->drv_dbg;
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
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if (pwrctl->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE
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&& GET_HAL_DATA(padapter)->bFWReady == _TRUE && pwrctl->pre_ips_type == 0) {
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systime start_time;
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u8 cpwm_orig, cpwm_now, rpwm;
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u8 bMacPwrCtrlOn = _TRUE;
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RTW_INFO("%s: Leaving FW_IPS\n", __func__);
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#ifdef CONFIG_LPS_LCLK
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/* for polling cpwm */
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cpwm_orig = 0;
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rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
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/* set rpwm */
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rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &rpwm);
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rpwm += 0x80;
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rpwm |= PS_ACK;
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rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
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RTW_INFO("%s: write rpwm=%02x\n", __func__, rpwm);
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pwrctl->tog = (rpwm + 0x80) & 0x80;
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/* do polling cpwm */
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start_time = rtw_get_current_time();
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do {
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rtw_mdelay_os(1);
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rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
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if ((cpwm_orig ^ cpwm_now) & 0x80) {
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#ifdef DBG_CHECK_FW_PS_STATE
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RTW_INFO("%s: polling cpwm ok when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n"
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, __func__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
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#endif /* DBG_CHECK_FW_PS_STATE */
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break;
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}
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if (rtw_get_passing_time_ms(start_time) > 100) {
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RTW_INFO("%s: polling cpwm timeout when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n",
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__func__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
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break;
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}
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} while (1);
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#endif /* CONFIG_LPS_LCLK */
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rtl8822b_set_FwPwrModeInIPS_cmd(padapter, 0);
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rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
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#ifdef CONFIG_LPS_LCLK
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#ifdef DBG_CHECK_FW_PS_STATE
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if (rtw_fw_ps_state(padapter) == _FAIL) {
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RTW_INFO("after hal init, fw ps state in 32k\n");
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pdbgpriv->dbg_ips_drvopen_fail_cnt++;
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}
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#endif /* DBG_CHECK_FW_PS_STATE */
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#endif /* CONFIG_LPS_LCLK */
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return _SUCCESS;
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}
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return _FAIL;
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}
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u8 rtl8822bu_fw_ips_deinit(_adapter *padapter)
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{
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struct sreset_priv *psrtpriv = &GET_HAL_DATA(padapter)->srestpriv;
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struct debug_priv *pdbgpriv = &adapter_to_dvobj(padapter)->drv_dbg;
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
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if (pwrctl->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE
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&& GET_HAL_DATA(padapter)->bFWReady == _TRUE && padapter->netif_up == _TRUE) {
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int cnt = 0;
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u8 val8 = 0, rpwm;
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RTW_INFO("%s: issue H2C to FW when entering IPS\n", __func__);
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rtl8822b_set_FwPwrModeInIPS_cmd(padapter, 0x1);
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#ifdef CONFIG_LPS_LCLK
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/* poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW. */
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do {
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val8 = rtw_read8(padapter, REG_HMETFR);
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cnt++;
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RTW_INFO("%s polling REG_HMETFR=0x%x, cnt=%d\n", __func__, val8, cnt);
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rtw_mdelay_os(10);
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} while (cnt < 100 && (val8 != 0));
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/* H2C done, enter 32k */
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if (val8 == 0) {
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/* set rpwm to enter 32k */
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rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &rpwm);
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rpwm += 0x80;
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rpwm |= BIT_SYS_CLK_8822B;
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rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
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RTW_INFO("%s: write rpwm=%02x\n", __func__, rpwm);
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pwrctl->tog = (val8 + 0x80) & 0x80;
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cnt = val8 = 0;
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do {
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val8 = rtw_read8(padapter, REG_CR);
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cnt++;
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RTW_INFO("%s polling 0x100=0x%x, cnt=%d\n", __func__, val8, cnt);
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rtw_mdelay_os(10);
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} while (cnt < 100 && (val8 != 0xEA));
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#ifdef DBG_CHECK_FW_PS_STATE
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if (val8 != 0xEA)
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RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n"
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, rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4)
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, rtw_read32(padapter, 0x1c8), rtw_read32(padapter, REG_HMETFR));
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#endif /* DBG_CHECK_FW_PS_STATE */
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} else {
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RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n"
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, rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4)
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, rtw_read32(padapter, 0x1c8), rtw_read32(padapter, REG_HMETFR));
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}
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RTW_INFO("polling done when entering IPS, check result : 0x100=0x%x, cnt=%d, MAC_1cc=0x%02x\n"
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, rtw_read8(padapter, REG_CR), cnt, rtw_read8(padapter, REG_HMETFR));
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pwrctl->pre_ips_type = 0;
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#endif /* CONFIG_LPS_LCLK */
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return _SUCCESS;
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}
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pdbgpriv->dbg_carddisable_cnt++;
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pwrctl->pre_ips_type = 1;
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return _FAIL;
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}
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#endif
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2019-09-21 09:30:30 +00:00
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#ifdef CONFIG_RTW_LED
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2018-11-23 20:19:44 +00:00
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static void init_hwled(PADAPTER adapter, u8 enable)
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{
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u8 mode = 0;
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struct led_priv *ledpriv = adapter_to_led(adapter);
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if (ledpriv->LedStrategy != HW_LED)
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return;
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rtw_halmac_led_cfg(adapter_to_dvobj(adapter), enable, mode);
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}
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2019-09-21 09:30:30 +00:00
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#endif
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2018-11-23 20:19:44 +00:00
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static void hal_init_misc(PADAPTER adapter)
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{
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#ifdef CONFIG_RTW_LED
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2019-09-21 09:30:30 +00:00
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struct led_priv *ledpriv = adapter_to_led(adapter);
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2018-11-23 20:19:44 +00:00
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init_hwled(adapter, 1);
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2019-09-21 09:30:30 +00:00
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#ifdef CONFIG_RTW_SW_LED
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if (ledpriv->bRegUseLed == _TRUE)
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rtw_halmac_led_cfg(adapter_to_dvobj(adapter), _TRUE, 3);
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#endif
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2018-11-23 20:19:44 +00:00
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#endif /* CONFIG_RTW_LED */
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}
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u32 rtl8822bu_init(PADAPTER padapter)
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{
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u8 status = _SUCCESS;
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systime init_start_time = rtw_get_current_time();
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#ifdef CONFIG_FWLPS_IN_IPS
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if (_SUCCESS == rtl8822bu_fw_ips_init(padapter))
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goto exit;
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#endif
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rtl8822b_init(padapter);
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hal_init_misc(padapter);
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exit:
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RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
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return status;
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}
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static void hal_deinit_misc(PADAPTER adapter)
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{
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#ifdef CONFIG_RTW_LED
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2019-09-21 09:30:30 +00:00
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struct led_priv *ledpriv = adapter_to_led(adapter);
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2018-11-23 20:19:44 +00:00
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init_hwled(adapter, 0);
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2019-09-21 09:30:30 +00:00
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#ifdef CONFIG_RTW_SW_LED
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if (ledpriv->bRegUseLed == _TRUE)
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rtw_halmac_led_cfg(adapter_to_dvobj(adapter), _FALSE, 3);
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#endif
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2018-11-23 20:19:44 +00:00
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#endif /* CONFIG_RTW_LED */
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}
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u32 rtl8822bu_deinit(PADAPTER padapter)
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{
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct dvobj_priv *pobj_priv = adapter_to_dvobj(padapter);
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u8 status = _TRUE;
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RTW_INFO("==> %s\n", __func__);
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#ifdef CONFIG_FWLPS_IN_IPS
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if (_SUCCESS == rtl8822bu_fw_ips_deinit(padapter))
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goto exit;
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#endif
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hal_deinit_misc(padapter);
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status = rtl8822b_deinit(padapter);
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if (status == _FALSE) {
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RTW_INFO("%s: rtl8822b_hal_deinit fail\n", __func__);
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return _FAIL;
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}
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exit:
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RTW_INFO("%s <==\n", __func__);
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return _SUCCESS;
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}
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u32 rtl8822bu_inirp_init(PADAPTER padapter)
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{
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u8 i, status;
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struct recv_buf *precvbuf;
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struct dvobj_priv *pdev = adapter_to_dvobj(padapter);
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struct intf_hdl *pintfhdl = &padapter->iopriv.intf;
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struct recv_priv *precvpriv = &(padapter->recvpriv);
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u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
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#endif
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#ifdef CONFIG_FWLPS_IN_IPS
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/* Do not sumbit urb repeat */
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
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if (pwrctl->bips_processing == _TRUE) {
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status = _SUCCESS;
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goto exit;
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}
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#endif /* CONFIG_FWLPS_IN_IPS */
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_read_port = pintfhdl->io_ops._read_port;
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status = _SUCCESS;
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precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
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/* issue Rx irp to receive data */
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precvbuf = (struct recv_buf *)precvpriv->precv_buf;
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for (i = 0; i < NR_RECVBUFF; i++) {
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if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (u8 *)precvbuf) == _FALSE) {
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status = _FAIL;
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goto exit;
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}
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precvbuf++;
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precvpriv->free_recv_buf_queue_cnt--;
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}
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#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
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if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) {
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status = _FAIL;
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RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]);
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goto exit;
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}
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_read_interrupt = pintfhdl->io_ops._read_interrupt;
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if (_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE) {
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status = _FAIL;
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}
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#endif
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exit:
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return status;
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}
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u32 rtl8822bu_inirp_deinit(PADAPTER padapter)
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{
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rtw_read_port_cancel(padapter);
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return _SUCCESS;
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}
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void rtl8822bu_update_interrupt_mask(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
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{
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HAL_DATA_TYPE *pHalData;
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u32 *himr;
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pHalData = GET_HAL_DATA(padapter);
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if (bHIMR0)
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himr = &(pHalData->IntrMask[0]);
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else
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himr = &(pHalData->IntrMask[1]);
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if (AddMSR)
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*himr |= AddMSR;
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if (RemoveMSR)
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*himr &= (~RemoveMSR);
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if (bHIMR0)
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rtw_write32(padapter, REG_HIMR0_8822B, *himr);
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else
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rtw_write32(padapter, REG_HIMR1_8822B, *himr);
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}
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static void config_chip_out_EP(PADAPTER padapter, u8 NumOutPipe)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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pHalData->OutEpQueueSel = 0;
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pHalData->OutEpNumber = 0;
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switch (NumOutPipe) {
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case 4:
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pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
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pHalData->OutEpNumber = 4;
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break;
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case 3:
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pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
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pHalData->OutEpNumber = 3;
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break;
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case 2:
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pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
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pHalData->OutEpNumber = 2;
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break;
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case 1:
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pHalData->OutEpQueueSel = TX_SELE_HQ;
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pHalData->OutEpNumber = 1;
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break;
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default:
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break;
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}
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RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, pHalData->OutEpQueueSel, pHalData->OutEpNumber);
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}
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static u8 usb_set_queue_pipe_mapping(PADAPTER padapter, u8 NumInPipe, u8 NumOutPipe)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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u8 result = _FALSE;
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config_chip_out_EP(padapter, NumOutPipe);
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/* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
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if (1 == pHalData->OutEpNumber) {
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if (1 != NumInPipe)
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return result;
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}
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result = Hal_MappingOutPipe(padapter, NumOutPipe);
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return result;
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}
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void rtl8822bu_interface_configure(PADAPTER padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
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if (IS_SUPER_SPEED_USB(padapter))
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pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE;
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else if (IS_HIGH_SPEED_USB(padapter))
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pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;
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else
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pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;
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pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber;
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#ifdef CONFIG_USB_TX_AGGREGATION
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/* according to value defined by halmac */
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pHalData->UsbTxAggMode = 1;
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rtw_halmac_usb_get_txagg_desc_num(pdvobjpriv, &pHalData->UsbTxAggDescNum);
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#endif /* CONFIG_USB_TX_AGGREGATION */
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#ifdef CONFIG_USB_RX_AGGREGATION
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/* according to value defined by halmac */
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pHalData->rxagg_mode = RX_AGG_USB;
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#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
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pHalData->rxagg_usb_size = 0x03;
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pHalData->rxagg_usb_timeout = 0x20;
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#elif defined(CONFIG_PLATFORM_HISILICON)
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/* use 16k to workaround for HISILICON platform */
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pHalData->rxagg_usb_size = 3;
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pHalData->rxagg_usb_timeout = 8;
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#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
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#endif /* CONFIG_USB_RX_AGGREGATION */
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usb_set_queue_pipe_mapping(padapter,
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pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
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}
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